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810 lines
19 KiB
810 lines
19 KiB
2 years ago
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// This file is generated from a similarly-named Perl script in the BoringSSL
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// source tree. Do not edit by hand.
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#if !defined(__has_feature)
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#define __has_feature(x) 0
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#endif
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#if __has_feature(memory_sanitizer) && !defined(OPENSSL_NO_ASM)
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#define OPENSSL_NO_ASM
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#endif
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#if !defined(OPENSSL_NO_ASM)
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#if defined(BORINGSSL_PREFIX)
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#include <boringssl_prefix_symbols_asm.h>
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#endif
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#include <openssl/arm_arch.h>
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#if __ARM_MAX_ARCH__>=7
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.text
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.code 32
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#undef __thumb2__
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.align 5
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Lrcon:
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.long 0x01,0x01,0x01,0x01
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.long 0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d @ rotate-n-splat
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.long 0x1b,0x1b,0x1b,0x1b
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.text
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.globl _aes_hw_set_encrypt_key
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.private_extern _aes_hw_set_encrypt_key
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#ifdef __thumb2__
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.thumb_func _aes_hw_set_encrypt_key
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#endif
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.align 5
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_aes_hw_set_encrypt_key:
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Lenc_key:
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mov r3,#-1
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cmp r0,#0
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beq Lenc_key_abort
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cmp r2,#0
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beq Lenc_key_abort
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mov r3,#-2
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cmp r1,#128
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blt Lenc_key_abort
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cmp r1,#256
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bgt Lenc_key_abort
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tst r1,#0x3f
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bne Lenc_key_abort
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adr r3,Lrcon
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cmp r1,#192
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veor q0,q0,q0
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vld1.8 {q3},[r0]!
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mov r1,#8 @ reuse r1
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vld1.32 {q1,q2},[r3]!
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blt Loop128
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beq L192
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b L256
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.align 4
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Loop128:
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vtbl.8 d20,{q3},d4
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vtbl.8 d21,{q3},d5
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vext.8 q9,q0,q3,#12
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vst1.32 {q3},[r2]!
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.byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
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subs r1,r1,#1
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veor q3,q3,q9
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vext.8 q9,q0,q9,#12
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veor q3,q3,q9
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vext.8 q9,q0,q9,#12
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veor q10,q10,q1
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veor q3,q3,q9
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vshl.u8 q1,q1,#1
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veor q3,q3,q10
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bne Loop128
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vld1.32 {q1},[r3]
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vtbl.8 d20,{q3},d4
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vtbl.8 d21,{q3},d5
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vext.8 q9,q0,q3,#12
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vst1.32 {q3},[r2]!
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.byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
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veor q3,q3,q9
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vext.8 q9,q0,q9,#12
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veor q3,q3,q9
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vext.8 q9,q0,q9,#12
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veor q10,q10,q1
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veor q3,q3,q9
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vshl.u8 q1,q1,#1
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veor q3,q3,q10
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vtbl.8 d20,{q3},d4
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vtbl.8 d21,{q3},d5
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vext.8 q9,q0,q3,#12
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vst1.32 {q3},[r2]!
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.byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
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veor q3,q3,q9
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vext.8 q9,q0,q9,#12
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veor q3,q3,q9
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vext.8 q9,q0,q9,#12
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veor q10,q10,q1
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veor q3,q3,q9
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veor q3,q3,q10
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vst1.32 {q3},[r2]
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add r2,r2,#0x50
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mov r12,#10
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b Ldone
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.align 4
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L192:
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vld1.8 {d16},[r0]!
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vmov.i8 q10,#8 @ borrow q10
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vst1.32 {q3},[r2]!
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vsub.i8 q2,q2,q10 @ adjust the mask
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Loop192:
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vtbl.8 d20,{q8},d4
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vtbl.8 d21,{q8},d5
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vext.8 q9,q0,q3,#12
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vst1.32 {d16},[r2]!
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.byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
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subs r1,r1,#1
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veor q3,q3,q9
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vext.8 q9,q0,q9,#12
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veor q3,q3,q9
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vext.8 q9,q0,q9,#12
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veor q3,q3,q9
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vdup.32 q9,d7[1]
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veor q9,q9,q8
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veor q10,q10,q1
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vext.8 q8,q0,q8,#12
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vshl.u8 q1,q1,#1
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veor q8,q8,q9
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veor q3,q3,q10
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veor q8,q8,q10
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vst1.32 {q3},[r2]!
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bne Loop192
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mov r12,#12
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add r2,r2,#0x20
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b Ldone
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.align 4
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L256:
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vld1.8 {q8},[r0]
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mov r1,#7
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mov r12,#14
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vst1.32 {q3},[r2]!
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Loop256:
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vtbl.8 d20,{q8},d4
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vtbl.8 d21,{q8},d5
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vext.8 q9,q0,q3,#12
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vst1.32 {q8},[r2]!
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.byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
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subs r1,r1,#1
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veor q3,q3,q9
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vext.8 q9,q0,q9,#12
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veor q3,q3,q9
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vext.8 q9,q0,q9,#12
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veor q10,q10,q1
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veor q3,q3,q9
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vshl.u8 q1,q1,#1
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veor q3,q3,q10
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vst1.32 {q3},[r2]!
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beq Ldone
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vdup.32 q10,d7[1]
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vext.8 q9,q0,q8,#12
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.byte 0x00,0x43,0xf0,0xf3 @ aese q10,q0
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veor q8,q8,q9
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vext.8 q9,q0,q9,#12
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veor q8,q8,q9
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vext.8 q9,q0,q9,#12
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veor q8,q8,q9
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veor q8,q8,q10
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b Loop256
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Ldone:
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str r12,[r2]
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mov r3,#0
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Lenc_key_abort:
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mov r0,r3 @ return value
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bx lr
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.globl _aes_hw_set_decrypt_key
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.private_extern _aes_hw_set_decrypt_key
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#ifdef __thumb2__
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.thumb_func _aes_hw_set_decrypt_key
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#endif
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.align 5
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_aes_hw_set_decrypt_key:
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stmdb sp!,{r4,lr}
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bl Lenc_key
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cmp r0,#0
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bne Ldec_key_abort
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sub r2,r2,#240 @ restore original r2
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mov r4,#-16
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add r0,r2,r12,lsl#4 @ end of key schedule
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vld1.32 {q0},[r2]
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vld1.32 {q1},[r0]
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vst1.32 {q0},[r0],r4
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vst1.32 {q1},[r2]!
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Loop_imc:
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vld1.32 {q0},[r2]
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vld1.32 {q1},[r0]
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.byte 0xc0,0x03,0xb0,0xf3 @ aesimc q0,q0
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.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
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vst1.32 {q0},[r0],r4
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vst1.32 {q1},[r2]!
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cmp r0,r2
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bhi Loop_imc
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vld1.32 {q0},[r2]
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.byte 0xc0,0x03,0xb0,0xf3 @ aesimc q0,q0
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vst1.32 {q0},[r0]
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eor r0,r0,r0 @ return value
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Ldec_key_abort:
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ldmia sp!,{r4,pc}
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.globl _aes_hw_encrypt
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.private_extern _aes_hw_encrypt
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#ifdef __thumb2__
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.thumb_func _aes_hw_encrypt
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#endif
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.align 5
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_aes_hw_encrypt:
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AARCH64_VALID_CALL_TARGET
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ldr r3,[r2,#240]
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vld1.32 {q0},[r2]!
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vld1.8 {q2},[r0]
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sub r3,r3,#2
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vld1.32 {q1},[r2]!
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Loop_enc:
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.byte 0x00,0x43,0xb0,0xf3 @ aese q2,q0
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.byte 0x84,0x43,0xb0,0xf3 @ aesmc q2,q2
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vld1.32 {q0},[r2]!
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subs r3,r3,#2
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.byte 0x02,0x43,0xb0,0xf3 @ aese q2,q1
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.byte 0x84,0x43,0xb0,0xf3 @ aesmc q2,q2
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vld1.32 {q1},[r2]!
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bgt Loop_enc
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.byte 0x00,0x43,0xb0,0xf3 @ aese q2,q0
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.byte 0x84,0x43,0xb0,0xf3 @ aesmc q2,q2
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vld1.32 {q0},[r2]
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.byte 0x02,0x43,0xb0,0xf3 @ aese q2,q1
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veor q2,q2,q0
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vst1.8 {q2},[r1]
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bx lr
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.globl _aes_hw_decrypt
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.private_extern _aes_hw_decrypt
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#ifdef __thumb2__
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.thumb_func _aes_hw_decrypt
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#endif
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.align 5
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_aes_hw_decrypt:
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AARCH64_VALID_CALL_TARGET
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ldr r3,[r2,#240]
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vld1.32 {q0},[r2]!
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vld1.8 {q2},[r0]
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sub r3,r3,#2
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vld1.32 {q1},[r2]!
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Loop_dec:
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.byte 0x40,0x43,0xb0,0xf3 @ aesd q2,q0
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.byte 0xc4,0x43,0xb0,0xf3 @ aesimc q2,q2
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vld1.32 {q0},[r2]!
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subs r3,r3,#2
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.byte 0x42,0x43,0xb0,0xf3 @ aesd q2,q1
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.byte 0xc4,0x43,0xb0,0xf3 @ aesimc q2,q2
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vld1.32 {q1},[r2]!
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bgt Loop_dec
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.byte 0x40,0x43,0xb0,0xf3 @ aesd q2,q0
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.byte 0xc4,0x43,0xb0,0xf3 @ aesimc q2,q2
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vld1.32 {q0},[r2]
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.byte 0x42,0x43,0xb0,0xf3 @ aesd q2,q1
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veor q2,q2,q0
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vst1.8 {q2},[r1]
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bx lr
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.globl _aes_hw_cbc_encrypt
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.private_extern _aes_hw_cbc_encrypt
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#ifdef __thumb2__
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.thumb_func _aes_hw_cbc_encrypt
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#endif
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.align 5
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_aes_hw_cbc_encrypt:
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mov ip,sp
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stmdb sp!,{r4,r5,r6,r7,r8,lr}
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vstmdb sp!,{d8,d9,d10,d11,d12,d13,d14,d15} @ ABI specification says so
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ldmia ip,{r4,r5} @ load remaining args
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subs r2,r2,#16
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mov r8,#16
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blo Lcbc_abort
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moveq r8,#0
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cmp r5,#0 @ en- or decrypting?
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ldr r5,[r3,#240]
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and r2,r2,#-16
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vld1.8 {q6},[r4]
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vld1.8 {q0},[r0],r8
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vld1.32 {q8,q9},[r3] @ load key schedule...
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sub r5,r5,#6
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add r7,r3,r5,lsl#4 @ pointer to last 7 round keys
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sub r5,r5,#2
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vld1.32 {q10,q11},[r7]!
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vld1.32 {q12,q13},[r7]!
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vld1.32 {q14,q15},[r7]!
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vld1.32 {q7},[r7]
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add r7,r3,#32
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mov r6,r5
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beq Lcbc_dec
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cmp r5,#2
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veor q0,q0,q6
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veor q5,q8,q7
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beq Lcbc_enc128
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|
|
vld1.32 {q2,q3},[r7]
|
||
|
|
add r7,r3,#16
|
||
|
|
add r6,r3,#16*4
|
||
|
|
add r12,r3,#16*5
|
||
|
|
.byte 0x20,0x03,0xb0,0xf3 @ aese q0,q8
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
add r14,r3,#16*6
|
||
|
|
add r3,r3,#16*7
|
||
|
|
b Lenter_cbc_enc
|
||
|
|
|
||
|
|
.align 4
|
||
|
|
Loop_cbc_enc:
|
||
|
|
.byte 0x20,0x03,0xb0,0xf3 @ aese q0,q8
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
vst1.8 {q6},[r1]!
|
||
|
|
Lenter_cbc_enc:
|
||
|
|
.byte 0x22,0x03,0xb0,0xf3 @ aese q0,q9
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
.byte 0x04,0x03,0xb0,0xf3 @ aese q0,q2
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
vld1.32 {q8},[r6]
|
||
|
|
cmp r5,#4
|
||
|
|
.byte 0x06,0x03,0xb0,0xf3 @ aese q0,q3
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
vld1.32 {q9},[r12]
|
||
|
|
beq Lcbc_enc192
|
||
|
|
|
||
|
|
.byte 0x20,0x03,0xb0,0xf3 @ aese q0,q8
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
vld1.32 {q8},[r14]
|
||
|
|
.byte 0x22,0x03,0xb0,0xf3 @ aese q0,q9
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
vld1.32 {q9},[r3]
|
||
|
|
nop
|
||
|
|
|
||
|
|
Lcbc_enc192:
|
||
|
|
.byte 0x20,0x03,0xb0,0xf3 @ aese q0,q8
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
subs r2,r2,#16
|
||
|
|
.byte 0x22,0x03,0xb0,0xf3 @ aese q0,q9
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
moveq r8,#0
|
||
|
|
.byte 0x24,0x03,0xb0,0xf3 @ aese q0,q10
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
.byte 0x26,0x03,0xb0,0xf3 @ aese q0,q11
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
vld1.8 {q8},[r0],r8
|
||
|
|
.byte 0x28,0x03,0xb0,0xf3 @ aese q0,q12
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
veor q8,q8,q5
|
||
|
|
.byte 0x2a,0x03,0xb0,0xf3 @ aese q0,q13
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
vld1.32 {q9},[r7] @ re-pre-load rndkey[1]
|
||
|
|
.byte 0x2c,0x03,0xb0,0xf3 @ aese q0,q14
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
.byte 0x2e,0x03,0xb0,0xf3 @ aese q0,q15
|
||
|
|
veor q6,q0,q7
|
||
|
|
bhs Loop_cbc_enc
|
||
|
|
|
||
|
|
vst1.8 {q6},[r1]!
|
||
|
|
b Lcbc_done
|
||
|
|
|
||
|
|
.align 5
|
||
|
|
Lcbc_enc128:
|
||
|
|
vld1.32 {q2,q3},[r7]
|
||
|
|
.byte 0x20,0x03,0xb0,0xf3 @ aese q0,q8
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
b Lenter_cbc_enc128
|
||
|
|
Loop_cbc_enc128:
|
||
|
|
.byte 0x20,0x03,0xb0,0xf3 @ aese q0,q8
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
vst1.8 {q6},[r1]!
|
||
|
|
Lenter_cbc_enc128:
|
||
|
|
.byte 0x22,0x03,0xb0,0xf3 @ aese q0,q9
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
subs r2,r2,#16
|
||
|
|
.byte 0x04,0x03,0xb0,0xf3 @ aese q0,q2
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
moveq r8,#0
|
||
|
|
.byte 0x06,0x03,0xb0,0xf3 @ aese q0,q3
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
.byte 0x24,0x03,0xb0,0xf3 @ aese q0,q10
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
.byte 0x26,0x03,0xb0,0xf3 @ aese q0,q11
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
vld1.8 {q8},[r0],r8
|
||
|
|
.byte 0x28,0x03,0xb0,0xf3 @ aese q0,q12
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
.byte 0x2a,0x03,0xb0,0xf3 @ aese q0,q13
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
.byte 0x2c,0x03,0xb0,0xf3 @ aese q0,q14
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
veor q8,q8,q5
|
||
|
|
.byte 0x2e,0x03,0xb0,0xf3 @ aese q0,q15
|
||
|
|
veor q6,q0,q7
|
||
|
|
bhs Loop_cbc_enc128
|
||
|
|
|
||
|
|
vst1.8 {q6},[r1]!
|
||
|
|
b Lcbc_done
|
||
|
|
.align 5
|
||
|
|
Lcbc_dec:
|
||
|
|
vld1.8 {q10},[r0]!
|
||
|
|
subs r2,r2,#32 @ bias
|
||
|
|
add r6,r5,#2
|
||
|
|
vorr q3,q0,q0
|
||
|
|
vorr q1,q0,q0
|
||
|
|
vorr q11,q10,q10
|
||
|
|
blo Lcbc_dec_tail
|
||
|
|
|
||
|
|
vorr q1,q10,q10
|
||
|
|
vld1.8 {q10},[r0]!
|
||
|
|
vorr q2,q0,q0
|
||
|
|
vorr q3,q1,q1
|
||
|
|
vorr q11,q10,q10
|
||
|
|
|
||
|
|
Loop3x_cbc_dec:
|
||
|
|
.byte 0x60,0x03,0xb0,0xf3 @ aesd q0,q8
|
||
|
|
.byte 0xc0,0x03,0xb0,0xf3 @ aesimc q0,q0
|
||
|
|
.byte 0x60,0x23,0xb0,0xf3 @ aesd q1,q8
|
||
|
|
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
|
||
|
|
.byte 0x60,0x43,0xf0,0xf3 @ aesd q10,q8
|
||
|
|
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
|
||
|
|
vld1.32 {q8},[r7]!
|
||
|
|
subs r6,r6,#2
|
||
|
|
.byte 0x62,0x03,0xb0,0xf3 @ aesd q0,q9
|
||
|
|
.byte 0xc0,0x03,0xb0,0xf3 @ aesimc q0,q0
|
||
|
|
.byte 0x62,0x23,0xb0,0xf3 @ aesd q1,q9
|
||
|
|
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
|
||
|
|
.byte 0x62,0x43,0xf0,0xf3 @ aesd q10,q9
|
||
|
|
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
|
||
|
|
vld1.32 {q9},[r7]!
|
||
|
|
bgt Loop3x_cbc_dec
|
||
|
|
|
||
|
|
.byte 0x60,0x03,0xb0,0xf3 @ aesd q0,q8
|
||
|
|
.byte 0xc0,0x03,0xb0,0xf3 @ aesimc q0,q0
|
||
|
|
.byte 0x60,0x23,0xb0,0xf3 @ aesd q1,q8
|
||
|
|
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
|
||
|
|
.byte 0x60,0x43,0xf0,0xf3 @ aesd q10,q8
|
||
|
|
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
|
||
|
|
veor q4,q6,q7
|
||
|
|
subs r2,r2,#0x30
|
||
|
|
veor q5,q2,q7
|
||
|
|
movlo r6,r2 @ r6, r6, is zero at this point
|
||
|
|
.byte 0x62,0x03,0xb0,0xf3 @ aesd q0,q9
|
||
|
|
.byte 0xc0,0x03,0xb0,0xf3 @ aesimc q0,q0
|
||
|
|
.byte 0x62,0x23,0xb0,0xf3 @ aesd q1,q9
|
||
|
|
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
|
||
|
|
.byte 0x62,0x43,0xf0,0xf3 @ aesd q10,q9
|
||
|
|
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
|
||
|
|
veor q9,q3,q7
|
||
|
|
add r0,r0,r6 @ r0 is adjusted in such way that
|
||
|
|
@ at exit from the loop q1-q10
|
||
|
|
@ are loaded with last "words"
|
||
|
|
vorr q6,q11,q11
|
||
|
|
mov r7,r3
|
||
|
|
.byte 0x68,0x03,0xb0,0xf3 @ aesd q0,q12
|
||
|
|
.byte 0xc0,0x03,0xb0,0xf3 @ aesimc q0,q0
|
||
|
|
.byte 0x68,0x23,0xb0,0xf3 @ aesd q1,q12
|
||
|
|
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
|
||
|
|
.byte 0x68,0x43,0xf0,0xf3 @ aesd q10,q12
|
||
|
|
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
|
||
|
|
vld1.8 {q2},[r0]!
|
||
|
|
.byte 0x6a,0x03,0xb0,0xf3 @ aesd q0,q13
|
||
|
|
.byte 0xc0,0x03,0xb0,0xf3 @ aesimc q0,q0
|
||
|
|
.byte 0x6a,0x23,0xb0,0xf3 @ aesd q1,q13
|
||
|
|
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
|
||
|
|
.byte 0x6a,0x43,0xf0,0xf3 @ aesd q10,q13
|
||
|
|
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
|
||
|
|
vld1.8 {q3},[r0]!
|
||
|
|
.byte 0x6c,0x03,0xb0,0xf3 @ aesd q0,q14
|
||
|
|
.byte 0xc0,0x03,0xb0,0xf3 @ aesimc q0,q0
|
||
|
|
.byte 0x6c,0x23,0xb0,0xf3 @ aesd q1,q14
|
||
|
|
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
|
||
|
|
.byte 0x6c,0x43,0xf0,0xf3 @ aesd q10,q14
|
||
|
|
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
|
||
|
|
vld1.8 {q11},[r0]!
|
||
|
|
.byte 0x6e,0x03,0xb0,0xf3 @ aesd q0,q15
|
||
|
|
.byte 0x6e,0x23,0xb0,0xf3 @ aesd q1,q15
|
||
|
|
.byte 0x6e,0x43,0xf0,0xf3 @ aesd q10,q15
|
||
|
|
vld1.32 {q8},[r7]! @ re-pre-load rndkey[0]
|
||
|
|
add r6,r5,#2
|
||
|
|
veor q4,q4,q0
|
||
|
|
veor q5,q5,q1
|
||
|
|
veor q10,q10,q9
|
||
|
|
vld1.32 {q9},[r7]! @ re-pre-load rndkey[1]
|
||
|
|
vst1.8 {q4},[r1]!
|
||
|
|
vorr q0,q2,q2
|
||
|
|
vst1.8 {q5},[r1]!
|
||
|
|
vorr q1,q3,q3
|
||
|
|
vst1.8 {q10},[r1]!
|
||
|
|
vorr q10,q11,q11
|
||
|
|
bhs Loop3x_cbc_dec
|
||
|
|
|
||
|
|
cmn r2,#0x30
|
||
|
|
beq Lcbc_done
|
||
|
|
nop
|
||
|
|
|
||
|
|
Lcbc_dec_tail:
|
||
|
|
.byte 0x60,0x23,0xb0,0xf3 @ aesd q1,q8
|
||
|
|
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
|
||
|
|
.byte 0x60,0x43,0xf0,0xf3 @ aesd q10,q8
|
||
|
|
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
|
||
|
|
vld1.32 {q8},[r7]!
|
||
|
|
subs r6,r6,#2
|
||
|
|
.byte 0x62,0x23,0xb0,0xf3 @ aesd q1,q9
|
||
|
|
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
|
||
|
|
.byte 0x62,0x43,0xf0,0xf3 @ aesd q10,q9
|
||
|
|
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
|
||
|
|
vld1.32 {q9},[r7]!
|
||
|
|
bgt Lcbc_dec_tail
|
||
|
|
|
||
|
|
.byte 0x60,0x23,0xb0,0xf3 @ aesd q1,q8
|
||
|
|
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
|
||
|
|
.byte 0x60,0x43,0xf0,0xf3 @ aesd q10,q8
|
||
|
|
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
|
||
|
|
.byte 0x62,0x23,0xb0,0xf3 @ aesd q1,q9
|
||
|
|
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
|
||
|
|
.byte 0x62,0x43,0xf0,0xf3 @ aesd q10,q9
|
||
|
|
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
|
||
|
|
.byte 0x68,0x23,0xb0,0xf3 @ aesd q1,q12
|
||
|
|
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
|
||
|
|
.byte 0x68,0x43,0xf0,0xf3 @ aesd q10,q12
|
||
|
|
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
|
||
|
|
cmn r2,#0x20
|
||
|
|
.byte 0x6a,0x23,0xb0,0xf3 @ aesd q1,q13
|
||
|
|
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
|
||
|
|
.byte 0x6a,0x43,0xf0,0xf3 @ aesd q10,q13
|
||
|
|
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
|
||
|
|
veor q5,q6,q7
|
||
|
|
.byte 0x6c,0x23,0xb0,0xf3 @ aesd q1,q14
|
||
|
|
.byte 0xc2,0x23,0xb0,0xf3 @ aesimc q1,q1
|
||
|
|
.byte 0x6c,0x43,0xf0,0xf3 @ aesd q10,q14
|
||
|
|
.byte 0xe4,0x43,0xf0,0xf3 @ aesimc q10,q10
|
||
|
|
veor q9,q3,q7
|
||
|
|
.byte 0x6e,0x23,0xb0,0xf3 @ aesd q1,q15
|
||
|
|
.byte 0x6e,0x43,0xf0,0xf3 @ aesd q10,q15
|
||
|
|
beq Lcbc_dec_one
|
||
|
|
veor q5,q5,q1
|
||
|
|
veor q9,q9,q10
|
||
|
|
vorr q6,q11,q11
|
||
|
|
vst1.8 {q5},[r1]!
|
||
|
|
vst1.8 {q9},[r1]!
|
||
|
|
b Lcbc_done
|
||
|
|
|
||
|
|
Lcbc_dec_one:
|
||
|
|
veor q5,q5,q10
|
||
|
|
vorr q6,q11,q11
|
||
|
|
vst1.8 {q5},[r1]!
|
||
|
|
|
||
|
|
Lcbc_done:
|
||
|
|
vst1.8 {q6},[r4]
|
||
|
|
Lcbc_abort:
|
||
|
|
vldmia sp!,{d8,d9,d10,d11,d12,d13,d14,d15}
|
||
|
|
ldmia sp!,{r4,r5,r6,r7,r8,pc}
|
||
|
|
|
||
|
|
.globl _aes_hw_ctr32_encrypt_blocks
|
||
|
|
.private_extern _aes_hw_ctr32_encrypt_blocks
|
||
|
|
#ifdef __thumb2__
|
||
|
|
.thumb_func _aes_hw_ctr32_encrypt_blocks
|
||
|
|
#endif
|
||
|
|
.align 5
|
||
|
|
_aes_hw_ctr32_encrypt_blocks:
|
||
|
|
mov ip,sp
|
||
|
|
stmdb sp!,{r4,r5,r6,r7,r8,r9,r10,lr}
|
||
|
|
vstmdb sp!,{d8,d9,d10,d11,d12,d13,d14,d15} @ ABI specification says so
|
||
|
|
ldr r4, [ip] @ load remaining arg
|
||
|
|
ldr r5,[r3,#240]
|
||
|
|
|
||
|
|
ldr r8, [r4, #12]
|
||
|
|
vld1.32 {q0},[r4]
|
||
|
|
|
||
|
|
vld1.32 {q8,q9},[r3] @ load key schedule...
|
||
|
|
sub r5,r5,#4
|
||
|
|
mov r12,#16
|
||
|
|
cmp r2,#2
|
||
|
|
add r7,r3,r5,lsl#4 @ pointer to last 5 round keys
|
||
|
|
sub r5,r5,#2
|
||
|
|
vld1.32 {q12,q13},[r7]!
|
||
|
|
vld1.32 {q14,q15},[r7]!
|
||
|
|
vld1.32 {q7},[r7]
|
||
|
|
add r7,r3,#32
|
||
|
|
mov r6,r5
|
||
|
|
movlo r12,#0
|
||
|
|
|
||
|
|
@ ARM Cortex-A57 and Cortex-A72 cores running in 32-bit mode are
|
||
|
|
@ affected by silicon errata #1742098 [0] and #1655431 [1],
|
||
|
|
@ respectively, where the second instruction of an aese/aesmc
|
||
|
|
@ instruction pair may execute twice if an interrupt is taken right
|
||
|
|
@ after the first instruction consumes an input register of which a
|
||
|
|
@ single 32-bit lane has been updated the last time it was modified.
|
||
|
|
@
|
||
|
|
@ This function uses a counter in one 32-bit lane. The
|
||
|
|
@ could write to q1 and q10 directly, but that trips this bugs.
|
||
|
|
@ We write to q6 and copy to the final register as a workaround.
|
||
|
|
@
|
||
|
|
@ [0] ARM-EPM-049219 v23 Cortex-A57 MPCore Software Developers Errata Notice
|
||
|
|
@ [1] ARM-EPM-012079 v11.0 Cortex-A72 MPCore Software Developers Errata Notice
|
||
|
|
#ifndef __ARMEB__
|
||
|
|
rev r8, r8
|
||
|
|
#endif
|
||
|
|
add r10, r8, #1
|
||
|
|
vorr q6,q0,q0
|
||
|
|
rev r10, r10
|
||
|
|
vmov.32 d13[1],r10
|
||
|
|
add r8, r8, #2
|
||
|
|
vorr q1,q6,q6
|
||
|
|
bls Lctr32_tail
|
||
|
|
rev r12, r8
|
||
|
|
vmov.32 d13[1],r12
|
||
|
|
sub r2,r2,#3 @ bias
|
||
|
|
vorr q10,q6,q6
|
||
|
|
b Loop3x_ctr32
|
||
|
|
|
||
|
|
.align 4
|
||
|
|
Loop3x_ctr32:
|
||
|
|
.byte 0x20,0x03,0xb0,0xf3 @ aese q0,q8
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
.byte 0x20,0x23,0xb0,0xf3 @ aese q1,q8
|
||
|
|
.byte 0x82,0x23,0xb0,0xf3 @ aesmc q1,q1
|
||
|
|
.byte 0x20,0x43,0xf0,0xf3 @ aese q10,q8
|
||
|
|
.byte 0xa4,0x43,0xf0,0xf3 @ aesmc q10,q10
|
||
|
|
vld1.32 {q8},[r7]!
|
||
|
|
subs r6,r6,#2
|
||
|
|
.byte 0x22,0x03,0xb0,0xf3 @ aese q0,q9
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
.byte 0x22,0x23,0xb0,0xf3 @ aese q1,q9
|
||
|
|
.byte 0x82,0x23,0xb0,0xf3 @ aesmc q1,q1
|
||
|
|
.byte 0x22,0x43,0xf0,0xf3 @ aese q10,q9
|
||
|
|
.byte 0xa4,0x43,0xf0,0xf3 @ aesmc q10,q10
|
||
|
|
vld1.32 {q9},[r7]!
|
||
|
|
bgt Loop3x_ctr32
|
||
|
|
|
||
|
|
.byte 0x20,0x03,0xb0,0xf3 @ aese q0,q8
|
||
|
|
.byte 0x80,0x83,0xb0,0xf3 @ aesmc q4,q0
|
||
|
|
.byte 0x20,0x23,0xb0,0xf3 @ aese q1,q8
|
||
|
|
.byte 0x82,0xa3,0xb0,0xf3 @ aesmc q5,q1
|
||
|
|
vld1.8 {q2},[r0]!
|
||
|
|
add r9,r8,#1
|
||
|
|
.byte 0x20,0x43,0xf0,0xf3 @ aese q10,q8
|
||
|
|
.byte 0xa4,0x43,0xf0,0xf3 @ aesmc q10,q10
|
||
|
|
vld1.8 {q3},[r0]!
|
||
|
|
rev r9,r9
|
||
|
|
.byte 0x22,0x83,0xb0,0xf3 @ aese q4,q9
|
||
|
|
.byte 0x88,0x83,0xb0,0xf3 @ aesmc q4,q4
|
||
|
|
.byte 0x22,0xa3,0xb0,0xf3 @ aese q5,q9
|
||
|
|
.byte 0x8a,0xa3,0xb0,0xf3 @ aesmc q5,q5
|
||
|
|
vld1.8 {q11},[r0]!
|
||
|
|
mov r7,r3
|
||
|
|
.byte 0x22,0x43,0xf0,0xf3 @ aese q10,q9
|
||
|
|
.byte 0xa4,0x23,0xf0,0xf3 @ aesmc q9,q10
|
||
|
|
.byte 0x28,0x83,0xb0,0xf3 @ aese q4,q12
|
||
|
|
.byte 0x88,0x83,0xb0,0xf3 @ aesmc q4,q4
|
||
|
|
.byte 0x28,0xa3,0xb0,0xf3 @ aese q5,q12
|
||
|
|
.byte 0x8a,0xa3,0xb0,0xf3 @ aesmc q5,q5
|
||
|
|
veor q2,q2,q7
|
||
|
|
add r10,r8,#2
|
||
|
|
.byte 0x28,0x23,0xf0,0xf3 @ aese q9,q12
|
||
|
|
.byte 0xa2,0x23,0xf0,0xf3 @ aesmc q9,q9
|
||
|
|
veor q3,q3,q7
|
||
|
|
add r8,r8,#3
|
||
|
|
.byte 0x2a,0x83,0xb0,0xf3 @ aese q4,q13
|
||
|
|
.byte 0x88,0x83,0xb0,0xf3 @ aesmc q4,q4
|
||
|
|
.byte 0x2a,0xa3,0xb0,0xf3 @ aese q5,q13
|
||
|
|
.byte 0x8a,0xa3,0xb0,0xf3 @ aesmc q5,q5
|
||
|
|
@ Note the logic to update q0, q1, and q1 is written to work
|
||
|
|
@ around a bug in ARM Cortex-A57 and Cortex-A72 cores running in
|
||
|
|
@ 32-bit mode. See the comment above.
|
||
|
|
veor q11,q11,q7
|
||
|
|
vmov.32 d13[1], r9
|
||
|
|
.byte 0x2a,0x23,0xf0,0xf3 @ aese q9,q13
|
||
|
|
.byte 0xa2,0x23,0xf0,0xf3 @ aesmc q9,q9
|
||
|
|
vorr q0,q6,q6
|
||
|
|
rev r10,r10
|
||
|
|
.byte 0x2c,0x83,0xb0,0xf3 @ aese q4,q14
|
||
|
|
.byte 0x88,0x83,0xb0,0xf3 @ aesmc q4,q4
|
||
|
|
vmov.32 d13[1], r10
|
||
|
|
rev r12,r8
|
||
|
|
.byte 0x2c,0xa3,0xb0,0xf3 @ aese q5,q14
|
||
|
|
.byte 0x8a,0xa3,0xb0,0xf3 @ aesmc q5,q5
|
||
|
|
vorr q1,q6,q6
|
||
|
|
vmov.32 d13[1], r12
|
||
|
|
.byte 0x2c,0x23,0xf0,0xf3 @ aese q9,q14
|
||
|
|
.byte 0xa2,0x23,0xf0,0xf3 @ aesmc q9,q9
|
||
|
|
vorr q10,q6,q6
|
||
|
|
subs r2,r2,#3
|
||
|
|
.byte 0x2e,0x83,0xb0,0xf3 @ aese q4,q15
|
||
|
|
.byte 0x2e,0xa3,0xb0,0xf3 @ aese q5,q15
|
||
|
|
.byte 0x2e,0x23,0xf0,0xf3 @ aese q9,q15
|
||
|
|
|
||
|
|
veor q2,q2,q4
|
||
|
|
vld1.32 {q8},[r7]! @ re-pre-load rndkey[0]
|
||
|
|
vst1.8 {q2},[r1]!
|
||
|
|
veor q3,q3,q5
|
||
|
|
mov r6,r5
|
||
|
|
vst1.8 {q3},[r1]!
|
||
|
|
veor q11,q11,q9
|
||
|
|
vld1.32 {q9},[r7]! @ re-pre-load rndkey[1]
|
||
|
|
vst1.8 {q11},[r1]!
|
||
|
|
bhs Loop3x_ctr32
|
||
|
|
|
||
|
|
adds r2,r2,#3
|
||
|
|
beq Lctr32_done
|
||
|
|
cmp r2,#1
|
||
|
|
mov r12,#16
|
||
|
|
moveq r12,#0
|
||
|
|
|
||
|
|
Lctr32_tail:
|
||
|
|
.byte 0x20,0x03,0xb0,0xf3 @ aese q0,q8
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
.byte 0x20,0x23,0xb0,0xf3 @ aese q1,q8
|
||
|
|
.byte 0x82,0x23,0xb0,0xf3 @ aesmc q1,q1
|
||
|
|
vld1.32 {q8},[r7]!
|
||
|
|
subs r6,r6,#2
|
||
|
|
.byte 0x22,0x03,0xb0,0xf3 @ aese q0,q9
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
.byte 0x22,0x23,0xb0,0xf3 @ aese q1,q9
|
||
|
|
.byte 0x82,0x23,0xb0,0xf3 @ aesmc q1,q1
|
||
|
|
vld1.32 {q9},[r7]!
|
||
|
|
bgt Lctr32_tail
|
||
|
|
|
||
|
|
.byte 0x20,0x03,0xb0,0xf3 @ aese q0,q8
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
.byte 0x20,0x23,0xb0,0xf3 @ aese q1,q8
|
||
|
|
.byte 0x82,0x23,0xb0,0xf3 @ aesmc q1,q1
|
||
|
|
.byte 0x22,0x03,0xb0,0xf3 @ aese q0,q9
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
.byte 0x22,0x23,0xb0,0xf3 @ aese q1,q9
|
||
|
|
.byte 0x82,0x23,0xb0,0xf3 @ aesmc q1,q1
|
||
|
|
vld1.8 {q2},[r0],r12
|
||
|
|
.byte 0x28,0x03,0xb0,0xf3 @ aese q0,q12
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
.byte 0x28,0x23,0xb0,0xf3 @ aese q1,q12
|
||
|
|
.byte 0x82,0x23,0xb0,0xf3 @ aesmc q1,q1
|
||
|
|
vld1.8 {q3},[r0]
|
||
|
|
.byte 0x2a,0x03,0xb0,0xf3 @ aese q0,q13
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
.byte 0x2a,0x23,0xb0,0xf3 @ aese q1,q13
|
||
|
|
.byte 0x82,0x23,0xb0,0xf3 @ aesmc q1,q1
|
||
|
|
veor q2,q2,q7
|
||
|
|
.byte 0x2c,0x03,0xb0,0xf3 @ aese q0,q14
|
||
|
|
.byte 0x80,0x03,0xb0,0xf3 @ aesmc q0,q0
|
||
|
|
.byte 0x2c,0x23,0xb0,0xf3 @ aese q1,q14
|
||
|
|
.byte 0x82,0x23,0xb0,0xf3 @ aesmc q1,q1
|
||
|
|
veor q3,q3,q7
|
||
|
|
.byte 0x2e,0x03,0xb0,0xf3 @ aese q0,q15
|
||
|
|
.byte 0x2e,0x23,0xb0,0xf3 @ aese q1,q15
|
||
|
|
|
||
|
|
cmp r2,#1
|
||
|
|
veor q2,q2,q0
|
||
|
|
veor q3,q3,q1
|
||
|
|
vst1.8 {q2},[r1]!
|
||
|
|
beq Lctr32_done
|
||
|
|
vst1.8 {q3},[r1]
|
||
|
|
|
||
|
|
Lctr32_done:
|
||
|
|
vldmia sp!,{d8,d9,d10,d11,d12,d13,d14,d15}
|
||
|
|
ldmia sp!,{r4,r5,r6,r7,r8,r9,r10,pc}
|
||
|
|
|
||
|
|
#endif
|
||
|
|
#endif // !OPENSSL_NO_ASM
|