mirror of https://github.com/yasm/yasm.git
triggered for more cases and optimize from 64-bit down to 32-bit for 64-bit mov instructions. This change means that mov reg64, constant will be auto-sized up to 64 bits, but mov reg64, expr/symbol will default to 32 bits. You must use mov reg64, qword expr/symbol if you need 64 bits, or in GAS mode use movabsq expr/symbol, reg64. This makes the generated code smaller and default most usages into 32-bit relocations appropriate for ELF64 and Win64. Right now, 32-bit unsigned relocs are generated instead of 32-bit signed; this will need to be fixed. * x86arch.h (x86_insn.postop): Add X86_POSTOP_SIGNEXT_IMM32. * x86bc.c (x86_bc_insn_resolve): Implement. * x86id.re (OPAP_SImm32Avail): New flag. (MOD_Op2AddSp): New modifier to encode spare directly into 2nd opcode byte. (arith_insn): Use MOD_Op2AddSp and add forced-size override forms. (mov_insn): Use OPAP_SImm32Avail and add forced-size override form. (yasm_x86__finalize_insn): Implement new flag and modifier. Fix up testcases for changes. svn path=/trunk/yasm/; revision=13140.5.0rc2
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9996855928
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aa3e6ff9b9
22 changed files with 28262 additions and 28412 deletions
@ -1,5 +1,34 @@ |
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; AX forms |
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add ax,5 |
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add ax,byte 5 |
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add ax,word 5 |
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add ax,-128 |
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add ax,byte -128 |
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add ax,word -128 |
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add ax,0x7f |
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add ax,byte 0x7f |
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add ax,word 0x7f |
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add ax,0x80 |
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add ax,byte 0x80 |
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add ax,word 0x80 |
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add ax,0x100 |
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add ax,byte 0x100 |
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add ax,word 0x100 |
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|
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; non-AX forms |
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add bx,5 |
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add bx,byte 5 |
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add bx,word 5 |
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add bx,-128 |
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add bx,byte -128 |
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add bx,word -128 |
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add bx,0x7f |
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add bx,byte 0x7f |
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add bx,word 0x7f |
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add bx,0x80 |
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add bx,byte 0x80 |
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add bx,word 0x80 |
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add bx,0x100 |
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add bx,byte 0x100 |
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add bx,word 0x100 |
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|
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@ -0,0 +1,2 @@ |
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-:15: warning: value does not fit in 8 bit field |
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-:32: warning: value does not fit in 8 bit field |
@ -1,15 +1,97 @@ |
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83 |
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c0 |
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05 |
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83 |
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c0 |
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05 |
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05 |
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05 |
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00 |
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83 |
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c0 |
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80 |
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83 |
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c0 |
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80 |
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05 |
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80 |
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ff |
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83 |
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c0 |
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7f |
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83 |
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c0 |
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7f |
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05 |
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7f |
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00 |
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05 |
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80 |
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00 |
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83 |
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c0 |
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80 |
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05 |
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80 |
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00 |
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05 |
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00 |
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01 |
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83 |
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c0 |
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00 |
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05 |
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00 |
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01 |
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83 |
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c3 |
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05 |
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83 |
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c3 |
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05 |
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81 |
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c3 |
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05 |
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00 |
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83 |
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c3 |
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80 |
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83 |
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c3 |
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80 |
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81 |
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c3 |
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80 |
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ff |
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83 |
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c3 |
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7f |
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83 |
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c3 |
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7f |
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81 |
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c3 |
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7f |
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00 |
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81 |
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c3 |
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80 |
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00 |
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83 |
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c3 |
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80 |
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81 |
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c3 |
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80 |
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00 |
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81 |
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c3 |
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00 |
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01 |
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83 |
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c3 |
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00 |
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81 |
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c3 |
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00 |
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01 |
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@ -0,0 +1,13 @@ |
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[bits 32] |
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and eax, 3584 |
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and eax, 35 |
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and eax, dword 3584 |
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and eax, dword 35 |
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and eax, byte 3584 |
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and eax, byte 35 |
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and ebx, 3584 |
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and ebx, 35 |
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and ebx, dword 3584 |
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and ebx, dword 35 |
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and ebx, byte 3584 |
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and ebx, byte 35 |
@ -0,0 +1,2 @@ |
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-:6: warning: value does not fit in 8 bit field |
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-:12: warning: value does not fit in 8 bit field |
@ -0,0 +1,51 @@ |
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25 |
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00 |
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0e |
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00 |
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00 |
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83 |
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e0 |
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23 |
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25 |
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00 |
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0e |
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00 |
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00 |
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25 |
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23 |
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00 |
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00 |
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00 |
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83 |
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e0 |
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00 |
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83 |
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e0 |
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23 |
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81 |
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e3 |
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00 |
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0e |
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00 |
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00 |
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83 |
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e3 |
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23 |
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81 |
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e3 |
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00 |
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0e |
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00 |
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00 |
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81 |
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e3 |
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23 |
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00 |
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00 |
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00 |
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83 |
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e3 |
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00 |
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83 |
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e3 |
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23 |
@ -0,0 +1 @@ |
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-:19: warning: value does not fit in 32 bit field |
@ -0,0 +1,2 @@ |
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-:5: warning: value does not fit in 32 bit field |
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-:6: warning: value does not fit in 32 bit field |
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Load Diff
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Load Diff
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