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@ -125,8 +125,8 @@ inline Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr, |
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// ensure that no later memory access can be reordered ahead of the operation.
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// "Release" operations ensure that no previous memory access can be reordered
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// after the operation. "Barrier" operations have both "Acquire" and "Release"
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// semantics. A MemoryBarrier() has "Barrier" semantics, but does no memory
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// access.
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// semantics. A MemoryBarrierInternal() has "Barrier" semantics, but does no
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// memory access.
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inline Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr, |
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Atomic32 old_value, |
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Atomic32 new_value) { |
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@ -149,17 +149,17 @@ inline void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value) { |
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*ptr = value; |
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} |
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inline void MemoryBarrier() { |
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inline void MemoryBarrierInternal() { |
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__asm__ __volatile__("sync" : : : "memory"); |
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} |
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inline void Acquire_Store(volatile Atomic32* ptr, Atomic32 value) { |
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*ptr = value; |
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MemoryBarrier(); |
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MemoryBarrierInternal(); |
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} |
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inline void Release_Store(volatile Atomic32* ptr, Atomic32 value) { |
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MemoryBarrier(); |
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MemoryBarrierInternal(); |
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*ptr = value; |
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} |
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@ -169,12 +169,12 @@ inline Atomic32 NoBarrier_Load(volatile const Atomic32* ptr) { |
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inline Atomic32 Acquire_Load(volatile const Atomic32* ptr) { |
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Atomic32 value = *ptr; |
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MemoryBarrier(); |
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MemoryBarrierInternal(); |
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return value; |
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} |
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inline Atomic32 Release_Load(volatile const Atomic32* ptr) { |
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MemoryBarrier(); |
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MemoryBarrierInternal(); |
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return *ptr; |
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} |
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@ -247,9 +247,9 @@ inline Atomic64 NoBarrier_AtomicIncrement(volatile Atomic64* ptr, |
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inline Atomic64 Barrier_AtomicIncrement(volatile Atomic64* ptr, |
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Atomic64 increment) { |
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MemoryBarrier(); |
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MemoryBarrierInternal(); |
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Atomic64 res = NoBarrier_AtomicIncrement(ptr, increment); |
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MemoryBarrier(); |
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MemoryBarrierInternal(); |
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return res; |
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} |
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@ -257,20 +257,20 @@ inline Atomic64 Barrier_AtomicIncrement(volatile Atomic64* ptr, |
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// ensure that no later memory access can be reordered ahead of the operation.
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// "Release" operations ensure that no previous memory access can be reordered
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// after the operation. "Barrier" operations have both "Acquire" and "Release"
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// semantics. A MemoryBarrier() has "Barrier" semantics, but does no memory
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// access.
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// semantics. A MemoryBarrierInternal() has "Barrier" semantics, but does no
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// memory access.
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inline Atomic64 Acquire_CompareAndSwap(volatile Atomic64* ptr, |
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Atomic64 old_value, |
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Atomic64 new_value) { |
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Atomic64 res = NoBarrier_CompareAndSwap(ptr, old_value, new_value); |
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MemoryBarrier(); |
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MemoryBarrierInternal(); |
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return res; |
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} |
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inline Atomic64 Release_CompareAndSwap(volatile Atomic64* ptr, |
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Atomic64 old_value, |
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Atomic64 new_value) { |
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MemoryBarrier(); |
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MemoryBarrierInternal(); |
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return NoBarrier_CompareAndSwap(ptr, old_value, new_value); |
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} |
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@ -280,11 +280,11 @@ inline void NoBarrier_Store(volatile Atomic64* ptr, Atomic64 value) { |
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inline void Acquire_Store(volatile Atomic64* ptr, Atomic64 value) { |
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*ptr = value; |
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MemoryBarrier(); |
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MemoryBarrierInternal(); |
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} |
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inline void Release_Store(volatile Atomic64* ptr, Atomic64 value) { |
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MemoryBarrier(); |
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MemoryBarrierInternal(); |
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*ptr = value; |
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} |
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@ -294,12 +294,12 @@ inline Atomic64 NoBarrier_Load(volatile const Atomic64* ptr) { |
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inline Atomic64 Acquire_Load(volatile const Atomic64* ptr) { |
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Atomic64 value = *ptr; |
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MemoryBarrier(); |
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MemoryBarrierInternal(); |
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return value; |
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} |
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inline Atomic64 Release_Load(volatile const Atomic64* ptr) { |
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MemoryBarrier(); |
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MemoryBarrierInternal(); |
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return *ptr; |
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} |
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#endif |
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