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Open Source Computer Vision Library
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101 lines
3.8 KiB
101 lines
3.8 KiB
// This file is part of OpenCV project. |
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// It is subject to the license terms in the LICENSE file found in the top-level directory |
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// of this distribution and at http://opencv.org/license.html. |
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#include "test_precomp.hpp" |
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#include "test_intrin128.simd.hpp" |
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#include "test_intrin128.simd_declarations.hpp" |
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#undef CV_CPU_DISPATCH_MODES_ALL |
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#include "opencv2/core/cv_cpu_dispatch.h" |
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#include "test_intrin256.simd.hpp" |
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#include "test_intrin256.simd_declarations.hpp" |
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namespace opencv_test { namespace hal { |
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#define CV_CPU_CALL_BASELINE_(fn, args) CV_CPU_CALL_BASELINE(fn, args) |
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#define DISPATCH_SIMD128(fn, cpu_opt) do { \ |
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CV_CPU_CALL_ ## cpu_opt ## _(fn, ()); \ |
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throw SkipTestException("SIMD128 (" #cpu_opt ") is not available or disabled"); \ |
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} while(0) |
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#define DISPATCH_SIMD256(fn, cpu_opt) do { \ |
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CV_CPU_CALL_ ## cpu_opt ## _(fn, ()); \ |
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throw SkipTestException("SIMD256 (" #cpu_opt ") is not available or disabled"); \ |
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} while(0) |
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#define DEFINE_SIMD_TESTS(simd_size, cpu_opt) \ |
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TEST(hal_intrin ## simd_size, uint8x16_ ## cpu_opt) { DISPATCH_SIMD ## simd_size(test_hal_intrin_uint8, cpu_opt); } \ |
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TEST(hal_intrin ## simd_size, int8x16_ ## cpu_opt) { DISPATCH_SIMD ## simd_size(test_hal_intrin_int8, cpu_opt); } \ |
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TEST(hal_intrin ## simd_size, uint16x8_ ## cpu_opt) { DISPATCH_SIMD ## simd_size(test_hal_intrin_uint16, cpu_opt); } \ |
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TEST(hal_intrin ## simd_size, int16x8_ ## cpu_opt) { DISPATCH_SIMD ## simd_size(test_hal_intrin_int16, cpu_opt); } \ |
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TEST(hal_intrin ## simd_size, int32x4_ ## cpu_opt) { DISPATCH_SIMD ## simd_size(test_hal_intrin_int32, cpu_opt); } \ |
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TEST(hal_intrin ## simd_size, uint32x4_ ## cpu_opt) { DISPATCH_SIMD ## simd_size(test_hal_intrin_uint32, cpu_opt); } \ |
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TEST(hal_intrin ## simd_size, uint64x2_ ## cpu_opt) { DISPATCH_SIMD ## simd_size(test_hal_intrin_uint64, cpu_opt); } \ |
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TEST(hal_intrin ## simd_size, int64x2_ ## cpu_opt) { DISPATCH_SIMD ## simd_size(test_hal_intrin_int64, cpu_opt); } \ |
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TEST(hal_intrin ## simd_size, float32x4_ ## cpu_opt) { DISPATCH_SIMD ## simd_size(test_hal_intrin_float32, cpu_opt); } \ |
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TEST(hal_intrin ## simd_size, float64x2_ ## cpu_opt) { DISPATCH_SIMD ## simd_size(test_hal_intrin_float64, cpu_opt); } \ |
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namespace intrin128 { |
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DEFINE_SIMD_TESTS(128, BASELINE) |
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#if defined CV_CPU_DISPATCH_COMPILE_SSE2 || defined CV_CPU_BASELINE_COMPILE_SSE2 |
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DEFINE_SIMD_TESTS(128, SSE2) |
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#endif |
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#if defined CV_CPU_DISPATCH_COMPILE_SSE3 || defined CV_CPU_BASELINE_COMPILE_SSE3 |
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DEFINE_SIMD_TESTS(128, SSE3) |
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#endif |
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#if defined CV_CPU_DISPATCH_COMPILE_SSSE3 || defined CV_CPU_BASELINE_COMPILE_SSSE3 |
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DEFINE_SIMD_TESTS(128, SSSE3) |
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#endif |
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#if defined CV_CPU_DISPATCH_COMPILE_SSE4_1 || defined CV_CPU_BASELINE_COMPILE_SSE4_1 |
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DEFINE_SIMD_TESTS(128, SSE4_1) |
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#endif |
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#if defined CV_CPU_DISPATCH_COMPILE_SSE4_2 || defined CV_CPU_BASELINE_COMPILE_SSE4_2 |
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DEFINE_SIMD_TESTS(128, SSE4_2) |
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#endif |
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#if defined CV_CPU_DISPATCH_COMPILE_AVX || defined CV_CPU_BASELINE_COMPILE_AVX |
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DEFINE_SIMD_TESTS(128, AVX) |
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#endif |
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#if defined CV_CPU_DISPATCH_COMPILE_AVX2 || defined CV_CPU_BASELINE_COMPILE_AVX2 |
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DEFINE_SIMD_TESTS(128, AVX2) |
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#endif |
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TEST(hal_intrin128, float16x8_FP16) |
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{ |
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CV_CPU_CALL_FP16_(test_hal_intrin_float16, ()); |
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throw SkipTestException("Unsupported hardware: FP16 is not available"); |
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} |
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} // namespace intrin128 |
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namespace intrin256 { |
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// Not available due missing C++ backend for SIMD256 |
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//DEFINE_SIMD_TESTS(256, BASELINE) |
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//#if defined CV_CPU_DISPATCH_COMPILE_AVX |
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//DEFINE_SIMD_TESTS(256, AVX) |
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//#endif |
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#if defined CV_CPU_DISPATCH_COMPILE_AVX2 || defined CV_CPU_BASELINE_COMPILE_AVX2 |
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DEFINE_SIMD_TESTS(256, AVX2) |
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#endif |
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TEST(hal_intrin256, float16x16_FP16) |
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{ |
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//CV_CPU_CALL_FP16_(test_hal_intrin_float16, ()); |
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CV_CPU_CALL_AVX2_(test_hal_intrin_float16, ()); |
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throw SkipTestException("Unsupported hardware: FP16 is not available"); |
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} |
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} // namespace intrin256 |
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}} // namespace
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