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${ noResults }
2 Commits (3dcaf1f28764ad38fbaff4d18fce81623fb334f2)
| Author | SHA1 | Message | Date |
|---|---|---|---|
HAN Liutong
|
0ef803950b
|
Merge pull request #22179 from hanliutong:new-rvv
[GSoC] New universal intrinsic backend for RVV * Add new rvv backend (partially implemented). * Modify the framework of Universal Intrinsic. * Add CV_SIMD macro guards to current UI code. * Use vlanes() instead of nlanes. * Modify the UI test. * Enable the new RVV (scalable) backend. * Remove whitespace. * Rename and some others modify. * Update intrin.hpp but still not work on AVX/SSE * Update conditional compilation macros. * Use static variable for vlanes. * Use max_nlanes for array defining. |
3 years ago |
Alexander Alekhin
|
3f302cabb8 |
core(test): intrinsic tests for all dispatched CPU optimizations
- tests for both SIMD128 / SIMD256 - different dispatched + baseline(SIMD128) intrinsics |
7 years ago |