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@ -464,6 +464,7 @@ static void add8u( const uchar* src1, size_t step1, |
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fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
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fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
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if (0 <= ippiAdd_8u_C1RSfs(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz), 0)) |
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if (0 <= ippiAdd_8u_C1RSfs(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz), 0)) |
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return; |
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return; |
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setIppStatus(-1); |
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#endif |
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#endif |
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(vBinOp<uchar, OpAdd<uchar>, IF_SIMD(VAdd<uchar>)>(src1, step1, src2, step2, dst, step, sz)); |
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(vBinOp<uchar, OpAdd<uchar>, IF_SIMD(VAdd<uchar>)>(src1, step1, src2, step2, dst, step, sz)); |
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} |
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} |
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@ -483,6 +484,7 @@ static void add16u( const ushort* src1, size_t step1, |
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fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
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fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
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if (0 <= ippiAdd_16u_C1RSfs(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz), 0)) |
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if (0 <= ippiAdd_16u_C1RSfs(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz), 0)) |
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return; |
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return; |
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setIppStatus(-1); |
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#endif |
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#endif |
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(vBinOp<ushort, OpAdd<ushort>, IF_SIMD(VAdd<ushort>)>(src1, step1, src2, step2, dst, step, sz)); |
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(vBinOp<ushort, OpAdd<ushort>, IF_SIMD(VAdd<ushort>)>(src1, step1, src2, step2, dst, step, sz)); |
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} |
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} |
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@ -495,6 +497,7 @@ static void add16s( const short* src1, size_t step1, |
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fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
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fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
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if (0 <= ippiAdd_16s_C1RSfs(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz), 0)) |
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if (0 <= ippiAdd_16s_C1RSfs(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz), 0)) |
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return; |
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return; |
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setIppStatus(-1); |
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#endif |
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#endif |
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(vBinOp<short, OpAdd<short>, IF_SIMD(VAdd<short>)>(src1, step1, src2, step2, dst, step, sz)); |
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(vBinOp<short, OpAdd<short>, IF_SIMD(VAdd<short>)>(src1, step1, src2, step2, dst, step, sz)); |
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} |
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} |
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@ -514,6 +517,7 @@ static void add32f( const float* src1, size_t step1, |
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fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
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fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
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if (0 <= ippiAdd_32f_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz))) |
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if (0 <= ippiAdd_32f_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz))) |
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return; |
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return; |
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setIppStatus(-1); |
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#endif |
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#endif |
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(vBinOp32<float, OpAdd<float>, IF_SIMD(VAdd<float>)>(src1, step1, src2, step2, dst, step, sz)); |
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(vBinOp32<float, OpAdd<float>, IF_SIMD(VAdd<float>)>(src1, step1, src2, step2, dst, step, sz)); |
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} |
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} |
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@ -533,6 +537,7 @@ static void sub8u( const uchar* src1, size_t step1, |
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fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
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fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
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if (0 <= ippiSub_8u_C1RSfs(src2, (int)step2, src1, (int)step1, dst, (int)step, ippiSize(sz), 0)) |
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if (0 <= ippiSub_8u_C1RSfs(src2, (int)step2, src1, (int)step1, dst, (int)step, ippiSize(sz), 0)) |
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return; |
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return; |
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setIppStatus(-1); |
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#endif |
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#endif |
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(vBinOp<uchar, OpSub<uchar>, IF_SIMD(VSub<uchar>)>(src1, step1, src2, step2, dst, step, sz)); |
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(vBinOp<uchar, OpSub<uchar>, IF_SIMD(VSub<uchar>)>(src1, step1, src2, step2, dst, step, sz)); |
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} |
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} |
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@ -552,6 +557,7 @@ static void sub16u( const ushort* src1, size_t step1, |
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fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
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fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
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if (0 <= ippiSub_16u_C1RSfs(src2, (int)step2, src1, (int)step1, dst, (int)step, ippiSize(sz), 0)) |
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if (0 <= ippiSub_16u_C1RSfs(src2, (int)step2, src1, (int)step1, dst, (int)step, ippiSize(sz), 0)) |
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return; |
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return; |
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setIppStatus(-1); |
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#endif |
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#endif |
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(vBinOp<ushort, OpSub<ushort>, IF_SIMD(VSub<ushort>)>(src1, step1, src2, step2, dst, step, sz)); |
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(vBinOp<ushort, OpSub<ushort>, IF_SIMD(VSub<ushort>)>(src1, step1, src2, step2, dst, step, sz)); |
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} |
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} |
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@ -564,6 +570,7 @@ static void sub16s( const short* src1, size_t step1, |
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fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
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fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
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if (0 <= ippiSub_16s_C1RSfs(src2, (int)step2, src1, (int)step1, dst, (int)step, ippiSize(sz), 0)) |
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if (0 <= ippiSub_16s_C1RSfs(src2, (int)step2, src1, (int)step1, dst, (int)step, ippiSize(sz), 0)) |
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return; |
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return; |
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setIppStatus(-1); |
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#endif |
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#endif |
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(vBinOp<short, OpSub<short>, IF_SIMD(VSub<short>)>(src1, step1, src2, step2, dst, step, sz)); |
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(vBinOp<short, OpSub<short>, IF_SIMD(VSub<short>)>(src1, step1, src2, step2, dst, step, sz)); |
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} |
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} |
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@ -583,6 +590,7 @@ static void sub32f( const float* src1, size_t step1, |
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fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
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fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
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if (0 <= ippiSub_32f_C1R(src2, (int)step2, src1, (int)step1, dst, (int)step, ippiSize(sz))) |
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if (0 <= ippiSub_32f_C1R(src2, (int)step2, src1, (int)step1, dst, (int)step, ippiSize(sz))) |
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return; |
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return; |
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setIppStatus(-1); |
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#endif |
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#endif |
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(vBinOp32<float, OpSub<float>, IF_SIMD(VSub<float>)>(src1, step1, src2, step2, dst, step, sz)); |
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(vBinOp32<float, OpSub<float>, IF_SIMD(VSub<float>)>(src1, step1, src2, step2, dst, step, sz)); |
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} |
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} |
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@ -617,6 +625,7 @@ static void max8u( const uchar* src1, size_t step1, |
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} |
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} |
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if (i == sz.height) |
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if (i == sz.height) |
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return; |
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return; |
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setIppStatus(-1); |
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#endif |
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#endif |
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vBinOp<uchar, OpMax<uchar>, IF_SIMD(VMax<uchar>)>(src1, step1, src2, step2, dst, step, sz); |
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vBinOp<uchar, OpMax<uchar>, IF_SIMD(VMax<uchar>)>(src1, step1, src2, step2, dst, step, sz); |
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} |
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} |
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@ -648,6 +657,7 @@ static void max16u( const ushort* src1, size_t step1, |
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} |
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} |
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if (i == sz.height) |
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if (i == sz.height) |
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return; |
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return; |
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setIppStatus(-1); |
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#endif |
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#endif |
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vBinOp<ushort, OpMax<ushort>, IF_SIMD(VMax<ushort>)>(src1, step1, src2, step2, dst, step, sz); |
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vBinOp<ushort, OpMax<ushort>, IF_SIMD(VMax<ushort>)>(src1, step1, src2, step2, dst, step, sz); |
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} |
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} |
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@ -686,6 +696,7 @@ static void max32f( const float* src1, size_t step1, |
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} |
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} |
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if (i == sz.height) |
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if (i == sz.height) |
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return; |
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return; |
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setIppStatus(-1); |
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#endif |
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#endif |
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vBinOp32<float, OpMax<float>, IF_SIMD(VMax<float>)>(src1, step1, src2, step2, dst, step, sz); |
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vBinOp32<float, OpMax<float>, IF_SIMD(VMax<float>)>(src1, step1, src2, step2, dst, step, sz); |
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} |
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} |
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@ -717,6 +728,7 @@ static void min8u( const uchar* src1, size_t step1, |
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} |
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} |
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if (i == sz.height) |
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if (i == sz.height) |
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return; |
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return; |
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setIppStatus(-1); |
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#endif |
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|
#endif |
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vBinOp<uchar, OpMin<uchar>, IF_SIMD(VMin<uchar>)>(src1, step1, src2, step2, dst, step, sz); |
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vBinOp<uchar, OpMin<uchar>, IF_SIMD(VMin<uchar>)>(src1, step1, src2, step2, dst, step, sz); |
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} |
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} |
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@ -748,6 +760,7 @@ static void min16u( const ushort* src1, size_t step1, |
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} |
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} |
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if (i == sz.height) |
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if (i == sz.height) |
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|
return; |
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|
return; |
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setIppStatus(-1); |
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|
#endif |
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|
#endif |
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vBinOp<ushort, OpMin<ushort>, IF_SIMD(VMin<ushort>)>(src1, step1, src2, step2, dst, step, sz); |
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vBinOp<ushort, OpMin<ushort>, IF_SIMD(VMin<ushort>)>(src1, step1, src2, step2, dst, step, sz); |
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} |
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} |
|
|
@ -786,6 +799,7 @@ static void min32f( const float* src1, size_t step1, |
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} |
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} |
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if (i == sz.height) |
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|
if (i == sz.height) |
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|
return; |
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return; |
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setIppStatus(-1); |
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|
#endif |
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|
#endif |
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|
vBinOp32<float, OpMin<float>, IF_SIMD(VMin<float>)>(src1, step1, src2, step2, dst, step, sz); |
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vBinOp32<float, OpMin<float>, IF_SIMD(VMin<float>)>(src1, step1, src2, step2, dst, step, sz); |
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|
|
} |
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|
|
} |
|
|
@ -802,9 +816,11 @@ static void absdiff8u( const uchar* src1, size_t step1, |
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uchar* dst, size_t step, Size sz, void* ) |
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uchar* dst, size_t step, Size sz, void* ) |
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{ |
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{ |
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|
#if (ARITHM_USE_IPP == 1) |
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|
#if (ARITHM_USE_IPP == 1) |
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printf("!\n"); |
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fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
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fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
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if (0 <= ippiAbsDiff_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz))) |
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if (0 <= ippiAbsDiff_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz))) |
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return; |
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|
return; |
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|
setIppStatus(-1); |
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|
#endif |
|
|
|
#endif |
|
|
|
(vBinOp<uchar, OpAbsDiff<uchar>, IF_SIMD(VAbsDiff<uchar>)>(src1, step1, src2, step2, dst, step, sz)); |
|
|
|
(vBinOp<uchar, OpAbsDiff<uchar>, IF_SIMD(VAbsDiff<uchar>)>(src1, step1, src2, step2, dst, step, sz)); |
|
|
|
} |
|
|
|
} |
|
|
@ -821,9 +837,11 @@ static void absdiff16u( const ushort* src1, size_t step1, |
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ushort* dst, size_t step, Size sz, void* ) |
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|
ushort* dst, size_t step, Size sz, void* ) |
|
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{ |
|
|
|
{ |
|
|
|
#if (ARITHM_USE_IPP == 1) |
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|
|
#if (ARITHM_USE_IPP == 1) |
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|
printf("!\n"); |
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|
fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
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|
|
fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
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|
|
if (0 <= ippiAbsDiff_16u_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz))) |
|
|
|
if (0 <= ippiAbsDiff_16u_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz))) |
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|
|
return; |
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|
|
return; |
|
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|
|
|
|
|
setIppStatus(-1); |
|
|
|
#endif |
|
|
|
#endif |
|
|
|
(vBinOp<ushort, OpAbsDiff<ushort>, IF_SIMD(VAbsDiff<ushort>)>(src1, step1, src2, step2, dst, step, sz)); |
|
|
|
(vBinOp<ushort, OpAbsDiff<ushort>, IF_SIMD(VAbsDiff<ushort>)>(src1, step1, src2, step2, dst, step, sz)); |
|
|
|
} |
|
|
|
} |
|
|
@ -847,9 +865,11 @@ static void absdiff32f( const float* src1, size_t step1, |
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|
|
float* dst, size_t step, Size sz, void* ) |
|
|
|
float* dst, size_t step, Size sz, void* ) |
|
|
|
{ |
|
|
|
{ |
|
|
|
#if (ARITHM_USE_IPP == 1) |
|
|
|
#if (ARITHM_USE_IPP == 1) |
|
|
|
|
|
|
|
printf("!\n"); |
|
|
|
fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
|
|
|
fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
|
|
|
if (0 <= ippiAbsDiff_32f_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz))) |
|
|
|
if (0 <= ippiAbsDiff_32f_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz))) |
|
|
|
return; |
|
|
|
return; |
|
|
|
|
|
|
|
setIppStatus(-1); |
|
|
|
#endif |
|
|
|
#endif |
|
|
|
(vBinOp32<float, OpAbsDiff<float>, IF_SIMD(VAbsDiff<float>)>(src1, step1, src2, step2, dst, step, sz)); |
|
|
|
(vBinOp32<float, OpAbsDiff<float>, IF_SIMD(VAbsDiff<float>)>(src1, step1, src2, step2, dst, step, sz)); |
|
|
|
} |
|
|
|
} |
|
|
@ -870,6 +890,7 @@ static void and8u( const uchar* src1, size_t step1, |
|
|
|
fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
|
|
|
fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
|
|
|
if (0 <= ippiAnd_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz))) |
|
|
|
if (0 <= ippiAnd_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz))) |
|
|
|
return; |
|
|
|
return; |
|
|
|
|
|
|
|
setIppStatus(-1); |
|
|
|
#endif |
|
|
|
#endif |
|
|
|
(vBinOp<uchar, OpAnd<uchar>, IF_SIMD(VAnd<uchar>)>(src1, step1, src2, step2, dst, step, sz)); |
|
|
|
(vBinOp<uchar, OpAnd<uchar>, IF_SIMD(VAnd<uchar>)>(src1, step1, src2, step2, dst, step, sz)); |
|
|
|
} |
|
|
|
} |
|
|
@ -882,6 +903,7 @@ static void or8u( const uchar* src1, size_t step1, |
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|
|
fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
|
|
|
fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
|
|
|
if (0 <= ippiOr_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz))) |
|
|
|
if (0 <= ippiOr_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz))) |
|
|
|
return; |
|
|
|
return; |
|
|
|
|
|
|
|
setIppStatus(-1); |
|
|
|
#endif |
|
|
|
#endif |
|
|
|
(vBinOp<uchar, OpOr<uchar>, IF_SIMD(VOr<uchar>)>(src1, step1, src2, step2, dst, step, sz)); |
|
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(vBinOp<uchar, OpOr<uchar>, IF_SIMD(VOr<uchar>)>(src1, step1, src2, step2, dst, step, sz)); |
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} |
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} |
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@ -894,6 +916,7 @@ static void xor8u( const uchar* src1, size_t step1, |
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fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
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fixSteps(sz, sizeof(dst[0]), step1, step2, step); |
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if (0 <= ippiXor_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz))) |
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if (0 <= ippiXor_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz))) |
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return; |
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return; |
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setIppStatus(-1); |
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#endif |
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#endif |
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(vBinOp<uchar, OpXor<uchar>, IF_SIMD(VXor<uchar>)>(src1, step1, src2, step2, dst, step, sz)); |
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(vBinOp<uchar, OpXor<uchar>, IF_SIMD(VXor<uchar>)>(src1, step1, src2, step2, dst, step, sz)); |
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} |
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} |
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@ -906,6 +929,7 @@ static void not8u( const uchar* src1, size_t step1, |
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fixSteps(sz, sizeof(dst[0]), step1, step2, step); (void)src2; |
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fixSteps(sz, sizeof(dst[0]), step1, step2, step); (void)src2; |
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if (0 <= ippiNot_8u_C1R(src1, (int)step1, dst, (int)step, ippiSize(sz))) |
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if (0 <= ippiNot_8u_C1R(src1, (int)step1, dst, (int)step, ippiSize(sz))) |
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return; |
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return; |
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setIppStatus(-1); |
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#endif |
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#endif |
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(vBinOp<uchar, OpNot<uchar>, IF_SIMD(VNot<uchar>)>(src1, step1, src2, step2, dst, step, sz)); |
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(vBinOp<uchar, OpNot<uchar>, IF_SIMD(VNot<uchar>)>(src1, step1, src2, step2, dst, step, sz)); |
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} |
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} |
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@ -2390,6 +2414,7 @@ static void cmp8u(const uchar* src1, size_t step1, const uchar* src2, size_t ste |
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fixSteps(size, sizeof(dst[0]), step1, step2, step); |
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fixSteps(size, sizeof(dst[0]), step1, step2, step); |
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if (0 <= ippiCompare_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(size), op)) |
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if (0 <= ippiCompare_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(size), op)) |
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return; |
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return; |
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setIppStatus(-1); |
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} |
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} |
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#endif |
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#endif |
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//vz optimized cmp_(src1, step1, src2, step2, dst, step, size, *(int*)_cmpop);
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//vz optimized cmp_(src1, step1, src2, step2, dst, step, size, *(int*)_cmpop);
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@ -2473,6 +2498,7 @@ static void cmp16u(const ushort* src1, size_t step1, const ushort* src2, size_t |
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fixSteps(size, sizeof(dst[0]), step1, step2, step); |
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fixSteps(size, sizeof(dst[0]), step1, step2, step); |
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if (0 <= ippiCompare_16u_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(size), op)) |
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if (0 <= ippiCompare_16u_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(size), op)) |
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return; |
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return; |
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setIppStatus(-1); |
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} |
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} |
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#endif |
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#endif |
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cmp_(src1, step1, src2, step2, dst, step, size, *(int*)_cmpop); |
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cmp_(src1, step1, src2, step2, dst, step, size, *(int*)_cmpop); |
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@ -2488,6 +2514,7 @@ static void cmp16s(const short* src1, size_t step1, const short* src2, size_t st |
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fixSteps(size, sizeof(dst[0]), step1, step2, step); |
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fixSteps(size, sizeof(dst[0]), step1, step2, step); |
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|
if (0 <= ippiCompare_16s_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(size), op)) |
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|
if (0 <= ippiCompare_16s_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(size), op)) |
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|
return; |
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|
return; |
|
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|
setIppStatus(-1); |
|
|
|
} |
|
|
|
} |
|
|
|
#endif |
|
|
|
#endif |
|
|
|
//vz optimized cmp_(src1, step1, src2, step2, dst, step, size, *(int*)_cmpop);
|
|
|
|
//vz optimized cmp_(src1, step1, src2, step2, dst, step, size, *(int*)_cmpop);
|
|
|
@ -2594,6 +2621,7 @@ static void cmp32f(const float* src1, size_t step1, const float* src2, size_t st |
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|
|
fixSteps(size, sizeof(dst[0]), step1, step2, step); |
|
|
|
fixSteps(size, sizeof(dst[0]), step1, step2, step); |
|
|
|
if (0 <= ippiCompare_32f_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(size), op)) |
|
|
|
if (0 <= ippiCompare_32f_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(size), op)) |
|
|
|
return; |
|
|
|
return; |
|
|
|
|
|
|
|
setIppStatus(-1); |
|
|
|
} |
|
|
|
} |
|
|
|
#endif |
|
|
|
#endif |
|
|
|
cmp_(src1, step1, src2, step2, dst, step, size, *(int*)_cmpop); |
|
|
|
cmp_(src1, step1, src2, step2, dst, step, size, *(int*)_cmpop); |
|
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|