mirror of https://github.com/opencv/opencv.git
Merge pull request #13900 from alalek:core_dispatch_merge
commit
e11213dcef
3 changed files with 240 additions and 188 deletions
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// This file is part of OpenCV project.
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// It is subject to the license terms in the LICENSE file found in the top-level directory
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// of this distribution and at http://opencv.org/license.html
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#include "precomp.hpp" |
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namespace cv { namespace hal { |
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CV_CPU_OPTIMIZATION_NAMESPACE_BEGIN |
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void merge8u(const uchar** src, uchar* dst, int len, int cn); |
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void merge16u(const ushort** src, ushort* dst, int len, int cn); |
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void merge32s(const int** src, int* dst, int len, int cn); |
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void merge64s(const int64** src, int64* dst, int len, int cn); |
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#ifndef CV_CPU_OPTIMIZATION_DECLARATIONS_ONLY |
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#if CV_SIMD |
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/*
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The trick with STORE_UNALIGNED/STORE_ALIGNED_NOCACHE is the following: |
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on IA there are instructions movntps and such to which |
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v_store_interleave(...., STORE_ALIGNED_NOCACHE) is mapped. |
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Those instructions write directly into memory w/o touching cache |
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that results in dramatic speed improvements, especially on |
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large arrays (FullHD, 4K etc.). |
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Those intrinsics require the destination address to be aligned |
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by 16/32 bits (with SSE2 and AVX2, respectively). |
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So we potentially split the processing into 3 stages: |
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1) the optional prefix part [0:i0), where we use simple unaligned stores. |
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2) the optional main part [i0:len - VECSZ], where we use "nocache" mode. |
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But in some cases we have to use unaligned stores in this part. |
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3) the optional suffix part (the tail) (len - VECSZ:len) where we switch back to "unaligned" mode |
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to process the remaining len - VECSZ elements. |
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In principle there can be very poorly aligned data where there is no main part. |
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For that we set i0=0 and use unaligned stores for the whole array. |
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*/ |
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template<typename T, typename VecT> static void |
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vecmerge_( const T** src, T* dst, int len, int cn ) |
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{ |
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const int VECSZ = VecT::nlanes; |
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int i, i0 = 0; |
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const T* src0 = src[0]; |
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const T* src1 = src[1]; |
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const int dstElemSize = cn * sizeof(T); |
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int r = (int)((size_t)(void*)dst % (VECSZ*sizeof(T))); |
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hal::StoreMode mode = hal::STORE_ALIGNED_NOCACHE; |
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if( r != 0 ) |
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{ |
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mode = hal::STORE_UNALIGNED; |
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if (r % dstElemSize == 0 && len > VECSZ*2) |
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i0 = VECSZ - (r / dstElemSize); |
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} |
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if( cn == 2 ) |
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{ |
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for( i = 0; i < len; i += VECSZ ) |
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{ |
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if( i > len - VECSZ ) |
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{ |
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i = len - VECSZ; |
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mode = hal::STORE_UNALIGNED; |
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} |
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VecT a = vx_load(src0 + i), b = vx_load(src1 + i); |
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v_store_interleave(dst + i*cn, a, b, mode); |
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if( i < i0 ) |
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{ |
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i = i0 - VECSZ; |
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mode = hal::STORE_ALIGNED_NOCACHE; |
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} |
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} |
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} |
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else if( cn == 3 ) |
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{ |
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const T* src2 = src[2]; |
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for( i = 0; i < len; i += VECSZ ) |
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{ |
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if( i > len - VECSZ ) |
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{ |
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i = len - VECSZ; |
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mode = hal::STORE_UNALIGNED; |
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} |
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VecT a = vx_load(src0 + i), b = vx_load(src1 + i), c = vx_load(src2 + i); |
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v_store_interleave(dst + i*cn, a, b, c, mode); |
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if( i < i0 ) |
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{ |
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i = i0 - VECSZ; |
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mode = hal::STORE_ALIGNED_NOCACHE; |
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} |
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} |
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} |
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else |
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{ |
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CV_Assert( cn == 4 ); |
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const T* src2 = src[2]; |
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const T* src3 = src[3]; |
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for( i = 0; i < len; i += VECSZ ) |
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{ |
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if( i > len - VECSZ ) |
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{ |
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i = len - VECSZ; |
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mode = hal::STORE_UNALIGNED; |
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} |
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VecT a = vx_load(src0 + i), b = vx_load(src1 + i); |
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VecT c = vx_load(src2 + i), d = vx_load(src3 + i); |
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v_store_interleave(dst + i*cn, a, b, c, d, mode); |
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if( i < i0 ) |
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{ |
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i = i0 - VECSZ; |
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mode = hal::STORE_ALIGNED_NOCACHE; |
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} |
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} |
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} |
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vx_cleanup(); |
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} |
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#endif |
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template<typename T> static void |
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merge_( const T** src, T* dst, int len, int cn ) |
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{ |
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int k = cn % 4 ? cn % 4 : 4; |
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int i, j; |
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if( k == 1 ) |
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{ |
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const T* src0 = src[0]; |
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for( i = j = 0; i < len; i++, j += cn ) |
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dst[j] = src0[i]; |
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} |
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else if( k == 2 ) |
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{ |
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const T *src0 = src[0], *src1 = src[1]; |
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i = j = 0; |
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for( ; i < len; i++, j += cn ) |
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{ |
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dst[j] = src0[i]; |
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dst[j+1] = src1[i]; |
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} |
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} |
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else if( k == 3 ) |
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{ |
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const T *src0 = src[0], *src1 = src[1], *src2 = src[2]; |
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i = j = 0; |
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for( ; i < len; i++, j += cn ) |
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{ |
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dst[j] = src0[i]; |
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dst[j+1] = src1[i]; |
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dst[j+2] = src2[i]; |
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} |
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} |
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else |
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{ |
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const T *src0 = src[0], *src1 = src[1], *src2 = src[2], *src3 = src[3]; |
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i = j = 0; |
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for( ; i < len; i++, j += cn ) |
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{ |
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dst[j] = src0[i]; dst[j+1] = src1[i]; |
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dst[j+2] = src2[i]; dst[j+3] = src3[i]; |
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} |
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} |
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for( ; k < cn; k += 4 ) |
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{ |
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const T *src0 = src[k], *src1 = src[k+1], *src2 = src[k+2], *src3 = src[k+3]; |
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for( i = 0, j = k; i < len; i++, j += cn ) |
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{ |
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dst[j] = src0[i]; dst[j+1] = src1[i]; |
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dst[j+2] = src2[i]; dst[j+3] = src3[i]; |
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} |
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} |
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} |
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void merge8u(const uchar** src, uchar* dst, int len, int cn ) |
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{ |
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CV_INSTRUMENT_REGION(); |
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#if CV_SIMD |
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if( len >= v_uint8::nlanes && 2 <= cn && cn <= 4 ) |
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vecmerge_<uchar, v_uint8>(src, dst, len, cn); |
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else |
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#endif |
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merge_(src, dst, len, cn); |
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} |
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void merge16u(const ushort** src, ushort* dst, int len, int cn ) |
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{ |
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CV_INSTRUMENT_REGION(); |
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#if CV_SIMD |
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if( len >= v_uint16::nlanes && 2 <= cn && cn <= 4 ) |
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vecmerge_<ushort, v_uint16>(src, dst, len, cn); |
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else |
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#endif |
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merge_(src, dst, len, cn); |
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} |
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void merge32s(const int** src, int* dst, int len, int cn ) |
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{ |
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CV_INSTRUMENT_REGION(); |
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#if CV_SIMD |
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if( len >= v_int32::nlanes && 2 <= cn && cn <= 4 ) |
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vecmerge_<int, v_int32>(src, dst, len, cn); |
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else |
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#endif |
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merge_(src, dst, len, cn); |
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} |
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void merge64s(const int64** src, int64* dst, int len, int cn ) |
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{ |
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CV_INSTRUMENT_REGION(); |
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#if CV_SIMD |
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if( len >= v_int64::nlanes && 2 <= cn && cn <= 4 ) |
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vecmerge_<int64, v_int64>(src, dst, len, cn); |
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else |
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#endif |
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merge_(src, dst, len, cn); |
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} |
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#endif |
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CV_CPU_OPTIMIZATION_NAMESPACE_END |
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}} // namespace
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