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@ -5872,38 +5872,33 @@ struct RGB2Luv_b |
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#elif CV_SSE2 |
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v_zero = _mm_setzero_si128(); |
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v_scale_inv = _mm_set1_ps(1.f/255.f); |
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v_scale = _mm_set1_ps(2.55f); |
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v_coeff1 = _mm_set1_ps(0.72033898305084743f); |
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v_coeff2 = _mm_set1_ps(96.525423728813564f); |
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v_coeff3 = _mm_set1_ps(0.9732824427480916f); |
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v_coeff4 = _mm_set1_ps(136.259541984732824f); |
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haveSIMD = checkHardwareSupport(CV_CPU_SSE2); |
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#endif |
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} |
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#if CV_SSE2 |
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void process(const float * buf, |
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__m128i & v_l, __m128i & v_u, __m128i & v_v) const |
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__m128 & v_coeffs, __m128 & v_res, uchar * dst) const |
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{ |
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__m128 v_l0f = _mm_load_ps(buf); |
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__m128 v_l1f = _mm_load_ps(buf + 4); |
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__m128 v_u0f = _mm_load_ps(buf + 8); |
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__m128 v_u1f = _mm_load_ps(buf + 12); |
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__m128 v_v0f = _mm_load_ps(buf + 16); |
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__m128 v_v1f = _mm_load_ps(buf + 20); |
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_mm_deinterleave_ps(v_l0f, v_l1f, v_u0f, v_u1f, v_v0f, v_v1f); |
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v_l0f = _mm_add_ps(_mm_mul_ps(v_l0f, v_coeffs), v_res); |
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v_u1f = _mm_add_ps(_mm_mul_ps(v_u1f, v_coeffs), v_res); |
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v_coeffs = _mm_castsi128_ps(_mm_shuffle_epi32(_mm_castps_si128(v_coeffs), 0x92)); |
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v_res = _mm_castsi128_ps(_mm_shuffle_epi32(_mm_castps_si128(v_res), 0x92)); |
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v_u0f = _mm_add_ps(_mm_mul_ps(v_u0f, v_coeffs), v_res); |
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v_coeffs = _mm_castsi128_ps(_mm_shuffle_epi32(_mm_castps_si128(v_coeffs), 0x92)); |
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v_res = _mm_castsi128_ps(_mm_shuffle_epi32(_mm_castps_si128(v_res), 0x92)); |
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v_l1f = _mm_add_ps(_mm_mul_ps(v_l1f, v_coeffs), v_res); |
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v_l0f = _mm_mul_ps(v_l0f, v_scale); |
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v_l1f = _mm_mul_ps(v_l1f, v_scale); |
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v_u0f = _mm_add_ps(_mm_mul_ps(v_u0f, v_coeff1), v_coeff2); |
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v_u1f = _mm_add_ps(_mm_mul_ps(v_u1f, v_coeff1), v_coeff2); |
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v_v0f = _mm_add_ps(_mm_mul_ps(v_v0f, v_coeff3), v_coeff4); |
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v_v1f = _mm_add_ps(_mm_mul_ps(v_v1f, v_coeff3), v_coeff4); |
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__m128i v_l = _mm_packs_epi32(_mm_cvtps_epi32(v_l0f), _mm_cvtps_epi32(v_l1f)); |
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__m128i v_u = _mm_packs_epi32(_mm_cvtps_epi32(v_u0f), _mm_cvtps_epi32(v_u1f)); |
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__m128i v_l0 = _mm_packus_epi16(v_l, v_u); |
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v_l = _mm_packs_epi32(_mm_cvtps_epi32(v_l0f), _mm_cvtps_epi32(v_l1f)); |
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v_u = _mm_packs_epi32(_mm_cvtps_epi32(v_u0f), _mm_cvtps_epi32(v_u1f)); |
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v_v = _mm_packs_epi32(_mm_cvtps_epi32(v_v0f), _mm_cvtps_epi32(v_v1f)); |
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_mm_storeu_si128((__m128i *)(dst), v_l0); |
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} |
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#endif |
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@ -5912,6 +5907,11 @@ struct RGB2Luv_b |
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int i, j, scn = srccn; |
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float CV_DECL_ALIGNED(16) buf[3*BLOCK_SIZE]; |
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#if CV_SSE2 |
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__m128 v_coeffs = _mm_set_ps(2.55f, 0.9732824427480916f, 0.72033898305084743f, 2.55f); |
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__m128 v_res = _mm_set_ps(0.f, 136.259541984732824f, 96.525423728813564f, 0.f); |
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#endif |
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for( i = 0; i < n; i += BLOCK_SIZE, dst += BLOCK_SIZE*3 ) |
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{ |
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int dn = std::min(n - i, (int)BLOCK_SIZE); |
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@ -5996,38 +5996,16 @@ struct RGB2Luv_b |
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#elif CV_SSE2 |
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if (haveSIMD) |
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{ |
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for ( ; j <= (dn - 32) * 3; j += 96) |
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for ( ; j <= (dn - 16) * 3; j += 48) |
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{ |
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__m128i v_l_0, v_u_0, v_v_0; |
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process(buf + j, |
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v_l_0, v_u_0, v_v_0); |
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__m128i v_l_1, v_u_1, v_v_1; |
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process(buf + j + 24, |
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v_l_1, v_u_1, v_v_1); |
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__m128i v_l0 = _mm_packus_epi16(v_l_0, v_l_1); |
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__m128i v_u0 = _mm_packus_epi16(v_u_0, v_u_1); |
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__m128i v_v0 = _mm_packus_epi16(v_v_0, v_v_1); |
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process(buf + j + 48, |
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v_l_0, v_u_0, v_v_0); |
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process(buf + j + 72, |
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v_l_1, v_u_1, v_v_1); |
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__m128i v_l1 = _mm_packus_epi16(v_l_0, v_l_1); |
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__m128i v_u1 = _mm_packus_epi16(v_u_0, v_u_1); |
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__m128i v_v1 = _mm_packus_epi16(v_v_0, v_v_1); |
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v_coeffs, v_res, dst + j); |
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_mm_interleave_epi8(v_l0, v_l1, v_u0, v_u1, v_v0, v_v1); |
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process(buf + j + 16, |
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v_coeffs, v_res, dst + j + 16); |
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_mm_storeu_si128((__m128i *)(dst + j), v_l0); |
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_mm_storeu_si128((__m128i *)(dst + j + 16), v_l1); |
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_mm_storeu_si128((__m128i *)(dst + j + 32), v_u0); |
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_mm_storeu_si128((__m128i *)(dst + j + 48), v_u1); |
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_mm_storeu_si128((__m128i *)(dst + j + 64), v_v0); |
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_mm_storeu_si128((__m128i *)(dst + j + 80), v_v1); |
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process(buf + j + 32, |
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v_coeffs, v_res, dst + j + 32); |
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} |
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} |
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#endif |
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@ -6048,7 +6026,7 @@ struct RGB2Luv_b |
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float32x4_t v_scale, v_scale_inv, v_coeff1, v_coeff2, v_coeff3, v_coeff4; |
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uint8x8_t v_alpha; |
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#elif CV_SSE2 |
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__m128 v_scale, v_scale_inv, v_coeff1, v_coeff2, v_coeff3, v_coeff4; |
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__m128 v_scale_inv; |
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__m128i v_zero; |
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bool haveSIMD; |
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#endif |
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