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/*
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* Copyright 1993-2010 NVIDIA Corporation. All rights reserved. |
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* |
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* NOTICE TO USER: |
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* |
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* This source code is subject to NVIDIA ownership rights under U.S. and |
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* international Copyright laws. |
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* |
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* NVIDIA MAKES NO REPRESENTATION ABOUT THE SUITABILITY OF THIS SOURCE |
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* CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" WITHOUT EXPRESS OR |
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* IMPLIED WARRANTY OF ANY KIND. NVIDIA DISCLAIMS ALL WARRANTIES WITH |
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* REGARD TO THIS SOURCE CODE, INCLUDING ALL IMPLIED WARRANTIES OF |
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* MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE. |
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* IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL, |
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* OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS |
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* OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE |
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* OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE |
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* OR PERFORMANCE OF THIS SOURCE CODE. |
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* |
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* U.S. Government End Users. This source code is a "commercial item" as |
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* that term is defined at 48 C.F.R. 2.101 (OCT 1995), consisting of |
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* "commercial computer software" and "commercial computer software |
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* documentation" as such terms are used in 48 C.F.R. 12.212 (SEPT 1995) |
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* and is provided to the U.S. Government only as a commercial end item. |
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* Consistent with 48 C.F.R.12.212 and 48 C.F.R. 227.7202-1 through |
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* 227.7202-4 (JUNE 1995), all U.S. Government End Users acquire the |
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* source code with only those rights set forth herein. |
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*/ |
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#ifndef _npp_staging_h_ |
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#define _npp_staging_h_ |
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/**
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* \file npp_staging.h |
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* NPP Staging Library (will become part of NPP next release) |
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*/ |
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#ifdef __cplusplus |
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/** \defgroup ctassert Compile-time assert functionality
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* @{ |
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*/ |
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/**
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* Compile-time assert namespace |
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*/ |
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namespace NppStCTprep |
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{ |
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template <bool x> |
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struct CT_ASSERT_FAILURE; |
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template <> |
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struct CT_ASSERT_FAILURE<true> {}; |
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template <int x> |
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struct assertTest{}; |
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} |
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#define NPPST_CT_PREP_PASTE_AUX(a,b) a##b ///< Concatenation indirection macro
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#define NPPST_CT_PREP_PASTE(a,b) NPPST_CT_PREP_PASTE_AUX(a, b) ///< Concatenation macro
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/**
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* Performs compile-time assertion of a condition on the file scope |
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*/ |
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#define NPPST_CT_ASSERT(X) \ |
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typedef NppStCTprep::assertTest<sizeof(NppStCTprep::CT_ASSERT_FAILURE< (bool)(X) >)> \
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NPPST_CT_PREP_PASTE(__ct_assert_typedef_, __LINE__) |
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/*@}*/ |
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#endif |
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/** \defgroup typedefs NPP Integral and compound types of guaranteed size
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* @{ |
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*/ |
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typedef bool NppStBool; ///< Bool of size less than integer
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typedef long long NppSt64s; ///< 64-bit signed integer
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typedef unsigned long long NppSt64u; ///< 64-bit unsigned integer
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typedef int NppSt32s; ///< 32-bit signed integer
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typedef unsigned int NppSt32u; ///< 32-bit unsigned integer
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typedef short NppSt16s; ///< 16-bit signed short
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typedef unsigned short NppSt16u; ///< 16-bit unsigned short
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typedef char NppSt8s; ///< 8-bit signed char
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typedef unsigned char NppSt8u; ///< 8-bit unsigned char
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typedef float NppSt32f; ///< 32-bit IEEE-754 (single precision) float
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typedef double NppSt64f; ///< 64-bit IEEE-754 (double precision) float
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/**
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* 2D Rectangle, 8-bit unsigned fields |
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* This struct contains position and size information of a rectangle in two space |
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*/ |
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struct NppStRect8u |
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{ |
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NppSt8u x; ///< x-coordinate of upper left corner
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NppSt8u y; ///< y-coordinate of upper left corner
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NppSt8u width; ///< Rectangle width
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NppSt8u height; ///< Rectangle height
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#ifdef __cplusplus |
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NppStRect8u() : x(0), y(0), width(0), height(0) {}; |
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NppStRect8u(NppSt8u x, NppSt8u y, NppSt8u width, NppSt8u height) : x(x), y(y), width(width), height(height) {} |
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#endif |
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}; |
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/**
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* 2D Rectangle, 32-bit signed fields |
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* This struct contains position and size information of a rectangle in two space |
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*/ |
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struct NppStRect32s |
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{ |
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NppSt32s x; ///< x-coordinate of upper left corner
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NppSt32s y; ///< y-coordinate of upper left corner
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NppSt32s width; ///< Rectangle width
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NppSt32s height; ///< Rectangle height
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#ifdef __cplusplus |
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NppStRect32s() : x(0), y(0), width(0), height(0) {}; |
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NppStRect32s(NppSt32s x, NppSt32s y, NppSt32s width, NppSt32s height) : x(x), y(y), width(width), height(height) {} |
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#endif |
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}; |
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/**
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* 2D Rectangle, 32-bit unsigned fields |
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* This struct contains position and size information of a rectangle in two space |
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*/ |
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struct NppStRect32u |
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{ |
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NppSt32u x; ///< x-coordinate of upper left corner
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NppSt32u y; ///< y-coordinate of upper left corner
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NppSt32u width; ///< Rectangle width
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NppSt32u height; ///< Rectangle height
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#ifdef __cplusplus |
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NppStRect32u() : x(0), y(0), width(0), height(0) {}; |
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NppStRect32u(NppSt32u x, NppSt32u y, NppSt32u width, NppSt32u height) : x(x), y(y), width(width), height(height) {} |
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#endif |
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}; |
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/**
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* 2D Size, 32-bit signed fields |
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* This struct typically represents the size of a a rectangular region in two space |
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*/ |
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struct NppStSize32s |
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{ |
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NppSt32s width; ///< Rectangle width
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NppSt32s height; ///< Rectangle height
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#ifdef __cplusplus |
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NppStSize32s() : width(0), height(0) {}; |
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NppStSize32s(NppSt32s width, NppSt32s height) : width(width), height(height) {} |
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#endif |
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}; |
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/**
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* 2D Size, 32-bit unsigned fields |
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* This struct typically represents the size of a a rectangular region in two space |
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*/ |
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struct NppStSize32u |
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{ |
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NppSt32u width; ///< Rectangle width
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NppSt32u height; ///< Rectangle height
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#ifdef __cplusplus |
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NppStSize32u() : width(0), height(0) {}; |
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NppStSize32u(NppSt32u width, NppSt32u height) : width(width), height(height) {} |
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#endif |
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}; |
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/**
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* Error Status Codes |
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* |
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* Almost all NPP function return error-status information using |
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* these return codes. |
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* Negative return codes indicate errors, positive return codes indicate |
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* warnings, a return code of 0 indicates success. |
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*/ |
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enum NppStStatus |
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{ |
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//already present in NPP
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/* NPP_SUCCESS = 0, ///< Successful operation (same as NPP_NO_ERROR)
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NPP_ERROR = -1, ///< Unknown error
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NPP_CUDA_KERNEL_EXECUTION_ERROR = -3, ///< CUDA kernel execution error
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NPP_NULL_POINTER_ERROR = -4, ///< NULL pointer argument error
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NPP_TEXTURE_BIND_ERROR = -24, ///< CUDA texture binding error or non-zero offset returned
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NPP_MEMCPY_ERROR = -13, ///< CUDA memory copy error
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NPP_MEM_ALLOC_ERR = -12, ///< CUDA memory allocation error
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NPP_MEMFREE_ERR = -15, ///< CUDA memory deallocation error*/
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//to be added
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NPP_INVALID_ROI, ///< Invalid region of interest argument
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NPP_INVALID_STEP, ///< Invalid image lines step argument (check sign, alignment, relation to image width)
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NPP_INVALID_SCALE, ///< Invalid scale parameter passed
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NPP_MEM_INSUFFICIENT_BUFFER, ///< Insufficient user-allocated buffer
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NPP_MEM_RESIDENCE_ERROR, ///< Memory residence error detected (check if pointers should be device or pinned)
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NPP_MEM_INTERNAL_ERROR, ///< Internal memory management error
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}; |
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/*@}*/ |
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#ifdef __cplusplus |
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/** \defgroup ct_typesize_checks Client-side sizeof types compile-time check
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* @{ |
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*/ |
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NPPST_CT_ASSERT(sizeof(NppStBool) <= 4); |
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NPPST_CT_ASSERT(sizeof(NppSt64s) == 8); |
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NPPST_CT_ASSERT(sizeof(NppSt64u) == 8); |
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NPPST_CT_ASSERT(sizeof(NppSt32s) == 4); |
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NPPST_CT_ASSERT(sizeof(NppSt32u) == 4); |
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NPPST_CT_ASSERT(sizeof(NppSt16s) == 2); |
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NPPST_CT_ASSERT(sizeof(NppSt16u) == 2); |
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NPPST_CT_ASSERT(sizeof(NppSt8s) == 1); |
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NPPST_CT_ASSERT(sizeof(NppSt8u) == 1); |
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NPPST_CT_ASSERT(sizeof(NppSt32f) == 4); |
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NPPST_CT_ASSERT(sizeof(NppSt64f) == 8); |
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NPPST_CT_ASSERT(sizeof(NppStRect8u) == sizeof(NppSt32u)); |
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NPPST_CT_ASSERT(sizeof(NppStRect32s) == 4 * sizeof(NppSt32s)); |
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NPPST_CT_ASSERT(sizeof(NppStRect32u) == 4 * sizeof(NppSt32u)); |
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NPPST_CT_ASSERT(sizeof(NppStSize32u) == 2 * sizeof(NppSt32u)); |
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/*@}*/ |
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#endif |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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/** \defgroup core_npp NPP Core
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* Basic functions for CUDA streams management. |
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* WARNING: These functions couldn't be exported from NPP_staging library, so they can't be used |
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* @{ |
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*/ |
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/**
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* Gets an active CUDA stream used by NPP (Not an API yet!) |
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* \return Current CUDA stream |
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*/ |
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cudaStream_t nppStGetActiveCUDAstream(); |
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/**
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* Sets an active CUDA stream used by NPP (Not an API yet!) |
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* \param cudaStream [IN] cudaStream CUDA stream to become current |
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* \return CUDA stream used before |
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*/ |
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cudaStream_t nppStSetActiveCUDAstream(cudaStream_t cudaStream); |
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/*@}*/ |
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/** \defgroup nppi NPP Image Processing
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* @{ |
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*/ |
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/**
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* Downsamples (decimates) an image using the nearest neighbor algorithm. 32-bit unsigned pixels, single channel. |
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* |
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* \param d_src [IN] Source image pointer (CUDA device memory) |
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* \param srcStep [IN] Source image line step |
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* \param d_dst [OUT] Destination image pointer (CUDA device memory) |
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* \param dstStep [IN] Destination image line step |
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* \param srcRoi [IN] Region of interest in the source image |
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* \param scale [IN] Downsampling scale factor (positive integer) |
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* \param readThruTexture [IN] Performance hint to cache source in texture (true) or read directly (false) |
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* |
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* \return NPP status code |
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*/ |
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NppStStatus nppiStDownsampleNearest_32u_C1R(NppSt32u *d_src, NppSt32u srcStep, |
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NppSt32u *d_dst, NppSt32u dstStep, |
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NppStSize32u srcRoi, NppSt32u scale, |
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NppStBool readThruTexture); |
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/**
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* Downsamples (decimates) an image using the nearest neighbor algorithm. 32-bit signed pixels, single channel. |
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* \see nppiStDownsampleNearest_32u_C1R |
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*/ |
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NppStStatus nppiStDownsampleNearest_32s_C1R(NppSt32s *d_src, NppSt32u srcStep, |
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NppSt32s *d_dst, NppSt32u dstStep, |
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NppStSize32u srcRoi, NppSt32u scale, |
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NppStBool readThruTexture); |
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/**
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* Downsamples (decimates) an image using the nearest neighbor algorithm. 32-bit float pixels, single channel. |
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* \see nppiStDownsampleNearest_32u_C1R |
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*/ |
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NppStStatus nppiStDownsampleNearest_32f_C1R(NppSt32f *d_src, NppSt32u srcStep, |
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NppSt32f *d_dst, NppSt32u dstStep, |
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NppStSize32u srcRoi, NppSt32u scale, |
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NppStBool readThruTexture); |
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/**
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* Downsamples (decimates) an image using the nearest neighbor algorithm. 64-bit unsigned pixels, single channel. |
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* \see nppiStDownsampleNearest_32u_C1R |
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*/ |
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NppStStatus nppiStDownsampleNearest_64u_C1R(NppSt64u *d_src, NppSt32u srcStep, |
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NppSt64u *d_dst, NppSt32u dstStep, |
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NppStSize32u srcRoi, NppSt32u scale, |
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NppStBool readThruTexture); |
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/**
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* Downsamples (decimates) an image using the nearest neighbor algorithm. 64-bit signed pixels, single channel. |
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* \see nppiStDownsampleNearest_32u_C1R |
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*/ |
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NppStStatus nppiStDownsampleNearest_64s_C1R(NppSt64s *d_src, NppSt32u srcStep, |
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NppSt64s *d_dst, NppSt32u dstStep, |
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NppStSize32u srcRoi, NppSt32u scale, |
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NppStBool readThruTexture); |
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/**
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* Downsamples (decimates) an image using the nearest neighbor algorithm. 64-bit float pixels, single channel. |
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* \see nppiStDownsampleNearest_32u_C1R |
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*/ |
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NppStStatus nppiStDownsampleNearest_64f_C1R(NppSt64f *d_src, NppSt32u srcStep, |
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NppSt64f *d_dst, NppSt32u dstStep, |
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NppStSize32u srcRoi, NppSt32u scale, |
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NppStBool readThruTexture); |
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/**
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* Downsamples (decimates) an image using the nearest neighbor algorithm. 32-bit unsigned pixels, single channel. Host implementation. |
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* |
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* \param h_src [IN] Source image pointer (Host or pinned memory) |
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* \param srcStep [IN] Source image line step |
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* \param h_dst [OUT] Destination image pointer (Host or pinned memory) |
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* \param dstStep [IN] Destination image line step |
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* \param srcRoi [IN] Region of interest in the source image |
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* \param scale [IN] Downsampling scale factor (positive integer) |
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* |
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* \return NPP status code |
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*/ |
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NppStStatus nppiStDownsampleNearest_32u_C1R_host(NppSt32u *h_src, NppSt32u srcStep, |
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NppSt32u *h_dst, NppSt32u dstStep, |
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NppStSize32u srcRoi, NppSt32u scale); |
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/**
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* Downsamples (decimates) an image using the nearest neighbor algorithm. 32-bit signed pixels, single channel. Host implementation. |
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* \see nppiStDownsampleNearest_32u_C1R_host |
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*/ |
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NppStStatus nppiStDownsampleNearest_32s_C1R_host(NppSt32s *h_src, NppSt32u srcStep, |
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NppSt32s *h_dst, NppSt32u dstStep, |
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NppStSize32u srcRoi, NppSt32u scale); |
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/**
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* Downsamples (decimates) an image using the nearest neighbor algorithm. 32-bit float pixels, single channel. Host implementation. |
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* \see nppiStDownsampleNearest_32u_C1R_host |
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*/ |
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NppStStatus nppiStDownsampleNearest_32f_C1R_host(NppSt32f *h_src, NppSt32u srcStep, |
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NppSt32f *h_dst, NppSt32u dstStep, |
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NppStSize32u srcRoi, NppSt32u scale); |
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/**
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* Downsamples (decimates) an image using the nearest neighbor algorithm. 64-bit unsigned pixels, single channel. Host implementation. |
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* \see nppiStDownsampleNearest_32u_C1R_host |
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*/ |
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NppStStatus nppiStDownsampleNearest_64u_C1R_host(NppSt64u *h_src, NppSt32u srcStep, |
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NppSt64u *h_dst, NppSt32u dstStep, |
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NppStSize32u srcRoi, NppSt32u scale); |
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/**
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* Downsamples (decimates) an image using the nearest neighbor algorithm. 64-bit signed pixels, single channel. Host implementation. |
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* \see nppiStDownsampleNearest_32u_C1R_host |
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*/ |
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NppStStatus nppiStDownsampleNearest_64s_C1R_host(NppSt64s *h_src, NppSt32u srcStep, |
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NppSt64s *h_dst, NppSt32u dstStep, |
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NppStSize32u srcRoi, NppSt32u scale); |
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/**
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* Downsamples (decimates) an image using the nearest neighbor algorithm. 64-bit float pixels, single channel. Host implementation. |
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* \see nppiStDownsampleNearest_32u_C1R_host |
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*/ |
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NppStStatus nppiStDownsampleNearest_64f_C1R_host(NppSt64f *h_src, NppSt32u srcStep, |
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NppSt64f *h_dst, NppSt32u dstStep, |
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NppStSize32u srcRoi, NppSt32u scale); |
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/**
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* Computes standard deviation for each rectangular region of the input image using integral images. |
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* |
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* \param d_sum [IN] Integral image pointer (CUDA device memory) |
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* \param sumStep [IN] Integral image line step |
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* \param d_sqsum [IN] Squared integral image pointer (CUDA device memory) |
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* \param sqsumStep [IN] Squared integral image line step |
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* \param d_norm [OUT] Stddev image pointer (CUDA device memory). Each pixel contains stddev of a rect with top-left corner at the original location in the image |
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* \param normStep [IN] Stddev image line step |
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* \param roi [IN] Region of interest in the source image |
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* \param rect [IN] Rectangular region to calculate stddev over |
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* \param scaleArea [IN] Multiplication factor to account decimated scale |
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* \param readThruTexture [IN] Performance hint to cache source in texture (true) or read directly (false) |
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* |
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* \return NPP status code |
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*/ |
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NppStStatus nppiStRectStdDev_32f_C1R(NppSt32u *d_sum, NppSt32u sumStep, |
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NppSt64u *d_sqsum, NppSt32u sqsumStep, |
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NppSt32f *d_norm, NppSt32u normStep, |
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NppStSize32u roi, NppStRect32u rect, |
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NppSt32f scaleArea, NppStBool readThruTexture); |
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|
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|
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/**
|
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* Computes standard deviation for each rectangular region of the input image using integral images. Host implementation |
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* |
||||
* \param h_sum [IN] Integral image pointer (Host or pinned memory) |
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* \param sumStep [IN] Integral image line step |
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* \param h_sqsum [IN] Squared integral image pointer (Host or pinned memory) |
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* \param sqsumStep [IN] Squared integral image line step |
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* \param h_norm [OUT] Stddev image pointer (Host or pinned memory). Each pixel contains stddev of a rect with top-left corner at the original location in the image |
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* \param normStep [IN] Stddev image line step |
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* \param roi [IN] Region of interest in the source image |
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* \param rect [IN] Rectangular region to calculate stddev over |
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* \param scaleArea [IN] Multiplication factor to account decimated scale |
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* |
||||
* \return NPP status code |
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*/ |
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NppStStatus nppiStRectStdDev_32f_C1R_host(NppSt32u *h_sum, NppSt32u sumStep, |
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NppSt64u *h_sqsum, NppSt32u sqsumStep, |
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NppSt32f *h_norm, NppSt32u normStep, |
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NppStSize32u roi, NppStRect32u rect, |
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NppSt32f scaleArea); |
||||
|
||||
|
||||
/**
|
||||
* Transposes an image. 32-bit unsigned pixels, single channel |
||||
* |
||||
* \param d_src [IN] Source image pointer (CUDA device memory) |
||||
* \param srcStride [IN] Source image line step |
||||
* \param d_dst [OUT] Destination image pointer (CUDA device memory) |
||||
* \param dstStride [IN] Destination image line step |
||||
* \param srcRoi [IN] Region of interest of the source image |
||||
* |
||||
* \return NPP status code |
||||
*/ |
||||
NppStStatus nppiStTranspose_32u_C1R(NppSt32u *d_src, NppSt32u srcStride, |
||||
NppSt32u *d_dst, NppSt32u dstStride, NppStSize32u srcRoi); |
||||
|
||||
|
||||
/**
|
||||
* Transposes an image. 32-bit signed pixels, single channel |
||||
* \see nppiStTranspose_32u_C1R |
||||
*/ |
||||
NppStStatus nppiStTranspose_32s_C1R(NppSt32s *d_src, NppSt32u srcStride, |
||||
NppSt32s *d_dst, NppSt32u dstStride, NppStSize32u srcRoi); |
||||
|
||||
|
||||
/**
|
||||
* Transposes an image. 32-bit float pixels, single channel |
||||
* \see nppiStTranspose_32u_C1R |
||||
*/ |
||||
NppStStatus nppiStTranspose_32f_C1R(NppSt32f *d_src, NppSt32u srcStride, |
||||
NppSt32f *d_dst, NppSt32u dstStride, NppStSize32u srcRoi); |
||||
|
||||
|
||||
/**
|
||||
* Transposes an image. 64-bit unsigned pixels, single channel |
||||
* \see nppiStTranspose_32u_C1R |
||||
*/ |
||||
NppStStatus nppiStTranspose_64u_C1R(NppSt64u *d_src, NppSt32u srcStride, |
||||
NppSt64u *d_dst, NppSt32u dstStride, NppStSize32u srcRoi); |
||||
|
||||
|
||||
/**
|
||||
* Transposes an image. 64-bit signed pixels, single channel |
||||
* \see nppiStTranspose_32u_C1R |
||||
*/ |
||||
NppStStatus nppiStTranspose_64s_C1R(NppSt64s *d_src, NppSt32u srcStride, |
||||
NppSt64s *d_dst, NppSt32u dstStride, NppStSize32u srcRoi); |
||||
|
||||
|
||||
/**
|
||||
* Transposes an image. 64-bit float pixels, single channel |
||||
* \see nppiStTranspose_32u_C1R |
||||
*/ |
||||
NppStStatus nppiStTranspose_64f_C1R(NppSt64f *d_src, NppSt32u srcStride, |
||||
NppSt64f *d_dst, NppSt32u dstStride, NppStSize32u srcRoi); |
||||
|
||||
|
||||
/**
|
||||
* Transposes an image. 32-bit unsigned pixels, single channel. Host implementation |
||||
* |
||||
* \param h_src [IN] Source image pointer (Host or pinned memory) |
||||
* \param srcStride [IN] Source image line step |
||||
* \param h_dst [OUT] Destination image pointer (Host or pinned memory) |
||||
* \param dstStride [IN] Destination image line step |
||||
* \param srcRoi [IN] Region of interest of the source image |
||||
* |
||||
* \return NPP status code |
||||
*/ |
||||
NppStStatus nppiStTranspose_32u_C1R_host(NppSt32u *h_src, NppSt32u srcStride, |
||||
NppSt32u *h_dst, NppSt32u dstStride, NppStSize32u srcRoi); |
||||
|
||||
|
||||
/**
|
||||
* Transposes an image. 32-bit signed pixels, single channel. Host implementation |
||||
* \see nppiStTranspose_32u_C1R_host |
||||
*/ |
||||
NppStStatus nppiStTranspose_32s_C1R_host(NppSt32s *h_src, NppSt32u srcStride, |
||||
NppSt32s *h_dst, NppSt32u dstStride, NppStSize32u srcRoi); |
||||
|
||||
|
||||
/**
|
||||
* Transposes an image. 32-bit float pixels, single channel. Host implementation |
||||
* \see nppiStTranspose_32u_C1R_host |
||||
*/ |
||||
NppStStatus nppiStTranspose_32f_C1R_host(NppSt32f *h_src, NppSt32u srcStride, |
||||
NppSt32f *h_dst, NppSt32u dstStride, NppStSize32u srcRoi); |
||||
|
||||
|
||||
/**
|
||||
* Transposes an image. 64-bit unsigned pixels, single channel. Host implementation |
||||
* \see nppiStTranspose_32u_C1R_host |
||||
*/ |
||||
NppStStatus nppiStTranspose_64u_C1R_host(NppSt64u *h_src, NppSt32u srcStride, |
||||
NppSt64u *h_dst, NppSt32u dstStride, NppStSize32u srcRoi); |
||||
|
||||
|
||||
/**
|
||||
* Transposes an image. 64-bit signed pixels, single channel. Host implementation |
||||
* \see nppiStTranspose_32u_C1R_host |
||||
*/ |
||||
NppStStatus nppiStTranspose_64s_C1R_host(NppSt64s *h_src, NppSt32u srcStride, |
||||
NppSt64s *h_dst, NppSt32u dstStride, NppStSize32u srcRoi); |
||||
|
||||
|
||||
/**
|
||||
* Transposes an image. 64-bit float pixels, single channel. Host implementation |
||||
* \see nppiStTranspose_32u_C1R_host |
||||
*/ |
||||
NppStStatus nppiStTranspose_64f_C1R_host(NppSt64f *h_src, NppSt32u srcStride, |
||||
NppSt64f *h_dst, NppSt32u dstStride, NppStSize32u srcRoi); |
||||
|
||||
|
||||
/**
|
||||
* Calculates the size of the temporary buffer for integral image creation |
||||
* |
||||
* \param roiSize [IN] Size of the input image |
||||
* \param pBufsize [OUT] Pointer to host variable that returns the size of the temporary buffer (in bytes) |
||||
* |
||||
* \return NPP status code |
||||
*/ |
||||
NppStStatus nppiStIntegralGetSize_8u32u(NppStSize32u roiSize, NppSt32u *pBufsize); |
||||
|
||||
|
||||
/**
|
||||
* Creates an integral image representation for the input image |
||||
* |
||||
* \param d_src [IN] Source image pointer (CUDA device memory) |
||||
* \param srcStep [IN] Source image line step |
||||
* \param d_dst [OUT] Destination integral image pointer (CUDA device memory) |
||||
* \param dstStep [IN] Destination image line step |
||||
* \param roiSize [IN] Region of interest of the source image |
||||
* \param pBuffer [IN] Pointer to the pre-allocated temporary buffer (CUDA device memory) |
||||
* \param bufSize [IN] Size of the pBuffer in bytes |
||||
* |
||||
* \return NPP status code |
||||
*/ |
||||
NppStStatus nppiStIntegral_8u32u_C1R(NppSt8u *d_src, NppSt32u srcStep, |
||||
NppSt32u *d_dst, NppSt32u dstStep, NppStSize32u roiSize, |
||||
NppSt8u *pBuffer, NppSt32u bufSize); |
||||
|
||||
|
||||
/**
|
||||
* Creates an integral image representation for the input image. Host implementation |
||||
* |
||||
* \param h_src [IN] Source image pointer (Host or pinned memory) |
||||
* \param srcStep [IN] Source image line step |
||||
* \param h_dst [OUT] Destination integral image pointer (Host or pinned memory) |
||||
* \param dstStep [IN] Destination image line step |
||||
* \param roiSize [IN] Region of interest of the source image |
||||
* |
||||
* \return NPP status code |
||||
*/ |
||||
NppStStatus nppiStIntegral_8u32u_C1R_host(NppSt8u *h_src, NppSt32u srcStep, |
||||
NppSt32u *h_dst, NppSt32u dstStep, NppStSize32u roiSize); |
||||
|
||||
|
||||
/**
|
||||
* Calculates the size of the temporary buffer for squared integral image creation |
||||
* |
||||
* \param roiSize [IN] Size of the input image |
||||
* \param pBufsize [OUT] Pointer to host variable that returns the size of the temporary buffer (in bytes) |
||||
* |
||||
* \return NPP status code |
||||
*/ |
||||
NppStStatus nppiStSqrIntegralGetSize_8u64u(NppStSize32u roiSize, NppSt32u *pBufsize); |
||||
|
||||
|
||||
/**
|
||||
* Creates a squared integral image representation for the input image |
||||
* |
||||
* \param d_src [IN] Source image pointer (CUDA device memory) |
||||
* \param srcStep [IN] Source image line step |
||||
* \param d_dst [OUT] Destination squared integral image pointer (CUDA device memory) |
||||
* \param dstStep [IN] Destination image line step |
||||
* \param roiSize [IN] Region of interest of the source image |
||||
* \param pBuffer [IN] Pointer to the pre-allocated temporary buffer (CUDA device memory) |
||||
* \param bufSize [IN] Size of the pBuffer in bytes |
||||
* |
||||
* \return NPP status code |
||||
*/ |
||||
NppStStatus nppiStSqrIntegral_8u64u_C1R(NppSt8u *d_src, NppSt32u srcStep, |
||||
NppSt64u *d_dst, NppSt32u dstStep, NppStSize32u roiSize, |
||||
NppSt8u *pBuffer, NppSt32u bufSize); |
||||
|
||||
|
||||
/**
|
||||
* Creates a squared integral image representation for the input image. Host implementation |
||||
* |
||||
* \param h_src [IN] Source image pointer (Host or pinned memory) |
||||
* \param srcStep [IN] Source image line step |
||||
* \param h_dst [OUT] Destination squared integral image pointer (Host or pinned memory) |
||||
* \param dstStep [IN] Destination image line step |
||||
* \param roiSize [IN] Region of interest of the source image |
||||
* |
||||
* \return NPP status code |
||||
*/ |
||||
NppStStatus nppiStSqrIntegral_8u64u_C1R_host(NppSt8u *h_src, NppSt32u srcStep, |
||||
NppSt64u *h_dst, NppSt32u dstStep, NppStSize32u roiSize); |
||||
|
||||
|
||||
/*@}*/ |
||||
|
||||
|
||||
/** \defgroup npps NPP Signal Processing
|
||||
* @{ |
||||
*/ |
||||
|
||||
|
||||
/**
|
||||
* Calculates the size of the temporary buffer for vector compaction. 32-bit unsigned values |
||||
* |
||||
* \param srcLen [IN] Length of the input vector in elements |
||||
* \param pBufsize [OUT] Pointer to host variable that returns the size of the temporary buffer (in bytes) |
||||
* |
||||
* \return NPP status code |
||||
*/ |
||||
NppStStatus nppsStCompactGetSize_32u(NppSt32u srcLen, NppSt32u *pBufsize); |
||||
|
||||
|
||||
/**
|
||||
* Calculates the size of the temporary buffer for vector compaction. 32-bit signed values |
||||
* \see nppsStCompactGetSize_32u |
||||
*/ |
||||
NppStStatus nppsStCompactGetSize_32s(NppSt32u srcLen, NppSt32u *pBufsize); |
||||
|
||||
|
||||
/**
|
||||
* Calculates the size of the temporary buffer for vector compaction. 32-bit float values |
||||
* \see nppsStCompactGetSize_32u |
||||
*/ |
||||
NppStStatus nppsStCompactGetSize_32f(NppSt32u srcLen, NppSt32u *pBufsize); |
||||
|
||||
|
||||
/**
|
||||
* Compacts the input vector by removing elements of specified value. 32-bit unsigned values |
||||
* |
||||
* \param d_src [IN] Source vector pointer (CUDA device memory) |
||||
* \param srcLen [IN] Source vector length |
||||
* \param d_dst [OUT] Destination vector pointer (CUDA device memory) |
||||
* \param p_dstLen [OUT] Pointer to the destination vector length (Pinned memory or NULL) |
||||
* \param elemRemove [IN] The value to be removed |
||||
* \param pBuffer [IN] Pointer to the pre-allocated temporary buffer (CUDA device memory) |
||||
* \param bufSize [IN] Size of the pBuffer in bytes |
||||
* |
||||
* \return NPP status code |
||||
*/ |
||||
NppStStatus nppsStCompact_32u(NppSt32u *d_src, NppSt32u srcLen, |
||||
NppSt32u *d_dst, NppSt32u *p_dstLen, |
||||
NppSt32u elemRemove, |
||||
NppSt8u *pBuffer, NppSt32u bufSize); |
||||
|
||||
|
||||
/**
|
||||
* Compacts the input vector by removing elements of specified value. 32-bit signed values |
||||
* \see nppsStCompact_32u |
||||
*/ |
||||
NppStStatus nppsStCompact_32s(NppSt32s *d_src, NppSt32u srcLen, |
||||
NppSt32s *d_dst, NppSt32u *p_dstLen, |
||||
NppSt32s elemRemove, |
||||
NppSt8u *pBuffer, NppSt32u bufSize); |
||||
|
||||
|
||||
/**
|
||||
* Compacts the input vector by removing elements of specified value. 32-bit float values |
||||
* \see nppsStCompact_32u |
||||
*/ |
||||
NppStStatus nppsStCompact_32f(NppSt32f *d_src, NppSt32u srcLen, |
||||
NppSt32f *d_dst, NppSt32u *p_dstLen, |
||||
NppSt32f elemRemove, |
||||
NppSt8u *pBuffer, NppSt32u bufSize); |
||||
|
||||
|
||||
/**
|
||||
* Compacts the input vector by removing elements of specified value. 32-bit unsigned values. Host implementation |
||||
* |
||||
* \param h_src [IN] Source vector pointer (CUDA device memory) |
||||
* \param srcLen [IN] Source vector length |
||||
* \param h_dst [OUT] Destination vector pointer (CUDA device memory) |
||||
* \param dstLen [OUT] Pointer to the destination vector length (can be NULL) |
||||
* \param elemRemove [IN] The value to be removed |
||||
* |
||||
* \return NPP status code |
||||
*/ |
||||
NppStStatus nppsStCompact_32u_host(NppSt32u *h_src, NppSt32u srcLen, |
||||
NppSt32u *h_dst, NppSt32u *dstLen, NppSt32u elemRemove); |
||||
|
||||
|
||||
/**
|
||||
* Compacts the input vector by removing elements of specified value. 32-bit signed values. Host implementation |
||||
* \see nppsStCompact_32u_host |
||||
*/ |
||||
NppStStatus nppsStCompact_32s_host(NppSt32s *h_src, NppSt32u srcLen, |
||||
NppSt32s *h_dst, NppSt32u *dstLen, NppSt32s elemRemove); |
||||
|
||||
|
||||
/**
|
||||
* Compacts the input vector by removing elements of specified value. 32-bit float values. Host implementation |
||||
* \see nppsStCompact_32u_host |
||||
*/ |
||||
NppStStatus nppsStCompact_32f_host(NppSt32f *h_src, NppSt32u srcLen, |
||||
NppSt32f *h_dst, NppSt32u *dstLen, NppSt32f elemRemove); |
||||
|
||||
|
||||
/*@}*/ |
||||
|
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
|
||||
#endif // _npp_staging_h_
|
@ -0,0 +1,24 @@ |
||||
if(CMAKE_SIZEOF_VOID_P EQUAL 4) |
||||
set(BIT_SUFF 32) |
||||
else() |
||||
set(BIT_SUFF 64) |
||||
endif() |
||||
|
||||
if (APPLE) |
||||
set(PLATFORM_SUFF Darwin) |
||||
elseif (UNIX) |
||||
set(PLATFORM_SUFF Linux) |
||||
else() |
||||
set(PLATFORM_SUFF Windows) |
||||
endif() |
||||
|
||||
set(LIB_FILE NPP_staging_static_${PLATFORM_SUFF}_${BIT_SUFF}_v1) |
||||
|
||||
find_library(NPPST_LIB |
||||
NAMES "${LIB_FILE}" "lib${LIB_FILE}" |
||||
PATHS "${CMAKE_SOURCE_DIR}/3rdparty/NPP_staging" |
||||
DOC "NPP staging library" |
||||
) |
||||
|
||||
SET(NPPST_INC "${CMAKE_SOURCE_DIR}//3rdparty/NPP_staging") |
||||
|
@ -0,0 +1,110 @@ |
||||
/*M///////////////////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.
|
||||
//
|
||||
// By downloading, copying, installing or using the software you agree to this license.
|
||||
// If you do not agree to this license, do not download, install,
|
||||
// copy or use the software.
|
||||
//
|
||||
//
|
||||
// License Agreement
|
||||
// For Open Source Computer Vision Library
|
||||
//
|
||||
// Copyright (C) 2000-2008, Intel Corporation, all rights reserved.
|
||||
// Copyright (C) 2009, Willow Garage Inc., all rights reserved.
|
||||
// Third party copyrights are property of their respective owners.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without modification,
|
||||
// are permitted provided that the following conditions are met:
|
||||
//
|
||||
// * Redistribution's of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
|
||||
//
|
||||
// * Redistribution's in binary form must reproduce the above copyright notice,
|
||||
// this list of conditions and the following disclaimer in the documentation
|
||||
// and/or other GpuMaterials provided with the distribution.
|
||||
//
|
||||
// * The name of the copyright holders may not be used to endorse or promote products
|
||||
// derived from this software without specific prior written permission.
|
||||
//
|
||||
// This software is provided by the copyright holders and contributors "as is" and
|
||||
// any express or bpied warranties, including, but not limited to, the bpied
|
||||
// warranties of merchantability and fitness for a particular purpose are disclaimed.
|
||||
// In no event shall the Intel Corporation or contributors be liable for any direct,
|
||||
// indirect, incidental, special, exemplary, or consequential damages
|
||||
// (including, but not limited to, procurement of substitute goods or services;
|
||||
// loss of use, data, or profits; or business interruption) however caused
|
||||
// and on any theory of liability, whether in contract, strict liability,
|
||||
// or tort (including negligence or otherwise) arising in any way out of
|
||||
// the use of this software, even if advised of the possibility of such damage.
|
||||
//
|
||||
//M*/
|
||||
|
||||
#include "precomp.hpp" |
||||
|
||||
|
||||
|
||||
|
||||
using namespace cv; |
||||
using namespace cv::gpu; |
||||
using namespace std; |
||||
|
||||
#if !defined (HAVE_CUDA) |
||||
|
||||
cv::gpu::CascadeClassifier::CascadeClassifier() { throw_nogpu(); } |
||||
cv::gpu::CascadeClassifier::CascadeClassifier(const string&) { throw_nogpu(); } |
||||
cv::gpu::CascadeClassifier::~CascadeClassifier() { throw_nogpu(); } |
||||
|
||||
bool cv::gpu::CascadeClassifier::empty() const { throw_nogpu(); return true; } |
||||
bool cv::gpu::CascadeClassifier::load(const string& filename) { throw_nogpu(); return true; } |
||||
bool cv::gpu::CascadeClassifier::read(const FileNode& node) { throw_nogpu(); return true; } |
||||
|
||||
void cv::gpu::CascadeClassifier::detectMultiScale( const Mat&, vector<Rect>&, double, int, int, Size, Size) { throw_nogpu(); } |
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#else |
||||
|
||||
|
||||
cv::gpu::CascadeClassifier::CascadeClassifier() |
||||
{ |
||||
|
||||
} |
||||
|
||||
cv::gpu::CascadeClassifier::CascadeClassifier(const string& filename) |
||||
{ |
||||
|
||||
} |
||||
|
||||
cv::gpu::CascadeClassifier::~CascadeClassifier() |
||||
{ |
||||
|
||||
} |
||||
|
||||
bool cv::gpu::CascadeClassifier::empty() const |
||||
{ |
||||
int *a = (int*)&nppiStTranspose_32u_C1R; |
||||
return *a == 0xFFFFF; |
||||
return true; |
||||
} |
||||
|
||||
bool cv::gpu::CascadeClassifier::load(const string& filename) |
||||
{ |
||||
return true; |
||||
} |
||||
|
||||
bool cv::gpu::CascadeClassifier::read(const FileNode& node) |
||||
{ |
||||
return true; |
||||
} |
||||
|
||||
void cv::gpu::CascadeClassifier::detectMultiScale( const Mat& image, vector<Rect>& objects, double scaleFactor,
|
||||
int minNeighbors, int flags, Size minSize, Size maxSize) |
||||
|
||||
{ |
||||
|
||||
} |
||||
|
||||
#endif |
Loading…
Reference in new issue