Merge pull request #22463 from hanliutong:rvv

Redesign the SIMD macro.

modules/core/include/opencv2/core/hal/intrin.hpp

@@ -544,6 +544,11 @@ using namespace CV__SIMD_NAMESPACE;
 
 #endif
 
+//! @cond IGNORED
+#ifndef CV_SIMD_64F
+#define CV_SIMD_64F 0
+#endif
+
 namespace CV__SIMD_NAMESPACE {
 //! @addtogroup core_hal_intrin
 //! @{
@@ -908,10 +913,6 @@ namespace CV__SIMD_NAMESPACE {
     #undef VXPREFIX
 } // namespace
 
-//! @cond IGNORED
-#ifndef CV_SIMD_64F
-#define CV_SIMD_64F 0
-#endif
 
 #ifndef CV_SIMD_FP16
 #define CV_SIMD_FP16 0  //!< Defined to 1 on native support of operations with float16x8_t / float16x16_t (SIMD256) types

modules/core/include/opencv2/core/hal/intrin_rvv_scalable.hpp

@@ -1,3 +1,9 @@
+// This file is part of OpenCV project.
+// It is subject to the license terms in the LICENSE file found in the top-level directory
+// of this distribution and at http://opencv.org/license.html.
+
+// The original implementation is contributed by HAN Liutong.
+// Copyright (C) 2022, Institute of Software, Chinese Academy of Sciences.
 
 #ifndef OPENCV_HAL_INTRIN_RVV_SCALABLE_HPP
 #define OPENCV_HAL_INTRIN_RVV_SCALABLE_HPP
@@ -1689,7 +1695,7 @@ OPENCV_HAL_IMPL_RVV_PACK_TRIPLETS(v_float64, vlmul_trunc_u8mf8)
 
 ////// FP16 support ///////
 
-#if __riscv_zfh
+#if defined(__riscv_zfh) && __riscv_zfh
 inline v_float32 v_load_expand(const float16_t* ptr)
 {
     return vfwcvt_f(vle16_v_f16mf2((_Float16*)ptr, VTraits<v_float32>::vlanes()) ,VTraits<v_float32>::vlanes());;