Merge pull request #16374 from alalek:imgproc_dispatch_sumpixels
Alexander Alekhin
5 years ago
commit
76c21b73aa
5 changed files with 440 additions and 352 deletions
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// This file is part of OpenCV project.
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// It is subject to the license terms in the LICENSE file found in the top-level directory
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// of this distribution and at http://opencv.org/license.html.
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//
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// Copyright (C) 2019, Intel Corporation, all rights reserved.
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#ifndef OPENCV_IMGPROC_SUM_PIXELS_HPP |
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#define OPENCV_IMGPROC_SUM_PIXELS_HPP |
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namespace cv |
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{ |
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namespace opt_AVX512_SKX |
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{ |
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#if CV_TRY_AVX512_SKX |
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void calculate_integral_avx512( |
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const uchar *src, size_t _srcstep, |
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double *sum, size_t _sumstep, |
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double *sqsum, size_t _sqsumstep, |
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int width, int height, int cn); |
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#endif |
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} // end namespace opt_AVX512_SKX
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} // end namespace cv
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#endif |
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@ -0,0 +1,288 @@ |
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/*M///////////////////////////////////////////////////////////////////////////////////////
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//
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// IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.
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//
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// By downloading, copying, installing or using the software you agree to this license.
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// If you do not agree to this license, do not download, install,
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// copy or use the software.
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//
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//
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// License Agreement
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// For Open Source Computer Vision Library
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//
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// Copyright (C) 2000-2020 Intel Corporation, all rights reserved.
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// Copyright (C) 2009, Willow Garage Inc., all rights reserved.
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// Copyright (C) 2014, Itseez Inc., all rights reserved.
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// Third party copyrights are property of their respective owners.
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//
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// Redistribution and use in source and binary forms, with or without modification,
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// are permitted provided that the following conditions are met:
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//
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// * Redistribution's of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// * Redistribution's in binary form must reproduce the above copyright notice,
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// this list of conditions and the following disclaimer in the documentation
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// and/or other materials provided with the distribution.
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//
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// * The name of the copyright holders may not be used to endorse or promote products
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// derived from this software without specific prior written permission.
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//
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// This software is provided by the copyright holders and contributors "as is" and
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// any express or implied warranties, including, but not limited to, the implied
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// warranties of merchantability and fitness for a particular purpose are disclaimed.
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// In no event shall the Intel Corporation or contributors be liable for any direct,
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// indirect, incidental, special, exemplary, or consequential damages
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// (including, but not limited to, procurement of substitute goods or services;
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// loss of use, data, or profits; or business interruption) however caused
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// and on any theory of liability, whether in contract, strict liability,
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// or tort (including negligence or otherwise) arising in any way out of
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// the use of this software, even if advised of the possibility of such damage.
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//
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//M*/
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#include "opencv2/core/hal/intrin.hpp" |
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#if CV_AVX512_SKX |
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#include "sumpixels.avx512_skx.hpp" |
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#endif |
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namespace cv { namespace hal { |
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CV_CPU_OPTIMIZATION_NAMESPACE_BEGIN |
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// forward declarations
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bool integral_SIMD( |
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int depth, int sdepth, int sqdepth, |
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const uchar* src, size_t srcstep, |
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uchar* sum, size_t sumstep, |
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uchar* sqsum, size_t sqsumstep, |
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uchar* tilted, size_t tstep, |
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int width, int height, int cn); |
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#ifndef CV_CPU_OPTIMIZATION_DECLARATIONS_ONLY |
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namespace { |
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template <typename T, typename ST, typename QT> |
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struct Integral_SIMD |
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{ |
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bool operator()(const T *, size_t, |
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ST *, size_t, |
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QT *, size_t, |
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ST *, size_t, |
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int, int, int) const |
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{ |
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return false; |
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} |
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}; |
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#if CV_AVX512_SKX |
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template <> |
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struct Integral_SIMD<uchar, double, double> { |
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Integral_SIMD() {}; |
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bool operator()(const uchar *src, size_t _srcstep, |
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double *sum, size_t _sumstep, |
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double *sqsum, size_t _sqsumstep, |
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double *tilted, size_t _tiltedstep, |
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int width, int height, int cn) const |
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{ |
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CV_UNUSED(_tiltedstep); |
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// TODO: Add support for 1 channel input (WIP)
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if (!tilted && (cn <= 4)) |
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{ |
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calculate_integral_avx512(src, _srcstep, sum, _sumstep, |
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sqsum, _sqsumstep, width, height, cn); |
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return true; |
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} |
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return false; |
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} |
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}; |
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#endif |
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#if CV_SIMD && CV_SIMD_WIDTH <= 64 |
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template <> |
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struct Integral_SIMD<uchar, int, double> |
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{ |
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Integral_SIMD() {} |
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bool operator()(const uchar * src, size_t _srcstep, |
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int * sum, size_t _sumstep, |
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double * sqsum, size_t, |
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int * tilted, size_t, |
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int width, int height, int cn) const |
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{ |
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if (sqsum || tilted || cn != 1) |
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return false; |
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// the first iteration
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memset(sum, 0, (width + 1) * sizeof(int)); |
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// the others
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for (int i = 0; i < height; ++i) |
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{ |
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const uchar * src_row = src + _srcstep * i; |
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int * prev_sum_row = (int *)((uchar *)sum + _sumstep * i) + 1; |
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int * sum_row = (int *)((uchar *)sum + _sumstep * (i + 1)) + 1; |
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sum_row[-1] = 0; |
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v_int32 prev = vx_setzero_s32(); |
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int j = 0; |
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for ( ; j + v_uint16::nlanes <= width; j += v_uint16::nlanes) |
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{ |
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v_int16 el8 = v_reinterpret_as_s16(vx_load_expand(src_row + j)); |
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v_int32 el4l, el4h; |
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#if CV_AVX2 && CV_SIMD_WIDTH == 32 |
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__m256i vsum = _mm256_add_epi16(el8.val, _mm256_slli_si256(el8.val, 2)); |
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vsum = _mm256_add_epi16(vsum, _mm256_slli_si256(vsum, 4)); |
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vsum = _mm256_add_epi16(vsum, _mm256_slli_si256(vsum, 8)); |
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__m256i shmask = _mm256_set1_epi32(7); |
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el4l.val = _mm256_add_epi32(_mm256_cvtepi16_epi32(_v256_extract_low(vsum)), prev.val); |
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el4h.val = _mm256_add_epi32(_mm256_cvtepi16_epi32(_v256_extract_high(vsum)), _mm256_permutevar8x32_epi32(el4l.val, shmask)); |
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prev.val = _mm256_permutevar8x32_epi32(el4h.val, shmask); |
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#else |
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el8 += v_rotate_left<1>(el8); |
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el8 += v_rotate_left<2>(el8); |
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#if CV_SIMD_WIDTH >= 32 |
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el8 += v_rotate_left<4>(el8); |
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#if CV_SIMD_WIDTH == 64 |
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el8 += v_rotate_left<8>(el8); |
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#endif |
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#endif |
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v_expand(el8, el4l, el4h); |
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el4l += prev; |
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el4h += el4l; |
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prev = v_broadcast_element<v_int32::nlanes - 1>(el4h); |
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#endif |
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v_store(sum_row + j , el4l + vx_load(prev_sum_row + j )); |
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v_store(sum_row + j + v_int32::nlanes, el4h + vx_load(prev_sum_row + j + v_int32::nlanes)); |
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} |
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for (int v = sum_row[j - 1] - prev_sum_row[j - 1]; j < width; ++j) |
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sum_row[j] = (v += src_row[j]) + prev_sum_row[j]; |
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} |
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return true; |
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} |
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}; |
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template <> |
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struct Integral_SIMD<uchar, float, double> |
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{ |
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Integral_SIMD() {} |
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bool operator()(const uchar * src, size_t _srcstep, |
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float * sum, size_t _sumstep, |
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double * sqsum, size_t, |
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float * tilted, size_t, |
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int width, int height, int cn) const |
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{ |
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if (sqsum || tilted || cn != 1) |
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return false; |
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// the first iteration
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memset(sum, 0, (width + 1) * sizeof(int)); |
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// the others
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for (int i = 0; i < height; ++i) |
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{ |
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const uchar * src_row = src + _srcstep * i; |
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float * prev_sum_row = (float *)((uchar *)sum + _sumstep * i) + 1; |
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float * sum_row = (float *)((uchar *)sum + _sumstep * (i + 1)) + 1; |
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sum_row[-1] = 0; |
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v_float32 prev = vx_setzero_f32(); |
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int j = 0; |
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for (; j + v_uint16::nlanes <= width; j += v_uint16::nlanes) |
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{ |
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v_int16 el8 = v_reinterpret_as_s16(vx_load_expand(src_row + j)); |
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v_float32 el4l, el4h; |
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#if CV_AVX2 && CV_SIMD_WIDTH == 32 |
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__m256i vsum = _mm256_add_epi16(el8.val, _mm256_slli_si256(el8.val, 2)); |
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vsum = _mm256_add_epi16(vsum, _mm256_slli_si256(vsum, 4)); |
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vsum = _mm256_add_epi16(vsum, _mm256_slli_si256(vsum, 8)); |
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__m256i shmask = _mm256_set1_epi32(7); |
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el4l.val = _mm256_add_ps(_mm256_cvtepi32_ps(_mm256_cvtepi16_epi32(_v256_extract_low(vsum))), prev.val); |
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el4h.val = _mm256_add_ps(_mm256_cvtepi32_ps(_mm256_cvtepi16_epi32(_v256_extract_high(vsum))), _mm256_permutevar8x32_ps(el4l.val, shmask)); |
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prev.val = _mm256_permutevar8x32_ps(el4h.val, shmask); |
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#else |
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el8 += v_rotate_left<1>(el8); |
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el8 += v_rotate_left<2>(el8); |
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#if CV_SIMD_WIDTH >= 32 |
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el8 += v_rotate_left<4>(el8); |
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#if CV_SIMD_WIDTH == 64 |
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el8 += v_rotate_left<8>(el8); |
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#endif |
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#endif |
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v_int32 el4li, el4hi; |
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v_expand(el8, el4li, el4hi); |
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el4l = v_cvt_f32(el4li) + prev; |
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el4h = v_cvt_f32(el4hi) + el4l; |
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prev = v_broadcast_element<v_float32::nlanes - 1>(el4h); |
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#endif |
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v_store(sum_row + j , el4l + vx_load(prev_sum_row + j )); |
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v_store(sum_row + j + v_float32::nlanes, el4h + vx_load(prev_sum_row + j + v_float32::nlanes)); |
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} |
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for (float v = sum_row[j - 1] - prev_sum_row[j - 1]; j < width; ++j) |
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sum_row[j] = (v += src_row[j]) + prev_sum_row[j]; |
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} |
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return true; |
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} |
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}; |
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#endif |
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} // namespace anon
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bool integral_SIMD( |
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int depth, int sdepth, int sqdepth, |
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const uchar* src, size_t srcstep, |
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uchar* sum, size_t sumstep, |
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uchar* sqsum, size_t sqsumstep, |
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uchar* tilted, size_t tstep, |
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int width, int height, int cn) |
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{ |
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CV_INSTRUMENT_REGION(); |
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#define ONE_CALL(T, ST, QT) \ |
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return Integral_SIMD<T, ST, QT>()((const T*)src, srcstep, (ST*)sum, sumstep, (QT*)sqsum, sqsumstep, (ST*)tilted, tstep, width, height, cn) |
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if( depth == CV_8U && sdepth == CV_32S && sqdepth == CV_64F ) |
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ONE_CALL(uchar, int, double); |
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else if( depth == CV_8U && sdepth == CV_32S && sqdepth == CV_32F ) |
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ONE_CALL(uchar, int, float); |
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else if( depth == CV_8U && sdepth == CV_32S && sqdepth == CV_32S ) |
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ONE_CALL(uchar, int, int); |
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else if( depth == CV_8U && sdepth == CV_32F && sqdepth == CV_64F ) |
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ONE_CALL(uchar, float, double); |
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else if( depth == CV_8U && sdepth == CV_32F && sqdepth == CV_32F ) |
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ONE_CALL(uchar, float, float); |
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else if( depth == CV_8U && sdepth == CV_64F && sqdepth == CV_64F ) |
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ONE_CALL(uchar, double, double); |
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else if( depth == CV_16U && sdepth == CV_64F && sqdepth == CV_64F ) |
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ONE_CALL(ushort, double, double); |
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else if( depth == CV_16S && sdepth == CV_64F && sqdepth == CV_64F ) |
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ONE_CALL(short, double, double); |
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else if( depth == CV_32F && sdepth == CV_32F && sqdepth == CV_64F ) |
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ONE_CALL(float, float, double); |
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else if( depth == CV_32F && sdepth == CV_32F && sqdepth == CV_32F ) |
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ONE_CALL(float, float, float); |
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else if( depth == CV_32F && sdepth == CV_64F && sqdepth == CV_64F ) |
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ONE_CALL(float, double, double); |
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else if( depth == CV_64F && sdepth == CV_64F && sqdepth == CV_64F ) |
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ONE_CALL(double, double, double); |
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else |
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return false; |
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#undef ONE_CALL |
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} |
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#endif |
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CV_CPU_OPTIMIZATION_NAMESPACE_END |
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}} // cv::hal::
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