Lightweight class encapsulating pitched memory on a GPU and passed to nvcc-compiled code (CUDA kernels). Typically, it is used internally by OpenCV and by users who write device code. You can call its members from both host and device code. ::
template <typename T> struct PtrStepSz
template <typename T> struct PtrStepSz : public PtrStep<T>
/* returns pointer to the beginning of the given image row */
__CV_GPU_HOST_DEVICE__ T* ptr(int y = 0);
__CV_GPU_HOST_DEVICE__ const T* ptr(int y = 0) const;
int cols;
int rows;
};
typedef PtrStepSz<unsigned char> PtrStepSzb;
@ -41,32 +31,32 @@ Lightweight class encapsulating pitched memory on a GPU and passed to nvcc-compi
gpu::PtrStep
--------------
------------
..ocv:class:: gpu::PtrStep
Structure similar to :ocv:class:`gpu::PtrStepSz` but containing only a pointer and row step. Width and height fields are excluded due to performance reasons. The structure is intended for internal use or for users who write device code. ::
template<typename T> struct PtrStep
template<typename T> struct PtrStep : public DevPtr<T>
@ -121,16 +114,10 @@ Beware that the latter limitation may lead to overloaded matrix operators that c
gpu::createContinuous
-------------------------
Creates a continuous matrix in the GPU memory.
---------------------
Creates a continuous matrix.
..ocv:function:: void gpu::createContinuous(int rows, int cols, int type, GpuMat& m)
..ocv:function:: GpuMat gpu::createContinuous(int rows, int cols, int type)
..ocv:function:: void gpu::createContinuous(Size size, int type, GpuMat& m)
..ocv:function:: GpuMat gpu::createContinuous(Size size, int type)
..ocv:function:: void gpu::createContinuous(int rows, int cols, int type, OutputArray arr)
:param rows:Row count.
@ -138,64 +125,39 @@ Creates a continuous matrix in the GPU memory.
:param type:Type of the matrix.
:param m:Destination matrix. This parameter changes only if it has a proper type and area ( :math:`\texttt{rows} \times \texttt{cols}` ).
:param arr:Destination matrix. This parameter changes only if it has a proper type and area ( :math:`\texttt{rows} \times \texttt{cols}` ).
Matrix is called continuous if its elements are stored continuously, that is, without gaps at the end of each row.
gpu::ensureSizeIsEnough
---------------------------
-----------------------
Ensures that the size of a matrix is big enough and the matrix has a proper type.
..ocv:function:: void gpu::ensureSizeIsEnough(int rows, int cols, int type, GpuMat& m)
..ocv:function:: void gpu::ensureSizeIsEnough(Size size, int type, GpuMat& m)
..ocv:function:: void gpu::ensureSizeIsEnough(int rows, int cols, int type, OutputArray arr)
:param rows:Minimum desired number of rows.
:param cols:Minimum desired number of columns.
:param size:Rows and columns passed as a structure.
:param type:Desired matrix type.
:param m:Destination matrix.
:param arr:Destination matrix.
The function does not reallocate memory if the matrix has proper attributes already.
gpu::registerPageLocked
-------------------------------
Page-locks the memory of matrix and maps it for the device(s).
..ocv:function:: void gpu::registerPageLocked(Mat& m)
:param m:Input matrix.
gpu::unregisterPageLocked
-------------------------------
Unmaps the memory of matrix and makes it pageable again.
..ocv:function:: void gpu::unregisterPageLocked(Mat& m)
:param m:Input matrix.
gpu::CudaMem
------------
..ocv:class:: gpu::CudaMem
Class with reference counting wrapping special memory type allocation functions from CUDA. Its interface is also
:ocv:func:`Mat`-like but with additional memory type parameters.
Class with reference counting wrapping special memory type allocation functions from CUDA. Its interface is also :ocv:func:`Mat`-like but with additional memory type parameters.
* **ALLOC_PAGE_LOCKED** sets a page locked memory type used commonly for fast and asynchronous uploading/downloading data from/to GPU.
* **ALLOC_ZEROCOPY** specifies a zero copy memory allocation that enables mapping the host memory to GPU address space, if supported.
* **ALLOC_WRITE_COMBINED** sets the write combined buffer that is not cached by CPU. Such buffers are used to supply GPU with data when GPU only reads it. The advantage is a better CPU cache utilization.
* **PAGE_LOCKED** sets a page locked memory type used commonly for fast and asynchronous uploading/downloading data from/to GPU.
* **SHARED** specifies a zero copy memory allocation that enables mapping the host memory to GPU address space, if supported.
* **WRITE_COMBINED** sets the write combined buffer that is not cached by CPU. Such buffers are used to supply GPU with data when GPU only reads it. The advantage is a better CPU cache utilization.
..note:: Allocation size of such memory types is usually limited. For more details, see *CUDA 2.2 Pinned Memory APIs* document or *CUDA C Programming Guide*.
@ -204,36 +166,33 @@ Class with reference counting wrapping special memory type allocation functions
This can be done only if memory was allocated with the ``ALLOC_ZEROCOPY`` flag and if it is supported by the hardware. Laptops often share video and CPU memory, so address spaces can be mapped, which eliminates an extra copy.
This can be done only if memory was allocated with the ``SHARED`` flag and if it is supported by the hardware. Laptops often share video and CPU memory, so address spaces can be mapped, which eliminates an extra copy.
gpu::registerPageLocked
-----------------------
Page-locks the memory of matrix and maps it for the device(s).
..ocv:function:: void gpu::registerPageLocked(Mat& m)
:param m:Input matrix.
gpu::unregisterPageLocked
-------------------------
Unmaps the memory of matrix and makes it pageable again.
gpu::CudaMem::canMapHostMemory
----------------------------------
Returns ``true`` if the current hardware supports address space mapping and ``ALLOC_ZEROCOPY`` memory allocation.
..ocv:function:: void gpu::unregisterPageLocked(Mat& m)
This class encapsulates a queue of asynchronous calls. Some functions have overloads with the additional ``gpu::Stream`` parameter. The overloads do initialization work (allocate output buffers, upload constants, and so on), start the GPU kernel, and return before results are ready. You can check whether all operations are complete via :ocv:func:`gpu::Stream::queryIfComplete`. You can asynchronously upload/download data from/to page-locked buffers, using the :ocv:class:`gpu::CudaMem` or :ocv:class:`Mat` header that points to a region of :ocv:class:`gpu::CudaMem`.
This class encapsulates a queue of asynchronous calls.
..note:: Currently, you may face problems if an operation is enqueued twice with different data. Some functions use the constant GPU memory, and next call may update the memory before the previous one has been finished. But calling different operations asynchronously is safe because each operation has its own constant buffer. Memory copy/upload/download/set operations to the buffers you hold are also safe.
@ -272,30 +243,24 @@ This class encapsulates a queue of asynchronous calls. Some functions have overl
{
public:
Stream();
~Stream();
Stream(const Stream&);
Stream& operator=(const Stream&);
//! queries an asynchronous stream for completion status
..note::``cv::Mat`` must point to page locked memory (i.e. to ``CudaMem`` data or to its subMat) or must be registered with :ocv:func:`gpu::registerPageLocked` .
..note::``cv::Mat`` must point to page locked memory (i.e. to ``CudaMem`` data or to its subMat) or must be registered with :ocv:func:`gpu::registerPageLocked` .
@ -107,23 +107,186 @@ Class providing functionality for querying the specified GPU properties. ::
class CV_EXPORTS DeviceInfo
{
public:
//! creates DeviceInfo object for the current GPU
DeviceInfo();
//! creates DeviceInfo object for the given GPU
DeviceInfo(int device_id);
String name() const;
//! ASCII string identifying device
const char* name() const;
//! global memory available on device in bytes
size_t totalGlobalMem() const;
//! shared memory available per block in bytes
size_t sharedMemPerBlock() const;
//! 32-bit registers available per block
int regsPerBlock() const;
//! warp size in threads
int warpSize() const;
//! maximum pitch in bytes allowed by memory copies
size_t memPitch() const;
//! maximum number of threads per block
int maxThreadsPerBlock() const;
//! maximum size of each dimension of a block
Vec3i maxThreadsDim() const;
int majorVersion() const;
int minorVersion() const;
//! maximum size of each dimension of a grid
Vec3i maxGridSize() const;
//! clock frequency in kilohertz
int clockRate() const;
//! constant memory available on device in bytes
size_t totalConstMem() const;
//! major compute capability
int major() const;
//! minor compute capability
int minor() const;
//! alignment requirement for textures
size_t textureAlignment() const;
//! pitch alignment requirement for texture references bound to pitched memory
size_t texturePitchAlignment() const;
//! number of multiprocessors on device
int multiProcessorCount() const;
//! specified whether there is a run time limit on kernels
bool kernelExecTimeoutEnabled() const;
//! device is integrated as opposed to discrete
bool integrated() const;
//! device can map host memory with cudaHostAlloc/cudaHostGetDevicePointer
bool canMapHostMemory() const;
enum ComputeMode
{
ComputeModeDefault, /**< default compute mode (Multiple threads can use ::cudaSetDevice() with this device) */
ComputeModeExclusive, /**< compute-exclusive-thread mode (Only one thread in one process will be able to use ::cudaSetDevice() with this device) */
ComputeModeProhibited, /**< compute-prohibited mode (No threads can use ::cudaSetDevice() with this device) */
ComputeModeExclusiveProcess /**< compute-exclusive-process mode (Many threads in one process will be able to use ::cudaSetDevice() with this device) */
};
//! compute mode
ComputeMode computeMode() const;
//! maximum 1D texture size
int maxTexture1D() const;
//! maximum 1D mipmapped texture size
int maxTexture1DMipmap() const;
//! maximum size for 1D textures bound to linear memory
int maxTexture1DLinear() const;
//! maximum 2D texture dimensions
Vec2i maxTexture2D() const;
//! maximum 2D mipmapped texture dimensions
Vec2i maxTexture2DMipmap() const;
//! maximum dimensions (width, height, pitch) for 2D textures bound to pitched memory
Vec3i maxTexture2DLinear() const;
//! maximum 2D texture dimensions if texture gather operations have to be performed
Vec2i maxTexture2DGather() const;
//! maximum 3D texture dimensions
Vec3i maxTexture3D() const;
//! maximum Cubemap texture dimensions
int maxTextureCubemap() const;
//! maximum 1D layered texture dimensions
Vec2i maxTexture1DLayered() const;
//! maximum 2D layered texture dimensions
Vec3i maxTexture2DLayered() const;
//! maximum Cubemap layered texture dimensions
Vec2i maxTextureCubemapLayered() const;
//! maximum 1D surface size
int maxSurface1D() const;
//! maximum 2D surface dimensions
Vec2i maxSurface2D() const;
//! maximum 3D surface dimensions
Vec3i maxSurface3D() const;
//! maximum 1D layered surface dimensions
Vec2i maxSurface1DLayered() const;
//! maximum 2D layered surface dimensions
Vec3i maxSurface2DLayered() const;
//! maximum Cubemap surface dimensions
int maxSurfaceCubemap() const;
//! maximum Cubemap layered surface dimensions
Vec2i maxSurfaceCubemapLayered() const;
//! alignment requirements for surfaces
size_t surfaceAlignment() const;
//! device can possibly execute multiple kernels concurrently
bool concurrentKernels() const;
//! device has ECC support enabled
bool ECCEnabled() const;
//! PCI bus ID of the device
int pciBusID() const;
//! PCI device ID of the device
int pciDeviceID() const;
//! PCI domain ID of the device
int pciDomainID() const;
//! true if device is a Tesla device using TCC driver, false otherwise
bool tccDriver() const;
//! number of asynchronous engines
int asyncEngineCount() const;
//! device shares a unified address space with the host