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@ -1276,10 +1276,10 @@ struct cvtScaleAbs_SIMD<uchar, uchar, float> |
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float32x4_t v_dst_3 = vmulq_n_f32(vcvtq_f32_u32(v_quat), scale); |
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v_dst_3 = vabsq_f32(vaddq_f32(v_dst_3, v_shift)); |
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uint16x8_t v_dsti_0 = vcombine_u16(vqmovn_u32(vcvtq_u32_f32(v_dst_0)), |
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vqmovn_u32(vcvtq_u32_f32(v_dst_1))); |
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uint16x8_t v_dsti_1 = vcombine_u16(vqmovn_u32(vcvtq_u32_f32(v_dst_2)), |
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vqmovn_u32(vcvtq_u32_f32(v_dst_3))); |
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uint16x8_t v_dsti_0 = vcombine_u16(vqmovn_u32(cv_vrndq_u32_f32(v_dst_0)), |
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vqmovn_u32(cv_vrndq_u32_f32(v_dst_1))); |
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uint16x8_t v_dsti_1 = vcombine_u16(vqmovn_u32(cv_vrndq_u32_f32(v_dst_2)), |
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vqmovn_u32(cv_vrndq_u32_f32(v_dst_3))); |
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vst1q_u8(dst + x, vcombine_u8(vqmovn_u16(v_dsti_0), vqmovn_u16(v_dsti_1))); |
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} |
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@ -1320,10 +1320,10 @@ struct cvtScaleAbs_SIMD<schar, uchar, float> |
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float32x4_t v_dst_3 = vmulq_n_f32(vcvtq_f32_s32(v_quat), scale); |
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v_dst_3 = vabsq_f32(vaddq_f32(v_dst_3, v_shift)); |
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uint16x8_t v_dsti_0 = vcombine_u16(vqmovn_u32(vcvtq_u32_f32(v_dst_0)), |
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vqmovn_u32(vcvtq_u32_f32(v_dst_1))); |
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uint16x8_t v_dsti_1 = vcombine_u16(vqmovn_u32(vcvtq_u32_f32(v_dst_2)), |
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vqmovn_u32(vcvtq_u32_f32(v_dst_3))); |
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uint16x8_t v_dsti_0 = vcombine_u16(vqmovn_u32(cv_vrndq_u32_f32(v_dst_0)), |
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vqmovn_u32(cv_vrndq_u32_f32(v_dst_1))); |
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uint16x8_t v_dsti_1 = vcombine_u16(vqmovn_u32(cv_vrndq_u32_f32(v_dst_2)), |
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vqmovn_u32(cv_vrndq_u32_f32(v_dst_3))); |
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vst1q_u8(dst + x, vcombine_u8(vqmovn_u16(v_dsti_0), vqmovn_u16(v_dsti_1))); |
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} |
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@ -1353,8 +1353,8 @@ struct cvtScaleAbs_SIMD<ushort, uchar, float> |
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float32x4_t v_dst_1 = vmulq_n_f32(vcvtq_f32_u32(v_half), scale); |
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v_dst_1 = vabsq_f32(vaddq_f32(v_dst_1, v_shift)); |
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uint16x8_t v_dst = vcombine_u16(vqmovn_u32(vcvtq_u32_f32(v_dst_0)), |
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vqmovn_u32(vcvtq_u32_f32(v_dst_1))); |
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uint16x8_t v_dst = vcombine_u16(vqmovn_u32(cv_vrndq_u32_f32(v_dst_0)), |
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vqmovn_u32(cv_vrndq_u32_f32(v_dst_1))); |
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vst1_u8(dst + x, vqmovn_u16(v_dst)); |
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} |
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@ -1384,8 +1384,8 @@ struct cvtScaleAbs_SIMD<short, uchar, float> |
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float32x4_t v_dst_1 = vmulq_n_f32(vcvtq_f32_s32(v_half), scale); |
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v_dst_1 = vabsq_f32(vaddq_f32(v_dst_1, v_shift)); |
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uint16x8_t v_dst = vcombine_u16(vqmovn_u32(vcvtq_u32_f32(v_dst_0)), |
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vqmovn_u32(vcvtq_u32_f32(v_dst_1))); |
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uint16x8_t v_dst = vcombine_u16(vqmovn_u32(cv_vrndq_u32_f32(v_dst_0)), |
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vqmovn_u32(cv_vrndq_u32_f32(v_dst_1))); |
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vst1_u8(dst + x, vqmovn_u16(v_dst)); |
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} |
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@ -1407,11 +1407,11 @@ struct cvtScaleAbs_SIMD<int, uchar, float> |
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{ |
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float32x4_t v_dst_0 = vmulq_n_f32(vcvtq_f32_s32(vld1q_s32(src + x)), scale); |
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v_dst_0 = vabsq_f32(vaddq_f32(v_dst_0, v_shift)); |
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uint16x4_t v_dsti_0 = vqmovn_u32(vcvtq_u32_f32(v_dst_0)); |
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uint16x4_t v_dsti_0 = vqmovn_u32(cv_vrndq_u32_f32(v_dst_0)); |
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float32x4_t v_dst_1 = vmulq_n_f32(vcvtq_f32_s32(vld1q_s32(src + x + 4)), scale); |
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v_dst_1 = vabsq_f32(vaddq_f32(v_dst_1, v_shift)); |
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uint16x4_t v_dsti_1 = vqmovn_u32(vcvtq_u32_f32(v_dst_1)); |
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uint16x4_t v_dsti_1 = vqmovn_u32(cv_vrndq_u32_f32(v_dst_1)); |
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uint16x8_t v_dst = vcombine_u16(v_dsti_0, v_dsti_1); |
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vst1_u8(dst + x, vqmovn_u16(v_dst)); |
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@ -1434,11 +1434,11 @@ struct cvtScaleAbs_SIMD<float, uchar, float> |
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{ |
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float32x4_t v_dst_0 = vmulq_n_f32(vld1q_f32(src + x), scale); |
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v_dst_0 = vabsq_f32(vaddq_f32(v_dst_0, v_shift)); |
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uint16x4_t v_dsti_0 = vqmovn_u32(vcvtq_u32_f32(v_dst_0)); |
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uint16x4_t v_dsti_0 = vqmovn_u32(cv_vrndq_u32_f32(v_dst_0)); |
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float32x4_t v_dst_1 = vmulq_n_f32(vld1q_f32(src + x + 4), scale); |
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v_dst_1 = vabsq_f32(vaddq_f32(v_dst_1, v_shift)); |
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uint16x4_t v_dsti_1 = vqmovn_u32(vcvtq_u32_f32(v_dst_1)); |
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uint16x4_t v_dsti_1 = vqmovn_u32(cv_vrndq_u32_f32(v_dst_1)); |
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uint16x8_t v_dst = vcombine_u16(v_dsti_0, v_dsti_1); |
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vst1_u8(dst + x, vqmovn_u16(v_dst)); |
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@ -1491,6 +1491,7 @@ cvtScale_( const T* src, size_t sstep, |
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for( ; size.height--; src += sstep, dst += dstep ) |
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{ |
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int x = 0; |
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#if CV_ENABLE_UNROLLED |
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for( ; x <= size.width - 4; x += 4 ) |
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{ |
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@ -1604,16 +1605,493 @@ cvtScale_<short, int, float>( const short* src, size_t sstep, |
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} |
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} |
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template <typename T, typename DT> |
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struct Cvt_SIMD |
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{ |
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int operator() (const T *, DT *, int) const |
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{ |
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return 0; |
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} |
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}; |
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#if CV_NEON |
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// from uchar
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template <> |
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struct Cvt_SIMD<uchar, schar> |
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{ |
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int operator() (const uchar * src, schar * dst, int width) const |
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{ |
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int x = 0; |
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for ( ; x <= width - 8; x += 8) |
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vst1_s8(dst + x, vqmovn_s16(vreinterpretq_s16_u16(vmovl_u8(vld1_u8(src + x))))); |
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return x; |
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} |
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}; |
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template <> |
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struct Cvt_SIMD<uchar, ushort> |
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{ |
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int operator() (const uchar * src, ushort * dst, int width) const |
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{ |
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int x = 0; |
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for ( ; x <= width - 8; x += 8) |
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vst1q_u16(dst + x, vmovl_u8(vld1_u8(src + x))); |
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return x; |
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} |
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}; |
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template <> |
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struct Cvt_SIMD<uchar, short> |
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{ |
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int operator() (const uchar * src, short * dst, int width) const |
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{ |
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int x = 0; |
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for ( ; x <= width - 8; x += 8) |
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vst1q_s16(dst + x, vreinterpretq_s16_u16(vmovl_u8(vld1_u8(src + x)))); |
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return x; |
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} |
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}; |
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template <> |
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struct Cvt_SIMD<uchar, int> |
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{ |
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int operator() (const uchar * src, int * dst, int width) const |
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{ |
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int x = 0; |
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for ( ; x <= width - 8; x += 8) |
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{ |
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uint16x8_t v_src = vmovl_u8(vld1_u8(src + x)); |
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vst1q_s32(dst + x, vreinterpretq_s32_u32(vmovl_u16(vget_low_u16(v_src)))); |
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vst1q_s32(dst + x + 4, vreinterpretq_s32_u32(vmovl_u16(vget_high_u16(v_src)))); |
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} |
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return x; |
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} |
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}; |
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template <> |
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struct Cvt_SIMD<uchar, float> |
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{ |
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int operator() (const uchar * src, float * dst, int width) const |
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{ |
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int x = 0; |
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for ( ; x <= width - 8; x += 8) |
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{ |
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uint16x8_t v_src = vmovl_u8(vld1_u8(src + x)); |
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vst1q_f32(dst + x, vcvtq_f32_u32(vmovl_u16(vget_low_u16(v_src)))); |
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vst1q_f32(dst + x + 4, vcvtq_f32_u32(vmovl_u16(vget_high_u16(v_src)))); |
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} |
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return x; |
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} |
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}; |
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// from schar
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template <> |
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struct Cvt_SIMD<schar, uchar> |
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{ |
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int operator() (const schar * src, uchar * dst, int width) const |
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{ |
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int x = 0; |
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for ( ; x <= width - 8; x += 8) |
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vst1_u8(dst + x, vqmovun_s16(vmovl_s8(vld1_s8(src + x)))); |
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return x; |
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} |
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}; |
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template <> |
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struct Cvt_SIMD<schar, short> |
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{ |
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int operator() (const schar * src, short * dst, int width) const |
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{ |
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int x = 0; |
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for ( ; x <= width - 8; x += 8) |
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vst1q_s16(dst + x, vmovl_s8(vld1_s8(src + x))); |
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return x; |
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} |
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}; |
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template <> |
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struct Cvt_SIMD<schar, int> |
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{ |
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int operator() (const schar * src, int * dst, int width) const |
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{ |
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int x = 0; |
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for ( ; x <= width - 8; x += 8) |
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{ |
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int16x8_t v_src = vmovl_s8(vld1_s8(src + x)); |
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vst1q_s32(dst + x, vmovl_s16(vget_low_s16(v_src))); |
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vst1q_s32(dst + x + 4, vmovl_s16(vget_high_s16(v_src))); |
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} |
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return x; |
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} |
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}; |
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template <> |
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struct Cvt_SIMD<schar, float> |
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{ |
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int operator() (const schar * src, float * dst, int width) const |
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{ |
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int x = 0; |
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for ( ; x <= width - 8; x += 8) |
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{ |
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int16x8_t v_src = vmovl_s8(vld1_s8(src + x)); |
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vst1q_f32(dst + x, vcvtq_f32_s32(vmovl_s16(vget_low_s16(v_src)))); |
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vst1q_f32(dst + x + 4, vcvtq_f32_s32(vmovl_s16(vget_high_s16(v_src)))); |
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} |
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return x; |
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} |
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}; |
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// from ushort
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template <> |
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struct Cvt_SIMD<ushort, uchar> |
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{ |
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int operator() (const ushort * src, uchar * dst, int width) const |
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{ |
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int x = 0; |
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for ( ; x <= width - 16; x += 16) |
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{ |
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uint16x8_t v_src1 = vld1q_u16(src + x), v_src2 = vld1q_u16(src + x + 8); |
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vst1q_u8(dst + x, vcombine_u8(vqmovn_u16(v_src1), vqmovn_u16(v_src2))); |
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} |
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return x; |
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} |
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}; |
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template <> |
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struct Cvt_SIMD<ushort, int> |
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{ |
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int operator() (const ushort * src, int * dst, int width) const |
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{ |
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int x = 0; |
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for ( ; x <= width - 8; x += 8) |
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{ |
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uint16x8_t v_src = vld1q_u16(src + x); |
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vst1q_s32(dst + x, vreinterpretq_s32_u32(vmovl_u16(vget_low_u16(v_src)))); |
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vst1q_s32(dst + x + 4, vreinterpretq_s32_u32(vmovl_u16(vget_high_u16(v_src)))); |
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} |
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return x; |
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} |
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}; |
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template <> |
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struct Cvt_SIMD<ushort, float> |
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{ |
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int operator() (const ushort * src, float * dst, int width) const |
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{ |
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int x = 0; |
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|
for ( ; x <= width - 8; x += 8) |
|
|
|
|
{ |
|
|
|
|
uint16x8_t v_src = vld1q_u16(src + x); |
|
|
|
|
vst1q_f32(dst + x, vcvtq_f32_u32(vmovl_u16(vget_low_u16(v_src)))); |
|
|
|
|
vst1q_f32(dst + x + 4, vcvtq_f32_u32(vmovl_u16(vget_high_u16(v_src)))); |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
return x; |
|
|
|
|
} |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
// from short
|
|
|
|
|
|
|
|
|
|
template <> |
|
|
|
|
struct Cvt_SIMD<short, uchar> |
|
|
|
|
{ |
|
|
|
|
int operator() (const short * src, uchar * dst, int width) const |
|
|
|
|
{ |
|
|
|
|
int x = 0; |
|
|
|
|
|
|
|
|
|
for ( ; x <= width - 16; x += 16) |
|
|
|
|
{ |
|
|
|
|
int16x8_t v_src1 = vld1q_s16(src + x), v_src2 = vld1q_s16(src + x + 8); |
|
|
|
|
vst1q_u8(dst + x, vcombine_u8(vqmovun_s16(v_src1), vqmovun_s16(v_src2))); |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
return x; |
|
|
|
|
} |
|
|
|
|
}; |
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|
|
|
template <> |
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|
|
|
struct Cvt_SIMD<short, schar> |
|
|
|
|
{ |
|
|
|
|
int operator() (const short * src, schar * dst, int width) const |
|
|
|
|
{ |
|
|
|
|
int x = 0; |
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|
|
|
|
|
|
|
|
for ( ; x <= width - 16; x += 16) |
|
|
|
|
{ |
|
|
|
|
int16x8_t v_src1 = vld1q_s16(src + x), v_src2 = vld1q_s16(src + x + 8); |
|
|
|
|
vst1q_s8(dst + x, vcombine_s8(vqmovn_s16(v_src1), vqmovn_s16(v_src2))); |
|
|
|
|
} |
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|
|
|
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|
|
|
|
return x; |
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|
|
|
} |
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|
|
|
}; |
|
|
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|
|
|
|
|
|
template <> |
|
|
|
|
struct Cvt_SIMD<short, ushort> |
|
|
|
|
{ |
|
|
|
|
int operator() (const short * src, ushort * dst, int width) const |
|
|
|
|
{ |
|
|
|
|
int x = 0; |
|
|
|
|
|
|
|
|
|
for ( ; x <= width - 8; x += 8) |
|
|
|
|
{ |
|
|
|
|
int16x8_t v_src = vld1q_s16(src + x); |
|
|
|
|
uint16x4_t v_dst1 = vqmovun_s32(vmovl_s16(vget_low_s16(v_src))); |
|
|
|
|
uint16x4_t v_dst2 = vqmovun_s32(vmovl_s16(vget_high_s16(v_src))); |
|
|
|
|
vst1q_u16(dst + x, vcombine_u16(v_dst1, v_dst2)); |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
return x; |
|
|
|
|
} |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
template <> |
|
|
|
|
struct Cvt_SIMD<short, int> |
|
|
|
|
{ |
|
|
|
|
int operator() (const short * src, int * dst, int width) const |
|
|
|
|
{ |
|
|
|
|
int x = 0; |
|
|
|
|
|
|
|
|
|
for ( ; x <= width - 8; x += 8) |
|
|
|
|
{ |
|
|
|
|
int16x8_t v_src = vld1q_s16(src + x); |
|
|
|
|
vst1q_s32(dst + x, vmovl_s16(vget_low_s16(v_src))); |
|
|
|
|
vst1q_s32(dst + x + 4, vmovl_s16(vget_high_s16(v_src))); |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
return x; |
|
|
|
|
} |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
template <> |
|
|
|
|
struct Cvt_SIMD<short, float> |
|
|
|
|
{ |
|
|
|
|
int operator() (const short * src, float * dst, int width) const |
|
|
|
|
{ |
|
|
|
|
int x = 0; |
|
|
|
|
|
|
|
|
|
for ( ; x <= width - 8; x += 8) |
|
|
|
|
{ |
|
|
|
|
int16x8_t v_src = vld1q_s16(src + x); |
|
|
|
|
vst1q_f32(dst + x, vcvtq_f32_s32(vmovl_s16(vget_low_s16(v_src)))); |
|
|
|
|
vst1q_f32(dst + x + 4, vcvtq_f32_s32(vmovl_s16(vget_high_s16(v_src)))); |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
return x; |
|
|
|
|
} |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
// from int
|
|
|
|
|
|
|
|
|
|
template <> |
|
|
|
|
struct Cvt_SIMD<int, uchar> |
|
|
|
|
{ |
|
|
|
|
int operator() (const int * src, uchar * dst, int width) const |
|
|
|
|
{ |
|
|
|
|
int x = 0; |
|
|
|
|
|
|
|
|
|
for ( ; x <= width - 16; x += 16) |
|
|
|
|
{ |
|
|
|
|
int32x4_t v_src1 = vld1q_s32(src + x), v_src2 = vld1q_s32(src + x + 4); |
|
|
|
|
int32x4_t v_src3 = vld1q_s32(src + x + 8), v_src4 = vld1q_s32(src + x + 12); |
|
|
|
|
uint8x8_t v_dst1 = vqmovn_u16(vcombine_u16(vqmovun_s32(v_src1), vqmovun_s32(v_src2))); |
|
|
|
|
uint8x8_t v_dst2 = vqmovn_u16(vcombine_u16(vqmovun_s32(v_src3), vqmovun_s32(v_src4))); |
|
|
|
|
vst1q_u8(dst + x, vcombine_u8(v_dst1, v_dst2)); |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
return x; |
|
|
|
|
} |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
template <> |
|
|
|
|
struct Cvt_SIMD<int, schar> |
|
|
|
|
{ |
|
|
|
|
int operator() (const int * src, schar * dst, int width) const |
|
|
|
|
{ |
|
|
|
|
int x = 0; |
|
|
|
|
|
|
|
|
|
for ( ; x <= width - 16; x += 16) |
|
|
|
|
{ |
|
|
|
|
int32x4_t v_src1 = vld1q_s32(src + x), v_src2 = vld1q_s32(src + x + 4); |
|
|
|
|
int32x4_t v_src3 = vld1q_s32(src + x + 8), v_src4 = vld1q_s32(src + x + 12); |
|
|
|
|
int8x8_t v_dst1 = vqmovn_s16(vcombine_s16(vqmovn_s32(v_src1), vqmovn_s32(v_src2))); |
|
|
|
|
int8x8_t v_dst2 = vqmovn_s16(vcombine_s16(vqmovn_s32(v_src3), vqmovn_s32(v_src4))); |
|
|
|
|
vst1q_s8(dst + x, vcombine_s8(v_dst1, v_dst2)); |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
return x; |
|
|
|
|
} |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
template <> |
|
|
|
|
struct Cvt_SIMD<int, ushort> |
|
|
|
|
{ |
|
|
|
|
int operator() (const int * src, ushort * dst, int width) const |
|
|
|
|
{ |
|
|
|
|
int x = 0; |
|
|
|
|
|
|
|
|
|
for ( ; x <= width - 8; x += 8) |
|
|
|
|
{ |
|
|
|
|
int32x4_t v_src1 = vld1q_s32(src + x), v_src2 = vld1q_s32(src + x + 4); |
|
|
|
|
vst1q_u16(dst + x, vcombine_u16(vqmovun_s32(v_src1), vqmovun_s32(v_src2))); |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
return x; |
|
|
|
|
} |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
template <> |
|
|
|
|
struct Cvt_SIMD<int, short> |
|
|
|
|
{ |
|
|
|
|
int operator() (const int * src, short * dst, int width) const |
|
|
|
|
{ |
|
|
|
|
int x = 0; |
|
|
|
|
|
|
|
|
|
for ( ; x <= width - 8; x += 8) |
|
|
|
|
{ |
|
|
|
|
int32x4_t v_src1 = vld1q_s32(src + x), v_src2 = vld1q_s32(src + x + 4); |
|
|
|
|
vst1q_s16(dst + x, vcombine_s16(vqmovn_s32(v_src1), vqmovn_s32(v_src2))); |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
return x; |
|
|
|
|
} |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
template <> |
|
|
|
|
struct Cvt_SIMD<int, float> |
|
|
|
|
{ |
|
|
|
|
int operator() (const int * src, float * dst, int width) const |
|
|
|
|
{ |
|
|
|
|
int x = 0; |
|
|
|
|
|
|
|
|
|
for ( ; x <= width - 4; x += 4) |
|
|
|
|
vst1q_f32(dst + x, vcvtq_f32_s32(vld1q_s32(src + x))); |
|
|
|
|
|
|
|
|
|
return x; |
|
|
|
|
} |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
// from float
|
|
|
|
|
|
|
|
|
|
template <> |
|
|
|
|
struct Cvt_SIMD<float, uchar> |
|
|
|
|
{ |
|
|
|
|
int operator() (const float * src, uchar * dst, int width) const |
|
|
|
|
{ |
|
|
|
|
int x = 0; |
|
|
|
|
|
|
|
|
|
for ( ; x <= width - 16; x += 16) |
|
|
|
|
{ |
|
|
|
|
uint32x4_t v_src1 = cv_vrndq_u32_f32(vld1q_f32(src + x)); |
|
|
|
|
uint32x4_t v_src2 = cv_vrndq_u32_f32(vld1q_f32(src + x + 4)); |
|
|
|
|
uint32x4_t v_src3 = cv_vrndq_u32_f32(vld1q_f32(src + x + 8)); |
|
|
|
|
uint32x4_t v_src4 = cv_vrndq_u32_f32(vld1q_f32(src + x + 12)); |
|
|
|
|
uint8x8_t v_dst1 = vqmovn_u16(vcombine_u16(vqmovn_u32(v_src1), vqmovn_u32(v_src2))); |
|
|
|
|
uint8x8_t v_dst2 = vqmovn_u16(vcombine_u16(vqmovn_u32(v_src3), vqmovn_u32(v_src4))); |
|
|
|
|
vst1q_u8(dst + x, vcombine_u8(v_dst1, v_dst2)); |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
return x; |
|
|
|
|
} |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
template <> |
|
|
|
|
struct Cvt_SIMD<float, schar> |
|
|
|
|
{ |
|
|
|
|
int operator() (const float * src, schar * dst, int width) const |
|
|
|
|
{ |
|
|
|
|
int x = 0; |
|
|
|
|
|
|
|
|
|
for ( ; x <= width - 16; x += 16) |
|
|
|
|
{ |
|
|
|
|
int32x4_t v_src1 = cv_vrndq_s32_f32(vld1q_f32(src + x)); |
|
|
|
|
int32x4_t v_src2 = cv_vrndq_s32_f32(vld1q_f32(src + x + 4)); |
|
|
|
|
int32x4_t v_src3 = cv_vrndq_s32_f32(vld1q_f32(src + x + 8)); |
|
|
|
|
int32x4_t v_src4 = cv_vrndq_s32_f32(vld1q_f32(src + x + 12)); |
|
|
|
|
int8x8_t v_dst1 = vqmovn_s16(vcombine_s16(vqmovn_s32(v_src1), vqmovn_s32(v_src2))); |
|
|
|
|
int8x8_t v_dst2 = vqmovn_s16(vcombine_s16(vqmovn_s32(v_src3), vqmovn_s32(v_src4))); |
|
|
|
|
vst1q_s8(dst + x, vcombine_s8(v_dst1, v_dst2)); |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
return x; |
|
|
|
|
} |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
template <> |
|
|
|
|
struct Cvt_SIMD<float, ushort> |
|
|
|
|
{ |
|
|
|
|
int operator() (const float * src, ushort * dst, int width) const |
|
|
|
|
{ |
|
|
|
|
int x = 0; |
|
|
|
|
|
|
|
|
|
for ( ; x <= width - 8; x += 8) |
|
|
|
|
{ |
|
|
|
|
uint32x4_t v_src1 = cv_vrndq_u32_f32(vld1q_f32(src + x)); |
|
|
|
|
uint32x4_t v_src2 = cv_vrndq_u32_f32(vld1q_f32(src + x + 4)); |
|
|
|
|
vst1q_u16(dst + x, vcombine_u16(vqmovn_u32(v_src1), vqmovn_u32(v_src2))); |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
return x; |
|
|
|
|
} |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
template <> |
|
|
|
|
struct Cvt_SIMD<float, int> |
|
|
|
|
{ |
|
|
|
|
int operator() (const float * src, int * dst, int width) const |
|
|
|
|
{ |
|
|
|
|
int x = 0; |
|
|
|
|
|
|
|
|
|
for ( ; x <= width - 4; x += 4) |
|
|
|
|
vst1q_s32(dst + x, cv_vrndq_s32_f32(vld1q_f32(src + x))); |
|
|
|
|
|
|
|
|
|
return x; |
|
|
|
|
} |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
#endif |
|
|
|
|
|
|
|
|
|
template<typename T, typename DT> static void |
|
|
|
|
cvt_( const T* src, size_t sstep, |
|
|
|
|
DT* dst, size_t dstep, Size size ) |
|
|
|
|
{ |
|
|
|
|
sstep /= sizeof(src[0]); |
|
|
|
|
dstep /= sizeof(dst[0]); |
|
|
|
|
Cvt_SIMD<T, DT> vop; |
|
|
|
|
|
|
|
|
|
for( ; size.height--; src += sstep, dst += dstep ) |
|
|
|
|
{ |
|
|
|
|
int x = 0; |
|
|
|
|
int x = vop(src, dst, size.width); |
|
|
|
|
#if CV_ENABLE_UNROLLED |
|
|
|
|
for( ; x <= size.width - 4; x += 4 ) |
|
|
|
|
{ |
|
|
|
|