@ -458,9 +458,12 @@ static void add8u( const uchar* src1, size_t step1,
const uchar * src2 , size_t step2 ,
uchar * dst , size_t step , Size sz , void * )
{
IF_IPP ( fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
ippiAdd_8u_C1RSfs ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) sz , 0 ) ,
( vBinOp < uchar , OpAdd < uchar > , IF_SIMD ( VAdd < uchar > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ) ;
# if (ARITHM_USE_IPP == 1)
fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
if ( 0 < = ippicviAdd_8u_C1RSfs ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) sz , 0 ) )
return ;
# endif
( vBinOp < uchar , OpAdd < uchar > , IF_SIMD ( VAdd < uchar > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ;
}
static void add8s ( const schar * src1 , size_t step1 ,
@ -474,18 +477,24 @@ static void add16u( const ushort* src1, size_t step1,
const ushort * src2 , size_t step2 ,
ushort * dst , size_t step , Size sz , void * )
{
IF_IPP ( fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
ippiAdd_16u_C1RSfs ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) sz , 0 ) ,
( vBinOp < ushort , OpAdd < ushort > , IF_SIMD ( VAdd < ushort > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ) ;
# if (ARITHM_USE_IPP == 1)
fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
if ( 0 < = ippicviAdd_16u_C1RSfs ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) sz , 0 ) )
return ;
# endif
( vBinOp < ushort , OpAdd < ushort > , IF_SIMD ( VAdd < ushort > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ;
}
static void add16s ( const short * src1 , size_t step1 ,
const short * src2 , size_t step2 ,
short * dst , size_t step , Size sz , void * )
{
IF_IPP ( fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
ippiAdd_16s_C1RSfs ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) sz , 0 ) ,
( vBinOp < short , OpAdd < short > , IF_SIMD ( VAdd < short > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ) ;
# if (ARITHM_USE_IPP == 1)
fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
if ( 0 < = ippicviAdd_16s_C1RSfs ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) sz , 0 ) )
return ;
# endif
( vBinOp < short , OpAdd < short > , IF_SIMD ( VAdd < short > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ;
}
static void add32s ( const int * src1 , size_t step1 ,
@ -499,9 +508,12 @@ static void add32f( const float* src1, size_t step1,
const float * src2 , size_t step2 ,
float * dst , size_t step , Size sz , void * )
{
IF_IPP ( fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
ippiAdd_32f_C1R ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) sz ) ,
( vBinOp32 < float , OpAdd < float > , IF_SIMD ( VAdd < float > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ) ;
# if (ARITHM_USE_IPP == 1)
fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
if ( 0 < = ippicviAdd_32f_C1R ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) sz ) )
return ;
# endif
( vBinOp32 < float , OpAdd < float > , IF_SIMD ( VAdd < float > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ;
}
static void add64f ( const double * src1 , size_t step1 ,
@ -515,9 +527,12 @@ static void sub8u( const uchar* src1, size_t step1,
const uchar * src2 , size_t step2 ,
uchar * dst , size_t step , Size sz , void * )
{
IF_IPP ( fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
ippiSub_8u_C1RSfs ( src2 , ( int ) step2 , src1 , ( int ) step1 , dst , ( int ) step , ( IppiSize & ) sz , 0 ) ,
( vBinOp < uchar , OpSub < uchar > , IF_SIMD ( VSub < uchar > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ) ;
# if (ARITHM_USE_IPP == 1)
fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
if ( 0 < = ippicviSub_8u_C1RSfs ( src2 , ( int ) step2 , src1 , ( int ) step1 , dst , ( int ) step , ( IppiSize & ) sz , 0 ) )
return ;
# endif
( vBinOp < uchar , OpSub < uchar > , IF_SIMD ( VSub < uchar > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ;
}
static void sub8s ( const schar * src1 , size_t step1 ,
@ -531,18 +546,24 @@ static void sub16u( const ushort* src1, size_t step1,
const ushort * src2 , size_t step2 ,
ushort * dst , size_t step , Size sz , void * )
{
IF_IPP ( fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
ippiSub_16u_C1RSfs ( src2 , ( int ) step2 , src1 , ( int ) step1 , dst , ( int ) step , ( IppiSize & ) sz , 0 ) ,
( vBinOp < ushort , OpSub < ushort > , IF_SIMD ( VSub < ushort > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ) ;
# if (ARITHM_USE_IPP == 1)
fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
if ( 0 < = ippicviSub_16u_C1RSfs ( src2 , ( int ) step2 , src1 , ( int ) step1 , dst , ( int ) step , ( IppiSize & ) sz , 0 ) )
return ;
# endif
( vBinOp < ushort , OpSub < ushort > , IF_SIMD ( VSub < ushort > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ;
}
static void sub16s ( const short * src1 , size_t step1 ,
const short * src2 , size_t step2 ,
short * dst , size_t step , Size sz , void * )
{
IF_IPP ( fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
ippiSub_16s_C1RSfs ( src2 , ( int ) step2 , src1 , ( int ) step1 , dst , ( int ) step , ( IppiSize & ) sz , 0 ) ,
( vBinOp < short , OpSub < short > , IF_SIMD ( VSub < short > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ) ;
# if (ARITHM_USE_IPP == 1)
fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
if ( 0 < = ippicviSub_16s_C1RSfs ( src2 , ( int ) step2 , src1 , ( int ) step1 , dst , ( int ) step , ( IppiSize & ) sz , 0 ) )
return ;
# endif
( vBinOp < short , OpSub < short > , IF_SIMD ( VSub < short > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ;
}
static void sub32s ( const int * src1 , size_t step1 ,
@ -556,9 +577,12 @@ static void sub32f( const float* src1, size_t step1,
const float * src2 , size_t step2 ,
float * dst , size_t step , Size sz , void * )
{
IF_IPP ( fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
ippiSub_32f_C1R ( src2 , ( int ) step2 , src1 , ( int ) step1 , dst , ( int ) step , ( IppiSize & ) sz ) ,
( vBinOp32 < float , OpSub < float > , IF_SIMD ( VSub < float > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ) ;
# if (ARITHM_USE_IPP == 1)
fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
if ( 0 < = ippicviSub_32f_C1R ( src2 , ( int ) step2 , src1 , ( int ) step1 , dst , ( int ) step , ( IppiSize & ) sz ) )
return ;
# endif
( vBinOp32 < float , OpSub < float > , IF_SIMD ( VSub < float > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ;
}
static void sub64f ( const double * src1 , size_t step1 ,
@ -576,26 +600,23 @@ static void max8u( const uchar* src1, size_t step1,
uchar * dst , size_t step , Size sz , void * )
{
# if (ARITHM_USE_IPP == 1)
{
uchar * s1 = ( uchar * ) src1 ;
uchar * s2 = ( uchar * ) src2 ;
uchar * d = dst ;
fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
for ( int i = 0 ; i < sz . height ; i + + )
int i = 0 ;
for ( ; i < sz . height ; i + + )
{
ippsMaxEvery_8u ( s1 , s2 , d , sz . width ) ;
s1 + = step1 ;
s2 + = step2 ;
d + = step ;
if ( 0 > ippicvsMaxEvery_8u ( s1 , s2 , d , sz . width ) )
break ;
s1 + = step1 ;
s2 + = step2 ;
d + = step ;
}
}
# else
vBinOp < uchar , OpMax < uchar > , IF_SIMD ( VMax < uchar > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ;
if ( i = = sz . height )
return ;
# endif
// IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
// ippiMaxEvery_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
// (vBinOp8<uchar, OpMax<uchar>, IF_SIMD(_VMax8u)>(src1, step1, src2, step2, dst, step, sz)));
vBinOp < uchar , OpMax < uchar > , IF_SIMD ( VMax < uchar > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ;
}
static void max8s ( const schar * src1 , size_t step1 ,
@ -610,26 +631,23 @@ static void max16u( const ushort* src1, size_t step1,
ushort * dst , size_t step , Size sz , void * )
{
# if (ARITHM_USE_IPP == 1)
{
ushort * s1 = ( ushort * ) src1 ;
ushort * s2 = ( ushort * ) src2 ;
ushort * d = dst ;
fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
for ( int i = 0 ; i < sz . height ; i + + )
int i = 0 ;
for ( ; i < sz . height ; i + + )
{
ippsMaxEvery_16u ( s1 , s2 , d , sz . width ) ;
s1 = ( ushort * ) ( ( uchar * ) s1 + step1 ) ;
s2 = ( ushort * ) ( ( uchar * ) s2 + step2 ) ;
d = ( ushort * ) ( ( uchar * ) d + step ) ;
if ( 0 > ippicvsMaxEvery_16u ( s1 , s2 , d , sz . width ) )
break ;
s1 = ( ushort * ) ( ( uchar * ) s1 + step1 ) ;
s2 = ( ushort * ) ( ( uchar * ) s2 + step2 ) ;
d = ( ushort * ) ( ( uchar * ) d + step ) ;
}
}
# else
vBinOp < ushort , OpMax < ushort > , IF_SIMD ( VMax < ushort > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ;
if ( i = = sz . height )
return ;
# endif
// IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
// ippiMaxEvery_16u_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
// (vBinOp16<ushort, OpMax<ushort>, IF_SIMD(_VMax16u)>(src1, step1, src2, step2, dst, step, sz)));
vBinOp < ushort , OpMax < ushort > , IF_SIMD ( VMax < ushort > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ;
}
static void max16s ( const short * src1 , size_t step1 ,
@ -651,25 +669,23 @@ static void max32f( const float* src1, size_t step1,
float * dst , size_t step , Size sz , void * )
{
# if (ARITHM_USE_IPP == 1)
{
float * s1 = ( float * ) src1 ;
float * s2 = ( float * ) src2 ;
float * d = dst ;
fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
for ( int i = 0 ; i < sz . height ; i + + )
int i = 0 ;
for ( ; i < sz . height ; i + + )
{
ippsMaxEvery_32f ( s1 , s2 , d , sz . width ) ;
s1 = ( float * ) ( ( uchar * ) s1 + step1 ) ;
s2 = ( float * ) ( ( uchar * ) s2 + step2 ) ;
d = ( float * ) ( ( uchar * ) d + step ) ;
if ( 0 > ippicvsMaxEvery_32f ( s1 , s2 , d , sz . width ) )
break ;
s1 = ( float * ) ( ( uchar * ) s1 + step1 ) ;
s2 = ( float * ) ( ( uchar * ) s2 + step2 ) ;
d = ( float * ) ( ( uchar * ) d + step ) ;
}
}
# else
vBinOp32 < float , OpMax < float > , IF_SIMD ( VMax < float > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ;
if ( i = = sz . height )
return ;
# endif
// IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
// ippiMaxEvery_32f_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
// (vBinOp32f<OpMax<float>, IF_SIMD(_VMax32f)>(src1, step1, src2, step2, dst, step, sz)));
vBinOp32 < float , OpMax < float > , IF_SIMD ( VMax < float > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ;
}
static void max64f ( const double * src1 , size_t step1 ,
@ -684,26 +700,23 @@ static void min8u( const uchar* src1, size_t step1,
uchar * dst , size_t step , Size sz , void * )
{
# if (ARITHM_USE_IPP == 1)
{
uchar * s1 = ( uchar * ) src1 ;
uchar * s2 = ( uchar * ) src2 ;
uchar * d = dst ;
fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
for ( int i = 0 ; i < sz . height ; i + + )
int i = 0 ;
for ( ; i < sz . height ; i + + )
{
ippsMinEvery_8u ( s1 , s2 , d , sz . width ) ;
s1 + = step1 ;
s2 + = step2 ;
d + = step ;
if ( 0 > ippicvsMinEvery_8u ( s1 , s2 , d , sz . width ) )
break ;
s1 + = step1 ;
s2 + = step2 ;
d + = step ;
}
}
# else
vBinOp < uchar , OpMin < uchar > , IF_SIMD ( VMin < uchar > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ;
if ( i = = sz . height )
return ;
# endif
// IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
// ippiMinEvery_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
// (vBinOp8<uchar, OpMin<uchar>, IF_SIMD(_VMin8u)>(src1, step1, src2, step2, dst, step, sz)));
vBinOp < uchar , OpMin < uchar > , IF_SIMD ( VMin < uchar > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ;
}
static void min8s ( const schar * src1 , size_t step1 ,
@ -718,26 +731,23 @@ static void min16u( const ushort* src1, size_t step1,
ushort * dst , size_t step , Size sz , void * )
{
# if (ARITHM_USE_IPP == 1)
{
ushort * s1 = ( ushort * ) src1 ;
ushort * s2 = ( ushort * ) src2 ;
ushort * d = dst ;
fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
for ( int i = 0 ; i < sz . height ; i + + )
int i = 0 ;
for ( ; i < sz . height ; i + + )
{
ippsMinEvery_16u ( s1 , s2 , d , sz . width ) ;
s1 = ( ushort * ) ( ( uchar * ) s1 + step1 ) ;
s2 = ( ushort * ) ( ( uchar * ) s2 + step2 ) ;
d = ( ushort * ) ( ( uchar * ) d + step ) ;
if ( 0 > ippicvsMinEvery_16u ( s1 , s2 , d , sz . width ) )
break ;
s1 = ( ushort * ) ( ( uchar * ) s1 + step1 ) ;
s2 = ( ushort * ) ( ( uchar * ) s2 + step2 ) ;
d = ( ushort * ) ( ( uchar * ) d + step ) ;
}
}
# else
vBinOp < ushort , OpMin < ushort > , IF_SIMD ( VMin < ushort > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ;
if ( i = = sz . height )
return ;
# endif
// IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
// ippiMinEvery_16u_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
// (vBinOp16<ushort, OpMin<ushort>, IF_SIMD(_VMin16u)>(src1, step1, src2, step2, dst, step, sz)));
vBinOp < ushort , OpMin < ushort > , IF_SIMD ( VMin < ushort > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ;
}
static void min16s ( const short * src1 , size_t step1 ,
@ -759,25 +769,23 @@ static void min32f( const float* src1, size_t step1,
float * dst , size_t step , Size sz , void * )
{
# if (ARITHM_USE_IPP == 1)
{
float * s1 = ( float * ) src1 ;
float * s2 = ( float * ) src2 ;
float * d = dst ;
fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
for ( int i = 0 ; i < sz . height ; i + + )
int i = 0 ;
for ( ; i < sz . height ; i + + )
{
ippsMinEvery_32f ( s1 , s2 , d , sz . width ) ;
s1 = ( float * ) ( ( uchar * ) s1 + step1 ) ;
s2 = ( float * ) ( ( uchar * ) s2 + step2 ) ;
d = ( float * ) ( ( uchar * ) d + step ) ;
if ( 0 > ippicvsMinEvery_32f ( s1 , s2 , d , sz . width ) )
break ;
s1 = ( float * ) ( ( uchar * ) s1 + step1 ) ;
s2 = ( float * ) ( ( uchar * ) s2 + step2 ) ;
d = ( float * ) ( ( uchar * ) d + step ) ;
}
}
# else
vBinOp32 < float , OpMin < float > , IF_SIMD ( VMin < float > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ;
if ( i = = sz . height )
return ;
# endif
// IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
// ippiMinEvery_32f_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
// (vBinOp32f<OpMin<float>, IF_SIMD(_VMin32f)>(src1, step1, src2, step2, dst, step, sz)));
vBinOp32 < float , OpMin < float > , IF_SIMD ( VMin < float > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ;
}
static void min64f ( const double * src1 , size_t step1 ,
@ -791,9 +799,12 @@ static void absdiff8u( const uchar* src1, size_t step1,
const uchar * src2 , size_t step2 ,
uchar * dst , size_t step , Size sz , void * )
{
IF_IPP ( fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
ippiAbsDiff_8u_C1R ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) sz ) ,
( vBinOp < uchar , OpAbsDiff < uchar > , IF_SIMD ( VAbsDiff < uchar > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ) ;
# if (ARITHM_USE_IPP == 1)
fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
if ( 0 < = ippicviAbsDiff_8u_C1R ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) sz ) )
return ;
# endif
( vBinOp < uchar , OpAbsDiff < uchar > , IF_SIMD ( VAbsDiff < uchar > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ;
}
static void absdiff8s ( const schar * src1 , size_t step1 ,
@ -807,9 +818,12 @@ static void absdiff16u( const ushort* src1, size_t step1,
const ushort * src2 , size_t step2 ,
ushort * dst , size_t step , Size sz , void * )
{
IF_IPP ( fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
ippiAbsDiff_16u_C1R ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) sz ) ,
( vBinOp < ushort , OpAbsDiff < ushort > , IF_SIMD ( VAbsDiff < ushort > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ) ;
# if (ARITHM_USE_IPP == 1)
fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
if ( 0 < = ippicviAbsDiff_16u_C1R ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) sz ) )
return ;
# endif
( vBinOp < ushort , OpAbsDiff < ushort > , IF_SIMD ( VAbsDiff < ushort > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ;
}
static void absdiff16s ( const short * src1 , size_t step1 ,
@ -830,9 +844,12 @@ static void absdiff32f( const float* src1, size_t step1,
const float * src2 , size_t step2 ,
float * dst , size_t step , Size sz , void * )
{
IF_IPP ( fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
ippiAbsDiff_32f_C1R ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) sz ) ,
( vBinOp32 < float , OpAbsDiff < float > , IF_SIMD ( VAbsDiff < float > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ) ;
# if (ARITHM_USE_IPP == 1)
fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
if ( 0 < = ippicviAbsDiff_32f_C1R ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) sz ) )
return ;
# endif
( vBinOp32 < float , OpAbsDiff < float > , IF_SIMD ( VAbsDiff < float > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ;
}
static void absdiff64f ( const double * src1 , size_t step1 ,
@ -847,36 +864,48 @@ static void and8u( const uchar* src1, size_t step1,
const uchar * src2 , size_t step2 ,
uchar * dst , size_t step , Size sz , void * )
{
IF_IPP ( fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
ippiAnd_8u_C1R ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) sz ) ,
( vBinOp < uchar , OpAnd < uchar > , IF_SIMD ( VAnd < uchar > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ) ;
# if (ARITHM_USE_IPP == 1)
fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
if ( 0 < = ippicviAnd_8u_C1R ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) sz ) )
return ;
# endif
( vBinOp < uchar , OpAnd < uchar > , IF_SIMD ( VAnd < uchar > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ;
}
static void or8u ( const uchar * src1 , size_t step1 ,
const uchar * src2 , size_t step2 ,
uchar * dst , size_t step , Size sz , void * )
{
IF_IPP ( fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
ippiOr_8u_C1R ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) sz ) ,
( vBinOp < uchar , OpOr < uchar > , IF_SIMD ( VOr < uchar > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ) ;
# if (ARITHM_USE_IPP == 1)
fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
if ( 0 < = ippicviOr_8u_C1R ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) sz ) )
return ;
# endif
( vBinOp < uchar , OpOr < uchar > , IF_SIMD ( VOr < uchar > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ;
}
static void xor8u ( const uchar * src1 , size_t step1 ,
const uchar * src2 , size_t step2 ,
uchar * dst , size_t step , Size sz , void * )
{
IF_IPP ( fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
ippiXor_8u_C1R ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) sz ) ,
( vBinOp < uchar , OpXor < uchar > , IF_SIMD ( VXor < uchar > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ) ;
# if (ARITHM_USE_IPP == 1)
fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
if ( 0 < = ippicviXor_8u_C1R ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) sz ) )
return ;
# endif
( vBinOp < uchar , OpXor < uchar > , IF_SIMD ( VXor < uchar > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ;
}
static void not8u ( const uchar * src1 , size_t step1 ,
const uchar * src2 , size_t step2 ,
uchar * dst , size_t step , Size sz , void * )
{
IF_IPP ( fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ; ( void * ) src2 ;
ippiNot_8u_C1R ( src1 , ( int ) step1 , dst , ( int ) step , ( IppiSize & ) sz ) ,
( vBinOp < uchar , OpNot < uchar > , IF_SIMD ( VNot < uchar > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ) ;
# if (ARITHM_USE_IPP == 1)
fixSteps ( sz , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ; ( void * ) src2 ;
if ( 0 < = ippicviNot_8u_C1R ( src1 , ( int ) step1 , dst , ( int ) step , ( IppiSize & ) sz ) )
return ;
# endif
( vBinOp < uchar , OpNot < uchar > , IF_SIMD ( VNot < uchar > ) > ( src1 , step1 , src2 , step2 , dst , step , sz ) ) ;
}
/****************************************************************************************\
@ -2357,7 +2386,7 @@ static void cmp8u(const uchar* src1, size_t step1, const uchar* src2, size_t ste
if ( op > = 0 )
{
fixSteps ( size , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
if ( ippiCompare_8u_C1R ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) size , op ) > = 0 )
if ( 0 < = ippicv iCompare_8u_C1R ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) size , op ) )
return ;
}
# endif
@ -2440,7 +2469,7 @@ static void cmp16u(const ushort* src1, size_t step1, const ushort* src2, size_t
if ( op > = 0 )
{
fixSteps ( size , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
if ( ippiCompare_16u_C1R ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) size , op ) > = 0 )
if ( 0 < = ippicv iCompare_16u_C1R ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) size , op ) )
return ;
}
# endif
@ -2455,7 +2484,7 @@ static void cmp16s(const short* src1, size_t step1, const short* src2, size_t st
if ( op > 0 )
{
fixSteps ( size , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
if ( ippiCompare_16s_C1R ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) size , op ) > = 0 )
if ( 0 < = ippicv iCompare_16s_C1R ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) size , op ) )
return ;
}
# endif
@ -2561,7 +2590,7 @@ static void cmp32f(const float* src1, size_t step1, const float* src2, size_t st
if ( op > = 0 )
{
fixSteps ( size , sizeof ( dst [ 0 ] ) , step1 , step2 , step ) ;
if ( ippiCompare_32f_C1R ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) size , op ) > = 0 )
if ( 0 < = ippicv iCompare_32f_C1R ( src1 , ( int ) step1 , src2 , ( int ) step2 , dst , ( int ) step , ( IppiSize & ) size , op ) )
return ;
}
# endif