Jussi Pakkanen
7 years ago
committed by
GitHub
commit
e89b6cdd10
25 changed files with 879 additions and 8 deletions
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# Copyright 2017 The Meson development team |
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# Licensed under the Apache License, Version 2.0 (the "License"); |
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# you may not use this file except in compliance with the License. |
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# You may obtain a copy of the License at |
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# http://www.apache.org/licenses/LICENSE-2.0 |
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# Unless required by applicable law or agreed to in writing, software |
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# distributed under the License is distributed on an "AS IS" BASIS, |
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
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# See the License for the specific language governing permissions and |
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# limitations under the License. |
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from .. import mesonlib, compilers, mlog |
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from . import ExtensionModule |
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class SimdModule(ExtensionModule): |
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def __init__(self): |
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super().__init__() |
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self.snippets.add('check') |
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# FIXME add Altivec and AVX512. |
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self.isets = ('mmx', |
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'sse', |
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'sse2', |
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'sse3', |
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'ssse3', |
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'sse41', |
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'sse42', |
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'avx', |
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'avx2', |
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'neon', |
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) |
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def check(self, interpreter, state, args, kwargs): |
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result = [] |
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if len(args) != 1: |
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raise mesonlib.MesonException('Check requires one argument, a name prefix for checks.') |
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prefix = args[0] |
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if not isinstance(prefix, str): |
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raise mesonlib.MesonException('Argument must be a string.') |
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if 'compiler' not in kwargs: |
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raise mesonlib.MesonException('Must specify compiler keyword') |
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compiler = kwargs['compiler'].compiler |
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if not isinstance(compiler, compilers.compilers.Compiler): |
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raise mesonlib.MesonException('Compiler argument must be a compiler object.') |
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cdata = interpreter.func_configuration_data(None, [], {}) |
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conf = cdata.held_object |
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for iset in self.isets: |
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if iset not in kwargs: |
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continue |
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iset_fname = kwargs[iset] # Migth also be an array or Files. static_library will validate. |
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args = compiler.get_instruction_set_args(iset) |
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if args is None: |
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mlog.log('Compiler supports %s:' % iset, mlog.red('NO')) |
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continue |
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if len(args) > 0: |
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if not compiler.has_multi_arguments(args, state.environment): |
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mlog.log('Compiler supports %s:' % iset, mlog.red('NO')) |
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continue |
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mlog.log('Compiler supports %s:' % iset, mlog.green('YES')) |
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conf.values['HAVE_' + iset.upper()] = ('1', 'Compiler supports %s.' % iset) |
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libname = prefix + '_' + iset |
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lib_kwargs = {'sources': iset_fname, |
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compiler.get_language() + '_args': args} |
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result.append(interpreter.func_static_lib(None, [libname], lib_kwargs)) |
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return [result, cdata] |
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def initialize(): |
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return SimdModule() |
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@ -0,0 +1,8 @@ |
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#include<simdfuncs.h> |
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void increment_fallback(float arr[4]) { |
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int i; |
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for(i=0; i<4; i++) { |
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arr[i]++; |
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} |
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} |
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@ -0,0 +1,43 @@ |
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project('simd', 'c') |
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simd = import('unstable-simd') |
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cc = meson.get_compiler('c') |
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cdata = configuration_data() |
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if not meson.is_cross_build() and host_machine.cpu_family() == 'arm' and cc.get_id() == 'clang' |
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message('Adding -march=armv7 because assuming that this build happens on Raspbian.') |
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message('Its Clang seems to be misconfigured and does not support NEON by default.') |
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add_project_arguments('-march=armv7', language : 'c') |
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endif |
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if cc.get_id() == 'msvc' and cc.version().version_compare('<17') |
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error('MESON_SKIP_TEST VS2010 produces broken binaries on x86.') |
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endif |
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# FIXME add [a, b] = function() |
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rval = simd.check('mysimds', |
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mmx : 'simd_mmx.c', |
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sse : 'simd_sse.c', |
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sse2 : 'simd_sse2.c', |
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sse3 : 'simd_sse3.c', |
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ssse3 : 'simd_ssse3.c', |
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sse41 : 'simd_sse41.c', |
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sse42 : 'simd_sse42.c', |
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avx : 'simd_avx.c', |
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avx2 : 'simd_avx2.c', |
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neon : 'simd_neon.c', |
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compiler : cc) |
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simdlibs = rval[0] |
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cdata.merge_from(rval[1]) |
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configure_file(output : 'simdconfig.h', |
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configuration : cdata) |
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p = executable('simdtest', 'simdchecker.c', 'fallback.c', |
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link_with : simdlibs) |
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test('simdtest', p) |
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@ -0,0 +1,43 @@ |
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#include<simdconfig.h> |
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#include<simdfuncs.h> |
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#include<stdint.h> |
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#ifdef _MSC_VER |
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#include<intrin.h> |
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int avx_available() { |
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return 1; |
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} |
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#else |
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#include<immintrin.h> |
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#include<cpuid.h> |
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#ifdef __APPLE__ |
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/*
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* Apple ships a broken __builtin_cpu_supports and |
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* some machines in the CI farm seem to be too |
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* old to have AVX so just always return 0 here. |
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*/ |
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int avx_available() { return 0; } |
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#else |
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int avx_available() { |
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return __builtin_cpu_supports("avx"); |
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} |
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#endif |
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#endif |
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void increment_avx(float arr[4]) { |
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double darr[4]; |
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darr[0] = arr[0]; |
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darr[1] = arr[1]; |
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darr[2] = arr[2]; |
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darr[3] = arr[3]; |
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__m256d val = _mm256_loadu_pd(darr); |
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__m256d one = _mm256_set1_pd(1.0); |
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__m256d result = _mm256_add_pd(val, one); |
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_mm256_storeu_pd(darr, result); |
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arr[0] = (float)darr[0]; |
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arr[1] = (float)darr[1]; |
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arr[2] = (float)darr[2]; |
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arr[3] = (float)darr[3]; |
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} |
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#include<simdconfig.h> |
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#include<simdfuncs.h> |
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#include<stdint.h> |
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/*
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* FIXME add proper runtime detection for VS. |
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*/ |
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#ifdef _MSC_VER |
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#include<intrin.h> |
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int avx2_available() { |
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return 0; |
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} |
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#else |
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#include<immintrin.h> |
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#include<cpuid.h> |
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#if defined(__APPLE__) |
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int avx2_available() { return 0; } |
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#else |
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int avx2_available() { |
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return __builtin_cpu_supports("avx2"); |
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} |
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#endif |
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#endif |
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void increment_avx2(float arr[4]) { |
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double darr[4]; |
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darr[0] = arr[0]; |
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darr[1] = arr[1]; |
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darr[2] = arr[2]; |
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darr[3] = arr[3]; |
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__m256d val = _mm256_loadu_pd(darr); |
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__m256d one = _mm256_set1_pd(1.0); |
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__m256d result = _mm256_add_pd(val, one); |
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_mm256_storeu_pd(darr, result); |
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one = _mm256_permute4x64_pd(one, 66); /* A no-op, just here to use AVX2. */ |
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arr[0] = (float)darr[0]; |
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arr[1] = (float)darr[1]; |
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arr[2] = (float)darr[2]; |
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arr[3] = (float)darr[3]; |
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} |
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#include<simdconfig.h> |
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#include<simdfuncs.h> |
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#include<stdint.h> |
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#ifdef _MSC_VER |
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#include<intrin.h> |
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int mmx_available() { |
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return 1; |
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} |
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/* Contrary to MSDN documentation, MMX intrinsics
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* just plain don't work. |
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*/ |
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void increment_mmx(float arr[4]) { |
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arr[0]++; |
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arr[1]++; |
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arr[2]++; |
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arr[3]++; |
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} |
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#elif defined(__MINGW32__) |
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int mmx_available() { |
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return 1; |
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} |
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/* MinGW does not seem to ship with MMX or it is broken.
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*/ |
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void increment_mmx(float arr[4]) { |
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arr[0]++; |
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arr[1]++; |
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arr[2]++; |
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arr[3]++; |
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} |
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#else |
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#include<mmintrin.h> |
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#include<cpuid.h> |
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#if defined(__APPLE__) |
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int mmx_available() { return 1; } |
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#else |
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int mmx_available() { |
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return __builtin_cpu_supports("mmx"); |
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} |
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#endif |
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void increment_mmx(float arr[4]) { |
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/* Super ugly but we know that values in arr are always small
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* enough to fit in int16; |
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*/ |
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int i; |
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__m64 packed = _mm_set_pi16(arr[3], arr[2], arr[1], arr[0]); |
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__m64 incr = _mm_set1_pi16(1); |
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__m64 result = _mm_add_pi16(packed, incr); |
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/* Should be
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* int64_t unpacker = _m_to_int64(result); |
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* but it does not exist on 32 bit platforms for some reason. |
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*/ |
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int64_t unpacker = (int64_t)(result); |
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_mm_empty(); |
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for(i=0; i<4; i++) { |
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arr[i] = (float)(unpacker & ((1<<16)-1)); |
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unpacker >>= 16; |
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} |
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} |
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#endif |
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#include<simdconfig.h> |
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#include<simdfuncs.h> |
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#include<arm_neon.h> |
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#include<stdint.h> |
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int neon_available() { |
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return 1; /* Incorrect, but I don't know how to check this properly. */ |
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} |
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void increment_neon(float arr[4]) { |
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float32x2_t a1, a2, one; |
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a1 = vld1_f32(arr); |
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a2 = vld1_f32(&arr[2]); |
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one = vdup_n_f32(1.0); |
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a1 = vadd_f32(a1, one); |
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a2 = vadd_f32(a2, one); |
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vst1_f32(arr, a1); |
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vst1_f32(&arr[2], a2); |
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} |
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#include<simdconfig.h> |
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#include<simdfuncs.h> |
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#ifdef _MSC_VER |
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#include<intrin.h> |
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int sse_available() { |
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return 1; |
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} |
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#else |
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#include<xmmintrin.h> |
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#include<cpuid.h> |
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#include<stdint.h> |
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#if defined(__APPLE__) |
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int sse_available() { return 1; } |
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#else |
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int sse_available() { |
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return __builtin_cpu_supports("sse"); |
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} |
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#endif |
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#endif |
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void increment_sse(float arr[4]) { |
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__m128 val = _mm_load_ps(arr); |
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__m128 one = _mm_set_ps1(1.0); |
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__m128 result = _mm_add_ps(val, one); |
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_mm_storeu_ps(arr, result); |
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} |
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#include<simdconfig.h> |
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#include<simdfuncs.h> |
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#include<emmintrin.h> |
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#ifdef _MSC_VER |
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int sse2_available() { |
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return 1; |
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} |
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#else |
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#include<cpuid.h> |
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#include<stdint.h> |
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#if defined(__APPLE__) |
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int sse2_available() { return 1; } |
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#else |
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int sse2_available() { |
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return __builtin_cpu_supports("sse2"); |
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} |
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#endif |
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#endif |
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void increment_sse2(float arr[4]) { |
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double darr[4]; |
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__m128d val1 = _mm_set_pd(arr[0], arr[1]); |
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__m128d val2 = _mm_set_pd(arr[2], arr[3]); |
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__m128d one = _mm_set_pd(1.0, 1.0); |
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__m128d result = _mm_add_pd(val1, one); |
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_mm_store_pd(darr, result); |
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result = _mm_add_pd(val2, one); |
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_mm_store_pd(&darr[2], result); |
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arr[0] = (float)darr[1]; |
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arr[1] = (float)darr[0]; |
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arr[2] = (float)darr[3]; |
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arr[3] = (float)darr[2]; |
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} |
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#include<simdconfig.h> |
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#include<simdfuncs.h> |
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#ifdef _MSC_VER |
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#include<intrin.h> |
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int sse3_available() { |
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return 1; |
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} |
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#else |
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#include<pmmintrin.h> |
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#include<cpuid.h> |
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#include<stdint.h> |
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#if defined(__APPLE__) |
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int sse3_available() { return 1; } |
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#else |
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int sse3_available() { |
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return __builtin_cpu_supports("sse3"); |
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} |
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#endif |
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#endif |
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void increment_sse3(float arr[4]) { |
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double darr[4]; |
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__m128d val1 = _mm_set_pd(arr[0], arr[1]); |
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__m128d val2 = _mm_set_pd(arr[2], arr[3]); |
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__m128d one = _mm_set_pd(1.0, 1.0); |
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__m128d result = _mm_add_pd(val1, one); |
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_mm_store_pd(darr, result); |
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result = _mm_add_pd(val2, one); |
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_mm_store_pd(&darr[2], result); |
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result = _mm_hadd_pd(val1, val2); /* This does nothing. Only here so we use an SSE3 instruction. */ |
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arr[0] = (float)darr[1]; |
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arr[1] = (float)darr[0]; |
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arr[2] = (float)darr[3]; |
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arr[3] = (float)darr[2]; |
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} |
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@ -0,0 +1,40 @@ |
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#include<simdconfig.h> |
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#include<simdfuncs.h> |
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#include<stdint.h> |
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#ifdef _MSC_VER |
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#include<intrin.h> |
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int sse41_available() { |
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return 1; |
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} |
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#else |
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#include<smmintrin.h> |
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#include<cpuid.h> |
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#if defined(__APPLE__) |
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int sse41_available() { return 1; } |
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#else |
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int sse41_available() { |
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return __builtin_cpu_supports("sse4.1"); |
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} |
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#endif |
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#endif |
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void increment_sse41(float arr[4]) { |
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double darr[4]; |
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__m128d val1 = _mm_set_pd(arr[0], arr[1]); |
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__m128d val2 = _mm_set_pd(arr[2], arr[3]); |
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__m128d one = _mm_set_pd(1.0, 1.0); |
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__m128d result = _mm_add_pd(val1, one); |
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result = _mm_ceil_pd(result); /* A no-op, only here to use a SSE4.1 intrinsic. */ |
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_mm_store_pd(darr, result); |
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result = _mm_add_pd(val2, one); |
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_mm_store_pd(&darr[2], result); |
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arr[0] = (float)darr[1]; |
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arr[1] = (float)darr[0]; |
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arr[2] = (float)darr[3]; |
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arr[3] = (float)darr[2]; |
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} |
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@ -0,0 +1,43 @@ |
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#include<simdconfig.h> |
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#include<simdfuncs.h> |
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#include<stdint.h> |
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|
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#ifdef _MSC_VER |
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#include<intrin.h> |
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int sse42_available() { |
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return 1; |
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} |
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|
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#else |
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|
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#include<nmmintrin.h> |
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#include<cpuid.h> |
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|
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#ifdef __APPLE__ |
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int sse42_available() { |
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return 1; |
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} |
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#else |
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int sse42_available() { |
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return __builtin_cpu_supports("sse4.2"); |
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} |
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#endif |
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#endif |
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void increment_sse42(float arr[4]) { |
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double darr[4]; |
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__m128d val1 = _mm_set_pd(arr[0], arr[1]); |
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__m128d val2 = _mm_set_pd(arr[2], arr[3]); |
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__m128d one = _mm_set_pd(1.0, 1.0); |
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__m128d result = _mm_add_pd(val1, one); |
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_mm_store_pd(darr, result); |
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result = _mm_add_pd(val2, one); |
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_mm_store_pd(&darr[2], result); |
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_mm_crc32_u32(42, 99); /* A no-op, only here to use an SSE4.2 instruction. */ |
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arr[0] = (float)darr[1]; |
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arr[1] = (float)darr[0]; |
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arr[2] = (float)darr[3]; |
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arr[3] = (float)darr[2]; |
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} |
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@ -0,0 +1,48 @@ |
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#include<simdconfig.h> |
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#include<simdfuncs.h> |
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|
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#include<emmintrin.h> |
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#include<tmmintrin.h> |
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|
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#ifdef _MSC_VER |
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#include<intrin.h> |
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|
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int ssse3_available() { |
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return 1; |
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} |
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|
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#else |
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|
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#include<cpuid.h> |
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#include<stdint.h> |
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|
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int ssse3_available() { |
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#ifdef __APPLE__ |
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return 1; |
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#elif defined(__clang__) |
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/* https://github.com/numpy/numpy/issues/8130 */ |
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return __builtin_cpu_supports("sse4.1"); |
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#else |
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return __builtin_cpu_supports("ssse3"); |
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#endif |
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} |
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#endif |
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void increment_ssse3(float arr[4]) { |
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double darr[4]; |
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__m128d val1 = _mm_set_pd(arr[0], arr[1]); |
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__m128d val2 = _mm_set_pd(arr[2], arr[3]); |
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__m128d one = _mm_set_pd(1.0, 1.0); |
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__m128d result = _mm_add_pd(val1, one); |
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__m128i tmp1, tmp2; |
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tmp1 = tmp2 = _mm_set1_epi16(0); |
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_mm_store_pd(darr, result); |
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result = _mm_add_pd(val2, one); |
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_mm_store_pd(&darr[2], result); |
||||
tmp1 = _mm_hadd_epi32(tmp1, tmp2); /* This does nothing. Only here so we use an SSSE3 instruction. */ |
||||
arr[0] = (float)darr[1]; |
||||
arr[1] = (float)darr[0]; |
||||
arr[2] = (float)darr[3]; |
||||
arr[3] = (float)darr[2]; |
||||
} |
||||
@ -0,0 +1,93 @@ |
||||
#include<simdfuncs.h> |
||||
#include<stdio.h> |
||||
|
||||
/*
|
||||
* A function that checks at runtime which simd accelerations are |
||||
* available and calls the best one. Falls |
||||
* back to plain C implementation if SIMD is not available. |
||||
*/ |
||||
|
||||
int main(int argc, char **argv) { |
||||
float four[4] = {2.0, 3.0, 4.0, 5.0}; |
||||
const float expected[4] = {3.0, 4.0, 5.0, 6.0}; |
||||
void (*fptr)(float[4]) = NULL; |
||||
const char *type; |
||||
int i; |
||||
|
||||
/* Add here. The first matched one is used so put "better" instruction
|
||||
* sets at the top. |
||||
*/ |
||||
#if HAVE_NEON |
||||
if(fptr == NULL && neon_available()) { |
||||
fptr = increment_neon; |
||||
type = "NEON"; |
||||
} |
||||
#endif |
||||
#if HAVE_AVX2 |
||||
if(fptr == NULL && avx2_available()) { |
||||
fptr = increment_avx2; |
||||
type = "AVX2"; |
||||
} |
||||
#endif |
||||
#if HAVE_AVX |
||||
if(fptr == NULL && avx_available()) { |
||||
fptr = increment_avx; |
||||
type = "AVX"; |
||||
} |
||||
#endif |
||||
#if HAVE_SSE42 |
||||
if(fptr == NULL && sse42_available()) { |
||||
fptr = increment_sse42; |
||||
type = "SSE42"; |
||||
} |
||||
#endif |
||||
#if HAVE_SSE41 |
||||
if(fptr == NULL && sse41_available()) { |
||||
fptr = increment_sse41; |
||||
type = "SSE41"; |
||||
} |
||||
#endif |
||||
#if HAVE_SSSE3 |
||||
if(fptr == NULL && ssse3_available()) { |
||||
fptr = increment_ssse3; |
||||
type = "SSSE3"; |
||||
} |
||||
#endif |
||||
#if HAVE_SSE3 |
||||
if(fptr == NULL && sse3_available()) { |
||||
fptr = increment_sse3; |
||||
type = "SSE3"; |
||||
} |
||||
#endif |
||||
#if HAVE_SSE2 |
||||
if(fptr == NULL && sse2_available()) { |
||||
fptr = increment_sse2; |
||||
type = "SSE2"; |
||||
} |
||||
#endif |
||||
#if HAVE_SSE |
||||
if(fptr == NULL && sse_available()) { |
||||
fptr = increment_sse; |
||||
type = "SSE"; |
||||
} |
||||
#endif |
||||
#if HAVE_MMX |
||||
if(fptr == NULL && mmx_available()) { |
||||
fptr = increment_mmx; |
||||
type = "MMX"; |
||||
} |
||||
#endif |
||||
if(fptr == NULL) { |
||||
fptr = increment_fallback; |
||||
type = "fallback"; |
||||
} |
||||
printf("Using %s.\n", type); |
||||
fptr(four); |
||||
for(i=0; i<4; i++) { |
||||
if(four[i] != expected[i]) { |
||||
printf("Increment function failed, got %f expected %f.\n", four[i], expected[i]); |
||||
return 1; |
||||
} |
||||
} |
||||
return 0; |
||||
} |
||||
@ -0,0 +1,67 @@ |
||||
#pragma once |
||||
|
||||
#include<simdconfig.h> |
||||
|
||||
/* Yes, I do know that arr[4] decays into a pointer
|
||||
* as a function argument. Don't do this in real code |
||||
* but for this test it is ok. |
||||
*/ |
||||
|
||||
void increment_fallback(float arr[4]); |
||||
|
||||
#if HAVE_MMX |
||||
int mmx_available(); |
||||
void increment_mmx(float arr[4]); |
||||
#endif |
||||
|
||||
#if HAVE_SSE |
||||
int sse_available(); |
||||
void increment_sse(float arr[4]); |
||||
#endif |
||||
|
||||
#if HAVE_SSE2 |
||||
int sse2_available(); |
||||
void increment_sse2(float arr[4]); |
||||
#endif |
||||
|
||||
#if HAVE_SSE3 |
||||
int sse3_available(); |
||||
void increment_sse3(float arr[4]); |
||||
#endif |
||||
|
||||
#if HAVE_SSSE3 |
||||
int ssse3_available(); |
||||
void increment_ssse3(float arr[4]); |
||||
#endif |
||||
|
||||
#if HAVE_SSE41 |
||||
int sse41_available(); |
||||
void increment_sse41(float arr[4]); |
||||
#endif |
||||
|
||||
#if HAVE_SSE42 |
||||
int sse42_available(); |
||||
void increment_sse42(float arr[4]); |
||||
#endif |
||||
|
||||
#if HAVE_AVX |
||||
int avx_available(); |
||||
void increment_avx(float arr[4]); |
||||
#endif |
||||
|
||||
#if HAVE_AVX2 |
||||
int avx2_available(); |
||||
void increment_avx2(float arr[4]); |
||||
#endif |
||||
|
||||
#if HAVE_NEON |
||||
int neon_available(); |
||||
void increment_neon(float arr[4]); |
||||
#endif |
||||
|
||||
#if HAVE_ALTIVEC |
||||
int altivec_available(); |
||||
void increment_altivec(float arr[4]); |
||||
#endif |
||||
|
||||
/* And so on. */ |
||||
Loading…
Reference in new issue