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44 lines
898 B
44 lines
898 B
5 years ago
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#include<simdconfig.h>
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#include<simdfuncs.h>
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#include<stdint.h>
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#ifdef _MSC_VER
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#include<intrin.h>
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int sse42_available(void) {
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return 1;
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}
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#else
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#include<nmmintrin.h>
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#include<cpuid.h>
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#ifdef __APPLE__
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int sse42_available(void) {
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return 1;
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}
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#else
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int sse42_available(void) {
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return __builtin_cpu_supports("sse4.2");
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}
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#endif
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#endif
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void increment_sse42(float arr[4]) {
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ALIGN_16 double darr[4];
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__m128d val1 = _mm_set_pd(arr[0], arr[1]);
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__m128d val2 = _mm_set_pd(arr[2], arr[3]);
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__m128d one = _mm_set_pd(1.0, 1.0);
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__m128d result = _mm_add_pd(val1, one);
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_mm_store_pd(darr, result);
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result = _mm_add_pd(val2, one);
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_mm_store_pd(&darr[2], result);
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_mm_crc32_u32(42, 99); /* A no-op, only here to use an SSE4.2 instruction. */
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arr[0] = (float)darr[1];
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arr[1] = (float)darr[0];
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arr[2] = (float)darr[3];
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arr[3] = (float)darr[2];
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}
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