Capstone disassembly/disassembler framework: Core (Arm, Arm64, BPF, EVM, M68K, M680X, MOS65xx, Mips, PPC, RISCV, Sparc, SystemZ, TMS320C64x, Web Assembly, X86, X86_64, XCore) + bindings.
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# CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, None |
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0x81,0x43,0xe0,0x0f = membar 15 |
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0x81,0x43,0xc0,0x00 = stbar |
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0xd4,0x7e,0x00,0x16 = swap [%i0+%l6], %o2 |
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0xd4,0x7e,0x20,0x20 = swap [%i0+32], %o2 |
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0xd5,0xe6,0x10,0x16 = cas [%i0], %l6, %o2 |
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0xd5,0xf6,0x10,0x16 = casx [%i0], %l6, %o2
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