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130 lines
3.7 KiB
130 lines
3.7 KiB
(* Capstone Disassembler Engine |
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* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013> *) |
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open Printf |
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open Capstone |
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open X86 |
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let print_string_hex comment str = |
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printf "%s" comment; |
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for i = 0 to (Array.length str - 1) do |
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printf "0x%02x " str.(i) |
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done; |
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printf "\n" |
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let _X86_CODE16 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";; |
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let _X86_CODE32 = "\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00";; |
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let _X86_CODE64 = "\x55\x48\x8b\x05\xb8\x13\x00\x00";; |
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let all_tests = [ |
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(CS_ARCH_X86, [CS_MODE_16], _X86_CODE16, "X86 16bit (Intel syntax)"); |
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(CS_ARCH_X86, [CS_MODE_32; CS_MODE_SYNTAX_ATT], _X86_CODE32, "X86 32bit (ATT syntax)"); |
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(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32 (Intel syntax)"); |
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(CS_ARCH_X86, [CS_MODE_64], _X86_CODE64, "X86 64 (Intel syntax)"); |
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];; |
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let print_op i op = |
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( match op with |
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| X86_OP_INVALID _ -> (); (* this would never happens *) |
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| X86_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name CS_ARCH_X86 reg); |
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| X86_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm; |
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| X86_OP_FP fp -> printf "\t\top[%d]: FP = %f\n" i fp; |
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| X86_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i; |
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if mem.base != 0 then |
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printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name CS_ARCH_X86 mem.base); |
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if mem.index != 0 then |
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printf "\t\t\toperands[%u].mem.index: REG = %s\n" i (cs_reg_name CS_ARCH_X86 mem.index); |
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if mem.scale != 1 then |
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printf "\t\t\toperands[%u].mem.scale: %d\n" i mem.scale; |
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if mem.displ != 0 then |
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printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.displ; |
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); |
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); |
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();; |
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let print_detail mode arch = |
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match arch with |
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| CS_INFO_ARM64 _ -> (); |
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| CS_INFO_ARM _ -> (); |
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| CS_INFO_MIPS _ -> (); |
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| CS_INFO_X86 x86 -> |
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print_string_hex "\tPrefix: " x86.prefix; |
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(* print segment override (if applicable) *) |
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if x86.segment != _X86_REG_INVALID then |
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printf "\tsegment = %s\n" (cs_reg_name CS_ARCH_X86 x86.segment); |
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(* print instruction's opcode *) |
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print_string_hex "\tOpcode: " x86.opcode; |
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(* print operand's size, address size, displacement size & immediate size *) |
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printf "\top_size: %u, addr_size: %u, disp_size: %u, imm_size: %u\n" |
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x86.op_size x86.addr_size |
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x86.disp_size x86.imm_size; |
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(* print modRM byte *) |
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printf "\tmodrm: 0x%x\n" x86.modrm; |
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(* print displacement value *) |
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if x86.disp != 0 then |
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printf "\tdisp: 0x%x\n" x86.disp; |
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(* SIB is invalid in 16-bit mode *) |
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if not (List.mem CS_MODE_16 mode) then ( |
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(* print SIB byte *) |
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printf "\tsib: 0x%x\n" x86.sib; |
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(* print sib index/scale/base (if applicable) *) |
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if x86.sib_index != _X86_REG_INVALID then |
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printf "\tsib_index: %s, sib_scale: %u, sib_base: %s\n" |
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(cs_reg_name CS_ARCH_X86 x86.sib_index) |
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x86.sib_scale |
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(cs_reg_name CS_ARCH_X86 x86.sib_base); |
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); |
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(* print all operands info (type & value) *) |
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if (Array.length x86.operands) > 0 then ( |
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printf "\top_count: %d\n" (Array.length x86.operands); |
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Array.iteri print_op x86.operands; |
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); |
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printf "\n";; |
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let print_insn mode insn = |
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printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str; |
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print_detail mode insn.arch;; |
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let print_arch x = |
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let (arch, mode, code, comment) = x in |
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let insns = cs_disasm_quick arch mode code 0x1000L 0L in |
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printf "*************\n"; |
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printf "Platform: %s\n" comment; |
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List.iter (print_insn mode) insns;; |
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(* |
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List.iter print_arch all_tests;; |
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*) |
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(* all below code use OO class of Capstone *) |
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let print_insn_cls mode insn = |
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printf "0x%x\t%s\t%s\n" insn#address insn#mnemonic insn#op_str; |
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print_detail mode insn#arch;; |
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let print_arch_cls x = |
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let (arch, mode, code, comment) = x in ( |
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let d = new cs arch mode in |
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let insns = d#disasm code 0x1000L 0L in |
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printf "*************\n"; |
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printf "Platform: %s\n" comment; |
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List.iter (print_insn_cls mode) insns; |
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);; |
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List.iter print_arch_cls all_tests;;
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