Capstone disassembly/disassembler framework: Core (Arm, Arm64, BPF, EVM, M68K, M680X, MOS65xx, Mips, PPC, RISCV, Sparc, SystemZ, TMS320C64x, Web Assembly, X86, X86_64, XCore) + bindings.
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# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None |
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0x01,0x2a,0x40,0x05 = lsa $t0, $t1, $t2, 1 |
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0x01,0x2a,0x40,0x45 = lsa $t0, $t1, $t2, 2 |
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0x01,0x2a,0x40,0x85 = lsa $t0, $t1, $t2, 3 |
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0x01,0x2a,0x40,0xc5 = lsa $t0, $t1, $t2, 4
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