Capstone disassembly/disassembler framework: Core (Arm, Arm64, BPF, EVM, M68K, M680X, MOS65xx, Mips, PPC, RISCV, Sparc, SystemZ, TMS320C64x, Web Assembly, X86, X86_64, XCore) + bindings.
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# CS_ARCH_MIPS, CS_MODE_MIPS32, None |
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0x08,0x00,0x60,0x00 = jr $v1 |
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0x08,0x00,0x80,0x03 = jr $gp |
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0x08,0x00,0xc0,0x03 = jr $fp |
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0x08,0x00,0xa0,0x03 = jr $sp |
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0x08,0x00,0xe0,0x03 = jr $ra
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