Capstone disassembly/disassembler framework: Core (Arm, Arm64, BPF, EVM, M68K, M680X, MOS65xx, Mips, PPC, RISCV, Sparc, SystemZ, TMS320C64x, Web Assembly, X86, X86_64, XCore) + bindings. (bloaty 依赖)
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Giovanni Condello 7c78778cfc Make capstone library compile with arm-none-eabi-gcc 4.8 11 years ago
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AArch64 Make capstone library compile with arm-none-eabi-gcc 4.8 11 years ago
ARM Make capstone library compile with arm-none-eabi-gcc 4.8 11 years ago
Mips x86: handle instructions with LOCK/REP/REPNE prefix after other prefixes. bear with this until we have a better approach 11 years ago
PowerPC x86: handle instructions with LOCK/REP/REPNE prefix after other prefixes. bear with this until we have a better approach 11 years ago
Sparc x86: handle instructions with LOCK/REP/REPNE prefix after other prefixes. bear with this until we have a better approach 11 years ago
SystemZ x86: handle instructions with LOCK/REP/REPNE prefix after other prefixes. bear with this until we have a better approach 11 years ago
X86 x86: identation 11 years ago