Capstone disassembly/disassembler framework: Core (Arm, Arm64, BPF, EVM, M68K, M680X, MOS65xx, Mips, PPC, RISCV, Sparc, SystemZ, TMS320C64x, Web Assembly, X86, X86_64, XCore) + bindings. (bloaty 依赖)
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Nguyen Anh Quynh 54f8cef449 mips: add JR.HB & JALR.HB instructions. also update Ocaml/Python/Java bindings 10 years ago
..
Makefile Fix minor style inconsistency 11 years ago
README initial import 11 years ago
test.c Workaround missing <inttypes.h> on MSVC 2010 10 years ago
test_arm.c Workaround missing <inttypes.h> on MSVC 2010 10 years ago
test_arm64.c Workaround missing <inttypes.h> on MSVC 2010 10 years ago
test_detail.c mips: add JR.HB & JALR.HB instructions. also update Ocaml/Python/Java bindings 10 years ago
test_mips.c Workaround missing <inttypes.h> on MSVC 2010 10 years ago
test_ppc.c Workaround missing <inttypes.h> on MSVC 2010 10 years ago
test_skipdata.c Workaround missing <inttypes.h> on MSVC 2010 10 years ago
test_sparc.c Workaround missing <inttypes.h> on MSVC 2010 10 years ago
test_systemz.c Workaround missing <inttypes.h> on MSVC 2010 10 years ago
test_x86.c Workaround missing <inttypes.h> on MSVC 2010 10 years ago
test_xcore.c Workaround missing <inttypes.h> on MSVC 2010 10 years ago

README

This directory contains some test code to show how to use Capstone API.

- test.c
This code shows the most simple form of API where we only want to get basic
information out of disassembled instruction, such as address, mnemonic and
operand string.

- test_detail.c:
This code shows how to access to architecture-neutral information in disassembled
instructions, such as implicit registers read/written, or groups of instructions
that this instruction belong to.

- test_<arch>.c
These code show how to access architecture-specific information for each
architecture.