Nguyen Anh Quynh
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d69f9ded5b
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x86: delete dead code
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11 years ago |
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Nguyen Anh Quynh
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b2e566ac88
|
xcore: use strcpy() rather than strncpy()
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11 years ago |
|
Nguyen Anh Quynh
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2a33afe6e8
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msvc: make MSVC shutup on strncpy()
|
11 years ago |
|
Nguyen Anh Quynh
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dc1af545c0
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msvc: fix warnings
|
11 years ago |
|
Nguyen Anh Quynh
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2b68355a67
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msvc: support strcpy() with strcpy_s()
|
11 years ago |
|
Nguyen Anh Quynh
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112556d9f9
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msvc: rename test_arm.vcxproj to test_xcore.vcxproj
|
11 years ago |
|
Nguyen Anh Quynh
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c54b7ac907
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python: add test_xcore.py
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11 years ago |
|
Nguyen Anh Quynh
|
cfc7ca6ace
|
python & java: update constants for Xcore after the last change in the core
|
11 years ago |
|
Nguyen Anh Quynh
|
be2b788dc1
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xcore: handle details for some special tricky instructions
|
11 years ago |
|
Nguyen Anh Quynh
|
8c1c36f0fc
|
update TODO
|
11 years ago |
|
Nguyen Anh Quynh
|
4d00986c6b
|
java: add Xcore support
|
11 years ago |
|
Nguyen Anh Quynh
|
2eff6a377c
|
msvc: support XCore
|
11 years ago |
|
Nguyen Anh Quynh
|
f721e3124d
|
Disassembler -> Disassembly
|
11 years ago |
|
Nguyen Anh Quynh
|
8f50ba894c
|
Merge branch 'next' into xcore
|
11 years ago |
|
Nguyen Anh Quynh
|
04f2ec6d0f
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cleanup redundant headers included
|
11 years ago |
|
Nguyen Anh Quynh
|
2cf9c524da
|
x86: MOV64rr belongs to GRP_MODE64 group. bug reported by Jason Oster
|
11 years ago |
|
Nguyen Anh Quynh
|
d0f3e15d90
|
python: fix Xcore bug
|
11 years ago |
|
Nguyen Anh Quynh
|
553bb488d7
|
python: support XCore
|
11 years ago |
|
Nguyen Anh Quynh
|
52a8d2afa2
|
enable disabled archs
|
11 years ago |
|
Nguyen Anh Quynh
|
c80d840ffc
|
add XCore architecture
|
11 years ago |
|
Nguyen Anh Quynh
|
3dc080c2b6
|
systemz: cleanup SystemZGenDisassemblerTables.inc
|
11 years ago |
|
Nguyen Anh Quynh
|
5a5d8a71cd
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python & java: fix Sparc's CC constants after the last change in the core
|
11 years ago |
|
Nguyen Anh Quynh
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5d6383e335
|
sparc: SPARC_CC_ICC_N should not have the same value as SPARC_CC_INVALID. bug reported by Jason Oster
|
11 years ago |
|
Nguyen Anh Quynh
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708d151fb6
|
Merge pull request #127 from parasyte/bug/SystemZ/r0l-reg
Add `r0l` register to SystemZMapping.c
|
11 years ago |
Jason Oster
|
6380446222
|
Add `r0l` register to SystemZMapping.c
|
11 years ago |
|
Nguyen Anh Quynh
|
0ebbf1e49c
|
python: ArmOpValue.imm uses int32 type after the last change in the core
|
11 years ago |
|
Nguyen Anh Quynh
|
eddf47c712
|
Merge pull request #125 from parasyte/ticket-124
ARM: Make `imm` detail field signed.
|
11 years ago |
|
Jason Oster
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aa60b8cd1b
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[#124] ARM: Make `imm` detail field signed.
|
11 years ago |
|
Nguyen Anh Quynh
|
e96e34df9a
|
python: test_x86.py print prefixes with a space between consecutive bytes
|
11 years ago |
|
Nguyen Anh Quynh
|
4ebd062ee3
|
x86: cleanup unused code
|
11 years ago |
|
Nguyen Anh Quynh
|
fed098f9a7
|
x86: eliminate irrelevant prefixes in x86.prefix[] - such as f2/f3 prefixed irrelevant instructions
|
11 years ago |
|
Nguyen Anh Quynh
|
1e93adf5c3
|
x86: add CL operand into details for 'SHL *, CL' instruction
|
11 years ago |
|
Nguyen Anh Quynh
|
7a65ad7e4b
|
x86: detail operands for 'fstpnce st(0), st(0)' & 'fstpst(7), st(0)'
|
11 years ago |
|
Nguyen Anh Quynh
|
b6e3f01bb8
|
x86: handle REP MOVSD/CMPSD/SCASD/LODSD/STOSD properly (due to confused 128bit media instructions having the same mnemonics)
|
11 years ago |
|
Nguyen Anh Quynh
|
3a86d92e7c
|
x86: correct instructions related to REP prefix
|
11 years ago |
|
Nguyen Anh Quynh
|
1d6f7ee50e
|
x86: prefix REP/REPNE are only relevant for MOVS/CMPS/SCAS/LDOS/STOS/INS/OUTS instructions
|
11 years ago |
|
Nguyen Anh Quynh
|
7a75baa679
|
Merge pull request #122 from parasyte/next
MIPS: Add HI, LO, and PC registers to MipsMapping.c
|
11 years ago |
|
Jason Oster
|
984ed7e9e8
|
MIPS: Add HI, LO, and PC registers to MipsMapping.c
- Using MIPS_REG_HI, MIPS_REG_LO, and MIPS_REG_PC with cs_reg_name() caused out-of-bounds reads
|
11 years ago |
|
Nguyen Anh Quynh
|
2c61656d99
|
tests: correct the prototype of mycallback() in test_skipdata
|
11 years ago |
danghvu
|
50fdc6c463
|
Merge with upstream
|
11 years ago |
|
danghvu
|
69a7c2d580
|
Make test_skipdata performs tests by default
|
11 years ago |
|
Nguyen Anh Quynh
|
7b91574257
|
TODO: remove Python3 & MSVC from wanted features
|
11 years ago |
|
Nguyen Anh Quynh
|
6f9b113009
|
update COMPILE_MSVC.TXT
|
11 years ago |
|
Nguyen Anh Quynh
|
6456481508
|
x86: add immediate operand (1) for SHL/SHR/ROR/ROL/SAR/SAL in detail mode & Intel syntax
|
11 years ago |
|
Nguyen Anh Quynh
|
f338657f17
|
x86: set syntax variable when changing syntax with cs_option()
|
11 years ago |
|
Nguyen Anh Quynh
|
f260c2023e
|
fix some conflicts when merging msvc2 into next
|
11 years ago |
|
Nguyen Anh Quynh
|
1922b2f74b
|
arm64: clean reg_name_maps[]
|
11 years ago |
|
Nguyen Anh Quynh
|
61882e56d5
|
msvc: update documentation for VS2010
|
11 years ago |
|
Nguyen Anh Quynh
|
96934501fd
|
arm64: do not consider WZR & XZR alias registers
|
11 years ago |
|
Nguyen Anh Quynh
|
cb2c4f90bf
|
test_x86: output sib_base, sib_index, sib_scale separately
|
11 years ago |
