15 Commits (6a4e8caf34f8f32d42119b3a6af192a24605f09a)

Author SHA1 Message Date
Nguyen Anh Quynh 45c77aeadd x86: handle tricky instructions related to MULPD at http://habrahabr.ru/company/intel/blog/200658/ 11 years ago
Nguyen Anh Quynh a5ffdc3a80 x86: properly handle LOCK/REP in the core, so remove buch of hacks 11 years ago
Nguyen Anh Quynh 6023ef7843 Disassembler -> Disassembly 11 years ago
Nguyen Anh Quynh 2be9b8791a x86: do not print negative immediate. request of Le Dinh Long 11 years ago
Nguyen Anh Quynh e51cf36636 x86: do not print negative immediate. request of Le Dinh Long 11 years ago
Nguyen Anh Quynh 13f40d26a2 x86: upgrade core 11 years ago
Nguyen Anh Quynh 48a14ca4ce add SystemZ arch 11 years ago
Nguyen Anh Quynh 05e27138ae core: add Sparc arch 11 years ago
Nguyen Anh Quynh 0636f68331 increase size of @op_str to 160 to contain long operand string of some Neon Arm instructions 11 years ago
Nguyen Anh Quynh 3d56b823ed extend @op_str of cs_insn_flat following the core change 11 years ago
Nguyen Anh Quynh ae3649ff71 rename some C header guards to be without _ as prefix to follow naming convention of C language. suggested by Markus Elfring 11 years ago
Nguyen Anh Quynh 42c6b1acc7 initial support for PPC 11 years ago
Nguyen Anh Quynh 4fe224b1ed change API cs_disasm_dyn(): break cs_insn into 2 structures, and put all details into new structure cs_detail. this break API compatibility 11 years ago
Nguyen Anh Quynh a209e67f8a support to turn on/off building instruction details 11 years ago
Nguyen Anh Quynh 6b7abe3c81 arm64: handle alias insn in a better way, and add support for MNEG. bug reported by Patroklos Argyroudis 11 years ago
Nguyen Anh Quynh 26ee41aa67 initial import 11 years ago