Nguyen Anh Quynh
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4de9de683d
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cython: fix incomplete array of bytes returned by CsInsn.bytes. bug reported by @secretsquirrel
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10 years ago |
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Nguyen Anh Quynh
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499f0ca7cb
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suite: add some tools to verify X86 machine code
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10 years ago |
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Nguyen Anh Quynh
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0653c4edb1
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Merge pull request #245 from awesie/next
x86: add more valid instructions for LOCK prefix
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10 years ago |
Andrew Wesie
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5de09479a6
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x86: add more valid instructions for LOCK prefix
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10 years ago |
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Nguyen Anh Quynh
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beb3248c26
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x86: check for invalid instructions with LOCK prefix
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10 years ago |
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Nguyen Anh Quynh
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4539ba3088
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x86: support MOVSXD64rm with missing REX byte. bug reported by Aurélien Wailly
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10 years ago |
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Nguyen Anh Quynh
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599b559455
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x86: fix some compilation issues about missing instructions on CAPSTONE_X86_REDUCE setup
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10 years ago |
Maciej Szawlowski
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2c24d88f89
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fixed bug that prevented using md.detail = true and md.skipdata = true together
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10 years ago |
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Nguyen Anh Quynh
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dc101c25b3
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Merge branch 'master' of https://github.com/mszawlow/capstone into next
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10 years ago |
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Maciej Szawlowski
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9b0221f229
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fixed bug that prevented using md.detail = true and md.skipdata = true together
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10 years ago |
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Nguyen Anh Quynh
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3c27827a25
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x86: handle 0x82 opcode for CAPSTONE_X86_REDUCE setup
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10 years ago |
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Nguyen Anh Quynh
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3410b63a4e
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x86: handle 0x82 opcode. bug reported by Anton Kochkov
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10 years ago |
derrek
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07526e989b
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arm: Thumb BL & BLX read ARM_REG_PC instead of ARM_REG_SP.
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10 years ago |
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Nguyen Anh Quynh
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828667f3b3
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Merge pull request #240 from derrekr/next
arm: Thumb BL & BLX read ARM_REG_PC instead of ARM_REG_SP.
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10 years ago |
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derrek
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bda2c1c591
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arm: Thumb BL & BLX read ARM_REG_PC instead of ARM_REG_SP.
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10 years ago |
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Nguyen Anh Quynh
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c51e04fa97
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x86: support CR9-CR15 registers
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10 years ago |
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Nguyen Anh Quynh
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08390775b5
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x86: support CR9-CR15 registers
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10 years ago |
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Nguyen Anh Quynh
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db684b2398
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arm: BL & BLX do not read SP, but PC register. issue reported by Der Rek
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10 years ago |
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Nguyen Anh Quynh
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0f9ef1559d
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arm: BL & BLX do not read SP, but PC register. issue reported by Der Rek
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10 years ago |
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Nguyen Anh Quynh
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61ab00718a
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x86: remove dead code & dead SSE_CC constants. issue reported by Coverity
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10 years ago |
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Nguyen Anh Quynh
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1038fdb038
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x86: add new registers DR8-DR15
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10 years ago |
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Nguyen Anh Quynh
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59c72afe7a
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x86: add 3 new undocumented instructions fdisi8087_nop, feni8087_nop & ffreep
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10 years ago |
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Nguyen Anh Quynh
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534b948661
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bump version to 4.0
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10 years ago |
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Nguyen Anh Quynh
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7ca66a4982
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bump package version to 3.0.1
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10 years ago |
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Nguyen Anh Quynh
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9f694cc934
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x86: handle undocumented immediates for (v)cmpps/pd/ss/sd instructions
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10 years ago |
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Nguyen Anh Quynh
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d319c114db
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x86: more encodings for FXCH & FCOMP. also print LJUMP without * as prefix for Intel syntax. handle BOUND & FARCALL better
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10 years ago |
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Nguyen Anh Quynh
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5f8c4239c2
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x86: add missing CR8-CR15 registers to arch/X86/X86DisassemblerDecoder.h
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10 years ago |
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Nguyen Anh Quynh
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2ac7941227
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x86: handle REX properly for segment related instructions by ignoring REX.r entirely
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10 years ago |
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Nguyen Anh Quynh
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80959c9a25
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code style
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10 years ago |
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Nguyen Anh Quynh
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094811415c
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x86: handle REX properly for x64 MMX related instructions by ignoring REX.b & REX.w entirely
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10 years ago |
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Nguyen Anh Quynh
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c9c3fdc3c9
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arm64: print ADR with absolute address. bug reported by blackboxer123
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10 years ago |
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Nguyen Anh Quynh
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51754231b9
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x86: check instruction size <=15 as soon as possible
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10 years ago |
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Nguyen Anh Quynh
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3539595183
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x86: instruction length must be <= 15
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10 years ago |
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Nguyen Anh Quynh
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a3d689de51
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x86: allow to mix REX & legacy prefix repeatedly in any order
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10 years ago |
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Nguyen Anh Quynh
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674db4c96f
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ppc: fix some compilation bugs when DIET mode is enable
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10 years ago |
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Nguyen Anh Quynh
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10ecdaef31
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x86: support some new instructions or new encodings of some new instructions: MOVSXD, FXCH, FCOM, FCOMP, FSTP, FSTPNCE, NOP
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10 years ago |
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Nguyen Anh Quynh
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145efa5be6
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Merge branch 'next' into rex
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10 years ago |
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Nguyen Anh Quynh
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2537cfd669
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python: fix a memory leak issue when we stop enumeration over the disassembled instructions prematurely. patch by Jan Newger
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10 years ago |
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Nguyen Anh Quynh
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58831e8d2c
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Merge branch 'next' into rex
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10 years ago |
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Nguyen Anh Quynh
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611b0c5c22
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code style
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10 years ago |
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Nguyen Anh Quynh
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dfde75c379
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Merge branch 'out_of_mem_fix' of https://github.com/nedwill/capstone into next
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10 years ago |
Edward Williamson
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f1e497502c
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check malloc return value
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10 years ago |
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Nguyen Anh Quynh
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1016d3214d
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x86: only eliminate REX prefixes if next byte is not a legacy prefix
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10 years ago |
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Nguyen Anh Quynh
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1cbc222626
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x86: eliminate redundant REX prefixes in front of x86_64 instruction. bug reported by Aurélien Wailly
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10 years ago |
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Nguyen Anh Quynh
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03a1836454
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arm64: set absolute (rather than relative) address B/BL. issue reported by Pancake
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10 years ago |
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Nguyen Anh Quynh
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c2925e9034
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x86: accept more than one REX prefix for x86_64. bug reported by Aurélien Wailly. thanks Ange Albertini for help
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10 years ago |
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Nguyen Anh Quynh
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073a3dd701
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package: update Brew formula (copied from Homebrew repo)
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10 years ago |
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Nguyen Anh Quynh
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03fb6f357d
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x86: MOV32sm should reference word rather than dword. bug reported by Andrew Wesie
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10 years ago |
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Nguyen Anh Quynh
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1befd7584a
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x86: reverse the order of operands for alias instruction IMUL in Intel syntax. bug reported by Andrew Wesie
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10 years ago |
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Nguyen Anh Quynh
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9578185ad8
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x86: add missing operands in detail mode for 'IN/OUT reg, reg' instructions. bug reported by Andrew Wesie
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10 years ago |
