Nguyen Anh Quynh
|
d23fc9dd92
|
RELEASE_NOTES
|
10 years ago |
|
Nguyen Anh Quynh
|
6eeb4a5ddd
|
update ChangeLog for 3.0.2
|
10 years ago |
|
Nguyen Anh Quynh
|
f92daed325
|
TODO
|
10 years ago |
|
Nguyen Anh Quynh
|
09218a2dfd
|
x86: remove unsed field @prefixLocations of InternalInstruction struct
|
10 years ago |
|
Nguyen Anh Quynh
|
bcb75a2194
|
x86: F2 can be a part of instruction encoding, but not a prefix
|
10 years ago |
pancake
|
a089e1445c
|
Fix ARM64_GRP_PRIVILEGE
|
10 years ago |
|
pancake
|
307973f2b1
|
Fix ARM_GRP_PRIVILEGE
|
10 years ago |
|
Nguyen Anh Quynh
|
8c212fd25e
|
ppc: add the missing Q0 register to reg_name_maps[]. bug reported by Coverity
|
10 years ago |
|
Nguyen Anh Quynh
|
fcde1e190a
|
Merge branch 'next' of https://github.com/aquynh/capstone into next
|
10 years ago |
|
Nguyen Anh Quynh
|
956c24d760
|
Merge pull request #281 from radare/indent
Fix indent issue
|
10 years ago |
|
pancake
|
21b0bdd0e1
|
Fix indent issue
|
10 years ago |
|
pancake
|
dae7c3ee9f
|
add ARM64_GRP_PRIVILEGE group and tag some instructions
|
10 years ago |
|
pancake
|
cf74a14b43
|
add ARM_GRP_PRIVILEGE group and tag some instructions
|
10 years ago |
|
Nguyen Anh Quynh
|
6791b268c4
|
arm: revert the last change on OperandInfo* in ARMGenInstrInfo.inc
|
10 years ago |
|
Nguyen Anh Quynh
|
dfd1c0b44e
|
arm: get rid of some useless variables in ARMGenInstrInfo.inc. this saves at lease 50KB
|
10 years ago |
|
Nguyen Anh Quynh
|
a7837a4ae3
|
sparc, systemz, xcore: getInstruction() should return boolean instead of DecodeStatus
|
10 years ago |
|
Nguyen Anh Quynh
|
037e01f942
|
core: remove unused Subregister indices for Sparc, PPC, SystemZ & Mips
|
10 years ago |
|
Nguyen Anh Quynh
|
bf97e21bb5
|
core: add CS_NEXT_VERSION to version the latest code in the 'next' branch
|
10 years ago |
|
Nguyen Anh Quynh
|
914066be07
|
x86: CLI & STI are privileged instructions. issue reported by @pancake
|
10 years ago |
|
Nguyen Anh Quynh
|
0423562c42
|
x86: RDTSC is not a privilege instructions, but all VM instructions are
|
10 years ago |
|
Nguyen Anh Quynh
|
4dd0dcb9d4
|
add CS_GRP_PRIVILEGE group, and also add X86_GRP_PRIVILEGE group for bunch of X86 privileged instructions
|
10 years ago |
|
Nguyen Anh Quynh
|
bb5dccedfa
|
core: put insns[] into separate .inc files to make it easier to manage
|
10 years ago |
|
Nguyen Anh Quynh
|
d3d574ed05
|
x86: XCHG* do not implicitly access *AX registers (reduce mode)
|
10 years ago |
|
Nguyen Anh Quynh
|
8b8d762580
|
x86: XCHG* do not implicitly access *AX registers
|
10 years ago |
|
Nguyen Anh Quynh
|
e0329ddde3
|
arm: printModImmOperand() should print Imm as unsigned number in some special cases
|
10 years ago |
|
radare
|
796f1d4022
|
Fix make -j warning
|
10 years ago |
|
Nguyen Anh Quynh
|
8e343885be
|
arm: update insn_ops[]
|
10 years ago |
|
Nguyen Anh Quynh
|
78699e0ff8
|
x86: update insn_ops[]
|
10 years ago |
|
Nguyen Anh Quynh
|
e4ca35d561
|
x86: delete the fiction instruction X86_INS_VPCOM
|
10 years ago |
|
Nguyen Anh Quynh
|
7a94483452
|
x86: remove another fiction instruction VCMP
|
10 years ago |
|
Nguyen Anh Quynh
|
e402e021b8
|
x86: remove unreal instruction VPCMP
|
10 years ago |
|
Nguyen Anh Quynh
|
3c626fbb98
|
mips: add register operands when detail = ON in the newly added function printRegisterList()
|
10 years ago |
|
Nguyen Anh Quynh
|
825a228a0f
|
python: make Cython binding support X86's @xop_cc
|
10 years ago |
|
Nguyen Anh Quynh
|
debaa2eefc
|
bindings: support newly added field @xop_cc in the last commit (Java, Ocaml, Python)
|
10 years ago |
|
Nguyen Anh Quynh
|
a81bf4247c
|
x86: add new field @xop_cc to struct @cs_x86
|
10 years ago |
|
Nguyen Anh Quynh
|
6bb255bb12
|
mips: remove mode CS_MODE_MIPSGP64
|
10 years ago |
|
Nguyen Anh Quynh
|
522a6f4125
|
Merge branch 'upgrade-core' into next
|
10 years ago |
|
Nguyen Anh Quynh
|
ad42f16b14
|
mips: remove the confusing mode CS_MODE_MIPSGP64
|
10 years ago |
|
Nguyen Anh Quynh
|
b8b83482b7
|
arm: print immediate in hex format when suitable for printModImmOperand()
|
10 years ago |
|
Nguyen Anh Quynh
|
16f703efd8
|
x86: remove more abundant space at the end of instructions (ATT syntax)
|
10 years ago |
|
Nguyen Anh Quynh
|
a3c8505a13
|
x86: remove one extra space in ATT syntax
|
10 years ago |
|
Nguyen Anh Quynh
|
ca792b2bcb
|
x86: fix some groups X86_GRP* in insns[] in X86Mapping.c
|
10 years ago |
|
Nguyen Anh Quynh
|
dcbfc394ba
|
x86: fix ATT syntax
|
10 years ago |
|
Nguyen Anh Quynh
|
5a36377c7c
|
x86: add GRP_VM for some VMX instructions
|
10 years ago |
|
Nguyen Anh Quynh
|
3a1a77fa64
|
x86: reduce mode support for the upgraded core
|
10 years ago |
|
Nguyen Anh Quynh
|
cdc9e20a45
|
x86: add missing GRP_VM for some virtualization instructions
|
10 years ago |
|
Nguyen Anh Quynh
|
02a7675f7e
|
x86: cleanup
|
10 years ago |
|
Nguyen Anh Quynh
|
4c1d0970ca
|
x86: test [mem], reg
|
10 years ago |
|
Nguyen Anh Quynh
|
54d5071288
|
x86: update core. also update all the bindings Java, Ocaml & Python
|
10 years ago |
|
Nguyen Anh Quynh
|
f4a2da5a94
|
ppc: fix PPC_init()
|
10 years ago |
