From ff9a5743d91e9e780df0904eddd97a7a2d57d89b Mon Sep 17 00:00:00 2001 From: Nguyen Anh Quynh Date: Thu, 13 Nov 2014 12:09:49 +0800 Subject: [PATCH] ocaml: update Mips modes to CS_MODE_MIPS32 & CS_MODE_MIPS64 --- bindings/ocaml/capstone.ml | 8 +++++--- bindings/ocaml/ocaml.c | 12 ++++++++++++ bindings/ocaml/test.ml | 4 ++-- bindings/ocaml/test_detail.ml | 6 +++--- bindings/ocaml/test_mips.ml | 4 ++-- 5 files changed, 24 insertions(+), 10 deletions(-) diff --git a/bindings/ocaml/capstone.ml b/bindings/ocaml/capstone.ml index 27cd265a..3af3abde 100644 --- a/bindings/ocaml/capstone.ml +++ b/bindings/ocaml/capstone.ml @@ -26,9 +26,9 @@ type arch = type mode = | CS_MODE_LITTLE_ENDIAN (* little-endian mode (default mode) *) | CS_MODE_ARM (* ARM mode *) - | CS_MODE_16 (* 16-bit mode (for X86, Mips) *) - | CS_MODE_32 (* 32-bit mode (for X86, Mips) *) - | CS_MODE_64 (* 64-bit mode (for X86, Mips) *) + | CS_MODE_16 (* 16-bit mode (for X86) *) + | CS_MODE_32 (* 32-bit mode (for X86) *) + | CS_MODE_64 (* 64-bit mode (for X86, PPC) *) | CS_MODE_THUMB (* ARM's Thumb mode, including Thumb-2 *) | CS_MODE_MCLASS (* ARM's MClass mode *) | CS_MODE_V8 (* ARMv8 A32 encodings for ARM *) @@ -38,6 +38,8 @@ type mode = | CS_MODE_MIPSGP64 (* MipsGP64 mode (MIPS architecture) *) | CS_MODE_V9 (* SparcV9 mode (Sparc architecture) *) | CS_MODE_BIG_ENDIAN (* big-endian mode *) + | CS_MODE_MIPS32 (* Mips32 mode (for Mips) *) + | CS_MODE_MIPS64 (* Mips64 mode (for Mips) *) (* Runtime option for the disassembled engine *) diff --git a/bindings/ocaml/ocaml.c b/bindings/ocaml/ocaml.c index f2de8f4a..dded8a1f 100644 --- a/bindings/ocaml/ocaml.c +++ b/bindings/ocaml/ocaml.c @@ -706,6 +706,12 @@ CAMLprim value ocaml_cs_disasm(value _arch, value _mode, value _code, value _add case 13: mode |= CS_MODE_BIG_ENDIAN; break; + case 14: + mode |= CS_MODE_MIPS32; + break; + case 15: + mode |= CS_MODE_MIPS64; + break; default: caml_invalid_argument("Invalid mode"); return Val_emptylist; @@ -831,6 +837,12 @@ CAMLprim value ocaml_open(value _arch, value _mode) case 13: mode |= CS_MODE_BIG_ENDIAN; break; + case 14: + mode |= CS_MODE_MIPS32; + break; + case 15: + mode |= CS_MODE_MIPS64; + break; default: caml_invalid_argument("Invalid mode"); return Val_emptylist; diff --git a/bindings/ocaml/test.ml b/bindings/ocaml/test.ml index 6043ab01..80ad1e4c 100644 --- a/bindings/ocaml/test.ml +++ b/bindings/ocaml/test.ml @@ -31,8 +31,8 @@ let all_tests = [ (CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE, "THUMB", 0L); (CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE2, "THUMB-2", 0L); (CS_ARCH_ARM64, [CS_MODE_ARM], _ARM64_CODE, "ARM-64", 0L); - (CS_ARCH_MIPS, [CS_MODE_32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)", 0L); - (CS_ARCH_MIPS, [CS_MODE_64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)", 0L); + (CS_ARCH_MIPS, [CS_MODE_MIPS32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)", 0L); + (CS_ARCH_MIPS, [CS_MODE_MIPS64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)", 0L); (CS_ARCH_PPC, [CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64", 0L); (CS_ARCH_PPC, [CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64, print register with number only", 0L); (CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN], _SPARC_CODE, "Sparc", 0L); diff --git a/bindings/ocaml/test_detail.ml b/bindings/ocaml/test_detail.ml index 53b31aac..3f0fea0d 100644 --- a/bindings/ocaml/test_detail.ml +++ b/bindings/ocaml/test_detail.ml @@ -31,9 +31,9 @@ let all_tests = [ (CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE, "THUMB", 0); (CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE2, "THUMB-2", 0); (CS_ARCH_ARM64, [CS_MODE_ARM], _ARM64_CODE, "ARM-64", 0); - (CS_ARCH_MIPS, [CS_MODE_32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)", 0); - (CS_ARCH_MIPS, [CS_MODE_64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)", 0); - (CS_ARCH_PPC, [CS_MODE_32; CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64", 0); + (CS_ARCH_MIPS, [CS_MODE_MIPS32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)", 0); + (CS_ARCH_MIPS, [CS_MODE_MIPS64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)", 0); + (CS_ARCH_PPC, [CS_MODE_64; CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64", 0); (CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN], _SPARC_CODE, "Sparc", 0); (CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN; CS_MODE_V9], _SPARCV9_CODE, "SparcV9", 0); (CS_ARCH_SYSZ, [CS_MODE_LITTLE_ENDIAN], _SYSZ_CODE, "SystemZ", 0); diff --git a/bindings/ocaml/test_mips.ml b/bindings/ocaml/test_mips.ml index 241ad8ed..aef940be 100644 --- a/bindings/ocaml/test_mips.ml +++ b/bindings/ocaml/test_mips.ml @@ -18,8 +18,8 @@ let _MIPS_CODE = "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\ let _MIPS_CODE2 = "\x56\x34\x21\x34\xc2\x17\x01\x00";; let all_tests = [ - (CS_ARCH_MIPS, [CS_MODE_32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)"); - (CS_ARCH_MIPS, [CS_MODE_64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)"); + (CS_ARCH_MIPS, [CS_MODE_MIPS32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)"); + (CS_ARCH_MIPS, [CS_MODE_MIPS64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)"); ];; let print_op handle i op =