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ocaml: update Mips modes to CS_MODE_MIPS32 & CS_MODE_MIPS64

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test2
Nguyen Anh Quynh 10 years ago
parent a7b06fda6e
commit ff9a5743d9
5 changed files with 24 additions and 10 deletions
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  1. 8
      bindings/ocaml/capstone.ml
  2. 12
      bindings/ocaml/ocaml.c
  3. 4
      bindings/ocaml/test.ml
  4. 6
      bindings/ocaml/test_detail.ml
  5. 4
      bindings/ocaml/test_mips.ml

8
bindings/ocaml/capstone.ml
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@ -26,9 +26,9 @@ type arch =
type mode =
| CS_MODE_LITTLE_ENDIAN (* little-endian mode (default mode) *)
| CS_MODE_ARM (* ARM mode *)
| CS_MODE_16 (* 16-bit mode (for X86, Mips) *)
| CS_MODE_32 (* 32-bit mode (for X86, Mips) *)
| CS_MODE_64 (* 64-bit mode (for X86, Mips) *)
| CS_MODE_16 (* 16-bit mode (for X86) *)
| CS_MODE_32 (* 32-bit mode (for X86) *)
| CS_MODE_64 (* 64-bit mode (for X86, PPC) *)
| CS_MODE_THUMB (* ARM's Thumb mode, including Thumb-2 *)
| CS_MODE_MCLASS (* ARM's MClass mode *)
| CS_MODE_V8 (* ARMv8 A32 encodings for ARM *)
@ -38,6 +38,8 @@ type mode =
| CS_MODE_MIPSGP64 (* MipsGP64 mode (MIPS architecture) *)
| CS_MODE_V9 (* SparcV9 mode (Sparc architecture) *)
| CS_MODE_BIG_ENDIAN (* big-endian mode *)
| CS_MODE_MIPS32 (* Mips32 mode (for Mips) *)
| CS_MODE_MIPS64 (* Mips64 mode (for Mips) *)
(* Runtime option for the disassembled engine *)

12
bindings/ocaml/ocaml.c
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@ -706,6 +706,12 @@ CAMLprim value ocaml_cs_disasm(value _arch, value _mode, value _code, value _add
case 13:
mode |= CS_MODE_BIG_ENDIAN;
break;
case 14:
mode |= CS_MODE_MIPS32;
break;
case 15:
mode |= CS_MODE_MIPS64;
break;
default:
caml_invalid_argument("Invalid mode");
return Val_emptylist;
@ -831,6 +837,12 @@ CAMLprim value ocaml_open(value _arch, value _mode)
case 13:
mode |= CS_MODE_BIG_ENDIAN;
break;
case 14:
mode |= CS_MODE_MIPS32;
break;
case 15:
mode |= CS_MODE_MIPS64;
break;
default:
caml_invalid_argument("Invalid mode");
return Val_emptylist;

4
bindings/ocaml/test.ml
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@ -31,8 +31,8 @@ let all_tests = [
(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE, "THUMB", 0L);
(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE2, "THUMB-2", 0L);
(CS_ARCH_ARM64, [CS_MODE_ARM], _ARM64_CODE, "ARM-64", 0L);
(CS_ARCH_MIPS, [CS_MODE_32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)", 0L);
(CS_ARCH_MIPS, [CS_MODE_64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)", 0L);
(CS_ARCH_MIPS, [CS_MODE_MIPS32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)", 0L);
(CS_ARCH_MIPS, [CS_MODE_MIPS64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)", 0L);
(CS_ARCH_PPC, [CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64", 0L);
(CS_ARCH_PPC, [CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64, print register with number only", 0L);
(CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN], _SPARC_CODE, "Sparc", 0L);

6
bindings/ocaml/test_detail.ml
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@ -31,9 +31,9 @@ let all_tests = [
(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE, "THUMB", 0);
(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE2, "THUMB-2", 0);
(CS_ARCH_ARM64, [CS_MODE_ARM], _ARM64_CODE, "ARM-64", 0);
(CS_ARCH_MIPS, [CS_MODE_32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)", 0);
(CS_ARCH_MIPS, [CS_MODE_64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)", 0);
(CS_ARCH_PPC, [CS_MODE_32; CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64", 0);
(CS_ARCH_MIPS, [CS_MODE_MIPS32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)", 0);
(CS_ARCH_MIPS, [CS_MODE_MIPS64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)", 0);
(CS_ARCH_PPC, [CS_MODE_64; CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64", 0);
(CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN], _SPARC_CODE, "Sparc", 0);
(CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN; CS_MODE_V9], _SPARCV9_CODE, "SparcV9", 0);
(CS_ARCH_SYSZ, [CS_MODE_LITTLE_ENDIAN], _SYSZ_CODE, "SystemZ", 0);

4
bindings/ocaml/test_mips.ml
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@ -18,8 +18,8 @@ let _MIPS_CODE = "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\
let _MIPS_CODE2 = "\x56\x34\x21\x34\xc2\x17\x01\x00";;
let all_tests = [
(CS_ARCH_MIPS, [CS_MODE_32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)");
(CS_ARCH_MIPS, [CS_MODE_64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)");
(CS_ARCH_MIPS, [CS_MODE_MIPS32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)");
(CS_ARCH_MIPS, [CS_MODE_MIPS64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)");
];;
let print_op handle i op =

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