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Merge branch 'x86' into next

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_v3_old
Nguyen Anh Quynh 11 years ago
parent 07dc0921c2 0ea1251f50
commit d5d06ed736
12 changed files with 246433 additions and 273300 deletions
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  1. 67
      arch/X86/X86DisassemblerDecoder.c
  2. 10
      arch/X86/X86DisassemblerDecoderCommon.h
  3. 11717
      arch/X86/X86GenAsmWriter.inc
  4. 11131
      arch/X86/X86GenAsmWriter1.inc
  5. 84010
      arch/X86/X86GenDisassemblerTables.inc
  6. 8759
      arch/X86/X86GenInstrInfo.inc
  7. 8
      arch/X86/X86GenRegisterInfo.inc
  8. 28
      arch/X86/X86Mapping.c
  9. 95
      bindings/java/capstone/X86_const.java
  10. 95
      bindings/python/capstone/x86_const.py
  11. 10
      docs/README
  12. 1
      include/x86.h

67
arch/X86/X86DisassemblerDecoder.c
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@ -95,14 +95,6 @@ static int modRMRequired(OpcodeType type,
decision = THREEBYTE3A_SYM; decision = THREEBYTE3A_SYM;
indextable = index_x86DisassemblerThreeByte3AOpcodes; indextable = index_x86DisassemblerThreeByte3AOpcodes;
break; break;
case THREEBYTE_A6:
decision = THREEBYTEA6_SYM;
indextable = index_x86DisassemblerThreeByteA6Opcodes;
break;
case THREEBYTE_A7:
decision = THREEBYTEA7_SYM;
indextable = index_x86DisassemblerThreeByteA7Opcodes;
break;
case XOP8_MAP: case XOP8_MAP:
decision = XOP8_MAP_SYM; decision = XOP8_MAP_SYM;
indextable = index_x86DisassemblerXOP8Opcodes; indextable = index_x86DisassemblerXOP8Opcodes;
@ -157,7 +149,7 @@ static InstrUID decode(OpcodeType type,
indextable = index_x86DisassemblerTwoByteOpcodes; indextable = index_x86DisassemblerTwoByteOpcodes;
index = indextable[insnContext]; index = indextable[insnContext];
if (index) if (index)
dec = &TWOBYTE_SYM[indextable[insnContext]].modRMDecisions[opcode]; dec = &TWOBYTE_SYM[index - 1].modRMDecisions[opcode];
else else
dec = &emptyTable.modRMDecisions[opcode]; dec = &emptyTable.modRMDecisions[opcode];
break; break;
@ -165,7 +157,7 @@ static InstrUID decode(OpcodeType type,
indextable = index_x86DisassemblerThreeByte38Opcodes; indextable = index_x86DisassemblerThreeByte38Opcodes;
index = indextable[insnContext]; index = indextable[insnContext];
if (index) if (index)
dec = &THREEBYTE38_SYM[indextable[insnContext]].modRMDecisions[opcode]; dec = &THREEBYTE38_SYM[index - 1].modRMDecisions[opcode];
else else
dec = &emptyTable.modRMDecisions[opcode]; dec = &emptyTable.modRMDecisions[opcode];
break; break;
@ -173,23 +165,7 @@ static InstrUID decode(OpcodeType type,
indextable = index_x86DisassemblerThreeByte3AOpcodes; indextable = index_x86DisassemblerThreeByte3AOpcodes;
index = indextable[insnContext]; index = indextable[insnContext];
if (index) if (index)
dec = &THREEBYTE3A_SYM[indextable[insnContext]].modRMDecisions[opcode]; dec = &THREEBYTE3A_SYM[index - 1].modRMDecisions[opcode];
else
dec = &emptyTable.modRMDecisions[opcode];
break;
case THREEBYTE_A6:
indextable = index_x86DisassemblerThreeByteA6Opcodes;
index = indextable[insnContext];
if (index)
dec = &THREEBYTEA6_SYM[indextable[insnContext]].modRMDecisions[opcode];
else
dec = &emptyTable.modRMDecisions[opcode];
break;
case THREEBYTE_A7:
indextable = index_x86DisassemblerThreeByteA7Opcodes;
index = indextable[insnContext];
if (index)
dec = &THREEBYTEA7_SYM[indextable[insnContext]].modRMDecisions[opcode];
else else
dec = &emptyTable.modRMDecisions[opcode]; dec = &emptyTable.modRMDecisions[opcode];
break; break;
@ -197,7 +173,7 @@ static InstrUID decode(OpcodeType type,
indextable = index_x86DisassemblerXOP8Opcodes; indextable = index_x86DisassemblerXOP8Opcodes;
index = indextable[insnContext]; index = indextable[insnContext];
if (index) if (index)
dec = &XOP8_MAP_SYM[indextable[insnContext]].modRMDecisions[opcode]; dec = &XOP8_MAP_SYM[index - 1].modRMDecisions[opcode];
else else
dec = &emptyTable.modRMDecisions[opcode]; dec = &emptyTable.modRMDecisions[opcode];
break; break;
@ -205,7 +181,7 @@ static InstrUID decode(OpcodeType type,
indextable = index_x86DisassemblerXOP9Opcodes; indextable = index_x86DisassemblerXOP9Opcodes;
index = indextable[insnContext]; index = indextable[insnContext];
if (index) if (index)
dec = &XOP9_MAP_SYM[indextable[insnContext]].modRMDecisions[opcode]; dec = &XOP9_MAP_SYM[index - 1].modRMDecisions[opcode];
else else
dec = &emptyTable.modRMDecisions[opcode]; dec = &emptyTable.modRMDecisions[opcode];
break; break;
@ -213,7 +189,7 @@ static InstrUID decode(OpcodeType type,
indextable = index_x86DisassemblerXOPAOpcodes; indextable = index_x86DisassemblerXOPAOpcodes;
index = indextable[insnContext]; index = indextable[insnContext];
if (index) if (index)
dec = &XOPA_MAP_SYM[indextable[insnContext]].modRMDecisions[opcode]; dec = &XOPA_MAP_SYM[index - 1].modRMDecisions[opcode];
else else
dec = &emptyTable.modRMDecisions[opcode]; dec = &emptyTable.modRMDecisions[opcode];
break; break;
@ -718,6 +694,11 @@ static int readPrefixes(struct InternalInstruction* insn)
insn->addressSize = (hasAdSize ? 4 : 8); insn->addressSize = (hasAdSize ? 4 : 8);
insn->displacementSize = 4; insn->displacementSize = 4;
insn->immediateSize = 4; insn->immediateSize = 4;
} else if (insn->rexPrefix) {
insn->registerSize = (hasOpSize ? 2 : 4);
insn->addressSize = (hasAdSize ? 4 : 8);
insn->displacementSize = (hasOpSize ? 2 : 4);
insn->immediateSize = (hasOpSize ? 2 : 4);
} else { } else {
insn->registerSize = (hasOpSize ? 2 : 4); insn->registerSize = (hasOpSize ? 2 : 4);
insn->addressSize = (hasAdSize ? 4 : 8); insn->addressSize = (hasAdSize ? 4 : 8);
@ -837,24 +818,6 @@ static int readOpcode(struct InternalInstruction* insn)
return -1; return -1;
insn->opcodeType = THREEBYTE_3A; insn->opcodeType = THREEBYTE_3A;
} else if (current == 0xa6) {
// dbgprintf(insn, "Found a three-byte escape prefix (0x%hhx)", current);
insn->threeByteEscape = current;
if (consumeByte(insn, &current))
return -1;
insn->opcodeType = THREEBYTE_A6;
} else if (current == 0xa7) {
// dbgprintf(insn, "Found a three-byte escape prefix (0x%hhx)", current);
insn->threeByteEscape = current;
if (consumeByte(insn, &current))
return -1;
insn->opcodeType = THREEBYTE_A7;
} else { } else {
// dbgprintf(insn, "Didn't find a three-byte escape prefix"); // dbgprintf(insn, "Didn't find a three-byte escape prefix");
@ -1246,6 +1209,7 @@ static int readSIB(struct InternalInstruction* insn)
switch (base) { switch (base) {
case 0x5: case 0x5:
case 0xd:
switch (modFromModRM(insn->modRM)) { switch (modFromModRM(insn->modRM)) {
case 0x0: case 0x0:
insn->eaDisplacement = EA_DISP_32; insn->eaDisplacement = EA_DISP_32;
@ -1253,13 +1217,11 @@ static int readSIB(struct InternalInstruction* insn)
break; break;
case 0x1: case 0x1:
insn->eaDisplacement = EA_DISP_8; insn->eaDisplacement = EA_DISP_8;
insn->sibBase = (insn->addressSize == 4 ? insn->sibBase = (SIBBase)(sibBaseBase + base);
SIB_BASE_EBP : SIB_BASE_RBP);
break; break;
case 0x2: case 0x2:
insn->eaDisplacement = EA_DISP_32; insn->eaDisplacement = EA_DISP_32;
insn->sibBase = (insn->addressSize == 4 ? insn->sibBase = (SIBBase)(sibBaseBase + base);
SIB_BASE_EBP : SIB_BASE_RBP);
break; break;
case 0x3: case 0x3:
debug("Cannot have Mod = 0b11 and a SIB byte"); debug("Cannot have Mod = 0b11 and a SIB byte");
@ -1436,6 +1398,7 @@ static int readModRM(struct InternalInstruction* insn)
insn->eaBase = (EABase)(insn->eaBaseBase + rm); insn->eaBase = (EABase)(insn->eaBaseBase + rm);
break; break;
} }
break; break;
case 0x1: case 0x1:
insn->displacementSize = 1; insn->displacementSize = 1;

10
arch/X86/X86DisassemblerDecoderCommon.h
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@ -33,8 +33,6 @@
#define TWOBYTE_SYM x86DisassemblerTwoByteOpcodes #define TWOBYTE_SYM x86DisassemblerTwoByteOpcodes
#define THREEBYTE38_SYM x86DisassemblerThreeByte38Opcodes #define THREEBYTE38_SYM x86DisassemblerThreeByte38Opcodes
#define THREEBYTE3A_SYM x86DisassemblerThreeByte3AOpcodes #define THREEBYTE3A_SYM x86DisassemblerThreeByte3AOpcodes
#define THREEBYTEA6_SYM x86DisassemblerThreeByteA6Opcodes
#define THREEBYTEA7_SYM x86DisassemblerThreeByteA7Opcodes
#define XOP8_MAP_SYM x86DisassemblerXOP8Opcodes #define XOP8_MAP_SYM x86DisassemblerXOP8Opcodes
#define XOP9_MAP_SYM x86DisassemblerXOP9Opcodes #define XOP9_MAP_SYM x86DisassemblerXOP9Opcodes
#define XOPA_MAP_SYM x86DisassemblerXOPAOpcodes #define XOPA_MAP_SYM x86DisassemblerXOPAOpcodes
@ -284,11 +282,9 @@ typedef enum {
TWOBYTE = 1, TWOBYTE = 1,
THREEBYTE_38 = 2, THREEBYTE_38 = 2,
THREEBYTE_3A = 3, THREEBYTE_3A = 3,
THREEBYTE_A6 = 4, XOP8_MAP = 4,
THREEBYTE_A7 = 5, XOP9_MAP = 5,
XOP8_MAP = 6, XOPA_MAP = 6
XOP9_MAP = 7,
XOPA_MAP = 8
} OpcodeType; } OpcodeType;
/* /*

11717
arch/X86/X86GenAsmWriter.inc
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11131
arch/X86/X86GenAsmWriter1.inc
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84010
arch/X86/X86GenDisassemblerTables.inc
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8759
arch/X86/X86GenInstrInfo.inc
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8
arch/X86/X86GenRegisterInfo.inc
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@ -256,10 +256,10 @@ enum {
X86_VK1WMRegClassID = 1, X86_VK1WMRegClassID = 1,
X86_GR8RegClassID = 2, X86_GR8RegClassID = 2,
X86_GR8_NOREXRegClassID = 3, X86_GR8_NOREXRegClassID = 3,
X86_VK8RegClassID = 4, X86_GR8_ABCD_HRegClassID = 4,
X86_VK8WMRegClassID = 5, X86_GR8_ABCD_LRegClassID = 5,
X86_GR8_ABCD_HRegClassID = 6, X86_VK8RegClassID = 6,
X86_GR8_ABCD_LRegClassID = 7, X86_VK8WMRegClassID = 7,
X86_GR16RegClassID = 8, X86_GR16RegClassID = 8,
X86_GR16_NOREXRegClassID = 9, X86_GR16_NOREXRegClassID = 9,
X86_VK16RegClassID = 10, X86_VK16RegClassID = 10,

28
arch/X86/X86Mapping.c
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@ -1554,7 +1554,6 @@ static name_map insn_name_maps[] = {
{ X86_INS_VSHUFPD, "vshufpd" }, { X86_INS_VSHUFPD, "vshufpd" },
{ X86_INS_VSHUFPS, "vshufps" }, { X86_INS_VSHUFPS, "vshufps" },
{ X86_INS_VSQRTPD, "vsqrtpd" }, { X86_INS_VSQRTPD, "vsqrtpd" },
{ X86_INS_VSQRT, "vsqrt" },
{ X86_INS_VSQRTPS, "vsqrtps" }, { X86_INS_VSQRTPS, "vsqrtps" },
{ X86_INS_VSQRTSD, "vsqrtsd" }, { X86_INS_VSQRTSD, "vsqrtsd" },
{ X86_INS_VSQRTSS, "vsqrtss" }, { X86_INS_VSQRTSS, "vsqrtss" },
@ -9732,6 +9731,12 @@ static insn_map insns[] = {
X86_MOV16ri, X86_INS_MOV, X86_MOV16ri, X86_INS_MOV,
#ifndef CAPSTONE_DIET #ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0 { 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
X86_MOV16ri_alt, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif #endif
}, },
{ {
@ -9840,6 +9845,12 @@ static insn_map insns[] = {
X86_MOV32ri, X86_INS_MOV, X86_MOV32ri, X86_INS_MOV,
#ifndef CAPSTONE_DIET #ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0 { 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
X86_MOV32ri_alt, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif #endif
}, },
{ {
@ -10074,6 +10085,12 @@ static insn_map insns[] = {
X86_MOV8ri, X86_INS_MOV, X86_MOV8ri, X86_INS_MOV,
#ifndef CAPSTONE_DIET #ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0 { 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
X86_MOV8ri_alt, X86_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif #endif
}, },
{ {
@ -30585,13 +30602,13 @@ static insn_map insns[] = {
#endif #endif
}, },
{ {
X86_VSQRTPDZrm, X86_INS_VSQRT, X86_VSQRTPDZrm, X86_INS_VSQRTPD,
#ifndef CAPSTONE_DIET #ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
#endif #endif
}, },
{ {
X86_VSQRTPDZrr, X86_INS_VSQRT, X86_VSQRTPDZrr, X86_INS_VSQRTPD,
#ifndef CAPSTONE_DIET #ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
#endif #endif
@ -30633,13 +30650,13 @@ static insn_map insns[] = {
#endif #endif
}, },
{ {
X86_VSQRTPSZrm, X86_INS_VSQRT, X86_VSQRTPSZrm, X86_INS_VSQRTPS,
#ifndef CAPSTONE_DIET #ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
#endif #endif
}, },
{ {
X86_VSQRTPSZrr, X86_INS_VSQRT, X86_VSQRTPSZrr, X86_INS_VSQRTPS,
#ifndef CAPSTONE_DIET #ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0 { 0 }, { 0 }, { X86_GRP_AVX512, 0 }, 0, 0
#endif #endif
@ -31933,6 +31950,7 @@ static struct insn_reg {
{ X86_IN32ri, X86_REG_EAX }, { X86_IN32ri, X86_REG_EAX },
}; };
// return register of given instruction id // return register of given instruction id
// return 0 if not found // return 0 if not found
// this is to handle instructions embedding accumulate registers into AsmStrs[] // this is to handle instructions embedding accumulate registers into AsmStrs[]

95
bindings/java/capstone/X86_const.java
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@ -1462,54 +1462,53 @@ public class X86_const {
public static final int X86_INS_VSHUFPD = 1209; public static final int X86_INS_VSHUFPD = 1209;
public static final int X86_INS_VSHUFPS = 1210; public static final int X86_INS_VSHUFPS = 1210;
public static final int X86_INS_VSQRTPD = 1211; public static final int X86_INS_VSQRTPD = 1211;
public static final int X86_INS_VSQRT = 1212; public static final int X86_INS_VSQRTPS = 1212;
public static final int X86_INS_VSQRTPS = 1213; public static final int X86_INS_VSQRTSD = 1213;
public static final int X86_INS_VSQRTSD = 1214; public static final int X86_INS_VSQRTSS = 1214;
public static final int X86_INS_VSQRTSS = 1215; public static final int X86_INS_VSTMXCSR = 1215;
public static final int X86_INS_VSTMXCSR = 1216; public static final int X86_INS_VSUBPD = 1216;
public static final int X86_INS_VSUBPD = 1217; public static final int X86_INS_VSUBPS = 1217;
public static final int X86_INS_VSUBPS = 1218; public static final int X86_INS_VSUBSD = 1218;
public static final int X86_INS_VSUBSD = 1219; public static final int X86_INS_VSUBSS = 1219;
public static final int X86_INS_VSUBSS = 1220; public static final int X86_INS_VTESTPD = 1220;
public static final int X86_INS_VTESTPD = 1221; public static final int X86_INS_VTESTPS = 1221;
public static final int X86_INS_VTESTPS = 1222; public static final int X86_INS_VUNPCKHPD = 1222;
public static final int X86_INS_VUNPCKHPD = 1223; public static final int X86_INS_VUNPCKHPS = 1223;
public static final int X86_INS_VUNPCKHPS = 1224; public static final int X86_INS_VUNPCKLPD = 1224;
public static final int X86_INS_VUNPCKLPD = 1225; public static final int X86_INS_VUNPCKLPS = 1225;
public static final int X86_INS_VUNPCKLPS = 1226; public static final int X86_INS_VZEROALL = 1226;
public static final int X86_INS_VZEROALL = 1227; public static final int X86_INS_VZEROUPPER = 1227;
public static final int X86_INS_VZEROUPPER = 1228; public static final int X86_INS_WAIT = 1228;
public static final int X86_INS_WAIT = 1229; public static final int X86_INS_WBINVD = 1229;
public static final int X86_INS_WBINVD = 1230; public static final int X86_INS_WRFSBASE = 1230;
public static final int X86_INS_WRFSBASE = 1231; public static final int X86_INS_WRGSBASE = 1231;
public static final int X86_INS_WRGSBASE = 1232; public static final int X86_INS_WRMSR = 1232;
public static final int X86_INS_WRMSR = 1233; public static final int X86_INS_XABORT = 1233;
public static final int X86_INS_XABORT = 1234; public static final int X86_INS_XACQUIRE = 1234;
public static final int X86_INS_XACQUIRE = 1235; public static final int X86_INS_XBEGIN = 1235;
public static final int X86_INS_XBEGIN = 1236; public static final int X86_INS_XCHG = 1236;
public static final int X86_INS_XCHG = 1237; public static final int X86_INS_FXCH = 1237;
public static final int X86_INS_FXCH = 1238; public static final int X86_INS_XCRYPTCBC = 1238;
public static final int X86_INS_XCRYPTCBC = 1239; public static final int X86_INS_XCRYPTCFB = 1239;
public static final int X86_INS_XCRYPTCFB = 1240; public static final int X86_INS_XCRYPTCTR = 1240;
public static final int X86_INS_XCRYPTCTR = 1241; public static final int X86_INS_XCRYPTECB = 1241;
public static final int X86_INS_XCRYPTECB = 1242; public static final int X86_INS_XCRYPTOFB = 1242;
public static final int X86_INS_XCRYPTOFB = 1243; public static final int X86_INS_XEND = 1243;
public static final int X86_INS_XEND = 1244; public static final int X86_INS_XGETBV = 1244;
public static final int X86_INS_XGETBV = 1245; public static final int X86_INS_XLATB = 1245;
public static final int X86_INS_XLATB = 1246; public static final int X86_INS_XRELEASE = 1246;
public static final int X86_INS_XRELEASE = 1247; public static final int X86_INS_XRSTOR = 1247;
public static final int X86_INS_XRSTOR = 1248; public static final int X86_INS_XRSTOR64 = 1248;
public static final int X86_INS_XRSTOR64 = 1249; public static final int X86_INS_XSAVE = 1249;
public static final int X86_INS_XSAVE = 1250; public static final int X86_INS_XSAVE64 = 1250;
public static final int X86_INS_XSAVE64 = 1251; public static final int X86_INS_XSAVEOPT = 1251;
public static final int X86_INS_XSAVEOPT = 1252; public static final int X86_INS_XSAVEOPT64 = 1252;
public static final int X86_INS_XSAVEOPT64 = 1253; public static final int X86_INS_XSETBV = 1253;
public static final int X86_INS_XSETBV = 1254; public static final int X86_INS_XSHA1 = 1254;
public static final int X86_INS_XSHA1 = 1255; public static final int X86_INS_XSHA256 = 1255;
public static final int X86_INS_XSHA256 = 1256; public static final int X86_INS_XSTORE = 1256;
public static final int X86_INS_XSTORE = 1257; public static final int X86_INS_XTEST = 1257;
public static final int X86_INS_XTEST = 1258; public static final int X86_INS_MAX = 1258;
public static final int X86_INS_MAX = 1259;
// Group of X86 instructions // Group of X86 instructions

95
bindings/python/capstone/x86_const.py
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@ -1459,54 +1459,53 @@ X86_INS_VSCATTERQPS = 1208
X86_INS_VSHUFPD = 1209 X86_INS_VSHUFPD = 1209
X86_INS_VSHUFPS = 1210 X86_INS_VSHUFPS = 1210
X86_INS_VSQRTPD = 1211 X86_INS_VSQRTPD = 1211
X86_INS_VSQRT = 1212 X86_INS_VSQRTPS = 1212
X86_INS_VSQRTPS = 1213 X86_INS_VSQRTSD = 1213
X86_INS_VSQRTSD = 1214 X86_INS_VSQRTSS = 1214
X86_INS_VSQRTSS = 1215 X86_INS_VSTMXCSR = 1215
X86_INS_VSTMXCSR = 1216 X86_INS_VSUBPD = 1216
X86_INS_VSUBPD = 1217 X86_INS_VSUBPS = 1217
X86_INS_VSUBPS = 1218 X86_INS_VSUBSD = 1218
X86_INS_VSUBSD = 1219 X86_INS_VSUBSS = 1219
X86_INS_VSUBSS = 1220 X86_INS_VTESTPD = 1220
X86_INS_VTESTPD = 1221 X86_INS_VTESTPS = 1221
X86_INS_VTESTPS = 1222 X86_INS_VUNPCKHPD = 1222
X86_INS_VUNPCKHPD = 1223 X86_INS_VUNPCKHPS = 1223
X86_INS_VUNPCKHPS = 1224 X86_INS_VUNPCKLPD = 1224
X86_INS_VUNPCKLPD = 1225 X86_INS_VUNPCKLPS = 1225
X86_INS_VUNPCKLPS = 1226 X86_INS_VZEROALL = 1226
X86_INS_VZEROALL = 1227 X86_INS_VZEROUPPER = 1227
X86_INS_VZEROUPPER = 1228 X86_INS_WAIT = 1228
X86_INS_WAIT = 1229 X86_INS_WBINVD = 1229
X86_INS_WBINVD = 1230 X86_INS_WRFSBASE = 1230
X86_INS_WRFSBASE = 1231 X86_INS_WRGSBASE = 1231
X86_INS_WRGSBASE = 1232 X86_INS_WRMSR = 1232
X86_INS_WRMSR = 1233 X86_INS_XABORT = 1233
X86_INS_XABORT = 1234 X86_INS_XACQUIRE = 1234
X86_INS_XACQUIRE = 1235 X86_INS_XBEGIN = 1235
X86_INS_XBEGIN = 1236 X86_INS_XCHG = 1236
X86_INS_XCHG = 1237 X86_INS_FXCH = 1237
X86_INS_FXCH = 1238 X86_INS_XCRYPTCBC = 1238
X86_INS_XCRYPTCBC = 1239 X86_INS_XCRYPTCFB = 1239
X86_INS_XCRYPTCFB = 1240 X86_INS_XCRYPTCTR = 1240
X86_INS_XCRYPTCTR = 1241 X86_INS_XCRYPTECB = 1241
X86_INS_XCRYPTECB = 1242 X86_INS_XCRYPTOFB = 1242
X86_INS_XCRYPTOFB = 1243 X86_INS_XEND = 1243
X86_INS_XEND = 1244 X86_INS_XGETBV = 1244
X86_INS_XGETBV = 1245 X86_INS_XLATB = 1245
X86_INS_XLATB = 1246 X86_INS_XRELEASE = 1246
X86_INS_XRELEASE = 1247 X86_INS_XRSTOR = 1247
X86_INS_XRSTOR = 1248 X86_INS_XRSTOR64 = 1248
X86_INS_XRSTOR64 = 1249 X86_INS_XSAVE = 1249
X86_INS_XSAVE = 1250 X86_INS_XSAVE64 = 1250
X86_INS_XSAVE64 = 1251 X86_INS_XSAVEOPT = 1251
X86_INS_XSAVEOPT = 1252 X86_INS_XSAVEOPT64 = 1252
X86_INS_XSAVEOPT64 = 1253 X86_INS_XSETBV = 1253
X86_INS_XSETBV = 1254 X86_INS_XSHA1 = 1254
X86_INS_XSHA1 = 1255 X86_INS_XSHA256 = 1255
X86_INS_XSHA256 = 1256 X86_INS_XSTORE = 1256
X86_INS_XSTORE = 1257 X86_INS_XTEST = 1257
X86_INS_XTEST = 1258 X86_INS_MAX = 1258
X86_INS_MAX = 1259
# Group of X86 instructions # Group of X86 instructions

10
docs/README
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@ -4,23 +4,23 @@ Documention of Capstone disassembly framework.
http://capstone-engine.org/documentation.html http://capstone-engine.org/documentation.html
* Programming with C language, see: * Programming with C language.
http://capstone-engine.org/lang_c.html http://capstone-engine.org/lang_c.html
* Programming with Python language, see: * Programming with Python language.
http://capstone-engine.org/lang_python.html http://capstone-engine.org/lang_python.html
* Programming with Java language, see: * Programming with Java language.
http://capstone-engine.org/lang_java.html http://capstone-engine.org/lang_java.html
* Build compact engine with only selected architectures, see: * Build compact engine with only selected architectures.
http://capstone-engine.org/compile.html http://capstone-engine.org/compile.html
* Build "diet" engine for even smaller libraries, see: * Build "diet" engine for even smaller libraries.
http://capstone-engine.org/diet.html http://capstone-engine.org/diet.html

1
include/x86.h
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@ -1363,7 +1363,6 @@ typedef enum x86_insn {
X86_INS_VSHUFPD, X86_INS_VSHUFPD,
X86_INS_VSHUFPS, X86_INS_VSHUFPS,
X86_INS_VSQRTPD, X86_INS_VSQRTPD,
X86_INS_VSQRT,
X86_INS_VSQRTPS, X86_INS_VSQRTPS,
X86_INS_VSQRTSD, X86_INS_VSQRTSD,
X86_INS_VSQRTSS, X86_INS_VSQRTSS,

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