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@ -22692,11 +22692,11 @@ static insn_op insn_ops[] = { |
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}, |
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{ /* ARM_tADDrSP, ARM_INS_ADD: add${p} $rdn, $sp, $rn */ |
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0, |
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{ CS_OP_WRITE, CS_OP_NOREG, CS_OP_READ, 0 } |
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{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 } |
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}, |
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{ /* ARM_tADDrSPi, ARM_INS_ADD: add${p} $dst, $sp, $imm */ |
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0, |
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{ 0 } |
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{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 } |
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}, |
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{ /* ARM_tADDrr, ARM_INS_ADD: add${s}${p} $rd, $rn, $rm */ |
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0, |
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@ -22704,11 +22704,11 @@ static insn_op insn_ops[] = { |
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}, |
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{ /* ARM_tADDspi, ARM_INS_ADD: add${p} $rdn, $imm */ |
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0, |
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{ 0 } |
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{ CS_OP_WRITE, 0 } |
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}, |
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{ /* ARM_tADDspr, ARM_INS_ADD: add${p} $rdn, $rm */ |
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0, |
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{ CS_OP_NOREG, CS_OP_READ, 0 } |
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{ CS_OP_WRITE, CS_OP_READ, 0 } |
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}, |
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{ /* ARM_tADR, ARM_INS_ADR: adr{$p} $rd, $addr */ |
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0, |
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@ -22964,7 +22964,7 @@ static insn_op insn_ops[] = { |
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}, |
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{ /* ARM_tSUBspi, ARM_INS_SUB: sub${p} $rdn, $imm */ |
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0, |
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{ 0 } |
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{ CS_OP_WRITE, 0 } |
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}, |
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{ /* ARM_tSVC, ARM_INS_SVC: svc${p} $imm */ |
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0, |
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