|
|
|
@ -1083,6 +1083,14 @@ static void printAddrMode5Operand(MCInst *MI, unsigned OpNum, SStream *O, |
|
|
|
|
SStream_concat(O, "%s[", markup("<mem:")); |
|
|
|
|
printRegName(MI->csh, O, MCOperand_getReg(MO1)); |
|
|
|
|
|
|
|
|
|
if (MI->csh->detail) { |
|
|
|
|
MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].type = ARM_OP_MEM; |
|
|
|
|
MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.base = MCOperand_getReg(MO1); |
|
|
|
|
MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.index = ARM_REG_INVALID; |
|
|
|
|
MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.scale = 1; |
|
|
|
|
MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.disp = 0; |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
ImmOffs = ARM_AM_getAM5Offset((unsigned int)MCOperand_getImm(MO2)); |
|
|
|
|
Op = ARM_AM_getAM5Op((unsigned int)MCOperand_getImm(MO2)); |
|
|
|
|
if (AlwaysPrintImm0 || ImmOffs || Op == ARM_AM_sub) { |
|
|
|
@ -1094,8 +1102,13 @@ static void printAddrMode5Operand(MCInst *MI, unsigned OpNum, SStream *O, |
|
|
|
|
SStream_concat(O, ", %s#%s%u%s", markup("<imm:"), |
|
|
|
|
ARM_AM_getAddrOpcStr(ARM_AM_getAM5Op((unsigned int)MCOperand_getImm(MO2))), |
|
|
|
|
ImmOffs * 4, markup(">")); |
|
|
|
|
MI->flat_insn.arm.operands[MI->flat_insn.arm.op_count].mem.disp = ImmOffs * 4; |
|
|
|
|
} |
|
|
|
|
SStream_concat(O, "]%s", markup(">")); |
|
|
|
|
|
|
|
|
|
if (MI->csh->detail) { |
|
|
|
|
MI->flat_insn.arm.op_count++; |
|
|
|
|
} |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
static void printAddrMode6Operand(MCInst *MI, unsigned OpNum, SStream *O) |
|
|
|
|