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more more fixes on C coding style

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_v3_old
Nguyen Anh Quynh 11 years ago
parent aa078a1c4a
commit a82a0890a6
9 changed files with 61 additions and 53 deletions
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  1. 2
      arch/ARM/ARMModule.c
  2. 10
      arch/Mips/MipsDisassembler.c
  3. 2
      arch/Mips/MipsModule.c
  4. 16
      arch/PowerPC/PPCInstPrinter.c
  5. 2
      arch/PowerPC/PPCModule.c
  6. 22
      arch/X86/X86Disassembler.c
  7. 2
      arch/X86/X86DisassemblerDecoder.c
  8. 9
      arch/X86/X86Mapping.c
  9. 49
      cs.c

2
arch/ARM/ARMModule.c
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@ -9,7 +9,7 @@
static cs_err init(cs_struct *ud)
{
MCRegisterInfo *mri;
MCRegisterInfo *mri;
// verify if requested mode is valid
if (ud->mode & ~(CS_MODE_LITTLE_ENDIAN | CS_MODE_ARM |

10
arch/Mips/MipsDisassembler.c
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@ -193,7 +193,7 @@ static uint64_t getFeatureBits(int mode)
void Mips_init(MCRegisterInfo *MRI)
{
// InitMCRegisterInfo(MipsRegDesc, 317,
// InitMCRegisterInfo(MipsRegDesc, 317,
// RA, PC,
// MipsMCRegisterClasses, 34,
// MipsRegUnitRoots, 196,
@ -249,7 +249,7 @@ static DecodeStatus MipsDisassembler_getInstruction(int mode, MCInst *instr,
uint64_t Address, bool isBigEndian, MCRegisterInfo *MRI)
{
uint32_t Insn;
DecodeStatus Result;
DecodeStatus Result;
if (code_len < 4)
// not enough data
@ -716,9 +716,9 @@ static DecodeStatus DecodeSimm16(MCInst *Inst,
static DecodeStatus DecodeLSAImm(MCInst *Inst,
unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder)
{
// We add one to the immediate field as it was encoded as 'imm - 1'.
MCInst_addOperand(Inst, MCOperand_CreateImm(Insn + 1));
return MCDisassembler_Success;
// We add one to the immediate field as it was encoded as 'imm - 1'.
MCInst_addOperand(Inst, MCOperand_CreateImm(Insn + 1));
return MCDisassembler_Success;
}
static DecodeStatus DecodeInsSize(MCInst *Inst,

2
arch/Mips/MipsModule.c
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@ -11,7 +11,7 @@ void enable_mips() {};
static cs_err init(cs_struct *ud)
{
MCRegisterInfo *mri;
MCRegisterInfo *mri;
// verify if requested mode is valid
if (ud->mode & ~(CS_MODE_LITTLE_ENDIAN | CS_MODE_32 | CS_MODE_64 |

16
arch/PowerPC/PPCInstPrinter.c
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@ -370,11 +370,11 @@ static void printU16ImmOperand(MCInst *MI, unsigned OpNo, SStream *O)
static void printBranchOperand(MCInst *MI, unsigned OpNo, SStream *O)
{
if (!MCOperand_isImm(MCInst_getOperand(MI, OpNo)))
{
if (!MCOperand_isImm(MCInst_getOperand(MI, OpNo)))
{
printOperand(MI, OpNo, O);
return;
}
return;
}
// Branches can take an immediate operand. This is used by the branch
// selection pass to print .+8, an eight byte displacement from the PC.
@ -384,11 +384,11 @@ static void printBranchOperand(MCInst *MI, unsigned OpNo, SStream *O)
static void printAbsBranchOperand(MCInst *MI, unsigned OpNo, SStream *O)
{
if (!MCOperand_isImm(MCInst_getOperand(MI, OpNo)))
{
if (!MCOperand_isImm(MCInst_getOperand(MI, OpNo)))
{
printOperand(MI, OpNo, O);
return;
}
return;
}
int tmp = (int)MCOperand_getImm(MCInst_getOperand(MI, OpNo)) * 4;
if (tmp >= 0) {

2
arch/PowerPC/PPCModule.c
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@ -11,7 +11,7 @@ void enable_powerpc() {};
static cs_err init(cs_struct *ud)
{
MCRegisterInfo *mri;
MCRegisterInfo *mri;
// verify if requested mode is valid
if (ud->mode & ~(CS_MODE_LITTLE_ENDIAN | CS_MODE_32 | CS_MODE_64 |

22
arch/X86/X86Disassembler.c
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@ -67,7 +67,7 @@ static void translateRegister(MCInst *mcInst, Reg reg)
#define ENTRY(x) X86_##x,
uint8_t llvmRegnums[] = {
ALL_REGS
0
0
};
#undef ENTRY
@ -149,10 +149,10 @@ static void translateImmediate(MCInst *mcInst, uint64_t immediate,
MCInst_addOperand(mcInst, MCOperand_CreateReg(X86_XMM0 + ((uint32_t)immediate >> 4)));
return;
case TYPE_XMM256:
MCInst_addOperand(mcInst, MCOperand_CreateReg(X86_YMM0 + ((uint32_t)immediate >> 4)));
MCInst_addOperand(mcInst, MCOperand_CreateReg(X86_YMM0 + ((uint32_t)immediate >> 4)));
return;
case TYPE_XMM512:
MCInst_addOperand(mcInst, MCOperand_CreateReg(X86_ZMM0 + ((uint32_t)immediate >> 4)));
MCInst_addOperand(mcInst, MCOperand_CreateReg(X86_ZMM0 + ((uint32_t)immediate >> 4)));
return;
case TYPE_REL8:
if(immediate & 0x80)
@ -196,7 +196,7 @@ static bool translateRMRegister(MCInst *mcInst, InternalInstruction *insn)
return true;
#define ENTRY(x) \
case EA_REG_##x: \
MCInst_addOperand(mcInst, MCOperand_CreateReg(X86_##x)); break;
MCInst_addOperand(mcInst, MCOperand_CreateReg(X86_##x)); break;
ALL_REGS
#undef ENTRY
default:
@ -240,7 +240,7 @@ static bool translateRMMemory(MCInst *mcInst, InternalInstruction *insn)
switch (insn->sibBase) {
#define ENTRY(x) \
case SIB_BASE_##x: \
baseReg = MCOperand_CreateReg(X86_##x); break;
baseReg = MCOperand_CreateReg(X86_##x); break;
ALL_SIB_BASES
#undef ENTRY
default:
@ -288,12 +288,12 @@ static bool translateRMMemory(MCInst *mcInst, InternalInstruction *insn)
return true;
#define ENTRY(x) \
case SIB_INDEX_##x: \
indexReg = MCOperand_CreateReg(X86_##x); break;
indexReg = MCOperand_CreateReg(X86_##x); break;
EA_BASES_32BIT
EA_BASES_64BIT
REGS_XMM
REGS_YMM
REGS_ZMM
EA_BASES_64BIT
REGS_XMM
REGS_YMM
REGS_ZMM
#undef ENTRY
}
} else {
@ -343,7 +343,7 @@ static bool translateRMMemory(MCInst *mcInst, InternalInstruction *insn)
// placeholders to keep the compiler happy.
#define ENTRY(x) \
case EA_BASE_##x: \
baseReg = MCOperand_CreateReg(X86_##x); break;
baseReg = MCOperand_CreateReg(X86_##x); break;
ALL_EA_BASES
#undef ENTRY
#define ENTRY(x) case EA_REG_##x:

2
arch/X86/X86DisassemblerDecoder.c
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@ -1157,7 +1157,7 @@ static int readDisplacement(struct InternalInstruction* insn)
return 0;
insn->consumedDisplacement = TRUE;
insn->displacementOffset = (uint8_t)(insn->readerCursor - insn->startLocation);
insn->displacementOffset = (uint8_t)(insn->readerCursor - insn->startLocation);
switch (insn->eaDisplacement) {
case EA_DISP_NONE:

9
arch/X86/X86Mapping.c
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@ -6625,10 +6625,10 @@ void X86_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
insn->detail->regs_read_count = (uint8_t)count_positive(insns[i].regs_use);
memcpy(insn->detail->regs_write, insns[i].regs_mod, sizeof(insns[i].regs_mod));
insn->detail->regs_write_count = (uint8_t)count_positive(insns[i].regs_mod);
insn->detail->regs_write_count = (uint8_t)count_positive(insns[i].regs_mod);
memcpy(insn->detail->groups, insns[i].groups, sizeof(insns[i].groups));
insn->detail->groups_count = (uint8_t)count_positive(insns[i].groups);
insn->detail->groups_count = (uint8_t)count_positive(insns[i].groups);
if (insns[i].branch || insns[i].indirect_branch) {
// this insn also belongs to JUMP group. add JUMP group
@ -6651,7 +6651,7 @@ bool X86_insn_check_combine(cs_struct *h, cs_insn *insn)
{
// is this a prefix instruction?
if (insn->id == X86_INS_LOCK || insn->id == X86_INS_REP ||
insn->id == X86_INS_REPNE) {
insn->id == X86_INS_REPNE) {
// then save this as prev_prefix
h->prev_prefix = (uint8_t)insn->id;
return false;
@ -6662,7 +6662,8 @@ bool X86_insn_check_combine(cs_struct *h, cs_insn *insn)
return true;
}
// cannot combine this with a prefix
// neither prefix instruction nor having previous instruction as prefix,
// so we cannot combine this with a prefix
return false;
}

49
cs.c
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@ -10,6 +10,8 @@
#include "utils.h"
#include "MCRegisterInfo.h"
#define INSN_CACHE_SIZE 64
cs_err (*arch_init[MAX_ARCH])(cs_struct *) = { NULL };
cs_err (*arch_option[MAX_ARCH]) (cs_struct *, cs_opt_type, size_t value) = { NULL };
void (*arch_destroy[MAX_ARCH]) (cs_struct *) = { NULL };
@ -87,7 +89,7 @@ cs_err cs_errno(csh handle)
if (!handle)
return CS_ERR_CSH;
struct cs_struct *ud = (cs_struct *)(uintptr_t)handle;
struct cs_struct *ud = (struct cs_struct *)(uintptr_t)handle;
return ud->errnum;
}
@ -128,7 +130,7 @@ cs_err cs_open(cs_arch arch, cs_mode mode, csh *handle)
archs_enable();
if (arch < CS_ARCH_MAX && arch_init[arch]) {
cs_struct *ud;
struct cs_struct *ud;
ud = cs_mem_calloc(1, sizeof(*ud));
if (!ud) {
@ -164,7 +166,7 @@ cs_err cs_close(csh handle)
if (!handle)
return CS_ERR_CSH;
struct cs_struct *ud = (cs_struct *)(uintptr_t)handle;
struct cs_struct *ud = (struct cs_struct *)(uintptr_t)handle;
switch (ud->arch) {
case CS_ARCH_X86:
@ -191,21 +193,20 @@ cs_err cs_close(csh handle)
#define MIN(x, y) ((x) < (y) ? (x) : (y))
// fill insn with mnemonic & operands info
static void fill_insn(cs_struct *handle, cs_insn *insn, char *buffer, MCInst *mci,
static void fill_insn(struct cs_struct *handle, cs_insn *insn, char *buffer, MCInst *mci,
PostPrinter_t postprinter, const uint8_t *code)
{
if (handle->detail) {
// avoiding copy insn->detail
memcpy(insn, &mci->flat_insn, sizeof(*insn) - sizeof(insn->detail));
memcpy(insn, (uintptr_t)&mci->flat_insn, sizeof(*insn) - sizeof(insn->detail));
// NOTE: copy details in 2 chunks, since union is always put at address divisible by 8
// copy from @regs_read until @arm
memcpy(insn->detail,
(void*) ((uintptr_t) &mci->flat_insn + offsetof(cs_insn_flat, regs_read)),
memcpy(insn->detail, (void *)(&(mci->flat_insn)) + offsetof(cs_insn_flat, regs_read),
offsetof(cs_detail, arm) - offsetof(cs_detail, regs_read));
// then copy from @arm until end
memcpy((void *)((uintptr_t) (insn->detail) + offsetof(cs_detail, arm)),
(void *)((uintptr_t) (&(mci->flat_insn)) + offsetof(cs_insn_flat, arm)),
memcpy((void *)((uintptr_t)(insn->detail) + offsetof(cs_detail, arm)),
(void *)((uintptr_t)(&(mci->flat_insn)) + offsetof(cs_insn_flat, arm)),
sizeof(cs_detail) - offsetof(cs_detail, arm));
} else {
insn->address = mci->address;
@ -263,7 +264,7 @@ cs_err cs_option(csh ud, cs_opt_type type, size_t value)
return CS_ERR_OK;
}
cs_struct *handle = (cs_struct *)(uintptr_t)ud;
struct cs_struct *handle = (struct cs_struct *)(uintptr_t)ud;
if (!handle)
return CS_ERR_CSH;
@ -281,7 +282,8 @@ static cs_insn *get_prev_insn(cs_insn *cache, unsigned int f, void *total, size_
if (f == 0) {
if (total == NULL)
return NULL;
// get the trailing insn from total buffer
// get the trailing insn from total buffer, which is at
// the end of the latest cache trunk
return (cs_insn *)((void*)((uintptr_t)total + total_size - sizeof(cs_insn)));
} else
return &cache[f - 1];
@ -291,12 +293,12 @@ static cs_insn *get_prev_insn(cs_insn *cache, unsigned int f, void *total, size_
// NOTE: caller must free() the allocated memory itself to avoid memory leaking
size_t cs_disasm_ex(csh ud, const uint8_t *buffer, size_t size, uint64_t offset, size_t count, cs_insn **insn)
{
cs_struct *handle = (cs_struct *)(uintptr_t)ud;
struct cs_struct *handle = (struct cs_struct *)(uintptr_t)ud;
MCInst mci;
uint16_t insn_size;
size_t c = 0;
unsigned int f = 0;
cs_insn insn_cache[64];
cs_insn insn_cache[INSN_CACHE_SIZE];
void *total = NULL;
size_t total_size = 0;
@ -308,6 +310,9 @@ size_t cs_disasm_ex(csh ud, const uint8_t *buffer, size_t size, uint64_t offset,
handle->errnum = CS_ERR_OK;
// reset previous prefix for X86
handle->prev_prefix = 0;
memset(insn_cache, 0, sizeof(insn_cache));
while (size > 0) {
@ -340,7 +345,7 @@ size_t cs_disasm_ex(csh ud, const uint8_t *buffer, size_t size, uint64_t offset,
if (f == ARR_SIZE(insn_cache)) {
// resize total to contain newly disasm insns
total_size += sizeof(insn_cache);
total_size += (sizeof(cs_insn) * INSN_CACHE_SIZE);
void *tmp = cs_mem_realloc(total, total_size);
if (tmp == NULL) { // insufficient memory
cs_mem_free(total);
@ -350,6 +355,7 @@ size_t cs_disasm_ex(csh ud, const uint8_t *buffer, size_t size, uint64_t offset,
total = tmp;
memcpy((void*)((uintptr_t)total + total_size - sizeof(insn_cache)), insn_cache, sizeof(insn_cache));
// reset f back to 0
f = 0;
}
@ -385,6 +391,7 @@ size_t cs_disasm_ex(csh ud, const uint8_t *buffer, size_t size, uint64_t offset,
total = tmp;
memcpy((void*)((uintptr_t)total + total_size), insn_cache, f * sizeof(insn_cache[0]));
}
*insn = total;
@ -407,7 +414,7 @@ void cs_free(cs_insn *insn, size_t count)
// return friendly name of regiser in a string
const char *cs_reg_name(csh ud, unsigned int reg)
{
cs_struct *handle = (cs_struct *)(uintptr_t)ud;
struct cs_struct *handle = (struct cs_struct *)(uintptr_t)ud;
if (!handle || handle->reg_name == NULL) {
return NULL;
@ -418,7 +425,7 @@ const char *cs_reg_name(csh ud, unsigned int reg)
const char *cs_insn_name(csh ud, unsigned int insn)
{
cs_struct *handle = (cs_struct *)(uintptr_t)ud;
struct cs_struct *handle = (struct cs_struct *)(uintptr_t)ud;
if (!handle || handle->insn_name == NULL) {
return NULL;
@ -444,7 +451,7 @@ bool cs_insn_group(csh ud, cs_insn *insn, unsigned int group_id)
if (!ud)
return false;
struct cs_struct *handle = (cs_struct *)(uintptr_t)ud;
struct cs_struct *handle = (struct cs_struct *)(uintptr_t)ud;
if (!handle->detail) {
handle->errnum = CS_ERR_DETAIL;
return false;
@ -458,7 +465,7 @@ bool cs_reg_read(csh ud, cs_insn *insn, unsigned int reg_id)
if (!ud)
return false;
struct cs_struct *handle = (cs_struct *) (uintptr_t) ud;
struct cs_struct *handle = (struct cs_struct *)(uintptr_t)ud;
if (!handle->detail) {
handle->errnum = CS_ERR_DETAIL;
return false;
@ -472,7 +479,7 @@ bool cs_reg_write(csh ud, cs_insn *insn, unsigned int reg_id)
if (!ud)
return false;
struct cs_struct *handle = (cs_struct *) (uintptr_t) ud;
struct cs_struct *handle = (struct cs_struct *)(uintptr_t)ud;
if (!handle->detail) {
handle->errnum = CS_ERR_DETAIL;
return false;
@ -486,7 +493,7 @@ int cs_op_count(csh ud, cs_insn *insn, unsigned int op_type)
if (!ud)
return -1;
struct cs_struct *handle = (cs_struct *) (uintptr_t) ud;
struct cs_struct *handle = (struct cs_struct *)(uintptr_t)ud;
if (!handle->detail) {
handle->errnum = CS_ERR_DETAIL;
return -1;
@ -536,7 +543,7 @@ int cs_op_index(csh ud, cs_insn *insn, unsigned int op_type,
if (!ud)
return -1;
struct cs_struct *handle = (cs_struct *) (uintptr_t) ud;
struct cs_struct *handle = (struct cs_struct *)(uintptr_t)ud;
if (!handle->detail) {
handle->errnum = CS_ERR_DETAIL;
return -1;

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