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@ -536,23 +536,22 @@ void ARM_printInst(MCInst *MI, SStream *O, void *Info) |
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unsigned Reg = MCOperand_getReg(MCInst_getOperand(MI, isStore ? 1 : 0)); |
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if (MCRegisterClass_contains(MRC, Reg)) { |
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MCInst NewMI; |
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MCOperand *NewReg; |
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MCInst_Init(MI->csh, &NewMI); |
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MCInst_setOpcode(&NewMI, Opcode); |
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if (isStore) |
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MCInst_addOperand2(&NewMI, MCInst_getOperand(MI, 0)); |
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NewReg = MCOperand_CreateReg(MCRegisterInfo_getMatchingSuperReg(MRI, Reg, ARM_gsub_0, |
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MCRegisterInfo_getRegClass(MRI, ARM_GPRPairRegClassID))); |
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MCInst_addOperand2(&NewMI, NewReg); |
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cs_mem_free(NewReg); |
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// Copy the rest operands into NewMI.
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for(i= isStore ? 3 : 2; i < MCInst_getNumOperands(MI); ++i) |
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MCInst_addOperand2(&NewMI, MCInst_getOperand(MI, i)); |
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printInstruction(&NewMI, O, MRI); |
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MCInst NewMI; |
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MCInst_Init(MI->csh, &NewMI); |
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MCInst_setOpcode(&NewMI, Opcode); |
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if (isStore) |
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MCInst_addOperand2(&NewMI, MCInst_getOperand(MI, 0)); |
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MCOperand_CreateReg0(&NewMI, MCRegisterInfo_getMatchingSuperReg(MRI, Reg, ARM_gsub_0, |
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MCRegisterInfo_getRegClass(MRI, ARM_GPRPairRegClassID))); |
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// Copy the rest operands into NewMI.
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for(i = isStore ? 3 : 2; i < MCInst_getNumOperands(MI); ++i) |
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MCInst_addOperand2(&NewMI, MCInst_getOperand(MI, i)); |
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printInstruction(&NewMI, O, MRI); |
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return; |
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} |
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} |
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