diff --git a/arch/X86/X86Mapping.c b/arch/X86/X86Mapping.c
index d8561aed..1b2ff668 100644
--- a/arch/X86/X86Mapping.c
+++ b/arch/X86/X86Mapping.c
@@ -2989,33938 +2989,8 @@ static insn_op insn_ops[] = {
 		0,
 		{ 0 }
 	},
-	{	/* X86_AAA, X86_INS_AAA: aaa */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ 0 }
-	},
-	{	/* X86_AAD8i8, X86_INS_AAD: aad	$src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_READ, 0 }
-	},
-	{	/* X86_AAM8i8, X86_INS_AAM: aam	$src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_READ, 0 }
-	},
-	{	/* X86_AAS, X86_INS_AAS: aas */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ 0 }
-	},
-	{	/* X86_ABS_F, X86_INS_FABS: fabs */
-		0,
-		{ 0 }
-	},
-	{	/* X86_ADC16i16, X86_INS_ADC: adc{w}	ax, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC16mi, X86_INS_ADC: adc{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC16mi8, X86_INS_ADC: adc{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC16mr, X86_INS_ADC: adc{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC16ri, X86_INS_ADC: adc{w}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC16ri8, X86_INS_ADC: adc{w}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC16rm, X86_INS_ADC: adc{w}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC16rr, X86_INS_ADC: adc{w}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC16rr_REV, X86_INS_ADC: adc{w}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC32i32, X86_INS_ADC: adc{l}	eax, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC32mi, X86_INS_ADC: adc{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC32mi8, X86_INS_ADC: adc{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC32mr, X86_INS_ADC: adc{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC32ri, X86_INS_ADC: adc{l}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC32ri8, X86_INS_ADC: adc{l}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC32rm, X86_INS_ADC: adc{l}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC32rr, X86_INS_ADC: adc{l}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC32rr_REV, X86_INS_ADC: adc{l}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC64i32, X86_INS_ADC: adc{q}	rax, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC64mi32, X86_INS_ADC: adc{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC64mi8, X86_INS_ADC: adc{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC64mr, X86_INS_ADC: adc{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC64ri32, X86_INS_ADC: adc{q}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC64ri8, X86_INS_ADC: adc{q}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC64rm, X86_INS_ADC: adc{q}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC64rr, X86_INS_ADC: adc{q}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC64rr_REV, X86_INS_ADC: adc{q}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC8i8, X86_INS_ADC: adc{b}	al, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC8mi, X86_INS_ADC: adc{b}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC8mi8, X86_INS_ADC: adc{b}	$dst, $src */
-		X86_REG_EFLAGS,
-		{ 0 }
-	},
-	{	/* X86_ADC8mr, X86_INS_ADC: adc{b}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC8ri, X86_INS_ADC: adc{b}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC8ri8, X86_INS_ADC: adc{b}	$src1, $src2 */
-		X86_REG_EFLAGS,
-		{ CS_OP_READ | CS_OP_WRITE, 0 }
-	},
-	{	/* X86_ADC8rm, X86_INS_ADC: adc{b}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC8rr, X86_INS_ADC: adc{b}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADC8rr_REV, X86_INS_ADC: adc{b}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADCX32rm, X86_INS_ADCX: adcx{l}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADCX32rr, X86_INS_ADCX: adcx{l}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADCX64rm, X86_INS_ADCX: adcx{q}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADCX64rr, X86_INS_ADCX: adcx{q}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD16i16, X86_INS_ADD: add{w}	ax, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD16mi, X86_INS_ADD: add{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD16mi8, X86_INS_ADD: add{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD16mr, X86_INS_ADD: add{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD16ri, X86_INS_ADD: add{w}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD16ri8, X86_INS_ADD: add{w}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD16rm, X86_INS_ADD: add{w}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD16rr, X86_INS_ADD: add{w}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD16rr_REV, X86_INS_ADD: add{w}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD32i32, X86_INS_ADD: add{l}	eax, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD32mi, X86_INS_ADD: add{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD32mi8, X86_INS_ADD: add{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD32mr, X86_INS_ADD: add{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD32ri, X86_INS_ADD: add{l}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD32ri8, X86_INS_ADD: add{l}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD32rm, X86_INS_ADD: add{l}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD32rr, X86_INS_ADD: add{l}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD32rr_REV, X86_INS_ADD: add{l}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD64i32, X86_INS_ADD: add{q}	rax, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD64mi32, X86_INS_ADD: add{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD64mi8, X86_INS_ADD: add{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD64mr, X86_INS_ADD: add{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD64ri32, X86_INS_ADD: add{q}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD64ri8, X86_INS_ADD: add{q}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD64rm, X86_INS_ADD: add{q}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD64rr, X86_INS_ADD: add{q}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD64rr_REV, X86_INS_ADD: add{q}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD8i8, X86_INS_ADD: add{b}	al, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD8mi, X86_INS_ADD: add{b}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD8mi8, X86_INS_ADD: add{b}	$dst, $src */
-		X86_REG_EFLAGS,
-		{ 0 }
-	},
-	{	/* X86_ADD8mr, X86_INS_ADD: add{b}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD8ri, X86_INS_ADD: add{b}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD8ri8, X86_INS_ADD: add{b}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD8rm, X86_INS_ADD: add{b}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD8rr, X86_INS_ADD: add{b}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD8rr_REV, X86_INS_ADD: add{b}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADDPDrm, X86_INS_ADDPD: addpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADDPDrr, X86_INS_ADDPD: addpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADDPSrm, X86_INS_ADDPS: addps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADDPSrr, X86_INS_ADDPS: addps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADDSDrm, X86_INS_ADDSD: addsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADDSDrm_Int, X86_INS_ADDSD: addsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADDSDrr, X86_INS_ADDSD: addsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADDSDrr_Int, X86_INS_ADDSD: addsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADDSSrm, X86_INS_ADDSS: addss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADDSSrm_Int, X86_INS_ADDSS: addss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADDSSrr, X86_INS_ADDSS: addss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADDSSrr_Int, X86_INS_ADDSS: addss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADDSUBPDrm, X86_INS_ADDSUBPD: addsubpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADDSUBPDrr, X86_INS_ADDSUBPD: addsubpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADDSUBPSrm, X86_INS_ADDSUBPS: addsubps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADDSUBPSrr, X86_INS_ADDSUBPS: addsubps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD_F32m, X86_INS_FADD: fadd{s}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD_F64m, X86_INS_FADD: fadd{l}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD_FI16m, X86_INS_FIADD: fiadd{s}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD_FI32m, X86_INS_FIADD: fiadd{l}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD_FPrST0, X86_INS_FADDP: faddp	$op */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD_FST0r, X86_INS_FADD: fadd	$op */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADD_FrST0, X86_INS_FADD: fadd	$op, st(0) */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADOX32rm, X86_INS_ADOX: adox{l}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADOX32rr, X86_INS_ADOX: adox{l}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADOX64rm, X86_INS_ADOX: adox{q}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ADOX64rr, X86_INS_ADOX: adox{q}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_AESDECLASTrm, X86_INS_AESDECLAST: aesdeclast	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AESDECLASTrr, X86_INS_AESDECLAST: aesdeclast	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AESDECrm, X86_INS_AESDEC: aesdec	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AESDECrr, X86_INS_AESDEC: aesdec	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AESENCLASTrm, X86_INS_AESENCLAST: aesenclast	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AESENCLASTrr, X86_INS_AESENCLAST: aesenclast	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AESENCrm, X86_INS_AESENC: aesenc	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AESENCrr, X86_INS_AESENC: aesenc	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AESIMCrm, X86_INS_AESIMC: aesimc	$dst, $src1 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AESIMCrr, X86_INS_AESIMC: aesimc	$dst, $src1 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AESKEYGENASSIST128rm, X86_INS_AESKEYGENASSIST: aeskeygenassist	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AESKEYGENASSIST128rr, X86_INS_AESKEYGENASSIST: aeskeygenassist	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND16i16, X86_INS_AND: and{w}	ax, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND16mi, X86_INS_AND: and{w}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND16mi8, X86_INS_AND: and{w}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND16mr, X86_INS_AND: and{w}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND16ri, X86_INS_AND: and{w}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND16ri8, X86_INS_AND: and{w}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND16rm, X86_INS_AND: and{w}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND16rr, X86_INS_AND: and{w}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND16rr_REV, X86_INS_AND: and{w}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND32i32, X86_INS_AND: and{l}	eax, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND32mi, X86_INS_AND: and{l}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND32mi8, X86_INS_AND: and{l}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND32mr, X86_INS_AND: and{l}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND32ri, X86_INS_AND: and{l}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND32ri8, X86_INS_AND: and{l}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND32rm, X86_INS_AND: and{l}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND32rr, X86_INS_AND: and{l}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND32rr_REV, X86_INS_AND: and{l}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND64i32, X86_INS_AND: and{q}	rax, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND64mi32, X86_INS_AND: and{q}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND64mi8, X86_INS_AND: and{q}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND64mr, X86_INS_AND: and{q}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND64ri32, X86_INS_AND: and{q}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND64ri8, X86_INS_AND: and{q}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND64rm, X86_INS_AND: and{q}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND64rr, X86_INS_AND: and{q}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND64rr_REV, X86_INS_AND: and{q}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND8i8, X86_INS_AND: and{b}	al, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND8mi, X86_INS_AND: and{b}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND8mi8, X86_INS_AND: and{b}	$dst, $src */
-		X86_REG_EFLAGS,
-		{ 0 }
-	},
-	{	/* X86_AND8mr, X86_INS_AND: and{b}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND8ri, X86_INS_AND: and{b}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND8ri8, X86_INS_AND: and{b}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND8rm, X86_INS_AND: and{b}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND8rr, X86_INS_AND: and{b}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_AND8rr_REV, X86_INS_AND: and{b}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ANDN32rm, X86_INS_ANDN: andn{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ANDN32rr, X86_INS_ANDN: andn{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ANDN64rm, X86_INS_ANDN: andn{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ANDN64rr, X86_INS_ANDN: andn{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ANDNPDrm, X86_INS_ANDNPD: andnpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ANDNPDrr, X86_INS_ANDNPD: andnpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ANDNPSrm, X86_INS_ANDNPS: andnps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ANDNPSrr, X86_INS_ANDNPS: andnps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ANDPDrm, X86_INS_ANDPD: andpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ANDPDrr, X86_INS_ANDPD: andpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ANDPSrm, X86_INS_ANDPS: andps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ANDPSrr, X86_INS_ANDPS: andps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ARPL16mr, X86_INS_ARPL: arpl	$dst, $src */
-		X86_EFLAGS_MODIFY_ZF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ARPL16rr, X86_INS_ARPL: arpl	$dst, $src */
-		X86_EFLAGS_MODIFY_ZF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BEXTR32rm, X86_INS_BEXTR: bextr{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BEXTR32rr, X86_INS_BEXTR: bextr{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BEXTR64rm, X86_INS_BEXTR: bextr{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BEXTR64rr, X86_INS_BEXTR: bextr{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BEXTRI32mi, X86_INS_BEXTR: bextr	$dst, $src1, $cntl */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BEXTRI32ri, X86_INS_BEXTR: bextr	$dst, $src1, $cntl */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BEXTRI64mi, X86_INS_BEXTR: bextr	$dst, $src1, $cntl */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BEXTRI64ri, X86_INS_BEXTR: bextr	$dst, $src1, $cntl */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLCFILL32rm, X86_INS_BLCFILL: blcfill	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLCFILL32rr, X86_INS_BLCFILL: blcfill	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLCFILL64rm, X86_INS_BLCFILL: blcfill	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLCFILL64rr, X86_INS_BLCFILL: blcfill	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLCI32rm, X86_INS_BLCI: blci	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLCI32rr, X86_INS_BLCI: blci	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLCI64rm, X86_INS_BLCI: blci	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLCI64rr, X86_INS_BLCI: blci	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLCIC32rm, X86_INS_BLCIC: blcic	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLCIC32rr, X86_INS_BLCIC: blcic	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLCIC64rm, X86_INS_BLCIC: blcic	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLCIC64rr, X86_INS_BLCIC: blcic	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLCMSK32rm, X86_INS_BLCMSK: blcmsk	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLCMSK32rr, X86_INS_BLCMSK: blcmsk	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLCMSK64rm, X86_INS_BLCMSK: blcmsk	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLCMSK64rr, X86_INS_BLCMSK: blcmsk	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLCS32rm, X86_INS_BLCS: blcs	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLCS32rr, X86_INS_BLCS: blcs	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLCS64rm, X86_INS_BLCS: blcs	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLCS64rr, X86_INS_BLCS: blcs	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLENDPDrmi, X86_INS_BLENDPD: blendpd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLENDPDrri, X86_INS_BLENDPD: blendpd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLENDPSrmi, X86_INS_BLENDPS: blendps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLENDPSrri, X86_INS_BLENDPS: blendps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLENDVPDrm0, X86_INS_BLENDVPD: blendvpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLENDVPDrr0, X86_INS_BLENDVPD: blendvpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLENDVPSrm0, X86_INS_BLENDVPS: blendvps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLENDVPSrr0, X86_INS_BLENDVPS: blendvps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLSFILL32rm, X86_INS_BLSFILL: blsfill	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLSFILL32rr, X86_INS_BLSFILL: blsfill	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLSFILL64rm, X86_INS_BLSFILL: blsfill	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLSFILL64rr, X86_INS_BLSFILL: blsfill	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLSI32rm, X86_INS_BLSI: blsi{l}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLSI32rr, X86_INS_BLSI: blsi{l}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLSI64rm, X86_INS_BLSI: blsi{q}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLSI64rr, X86_INS_BLSI: blsi{q}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLSIC32rm, X86_INS_BLSIC: blsic	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLSIC32rr, X86_INS_BLSIC: blsic	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLSIC64rm, X86_INS_BLSIC: blsic	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLSIC64rr, X86_INS_BLSIC: blsic	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLSMSK32rm, X86_INS_BLSMSK: blsmsk{l}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLSMSK32rr, X86_INS_BLSMSK: blsmsk{l}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLSMSK64rm, X86_INS_BLSMSK: blsmsk{q}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLSMSK64rr, X86_INS_BLSMSK: blsmsk{q}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLSR32rm, X86_INS_BLSR: blsr{l}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLSR32rr, X86_INS_BLSR: blsr{l}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLSR64rm, X86_INS_BLSR: blsr{q}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BLSR64rr, X86_INS_BLSR: blsr{q}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BOUNDS16rm, X86_INS_BOUND: bound	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BOUNDS32rm, X86_INS_BOUND: bound	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BSF16rm, X86_INS_BSF: bsf{w}	$dst, $src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BSF16rr, X86_INS_BSF: bsf{w}	$dst, $src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BSF32rm, X86_INS_BSF: bsf{l}	$dst, $src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BSF32rr, X86_INS_BSF: bsf{l}	$dst, $src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BSF64rm, X86_INS_BSF: bsf{q}	$dst, $src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BSF64rr, X86_INS_BSF: bsf{q}	$dst, $src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BSR16rm, X86_INS_BSR: bsr{w}	$dst, $src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BSR16rr, X86_INS_BSR: bsr{w}	$dst, $src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BSR32rm, X86_INS_BSR: bsr{l}	$dst, $src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BSR32rr, X86_INS_BSR: bsr{l}	$dst, $src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BSR64rm, X86_INS_BSR: bsr{q}	$dst, $src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BSR64rr, X86_INS_BSR: bsr{q}	$dst, $src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BSWAP32r, X86_INS_BSWAP: bswap{l}	$dst */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BSWAP64r, X86_INS_BSWAP: bswap{q}	$dst */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BT16mi8, X86_INS_BT: bt{w}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BT16mr, X86_INS_BT: bt{w}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BT16ri8, X86_INS_BT: bt{w}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BT16rr, X86_INS_BT: bt{w}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BT32mi8, X86_INS_BT: bt{l}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BT32mr, X86_INS_BT: bt{l}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BT32ri8, X86_INS_BT: bt{l}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BT32rr, X86_INS_BT: bt{l}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BT64mi8, X86_INS_BT: bt{q}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BT64mr, X86_INS_BT: bt{q}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BT64ri8, X86_INS_BT: bt{q}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BT64rr, X86_INS_BT: bt{q}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTC16mi8, X86_INS_BTC: btc{w}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTC16mr, X86_INS_BTC: btc{w}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTC16ri8, X86_INS_BTC: btc{w}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTC16rr, X86_INS_BTC: btc{w}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTC32mi8, X86_INS_BTC: btc{l}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTC32mr, X86_INS_BTC: btc{l}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTC32ri8, X86_INS_BTC: btc{l}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTC32rr, X86_INS_BTC: btc{l}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTC64mi8, X86_INS_BTC: btc{q}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTC64mr, X86_INS_BTC: btc{q}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTC64ri8, X86_INS_BTC: btc{q}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTC64rr, X86_INS_BTC: btc{q}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTR16mi8, X86_INS_BTR: btr{w}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTR16mr, X86_INS_BTR: btr{w}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTR16ri8, X86_INS_BTR: btr{w}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTR16rr, X86_INS_BTR: btr{w}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTR32mi8, X86_INS_BTR: btr{l}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTR32mr, X86_INS_BTR: btr{l}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTR32ri8, X86_INS_BTR: btr{l}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTR32rr, X86_INS_BTR: btr{l}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTR64mi8, X86_INS_BTR: btr{q}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTR64mr, X86_INS_BTR: btr{q}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTR64ri8, X86_INS_BTR: btr{q}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTR64rr, X86_INS_BTR: btr{q}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTS16mi8, X86_INS_BTS: bts{w}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTS16mr, X86_INS_BTS: bts{w}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTS16ri8, X86_INS_BTS: bts{w}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTS16rr, X86_INS_BTS: bts{w}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTS32mi8, X86_INS_BTS: bts{l}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTS32mr, X86_INS_BTS: bts{l}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTS32ri8, X86_INS_BTS: bts{l}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTS32rr, X86_INS_BTS: bts{l}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTS64mi8, X86_INS_BTS: bts{q}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTS64mr, X86_INS_BTS: bts{q}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTS64ri8, X86_INS_BTS: bts{q}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BTS64rr, X86_INS_BTS: bts{q}	$src1, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_BZHI32rm, X86_INS_BZHI: bzhi{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BZHI32rr, X86_INS_BZHI: bzhi{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BZHI64rm, X86_INS_BZHI: bzhi{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_BZHI64rr, X86_INS_BZHI: bzhi{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CALL16m, X86_INS_CALL: call{w}	{*}$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CALL16r, X86_INS_CALL: call{w}	{*}$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CALL32m, X86_INS_CALL: call{l}	{*}$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CALL32r, X86_INS_CALL: call{l}	{*}$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CALL64m, X86_INS_CALL: call{q}	{*}$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CALL64pcrel32, X86_INS_CALL: call{q}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CALL64r, X86_INS_CALL: call{q}	{*}$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CALLpcrel16, X86_INS_CALL: call{w}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CALLpcrel32, X86_INS_CALL: call{l}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CBW, X86_INS_CBW: cbw */
-		0,
-		{ 0 }
-	},
-	{	/* X86_CDQ, X86_INS_CDQ: cdq */
-		0,
-		{ 0 }
-	},
-	{	/* X86_CDQE, X86_INS_CDQE: cdqe */
-		0,
-		{ 0 }
-	},
-	{	/* X86_CHS_F, X86_INS_FCHS: fchs */
-		0,
-		{ 0 }
-	},
-	{	/* X86_CLAC, X86_INS_CLAC: clac */
-		0,
-		{ 0 }
-	},
-	{	/* X86_CLC, X86_INS_CLC: clc */
-		X86_EFLAGS_RESET_CF,
-		{ 0 }
-	},
-	{	/* X86_CLD, X86_INS_CLD: cld */
-		X86_EFLAGS_RESET_DF,
-		{ 0 }
-	},
-	{	/* X86_CLFLUSH, X86_INS_CLFLUSH: clflush	$src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CLFLUSHOPT, X86_INS_CLFLUSHOPT: clflushopt	$src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_CLGI, X86_INS_CLGI: clgi */
-		0,
-		{ 0 }
-	},
-	{	/* X86_CLI, X86_INS_CLI: cli */
-		X86_EFLAGS_RESET_IF,
-		{ 0 }
-	},
-	{	/* X86_CLTS, X86_INS_CLTS: clts */
-		0,
-		{ 0 }
-	},
-	{	/* X86_CLWB, X86_INS_CLWB: clwb	$src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_CMC, X86_INS_CMC: cmc */
-		X86_EFLAGS_MODIFY_CF,
-		{ 0 }
-	},
-	{	/* X86_CMOVA16rm, X86_INS_CMOVA: cmova{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVA16rr, X86_INS_CMOVA: cmova{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVA32rm, X86_INS_CMOVA: cmova{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVA32rr, X86_INS_CMOVA: cmova{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVA64rm, X86_INS_CMOVA: cmova{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVA64rr, X86_INS_CMOVA: cmova{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVAE16rm, X86_INS_CMOVAE: cmovae{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVAE16rr, X86_INS_CMOVAE: cmovae{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVAE32rm, X86_INS_CMOVAE: cmovae{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVAE32rr, X86_INS_CMOVAE: cmovae{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVAE64rm, X86_INS_CMOVAE: cmovae{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVAE64rr, X86_INS_CMOVAE: cmovae{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVB16rm, X86_INS_CMOVB: cmovb{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVB16rr, X86_INS_CMOVB: cmovb{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVB32rm, X86_INS_CMOVB: cmovb{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVB32rr, X86_INS_CMOVB: cmovb{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVB64rm, X86_INS_CMOVB: cmovb{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVB64rr, X86_INS_CMOVB: cmovb{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVBE16rm, X86_INS_CMOVBE: cmovbe{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVBE16rr, X86_INS_CMOVBE: cmovbe{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVBE32rm, X86_INS_CMOVBE: cmovbe{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVBE32rr, X86_INS_CMOVBE: cmovbe{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVBE64rm, X86_INS_CMOVBE: cmovbe{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVBE64rr, X86_INS_CMOVBE: cmovbe{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVBE_F, X86_INS_FCMOVBE: fcmovbe	st(0), $op */
-		X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVB_F, X86_INS_FCMOVB: fcmovb	st(0), $op */
-		X86_EFLAGS_TEST_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVE16rm, X86_INS_CMOVE: cmove{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVE16rr, X86_INS_CMOVE: cmove{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVE32rm, X86_INS_CMOVE: cmove{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVE32rr, X86_INS_CMOVE: cmove{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVE64rm, X86_INS_CMOVE: cmove{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVE64rr, X86_INS_CMOVE: cmove{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVE_F, X86_INS_FCMOVE: fcmove	st(0), $op */
-		X86_EFLAGS_TEST_ZF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVG16rm, X86_INS_CMOVG: cmovg{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVG16rr, X86_INS_CMOVG: cmovg{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVG32rm, X86_INS_CMOVG: cmovg{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVG32rr, X86_INS_CMOVG: cmovg{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVG64rm, X86_INS_CMOVG: cmovg{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVG64rr, X86_INS_CMOVG: cmovg{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVGE16rm, X86_INS_CMOVGE: cmovge{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVGE16rr, X86_INS_CMOVGE: cmovge{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVGE32rm, X86_INS_CMOVGE: cmovge{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVGE32rr, X86_INS_CMOVGE: cmovge{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVGE64rm, X86_INS_CMOVGE: cmovge{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVGE64rr, X86_INS_CMOVGE: cmovge{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVL16rm, X86_INS_CMOVL: cmovl{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVL16rr, X86_INS_CMOVL: cmovl{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVL32rm, X86_INS_CMOVL: cmovl{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVL32rr, X86_INS_CMOVL: cmovl{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVL64rm, X86_INS_CMOVL: cmovl{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVL64rr, X86_INS_CMOVL: cmovl{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVLE16rm, X86_INS_CMOVLE: cmovle{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVLE16rr, X86_INS_CMOVLE: cmovle{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVLE32rm, X86_INS_CMOVLE: cmovle{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVLE32rr, X86_INS_CMOVLE: cmovle{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVLE64rm, X86_INS_CMOVLE: cmovle{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVLE64rr, X86_INS_CMOVLE: cmovle{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNBE_F, X86_INS_FCMOVNBE: fcmovnbe	st(0), $op */
-		X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNB_F, X86_INS_FCMOVNB: fcmovnb	st(0), $op */
-		X86_EFLAGS_TEST_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNE16rm, X86_INS_CMOVNE: cmovne{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNE16rr, X86_INS_CMOVNE: cmovne{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNE32rm, X86_INS_CMOVNE: cmovne{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNE32rr, X86_INS_CMOVNE: cmovne{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNE64rm, X86_INS_CMOVNE: cmovne{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNE64rr, X86_INS_CMOVNE: cmovne{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNE_F, X86_INS_FCMOVNE: fcmovne	st(0), $op */
-		X86_EFLAGS_TEST_ZF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNO16rm, X86_INS_CMOVNO: cmovno{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNO16rr, X86_INS_CMOVNO: cmovno{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNO32rm, X86_INS_CMOVNO: cmovno{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNO32rr, X86_INS_CMOVNO: cmovno{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNO64rm, X86_INS_CMOVNO: cmovno{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNO64rr, X86_INS_CMOVNO: cmovno{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNP16rm, X86_INS_CMOVNP: cmovnp{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNP16rr, X86_INS_CMOVNP: cmovnp{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNP32rm, X86_INS_CMOVNP: cmovnp{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNP32rr, X86_INS_CMOVNP: cmovnp{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNP64rm, X86_INS_CMOVNP: cmovnp{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNP64rr, X86_INS_CMOVNP: cmovnp{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNP_F, X86_INS_FCMOVNU: fcmovnu	st(0), $op */
-		X86_EFLAGS_TEST_PF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNS16rm, X86_INS_CMOVNS: cmovns{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNS16rr, X86_INS_CMOVNS: cmovns{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNS32rm, X86_INS_CMOVNS: cmovns{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNS32rr, X86_INS_CMOVNS: cmovns{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNS64rm, X86_INS_CMOVNS: cmovns{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVNS64rr, X86_INS_CMOVNS: cmovns{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVO16rm, X86_INS_CMOVO: cmovo{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVO16rr, X86_INS_CMOVO: cmovo{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVO32rm, X86_INS_CMOVO: cmovo{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVO32rr, X86_INS_CMOVO: cmovo{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVO64rm, X86_INS_CMOVO: cmovo{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVO64rr, X86_INS_CMOVO: cmovo{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVP16rm, X86_INS_CMOVP: cmovp{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVP16rr, X86_INS_CMOVP: cmovp{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVP32rm, X86_INS_CMOVP: cmovp{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVP32rr, X86_INS_CMOVP: cmovp{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVP64rm, X86_INS_CMOVP: cmovp{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVP64rr, X86_INS_CMOVP: cmovp{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVP_F, X86_INS_FCMOVU: fcmovu	st(0), $op */
-		X86_EFLAGS_TEST_PF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVS16rm, X86_INS_CMOVS: cmovs{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVS16rr, X86_INS_CMOVS: cmovs{w}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVS32rm, X86_INS_CMOVS: cmovs{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVS32rr, X86_INS_CMOVS: cmovs{l}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVS64rm, X86_INS_CMOVS: cmovs{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMOVS64rr, X86_INS_CMOVS: cmovs{q}	$dst, $src2 */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP16i16, X86_INS_CMP: cmp{w}	ax, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP16mi, X86_INS_CMP: cmp{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP16mi8, X86_INS_CMP: cmp{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP16mr, X86_INS_CMP: cmp{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP16ri, X86_INS_CMP: cmp{w}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP16ri8, X86_INS_CMP: cmp{w}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP16rm, X86_INS_CMP: cmp{w}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP16rr, X86_INS_CMP: cmp{w}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP16rr_REV, X86_INS_CMP: cmp{w}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP32i32, X86_INS_CMP: cmp{l}	eax, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP32mi, X86_INS_CMP: cmp{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP32mi8, X86_INS_CMP: cmp{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP32mr, X86_INS_CMP: cmp{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP32ri, X86_INS_CMP: cmp{l}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP32ri8, X86_INS_CMP: cmp{l}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP32rm, X86_INS_CMP: cmp{l}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP32rr, X86_INS_CMP: cmp{l}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP32rr_REV, X86_INS_CMP: cmp{l}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP64i32, X86_INS_CMP: cmp{q}	rax, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP64mi32, X86_INS_CMP: cmp{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP64mi8, X86_INS_CMP: cmp{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP64mr, X86_INS_CMP: cmp{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP64ri32, X86_INS_CMP: cmp{q}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP64ri8, X86_INS_CMP: cmp{q}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP64rm, X86_INS_CMP: cmp{q}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP64rr, X86_INS_CMP: cmp{q}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP64rr_REV, X86_INS_CMP: cmp{q}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP8i8, X86_INS_CMP: cmp{b}	al, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP8mi, X86_INS_CMP: cmp{b}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP8mi8, X86_INS_CMP: cmp{b}	$dst, $src */
-		X86_REG_EFLAGS,
-		{ 0 }
-	},
-	{	/* X86_CMP8mr, X86_INS_CMP: cmp{b}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP8ri, X86_INS_CMP: cmp{b}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP8ri8, X86_INS_CMP: cmp{b}	$src1, $src2 */
-		X86_REG_EFLAGS,
-		{ CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP8rm, X86_INS_CMP: cmp{b}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP8rr, X86_INS_CMP: cmp{b}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMP8rr_REV, X86_INS_CMP: cmp{b}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMPPDrmi, X86_INS_CMPPD: cmp${cc}pd	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMPPDrmi_alt, X86_INS_CMPPD: cmppd	$dst, $src2, $cc */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMPPDrri, X86_INS_CMPPD: cmp${cc}pd	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMPPDrri_alt, X86_INS_CMPPD: cmppd	$dst, $src2, $cc */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMPPSrmi, X86_INS_CMPPS: cmp${cc}ps	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMPPSrmi_alt, X86_INS_CMPPS: cmpps	$dst, $src2, $cc */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMPPSrri, X86_INS_CMPPS: cmp${cc}ps	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMPPSrri_alt, X86_INS_CMPPS: cmpps	$dst, $src2, $cc */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMPSB, X86_INS_CMPSB: cmpsb	$src, $dst */
-		X86_REG_EFLAGS,
-		{ 0 }
-	},
-	{	/* X86_CMPSDrm, X86_INS_CMPSD: cmp${cc}sd	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMPSDrm_alt, X86_INS_CMPSD: cmpsd	$dst, $src2, $cc */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMPSDrr, X86_INS_CMPSD: cmp${cc}sd	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMPSDrr_alt, X86_INS_CMPSD: cmpsd	$dst, $src2, $cc */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMPSL, X86_INS_CMPSD: cmps{l|d}	{$dst, $src|$src, $dst} */
-		X86_REG_EFLAGS,
-		{ 0 }
-	},
-	{	/* X86_CMPSQ, X86_INS_CMPSQ: cmpsq	$src, $dst */
-		X86_REG_EFLAGS,
-		{ 0 }
-	},
-	{	/* X86_CMPSSrm, X86_INS_CMPSS: cmp${cc}ss	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMPSSrm_alt, X86_INS_CMPSS: cmpss	$dst, $src2, $cc */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMPSSrr, X86_INS_CMPSS: cmp${cc}ss	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMPSSrr_alt, X86_INS_CMPSS: cmpss	$dst, $src2, $cc */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMPSW, X86_INS_CMPSW: cmpsw	$src, $dst */
-		X86_REG_EFLAGS,
-		{ 0 }
-	},
-	{	/* X86_CMPXCHG16B, X86_INS_CMPXCHG16B: cmpxchg16b	$dst */
-		X86_EFLAGS_MODIFY_ZF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMPXCHG16rm, X86_INS_CMPXCHG: cmpxchg{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMPXCHG16rr, X86_INS_CMPXCHG: cmpxchg{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMPXCHG32rm, X86_INS_CMPXCHG: cmpxchg{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMPXCHG32rr, X86_INS_CMPXCHG: cmpxchg{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMPXCHG64rm, X86_INS_CMPXCHG: cmpxchg{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMPXCHG64rr, X86_INS_CMPXCHG: cmpxchg{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMPXCHG8B, X86_INS_CMPXCHG8B: cmpxchg8b	$dst */
-		X86_EFLAGS_MODIFY_ZF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMPXCHG8rm, X86_INS_CMPXCHG: cmpxchg{b}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CMPXCHG8rr, X86_INS_CMPXCHG: cmpxchg{b}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_COMISDrm, X86_INS_COMISD: comisd	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_COMISDrr, X86_INS_COMISD: comisd	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_COMISSrm, X86_INS_COMISS: comiss	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_COMISSrr, X86_INS_COMISS: comiss	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_COMP_FST0r, X86_INS_FCOMP: fcomp	$op */
-		X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_COM_FIPr, X86_INS_FCOMPI: fcompi	$reg */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_COM_FIr, X86_INS_FCOMI: fcomi	$reg */
-		X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_COM_FST0r, X86_INS_FCOM: fcom	$op */
-		X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_COS_F, X86_INS_FCOS: fcos */
-		0,
-		{ 0 }
-	},
-	{	/* X86_CPUID, X86_INS_CPUID: cpuid */
-		0,
-		{ 0 }
-	},
-	{	/* X86_CQO, X86_INS_CQO: cqo */
-		0,
-		{ 0 }
-	},
-	{	/* X86_CRC32r32m16, X86_INS_CRC32: crc32{w}	$src1, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CRC32r32m32, X86_INS_CRC32: crc32{l}	$src1, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CRC32r32m8, X86_INS_CRC32: crc32{b}	$src1, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CRC32r32r16, X86_INS_CRC32: crc32{w}	$src1, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CRC32r32r32, X86_INS_CRC32: crc32{l}	$src1, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CRC32r32r8, X86_INS_CRC32: crc32{b}	$src1, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CRC32r64m64, X86_INS_CRC32: crc32{q}	$src1, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CRC32r64m8, X86_INS_CRC32: crc32{b}	$src1, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CRC32r64r64, X86_INS_CRC32: crc32{q}	$src1, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CRC32r64r8, X86_INS_CRC32: crc32{b}	$src1, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTDQ2PDrm, X86_INS_CVTDQ2PD: cvtdq2pd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTDQ2PDrr, X86_INS_CVTDQ2PD: cvtdq2pd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTDQ2PSrm, X86_INS_CVTDQ2PS: cvtdq2ps	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTDQ2PSrr, X86_INS_CVTDQ2PS: cvtdq2ps	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTPD2DQrm, X86_INS_CVTPD2DQ: cvtpd2dq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTPD2DQrr, X86_INS_CVTPD2DQ: cvtpd2dq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTPD2PSrm, X86_INS_CVTPD2PS: cvtpd2ps	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTPD2PSrr, X86_INS_CVTPD2PS: cvtpd2ps	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTPS2DQrm, X86_INS_CVTPS2DQ: cvtps2dq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTPS2DQrr, X86_INS_CVTPS2DQ: cvtps2dq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTPS2PDrm, X86_INS_CVTPS2PD: cvtps2pd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTPS2PDrr, X86_INS_CVTPS2PD: cvtps2pd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTSD2SI64rm, X86_INS_CVTSD2SI: cvtsd2si	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTSD2SI64rr, X86_INS_CVTSD2SI: cvtsd2si	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTSD2SIrm, X86_INS_CVTSD2SI: cvtsd2si	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTSD2SIrr, X86_INS_CVTSD2SI: cvtsd2si	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTSD2SSrm, X86_INS_CVTSD2SS: cvtsd2ss	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTSD2SSrr, X86_INS_CVTSD2SS: cvtsd2ss	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTSI2SD64rm, X86_INS_CVTSI2SD: cvtsi2sd{q}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTSI2SD64rr, X86_INS_CVTSI2SD: cvtsi2sd{q}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTSI2SDrm, X86_INS_CVTSI2SD: cvtsi2sd{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTSI2SDrr, X86_INS_CVTSI2SD: cvtsi2sd{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTSI2SS64rm, X86_INS_CVTSI2SS: cvtsi2ss{q}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTSI2SS64rr, X86_INS_CVTSI2SS: cvtsi2ss{q}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTSI2SSrm, X86_INS_CVTSI2SS: cvtsi2ss{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTSI2SSrr, X86_INS_CVTSI2SS: cvtsi2ss{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTSS2SDrm, X86_INS_CVTSS2SD: cvtss2sd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTSS2SDrr, X86_INS_CVTSS2SD: cvtss2sd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTSS2SI64rm, X86_INS_CVTSS2SI: cvtss2si	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTSS2SI64rr, X86_INS_CVTSS2SI: cvtss2si	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTSS2SIrm, X86_INS_CVTSS2SI: cvtss2si	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTSS2SIrr, X86_INS_CVTSS2SI: cvtss2si	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTTPD2DQrm, X86_INS_CVTTPD2DQ: cvttpd2dq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTTPD2DQrr, X86_INS_CVTTPD2DQ: cvttpd2dq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTTPS2DQrm, X86_INS_CVTTPS2DQ: cvttps2dq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTTPS2DQrr, X86_INS_CVTTPS2DQ: cvttps2dq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTTSD2SI64rm, X86_INS_CVTTSD2SI: cvttsd2si	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTTSD2SI64rr, X86_INS_CVTTSD2SI: cvttsd2si	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTTSD2SIrm, X86_INS_CVTTSD2SI: cvttsd2si	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTTSD2SIrr, X86_INS_CVTTSD2SI: cvttsd2si	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTTSS2SI64rm, X86_INS_CVTTSS2SI: cvttss2si	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTTSS2SI64rr, X86_INS_CVTTSS2SI: cvttss2si	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTTSS2SIrm, X86_INS_CVTTSS2SI: cvttss2si	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CVTTSS2SIrr, X86_INS_CVTTSS2SI: cvttss2si	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_CWD, X86_INS_CWD: cwd */
-		0,
-		{ 0 }
-	},
-	{	/* X86_CWDE, X86_INS_CWDE: cwde */
-		0,
-		{ 0 }
-	},
-	{	/* X86_DAA, X86_INS_DAA: daa */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ 0 }
-	},
-	{	/* X86_DAS, X86_INS_DAS: das */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ 0 }
-	},
-	{	/* X86_DATA16_PREFIX, X86_INS_DATA16: data16 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_DEC16m, X86_INS_DEC: dec{w}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DEC16r, X86_INS_DEC: dec{w}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DEC16r_alt, X86_INS_DEC: dec{w}	$dst */
-		X86_REG_EFLAGS,
-		{ CS_OP_READ | CS_OP_WRITE, 0 }
-	},
-	{	/* X86_DEC32m, X86_INS_DEC: dec{l}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DEC32r, X86_INS_DEC: dec{l}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DEC32r_alt, X86_INS_DEC: dec{l}	$dst */
-		X86_REG_EFLAGS,
-		{ CS_OP_READ | CS_OP_WRITE, 0 }
-	},
-	{	/* X86_DEC64m, X86_INS_DEC: dec{q}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DEC64r, X86_INS_DEC: dec{q}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DEC8m, X86_INS_DEC: dec{b}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DEC8r, X86_INS_DEC: dec{b}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIV16m, X86_INS_DIV: div{w}	$src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIV16r, X86_INS_DIV: div{w}	$src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIV32m, X86_INS_DIV: div{l}	$src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIV32r, X86_INS_DIV: div{l}	$src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIV64m, X86_INS_DIV: div{q}	$src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIV64r, X86_INS_DIV: div{q}	$src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIV8m, X86_INS_DIV: div{b}	$src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIV8r, X86_INS_DIV: div{b}	$src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIVPDrm, X86_INS_DIVPD: divpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIVPDrr, X86_INS_DIVPD: divpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIVPSrm, X86_INS_DIVPS: divps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIVPSrr, X86_INS_DIVPS: divps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIVR_F32m, X86_INS_FDIVR: fdivr{s}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIVR_F64m, X86_INS_FDIVR: fdivr{l}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIVR_FI16m, X86_INS_FIDIVR: fidivr{s}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIVR_FI32m, X86_INS_FIDIVR: fidivr{l}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIVR_FPrST0, X86_INS_FDIVRP: fdivrp	$op */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIVR_FST0r, X86_INS_FDIVR: fdivr	$op */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIVR_FrST0, X86_INS_FDIVR: fdiv{|r}	{%st(0), $op|$op, st(0)} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIVSDrm, X86_INS_DIVSD: divsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIVSDrm_Int, X86_INS_DIVSD: divsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIVSDrr, X86_INS_DIVSD: divsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIVSDrr_Int, X86_INS_DIVSD: divsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIVSSrm, X86_INS_DIVSS: divss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIVSSrm_Int, X86_INS_DIVSS: divss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIVSSrr, X86_INS_DIVSS: divss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIVSSrr_Int, X86_INS_DIVSS: divss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIV_F32m, X86_INS_FDIV: fdiv{s}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIV_F64m, X86_INS_FDIV: fdiv{l}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIV_FI16m, X86_INS_FIDIV: fidiv{s}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIV_FI32m, X86_INS_FIDIV: fidiv{l}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIV_FPrST0, X86_INS_FDIVP: fdiv{r}p	$op */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIV_FST0r, X86_INS_FDIV: fdiv	$op */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_DIV_FrST0, X86_INS_FDIV: fdiv{r}	$op, st(0) */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_DPPDrmi, X86_INS_DPPD: dppd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DPPDrri, X86_INS_DPPD: dppd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DPPSrmi, X86_INS_DPPS: dpps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_DPPSrri, X86_INS_DPPS: dpps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ENCLS, X86_INS_ENCLS: encls */
-		0,
-		{ 0 }
-	},
-	{	/* X86_ENCLU, X86_INS_ENCLU: enclu */
-		0,
-		{ 0 }
-	},
-	{	/* X86_ENTER, X86_INS_ENTER: enter	$len, $lvl */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_EXTRACTPSmr, X86_INS_EXTRACTPS: extractps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_EXTRACTPSrr, X86_INS_EXTRACTPS: extractps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_EXTRQ, X86_INS_EXTRQ: extrq	$src, $mask */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_EXTRQI, X86_INS_EXTRQ: extrq	$src, $len, $idx */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_F2XM1, X86_INS_F2XM1: f2xm1 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_FARCALL16i, X86_INS_LCALL: lcall{w}	$seg : $off */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FARCALL16m, X86_INS_LCALL: lcall{w}	{*}$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FARCALL32i, X86_INS_LCALL: lcall{l}	$seg : $off */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FARCALL32m, X86_INS_LCALL: lcall{l}	{*}$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FARCALL64, X86_INS_LCALL: lcall{q}	{*}$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FARJMP16i, X86_INS_LJMP: ljmp{w}	$seg : $off */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FARJMP16m, X86_INS_LJMP: ljmp{w}	{*}$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FARJMP32i, X86_INS_LJMP: ljmp{l}	$seg : $off */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FARJMP32m, X86_INS_LJMP: ljmp{l}	{*}$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FARJMP64, X86_INS_LJMP: ljmp{q}	{*}$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FBLDm, X86_INS_FBLD: fbld	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FBSTPm, X86_INS_FBSTP: fbstp	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FCOM32m, X86_INS_FCOM: fcom{s}	$src */
-		X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FCOM64m, X86_INS_FCOM: fcom{l}	$src */
-		X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FCOMP32m, X86_INS_FCOMP: fcomp{s}	$src */
-		X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FCOMP64m, X86_INS_FCOMP: fcomp{l}	$src */
-		X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FCOMPP, X86_INS_FCOMPP: fcompp */
-		X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ 0 }
-	},
-	{	/* X86_FDECSTP, X86_INS_FDECSTP: fdecstp */
-		0,
-		{ 0 }
-	},
-	{	/* X86_FEMMS, X86_INS_FEMMS: femms */
-		0,
-		{ 0 }
-	},
-	{	/* X86_FFREE, X86_INS_FFREE: ffree	$reg */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FICOM16m, X86_INS_FICOM: ficom{s}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FICOM32m, X86_INS_FICOM: ficom{l}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FICOMP16m, X86_INS_FICOMP: ficomp{s}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FICOMP32m, X86_INS_FICOMP: ficomp{l}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FINCSTP, X86_INS_FINCSTP: fincstp */
-		0,
-		{ 0 }
-	},
-	{	/* X86_FLDCW16m, X86_INS_FLDCW: fldcw	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FLDENVm, X86_INS_FLDENV: fldenv	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FLDL2E, X86_INS_FLDL2E: fldl2e */
-		0,
-		{ 0 }
-	},
-	{	/* X86_FLDL2T, X86_INS_FLDL2T: fldl2t */
-		0,
-		{ 0 }
-	},
-	{	/* X86_FLDLG2, X86_INS_FLDLG2: fldlg2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_FLDLN2, X86_INS_FLDLN2: fldln2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_FLDPI, X86_INS_FLDPI: fldpi */
-		0,
-		{ 0 }
-	},
-	{	/* X86_FNCLEX, X86_INS_FNCLEX: fnclex */
-		0,
-		{ 0 }
-	},
-	{	/* X86_FNINIT, X86_INS_FNINIT: fninit */
-		0,
-		{ 0 }
-	},
-	{	/* X86_FNOP, X86_INS_FNOP: fnop */
-		0,
-		{ 0 }
-	},
-	{	/* X86_FNSTCW16m, X86_INS_FNSTCW: fnstcw	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FNSTSW16r, X86_INS_FNSTSW: fnstsw	ax */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FNSTSWm, X86_INS_FNSTSW: fnstsw	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FPATAN, X86_INS_FPATAN: fpatan */
-		0,
-		{ 0 }
-	},
-	{	/* X86_FPREM, X86_INS_FPREM: fprem */
-		0,
-		{ 0 }
-	},
-	{	/* X86_FPREM1, X86_INS_FPREM1: fprem1 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_FPTAN, X86_INS_FPTAN: fptan */
-		0,
-		{ 0 }
-	},
-	{	/* X86_FP_FFREEP, X86_INS_FFREEP: ffreep	$op */
-		0,
-		{ 0 }
-	},
-	{	/* X86_FRNDINT, X86_INS_FRNDINT: frndint */
-		0,
-		{ 0 }
-	},
-	{	/* X86_FRSTORm, X86_INS_FRSTOR: frstor	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FSAVEm, X86_INS_FNSAVE: fnsave	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FSCALE, X86_INS_FSCALE: fscale */
-		0,
-		{ 0 }
-	},
-	{	/* X86_FSETPM, X86_INS_FSETPM: fsetpm */
-		0,
-		{ 0 }
-	},
-	{	/* X86_FSINCOS, X86_INS_FSINCOS: fsincos */
-		0,
-		{ 0 }
-	},
-	{	/* X86_FSTENVm, X86_INS_FNSTENV: fnstenv	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FXAM, X86_INS_FXAM: fxam */
-		0,
-		{ 0 }
-	},
-	{	/* X86_FXRSTOR, X86_INS_FXRSTOR: fxrstor	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FXRSTOR64, X86_INS_FXRSTOR64: fxrstor64	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FXSAVE, X86_INS_FXSAVE: fxsave	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FXSAVE64, X86_INS_FXSAVE64: fxsave64	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FXTRACT, X86_INS_FXTRACT: fxtract */
-		0,
-		{ 0 }
-	},
-	{	/* X86_FYL2X, X86_INS_FYL2X: fyl2x */
-		0,
-		{ 0 }
-	},
-	{	/* X86_FYL2XP1, X86_INS_FYL2XP1: fyl2xp1 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_FsANDNPDrm, X86_INS_ANDNPD: andnpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_FsANDNPDrr, X86_INS_ANDNPD: andnpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_FsANDNPSrm, X86_INS_ANDNPS: andnps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_FsANDNPSrr, X86_INS_ANDNPS: andnps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_FsANDPDrm, X86_INS_ANDPD: andpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_FsANDPDrr, X86_INS_ANDPD: andpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_FsANDPSrm, X86_INS_ANDPS: andps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_FsANDPSrr, X86_INS_ANDPS: andps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_FsMOVAPDrm, X86_INS_MOVAPD: movapd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_FsMOVAPSrm, X86_INS_MOVAPS: movaps	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_FsORPDrm, X86_INS_ORPD: orpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_FsORPDrr, X86_INS_ORPD: orpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_FsORPSrm, X86_INS_ORPS: orps	$dst, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FsORPSrr, X86_INS_ORPS: orps	$dst, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FsVMOVAPDrm, X86_INS_VMOVAPD: vmovapd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FsVMOVAPSrm, X86_INS_VMOVAPS: vmovaps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_FsXORPDrm, X86_INS_XORPD: xorpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_FsXORPDrr, X86_INS_XORPD: xorpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_FsXORPSrm, X86_INS_XORPS: xorps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_FsXORPSrr, X86_INS_XORPS: xorps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_FvANDNPDrm, X86_INS_ANDNPD: andnpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, 0 }
-	},
-	{	/* X86_FvANDNPDrr, X86_INS_ANDNPD: andnpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_FvANDNPSrm, X86_INS_ANDNPS: andnps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, 0 }
-	},
-	{	/* X86_FvANDNPSrr, X86_INS_ANDNPS: andnps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_FvANDPDrm, X86_INS_ANDPD: andpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, 0 }
-	},
-	{	/* X86_FvANDPDrr, X86_INS_ANDPD: andpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_FvANDPSrm, X86_INS_ANDPS: andps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, 0 }
-	},
-	{	/* X86_FvANDPSrr, X86_INS_ANDPS: andps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_FvORPDrm, X86_INS_ORPD: orpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, 0 }
-	},
-	{	/* X86_FvORPDrr, X86_INS_ORPD: orpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_FvORPSrm, X86_INS_ORPS: orps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, 0 }
-	},
-	{	/* X86_FvORPSrr, X86_INS_ORPS: orps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_FvXORPDrm, X86_INS_XORPD: xorpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, 0 }
-	},
-	{	/* X86_FvXORPDrr, X86_INS_XORPD: xorpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_FvXORPSrm, X86_INS_XORPS: xorps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, 0 }
-	},
-	{	/* X86_FvXORPSrr, X86_INS_XORPS: xorps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_GETSEC, X86_INS_GETSEC: getsec */
-		0,
-		{ 0 }
-	},
-	{	/* X86_HADDPDrm, X86_INS_HADDPD: haddpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_HADDPDrr, X86_INS_HADDPD: haddpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_HADDPSrm, X86_INS_HADDPS: haddps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_HADDPSrr, X86_INS_HADDPS: haddps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_HLT, X86_INS_HLT: hlt */
-		0,
-		{ 0 }
-	},
-	{	/* X86_HSUBPDrm, X86_INS_HSUBPD: hsubpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_HSUBPDrr, X86_INS_HSUBPD: hsubpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_HSUBPSrm, X86_INS_HSUBPS: hsubps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_HSUBPSrr, X86_INS_HSUBPS: hsubps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IDIV16m, X86_INS_IDIV: idiv{w}	$src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_IDIV16r, X86_INS_IDIV: idiv{w}	$src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_IDIV32m, X86_INS_IDIV: idiv{l}	$src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_IDIV32r, X86_INS_IDIV: idiv{l}	$src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_IDIV64m, X86_INS_IDIV: idiv{q}	$src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_IDIV64r, X86_INS_IDIV: idiv{q}	$src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_IDIV8m, X86_INS_IDIV: idiv{b}	$src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_IDIV8r, X86_INS_IDIV: idiv{b}	$src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ILD_F16m, X86_INS_FILD: fild{s}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ILD_F32m, X86_INS_FILD: fild{l}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ILD_F64m, X86_INS_FILD: fild{ll}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_IMUL16m, X86_INS_IMUL: imul{w}	$src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IMUL16r, X86_INS_IMUL: imul{w}	$src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IMUL16rm, X86_INS_IMUL: imul{w}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IMUL16rmi, X86_INS_IMUL: imul{w}	$dst, $src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IMUL16rmi8, X86_INS_IMUL: imul{w}	$dst, $src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IMUL16rr, X86_INS_IMUL: imul{w}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IMUL16rri, X86_INS_IMUL: imul{w}	$dst, $src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IMUL16rri8, X86_INS_IMUL: imul{w}	$dst, $src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IMUL32m, X86_INS_IMUL: imul{l}	$src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IMUL32r, X86_INS_IMUL: imul{l}	$src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IMUL32rm, X86_INS_IMUL: imul{l}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IMUL32rmi, X86_INS_IMUL: imul{l}	$dst, $src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IMUL32rmi8, X86_INS_IMUL: imul{l}	$dst, $src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IMUL32rr, X86_INS_IMUL: imul{l}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IMUL32rri, X86_INS_IMUL: imul{l}	$dst, $src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IMUL32rri8, X86_INS_IMUL: imul{l}	$dst, $src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IMUL64m, X86_INS_IMUL: imul{q}	$src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IMUL64r, X86_INS_IMUL: imul{q}	$src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IMUL64rm, X86_INS_IMUL: imul{q}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IMUL64rmi32, X86_INS_IMUL: imul{q}	$dst, $src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IMUL64rmi8, X86_INS_IMUL: imul{q}	$dst, $src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IMUL64rr, X86_INS_IMUL: imul{q}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IMUL64rri32, X86_INS_IMUL: imul{q}	$dst, $src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IMUL64rri8, X86_INS_IMUL: imul{q}	$dst, $src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IMUL8m, X86_INS_IMUL: imul{b}	$src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IMUL8r, X86_INS_IMUL: imul{b}	$src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IN16ri, X86_INS_IN: in{w}	ax, $port */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IN16rr, X86_INS_IN: in{w}	ax, dx */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IN32ri, X86_INS_IN: in{l}	eax, $port */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IN32rr, X86_INS_IN: in{l}	eax, dx */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IN8ri, X86_INS_IN: in{b}	al, $port */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_IN8rr, X86_INS_IN: in{b}	al, dx */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_INC16m, X86_INS_INC: inc{w}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_INC16r, X86_INS_INC: inc{w}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_INC16r_alt, X86_INS_INC: inc{w}	$dst */
-		X86_REG_EFLAGS,
-		{ CS_OP_READ | CS_OP_WRITE, 0 }
-	},
-	{	/* X86_INC32m, X86_INS_INC: inc{l}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_INC32r, X86_INS_INC: inc{l}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_INC32r_alt, X86_INS_INC: inc{l}	$dst */
-		X86_REG_EFLAGS,
-		{ CS_OP_READ | CS_OP_WRITE, 0 }
-	},
-	{	/* X86_INC64m, X86_INS_INC: inc{q}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_INC64r, X86_INS_INC: inc{q}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_INC8m, X86_INS_INC: inc{b}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_INC8r, X86_INS_INC: inc{b}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_INSB, X86_INS_INSB: insb	$dst, dx */
-		0,
-		{ 0 }
-	},
-	{	/* X86_INSERTPSrm, X86_INS_INSERTPS: insertps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_INSERTPSrr, X86_INS_INSERTPS: insertps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_INSERTQ, X86_INS_INSERTQ: insertq	$src, $mask */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_INSERTQI, X86_INS_INSERTQ: insertq	$src, $src2, $len, $idx */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_INSL, X86_INS_INSD: ins{l|d}	{%dx, $dst|$dst, dx} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_INSW, X86_INS_INSW: insw	$dst, dx */
-		0,
-		{ 0 }
-	},
-	{	/* X86_INT, X86_INS_INT: int	$trap */
-		X86_EFLAGS_RESET_TF | X86_EFLAGS_RESET_NT,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_INT1, X86_INS_INT1: int1 */
-		X86_EFLAGS_RESET_TF | X86_EFLAGS_RESET_NT,
-		{ 0 }
-	},
-	{	/* X86_INT3, X86_INS_INT3: int3 */
-		X86_EFLAGS_RESET_TF | X86_EFLAGS_RESET_NT,
-		{ 0 }
-	},
-	{	/* X86_INTO, X86_INS_INTO: into */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_RESET_TF | X86_EFLAGS_RESET_NT,
-		{ 0 }
-	},
-	{	/* X86_INVD, X86_INS_INVD: invd */
-		0,
-		{ 0 }
-	},
-	{	/* X86_INVEPT32, X86_INS_INVEPT: invept	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_INVEPT64, X86_INS_INVEPT: invept	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_INVLPG, X86_INS_INVLPG: invlpg	$addr */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_INVLPGA32, X86_INS_INVLPGA: invlpga	eax, ecx */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_INVLPGA64, X86_INS_INVLPGA: invlpga	rax, ecx */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_INVPCID32, X86_INS_INVPCID: invpcid	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_INVPCID64, X86_INS_INVPCID: invpcid	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_INVVPID32, X86_INS_INVVPID: invvpid	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_INVVPID64, X86_INS_INVVPID: invvpid	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_IRET16, X86_INS_IRET: iret{w} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_IRET32, X86_INS_IRETD: iretd */
-		X86_EFLAGS_PRIOR_OF | X86_EFLAGS_PRIOR_SF | X86_EFLAGS_PRIOR_ZF | X86_EFLAGS_PRIOR_AF | X86_EFLAGS_PRIOR_PF | X86_EFLAGS_PRIOR_CF | X86_EFLAGS_PRIOR_TF | X86_EFLAGS_PRIOR_IF | X86_EFLAGS_PRIOR_DF | X86_EFLAGS_TEST_NT,
-		{ 0 }
-	},
-	{	/* X86_IRET64, X86_INS_IRETQ: iretq */
-		X86_EFLAGS_PRIOR_OF | X86_EFLAGS_PRIOR_SF | X86_EFLAGS_PRIOR_ZF | X86_EFLAGS_PRIOR_AF | X86_EFLAGS_PRIOR_PF | X86_EFLAGS_PRIOR_CF | X86_EFLAGS_PRIOR_TF | X86_EFLAGS_PRIOR_IF | X86_EFLAGS_PRIOR_DF | X86_EFLAGS_TEST_NT,
-		{ 0 }
-	},
-	{	/* X86_ISTT_FP16m, X86_INS_FISTTP: fisttp{s}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ISTT_FP32m, X86_INS_FISTTP: fisttp{l}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ISTT_FP64m, X86_INS_FISTTP: fisttp{ll}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_IST_F16m, X86_INS_FIST: fist{s}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_IST_F32m, X86_INS_FIST: fist{l}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_IST_FP16m, X86_INS_FISTP: fistp{s}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_IST_FP32m, X86_INS_FISTP: fistp{l}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_IST_FP64m, X86_INS_FISTP: fistp{ll}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_CMPSDrm, X86_INS_CMPSD: cmp${cc}sd	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_CMPSDrr, X86_INS_CMPSD: cmp${cc}sd	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_CMPSSrm, X86_INS_CMPSS: cmp${cc}ss	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_CMPSSrr, X86_INS_CMPSS: cmp${cc}ss	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_COMISDrm, X86_INS_COMISD: comisd	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_COMISDrr, X86_INS_COMISD: comisd	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_COMISSrm, X86_INS_COMISS: comiss	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_COMISSrr, X86_INS_COMISS: comiss	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_CVTSD2SSrm, X86_INS_CVTSD2SS: cvtsd2ss	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_CVTSD2SSrr, X86_INS_CVTSD2SS: cvtsd2ss	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_CVTSI2SD64rm, X86_INS_CVTSI2SD: cvtsi2sd{q}	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_CVTSI2SD64rr, X86_INS_CVTSI2SD: cvtsi2sd{q}	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_CVTSI2SDrm, X86_INS_CVTSI2SD: cvtsi2sd{l}	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_CVTSI2SDrr, X86_INS_CVTSI2SD: cvtsi2sd{l}	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_CVTSI2SS64rm, X86_INS_CVTSI2SS: cvtsi2ss{q}	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_CVTSI2SS64rr, X86_INS_CVTSI2SS: cvtsi2ss{q}	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_CVTSI2SSrm, X86_INS_CVTSI2SS: cvtsi2ss{l}	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_CVTSI2SSrr, X86_INS_CVTSI2SS: cvtsi2ss{l}	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_CVTSS2SDrm, X86_INS_CVTSS2SD: cvtss2sd	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_CVTSS2SDrr, X86_INS_CVTSS2SD: cvtss2sd	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_CVTTSD2SI64rm, X86_INS_CVTTSD2SI: cvttsd2si	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_CVTTSD2SI64rr, X86_INS_CVTTSD2SI: cvttsd2si	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_CVTTSD2SIrm, X86_INS_CVTTSD2SI: cvttsd2si	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_CVTTSD2SIrr, X86_INS_CVTTSD2SI: cvttsd2si	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_CVTTSS2SI64rm, X86_INS_CVTTSS2SI: cvttss2si	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_CVTTSS2SI64rr, X86_INS_CVTTSS2SI: cvttss2si	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_CVTTSS2SIrm, X86_INS_CVTTSS2SI: cvttss2si	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_CVTTSS2SIrr, X86_INS_CVTTSS2SI: cvttss2si	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_UCOMISDrm, X86_INS_UCOMISD: ucomisd	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_UCOMISDrr, X86_INS_UCOMISD: ucomisd	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_UCOMISSrm, X86_INS_UCOMISS: ucomiss	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_UCOMISSrr, X86_INS_UCOMISS: ucomiss	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCMPSDrm, X86_INS_VCMPSD: vcmp${cc}sd	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCMPSDrr, X86_INS_VCMPSD: vcmp${cc}sd	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCMPSSrm, X86_INS_VCMPSS: vcmp${cc}ss	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCMPSSrr, X86_INS_VCMPSS: vcmp${cc}ss	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCOMISDZrm, X86_INS_VCOMISD: vcomisd	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCOMISDZrr, X86_INS_VCOMISD: vcomisd	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCOMISDrm, X86_INS_VCOMISD: vcomisd	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCOMISDrr, X86_INS_VCOMISD: vcomisd	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCOMISSZrm, X86_INS_VCOMISS: vcomiss	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCOMISSZrr, X86_INS_VCOMISS: vcomiss	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCOMISSrm, X86_INS_VCOMISS: vcomiss	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCOMISSrr, X86_INS_VCOMISS: vcomiss	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTSD2SSrm, X86_INS_VCVTSD2SS: vcvtsd2ss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTSD2SSrr, X86_INS_VCVTSD2SS: vcvtsd2ss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTSI2SD64Zrm, X86_INS_VCVTSI2SD: vcvtsi2sd{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTSI2SD64Zrr, X86_INS_VCVTSI2SD: vcvtsi2sd{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTSI2SD64rm, X86_INS_VCVTSI2SD: vcvtsi2sd{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTSI2SD64rr, X86_INS_VCVTSI2SD: vcvtsi2sd{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTSI2SDZrm, X86_INS_VCVTSI2SD: vcvtsi2sd{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTSI2SDZrr, X86_INS_VCVTSI2SD: vcvtsi2sd{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTSI2SDrm, X86_INS_VCVTSI2SD: vcvtsi2sd{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTSI2SDrr, X86_INS_VCVTSI2SD: vcvtsi2sd{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTSI2SS64Zrm, X86_INS_VCVTSI2SS: vcvtsi2ss{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTSI2SS64Zrr, X86_INS_VCVTSI2SS: vcvtsi2ss{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTSI2SS64rm, X86_INS_VCVTSI2SS: vcvtsi2ss{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTSI2SS64rr, X86_INS_VCVTSI2SS: vcvtsi2ss{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTSI2SSZrm, X86_INS_VCVTSI2SS: vcvtsi2ss{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTSI2SSZrr, X86_INS_VCVTSI2SS: vcvtsi2ss{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTSI2SSrm, X86_INS_VCVTSI2SS: vcvtsi2ss{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTSI2SSrr, X86_INS_VCVTSI2SS: vcvtsi2ss{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTSS2SDrm, X86_INS_VCVTSS2SD: vcvtss2sd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTSS2SDrr, X86_INS_VCVTSS2SD: vcvtss2sd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTTSD2SI64Zrm, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTTSD2SI64Zrr, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTTSD2SI64rm, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTTSD2SI64rr, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTTSD2SIZrm, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTTSD2SIZrr, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTTSD2SIrm, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTTSD2SIrr, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTTSD2USI64Zrm, X86_INS_VCVTTSD2USI: vcvttsd2usi	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTTSD2USI64Zrr, X86_INS_VCVTTSD2USI: vcvttsd2usi	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTTSD2USIZrm, X86_INS_VCVTTSD2USI: vcvttsd2usi	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTTSD2USIZrr, X86_INS_VCVTTSD2USI: vcvttsd2usi	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTTSS2SI64Zrm, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTTSS2SI64Zrr, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTTSS2SI64rm, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTTSS2SI64rr, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTTSS2SIZrm, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTTSS2SIZrr, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTTSS2SIrm, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTTSS2SIrr, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTTSS2USI64Zrm, X86_INS_VCVTTSS2USI: vcvttss2usi	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTTSS2USI64Zrr, X86_INS_VCVTTSS2USI: vcvttss2usi	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTTSS2USIZrm, X86_INS_VCVTTSS2USI: vcvttss2usi	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTTSS2USIZrr, X86_INS_VCVTTSS2USI: vcvttss2usi	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTUSI2SD64Zrm, X86_INS_VCVTUSI2SD: vcvtusi2sd{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTUSI2SD64Zrr, X86_INS_VCVTUSI2SD: vcvtusi2sd{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTUSI2SDZrm, X86_INS_VCVTUSI2SD: vcvtusi2sd{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTUSI2SDZrr, X86_INS_VCVTUSI2SD: vcvtusi2sd{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTUSI2SS64Zrm, X86_INS_VCVTUSI2SS: vcvtusi2ss{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTUSI2SS64Zrr, X86_INS_VCVTUSI2SS: vcvtusi2ss{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTUSI2SSZrm, X86_INS_VCVTUSI2SS: vcvtusi2ss{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VCVTUSI2SSZrr, X86_INS_VCVTUSI2SS: vcvtusi2ss{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VUCOMISDZrm, X86_INS_VUCOMISD: vucomisd	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VUCOMISDZrr, X86_INS_VUCOMISD: vucomisd	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VUCOMISDrm, X86_INS_VUCOMISD: vucomisd	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VUCOMISDrr, X86_INS_VUCOMISD: vucomisd	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VUCOMISSZrm, X86_INS_VUCOMISS: vucomiss	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VUCOMISSZrr, X86_INS_VUCOMISS: vucomiss	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VUCOMISSrm, X86_INS_VUCOMISS: vucomiss	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_Int_VUCOMISSrr, X86_INS_VUCOMISS: vucomiss	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JAE_1, X86_INS_JAE: jae	$dst */
-		X86_EFLAGS_TEST_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JAE_2, X86_INS_JAE: jae	$dst */
-		X86_EFLAGS_TEST_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JAE_4, X86_INS_JAE: jae	$dst */
-		X86_EFLAGS_TEST_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JA_1, X86_INS_JA: ja	$dst */
-		X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JA_2, X86_INS_JA: ja	$dst */
-		X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JA_4, X86_INS_JA: ja	$dst */
-		X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JBE_1, X86_INS_JBE: jbe	$dst */
-		X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JBE_2, X86_INS_JBE: jbe	$dst */
-		X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JBE_4, X86_INS_JBE: jbe	$dst */
-		X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JB_1, X86_INS_JB: jb	$dst */
-		X86_EFLAGS_TEST_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JB_2, X86_INS_JB: jb	$dst */
-		X86_EFLAGS_TEST_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JB_4, X86_INS_JB: jb	$dst */
-		X86_EFLAGS_TEST_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JCXZ, X86_INS_JCXZ: jcxz	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JECXZ, X86_INS_JECXZ: jecxz	$dst */
-		0,
-		{ 0 }
-	},
-	{	/* X86_JE_1, X86_INS_JE: je	$dst */
-		X86_EFLAGS_TEST_ZF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JE_2, X86_INS_JE: je	$dst */
-		X86_EFLAGS_TEST_ZF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JE_4, X86_INS_JE: je	$dst */
-		X86_EFLAGS_TEST_ZF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JGE_1, X86_INS_JGE: jge	$dst */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JGE_2, X86_INS_JGE: jge	$dst */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JGE_4, X86_INS_JGE: jge	$dst */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JG_1, X86_INS_JG: jg	$dst */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JG_2, X86_INS_JG: jg	$dst */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JG_4, X86_INS_JG: jg	$dst */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JLE_1, X86_INS_JLE: jle	$dst */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JLE_2, X86_INS_JLE: jle	$dst */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JLE_4, X86_INS_JLE: jle	$dst */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JL_1, X86_INS_JL: jl	$dst */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JL_2, X86_INS_JL: jl	$dst */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JL_4, X86_INS_JL: jl	$dst */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JMP16m, X86_INS_JMP: jmp{w}	{*}$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JMP16r, X86_INS_JMP: jmp{w}	{*}$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JMP32m, X86_INS_JMP: jmp{l}	{*}$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JMP32r, X86_INS_JMP: jmp{l}	{*}$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JMP64m, X86_INS_JMP: jmp{q}	{*}$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JMP64r, X86_INS_JMP: jmp{q}	{*}$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JMP_1, X86_INS_JMP: jmp	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JMP_2, X86_INS_JMP: jmp	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JMP_4, X86_INS_JMP: jmp	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JNE_1, X86_INS_JNE: jne	$dst */
-		X86_EFLAGS_TEST_ZF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JNE_2, X86_INS_JNE: jne	$dst */
-		X86_EFLAGS_TEST_ZF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JNE_4, X86_INS_JNE: jne	$dst */
-		X86_EFLAGS_TEST_ZF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JNO_1, X86_INS_JNO: jno	$dst */
-		X86_EFLAGS_TEST_OF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JNO_2, X86_INS_JNO: jno	$dst */
-		X86_EFLAGS_TEST_OF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JNO_4, X86_INS_JNO: jno	$dst */
-		X86_EFLAGS_TEST_OF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JNP_1, X86_INS_JNP: jnp	$dst */
-		X86_EFLAGS_TEST_PF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JNP_2, X86_INS_JNP: jnp	$dst */
-		X86_EFLAGS_TEST_PF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JNP_4, X86_INS_JNP: jnp	$dst */
-		X86_EFLAGS_TEST_PF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JNS_1, X86_INS_JNS: jns	$dst */
-		X86_EFLAGS_TEST_SF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JNS_2, X86_INS_JNS: jns	$dst */
-		X86_EFLAGS_TEST_SF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JNS_4, X86_INS_JNS: jns	$dst */
-		X86_EFLAGS_TEST_SF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JO_1, X86_INS_JO: jo	$dst */
-		X86_EFLAGS_TEST_OF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JO_2, X86_INS_JO: jo	$dst */
-		X86_EFLAGS_TEST_OF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JO_4, X86_INS_JO: jo	$dst */
-		X86_EFLAGS_TEST_OF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JP_1, X86_INS_JP: jp	$dst */
-		X86_EFLAGS_TEST_PF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JP_2, X86_INS_JP: jp	$dst */
-		X86_EFLAGS_TEST_PF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JP_4, X86_INS_JP: jp	$dst */
-		X86_EFLAGS_TEST_PF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JRCXZ, X86_INS_JRCXZ: jrcxz	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JS_1, X86_INS_JS: js	$dst */
-		X86_EFLAGS_TEST_SF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JS_2, X86_INS_JS: js	$dst */
-		X86_EFLAGS_TEST_SF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_JS_4, X86_INS_JS: js	$dst */
-		X86_EFLAGS_TEST_SF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KANDBrr, X86_INS_KANDB: kandb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KANDDrr, X86_INS_KANDD: kandd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KANDNBrr, X86_INS_KANDNB: kandnb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KANDNDrr, X86_INS_KANDND: kandnd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KANDNQrr, X86_INS_KANDNQ: kandnq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KANDNWrr, X86_INS_KANDNW: kandnw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KANDQrr, X86_INS_KANDQ: kandq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KANDWrr, X86_INS_KANDW: kandw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KMOVBkk, X86_INS_KMOVB: kmovb	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_KMOVBkm, X86_INS_KMOVB: kmovb	$dst, $src */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_KMOVBkr, X86_INS_KMOVB: kmovb	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_KMOVBmk, X86_INS_KMOVB: kmovb	$dst, $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_KMOVBrk, X86_INS_KMOVB: kmovb	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_KMOVDkk, X86_INS_KMOVD: kmovd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_KMOVDkm, X86_INS_KMOVD: kmovd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_KMOVDkr, X86_INS_KMOVD: kmovd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_KMOVDmk, X86_INS_KMOVD: kmovd	$dst, $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_KMOVDrk, X86_INS_KMOVD: kmovd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_KMOVQkk, X86_INS_KMOVQ: kmovq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_KMOVQkm, X86_INS_KMOVQ: kmovq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_KMOVQkr, X86_INS_KMOVQ: kmovq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_KMOVQmk, X86_INS_KMOVQ: kmovq	$dst, $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_KMOVQrk, X86_INS_KMOVQ: kmovq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_KMOVWkk, X86_INS_KMOVW: kmovw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KMOVWkm, X86_INS_KMOVW: kmovw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KMOVWkr, X86_INS_KMOVW: kmovw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KMOVWmk, X86_INS_KMOVW: kmovw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KMOVWrk, X86_INS_KMOVW: kmovw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KNOTBrr, X86_INS_KNOTB: knotb	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_KNOTDrr, X86_INS_KNOTD: knotd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_KNOTQrr, X86_INS_KNOTQ: knotq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_KNOTWrr, X86_INS_KNOTW: knotw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KORBrr, X86_INS_KORB: korb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KORDrr, X86_INS_KORD: kord	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KORQrr, X86_INS_KORQ: korq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KORTESTBrr, X86_INS_KORTESTB: kortestb	$src1, $src2 */
-		X86_REG_EFLAGS,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KORTESTDrr, X86_INS_KORTESTD: kortestd	$src1, $src2 */
-		X86_REG_EFLAGS,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KORTESTQrr, X86_INS_KORTESTQ: kortestq	$src1, $src2 */
-		X86_REG_EFLAGS,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KORTESTWrr, X86_INS_KORTESTW: kortestw	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KORWrr, X86_INS_KORW: korw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KSHIFTLBri, X86_INS_KSHIFTLB: kshiftlb	$dst, $src, $imm */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_KSHIFTLDri, X86_INS_KSHIFTLD: kshiftld	$dst, $src, $imm */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_KSHIFTLQri, X86_INS_KSHIFTLQ: kshiftlq	$dst, $src, $imm */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_KSHIFTLWri, X86_INS_KSHIFTLW: kshiftlw	$dst, $src, $imm */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KSHIFTRBri, X86_INS_KSHIFTRB: kshiftrb	$dst, $src, $imm */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_KSHIFTRDri, X86_INS_KSHIFTRD: kshiftrd	$dst, $src, $imm */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_KSHIFTRQri, X86_INS_KSHIFTRQ: kshiftrq	$dst, $src, $imm */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_KSHIFTRWri, X86_INS_KSHIFTRW: kshiftrw	$dst, $src, $imm */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KUNPCKBWrr, X86_INS_KUNPCKBW: kunpckbw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KXNORBrr, X86_INS_KXNORB: kxnorb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KXNORDrr, X86_INS_KXNORD: kxnord	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KXNORQrr, X86_INS_KXNORQ: kxnorq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KXNORWrr, X86_INS_KXNORW: kxnorw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KXORBrr, X86_INS_KXORB: kxorb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KXORDrr, X86_INS_KXORD: kxord	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KXORQrr, X86_INS_KXORQ: kxorq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_KXORWrr, X86_INS_KXORW: kxorw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LAHF, X86_INS_LAHF: lahf */
-		0,
-		{ 0 }
-	},
-	{	/* X86_LAR16rm, X86_INS_LAR: lar{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_ZF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LAR16rr, X86_INS_LAR: lar{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_ZF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LAR32rm, X86_INS_LAR: lar{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_ZF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LAR32rr, X86_INS_LAR: lar{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_ZF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LAR64rm, X86_INS_LAR: lar{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_ZF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LAR64rr, X86_INS_LAR: lar{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_ZF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LCMPXCHG16, X86_INS_CMPXCHG: cmpxchg{w}	$ptr, $swap */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LCMPXCHG16B, X86_INS_CMPXCHG16B: cmpxchg16b	$ptr */
-		X86_EFLAGS_MODIFY_ZF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LCMPXCHG32, X86_INS_CMPXCHG: cmpxchg{l}	$ptr, $swap */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LCMPXCHG64, X86_INS_CMPXCHG: cmpxchg{q}	$ptr, $swap */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LCMPXCHG8, X86_INS_CMPXCHG: cmpxchg{b}	$ptr, $swap */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LCMPXCHG8B, X86_INS_CMPXCHG8B: cmpxchg8b	$ptr */
-		X86_EFLAGS_MODIFY_ZF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LDDQUrm, X86_INS_LDDQU: lddqu	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LDMXCSR, X86_INS_LDMXCSR: ldmxcsr	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LDS16rm, X86_INS_LDS: lds{w}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LDS32rm, X86_INS_LDS: lds{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LD_F0, X86_INS_FLDZ: fldz */
-		0,
-		{ 0 }
-	},
-	{	/* X86_LD_F1, X86_INS_FLD1: fld1 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_LD_F32m, X86_INS_FLD: fld{s}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LD_F64m, X86_INS_FLD: fld{l}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LD_F80m, X86_INS_FLD: fld{t}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LD_Frr, X86_INS_FLD: fld	$op */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LEA16r, X86_INS_LEA: lea{w}	{$src|$dst}, {$dst|$src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LEA32r, X86_INS_LEA: lea{l}	{$src|$dst}, {$dst|$src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LEA64_32r, X86_INS_LEA: lea{l}	{$src|$dst}, {$dst|$src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LEA64r, X86_INS_LEA: lea{q}	{$src|$dst}, {$dst|$src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LEAVE, X86_INS_LEAVE: leave */
-		0,
-		{ 0 }
-	},
-	{	/* X86_LEAVE64, X86_INS_LEAVE: leave */
-		0,
-		{ 0 }
-	},
-	{	/* X86_LES16rm, X86_INS_LES: les{w}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LES32rm, X86_INS_LES: les{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LFENCE, X86_INS_LFENCE: lfence */
-		0,
-		{ 0 }
-	},
-	{	/* X86_LFS16rm, X86_INS_LFS: lfs{w}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LFS32rm, X86_INS_LFS: lfs{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LFS64rm, X86_INS_LFS: lfs{q}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LGDT16m, X86_INS_LGDT: lgdt{w}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LGDT32m, X86_INS_LGDT: lgdt{l}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LGDT64m, X86_INS_LGDT: lgdt{q}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LGS16rm, X86_INS_LGS: lgs{w}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LGS32rm, X86_INS_LGS: lgs{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LGS64rm, X86_INS_LGS: lgs{q}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LIDT16m, X86_INS_LIDT: lidt{w}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LIDT32m, X86_INS_LIDT: lidt{l}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LIDT64m, X86_INS_LIDT: lidt{q}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LLDT16m, X86_INS_LLDT: lldt{w}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LLDT16r, X86_INS_LLDT: lldt{w}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LMSW16m, X86_INS_LMSW: lmsw{w}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LMSW16r, X86_INS_LMSW: lmsw{w}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_ADD16mi, X86_INS_ADD: add{w}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_ADD16mi8, X86_INS_ADD: add{w}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_ADD16mr, X86_INS_ADD: add{w}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_ADD32mi, X86_INS_ADD: add{l}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_ADD32mi8, X86_INS_ADD: add{l}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_ADD32mr, X86_INS_ADD: add{l}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_ADD64mi32, X86_INS_ADD: add{q}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_ADD64mi8, X86_INS_ADD: add{q}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_ADD64mr, X86_INS_ADD: add{q}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_ADD8mi, X86_INS_ADD: add{b}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_ADD8mr, X86_INS_ADD: add{b}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_AND16mi, X86_INS_AND: and{w}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_AND16mi8, X86_INS_AND: and{w}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_AND16mr, X86_INS_AND: and{w}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_AND32mi, X86_INS_AND: and{l}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_AND32mi8, X86_INS_AND: and{l}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_AND32mr, X86_INS_AND: and{l}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_AND64mi32, X86_INS_AND: and{q}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_AND64mi8, X86_INS_AND: and{q}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_AND64mr, X86_INS_AND: and{q}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_AND8mi, X86_INS_AND: and{b}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_AND8mr, X86_INS_AND: and{b}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_DEC16m, X86_INS_DEC: dec{w}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_DEC32m, X86_INS_DEC: dec{l}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_DEC64m, X86_INS_DEC: dec{q}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_DEC8m, X86_INS_DEC: dec{b}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_INC16m, X86_INS_INC: inc{w}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_INC32m, X86_INS_INC: inc{l}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_INC64m, X86_INS_INC: inc{q}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_INC8m, X86_INS_INC: inc{b}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_OR16mi, X86_INS_OR: or{w}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_OR16mi8, X86_INS_OR: or{w}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_OR16mr, X86_INS_OR: or{w}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_OR32mi, X86_INS_OR: or{l}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_OR32mi8, X86_INS_OR: or{l}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_OR32mr, X86_INS_OR: or{l}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_OR64mi32, X86_INS_OR: or{q}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_OR64mi8, X86_INS_OR: or{q}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_OR64mr, X86_INS_OR: or{q}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_OR8mi, X86_INS_OR: or{b}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_OR8mr, X86_INS_OR: or{b}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_SUB16mi, X86_INS_SUB: sub{w}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_SUB16mi8, X86_INS_SUB: sub{w}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_SUB16mr, X86_INS_SUB: sub{w}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_SUB32mi, X86_INS_SUB: sub{l}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_SUB32mi8, X86_INS_SUB: sub{l}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_SUB32mr, X86_INS_SUB: sub{l}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_SUB64mi32, X86_INS_SUB: sub{q}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_SUB64mi8, X86_INS_SUB: sub{q}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_SUB64mr, X86_INS_SUB: sub{q}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_SUB8mi, X86_INS_SUB: sub{b}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_SUB8mr, X86_INS_SUB: sub{b}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_XOR16mi, X86_INS_XOR: xor{w}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_XOR16mi8, X86_INS_XOR: xor{w}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_XOR16mr, X86_INS_XOR: xor{w}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_XOR32mi, X86_INS_XOR: xor{l}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_XOR32mi8, X86_INS_XOR: xor{l}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_XOR32mr, X86_INS_XOR: xor{l}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_XOR64mi32, X86_INS_XOR: xor{q}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_XOR64mi8, X86_INS_XOR: xor{q}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_XOR64mr, X86_INS_XOR: xor{q}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_XOR8mi, X86_INS_XOR: xor{b}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOCK_XOR8mr, X86_INS_XOR: xor{b}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LODSB, X86_INS_LODSB: lodsb	al, $src */
-		X86_EFLAGS_TEST_DF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LODSL, X86_INS_LODSD: lods{l|d}	{$src, %eax|eax, $src} */
-		X86_EFLAGS_TEST_DF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LODSQ, X86_INS_LODSQ: lodsq	rax, $src */
-		X86_EFLAGS_TEST_DF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LODSW, X86_INS_LODSW: lodsw	ax, $src */
-		X86_EFLAGS_TEST_DF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOOP, X86_INS_LOOP: loop	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOOPE, X86_INS_LOOPE: loope	$dst */
-		X86_EFLAGS_TEST_ZF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LOOPNE, X86_INS_LOOPNE: loopne	$dst */
-		X86_EFLAGS_TEST_ZF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LRETIL, X86_INS_RETF: {l}retf	$amt */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LRETIQ, X86_INS_RETFQ: {l}retfq	$amt */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LRETIW, X86_INS_RETF: {l}retf	$amt */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LRETL, X86_INS_RETF: {l}retf */
-		0,
-		{ 0 }
-	},
-	{	/* X86_LRETQ, X86_INS_RETFQ: {l}retfq */
-		0,
-		{ 0 }
-	},
-	{	/* X86_LRETW, X86_INS_RETF: {l}retf */
-		0,
-		{ 0 }
-	},
-	{	/* X86_LSL16rm, X86_INS_LSL: lsl{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_ZF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LSL16rr, X86_INS_LSL: lsl{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_ZF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LSL32rm, X86_INS_LSL: lsl{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_ZF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LSL32rr, X86_INS_LSL: lsl{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_ZF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LSL64rm, X86_INS_LSL: lsl{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_ZF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LSL64rr, X86_INS_LSL: lsl{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_ZF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LSS16rm, X86_INS_LSS: lss{w}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LSS32rm, X86_INS_LSS: lss{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LSS64rm, X86_INS_LSS: lss{q}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_LTRm, X86_INS_LTR: ltr{w}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LTRr, X86_INS_LTR: ltr{w}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LXADD16, X86_INS_XADD: xadd{w}	$ptr, $val */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_WRITE, 0 }
-	},
-	{	/* X86_LXADD32, X86_INS_XADD: xadd{l}	$ptr, $val */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_WRITE, 0 }
-	},
-	{	/* X86_LXADD64, X86_INS_XADD: xadd{q}	$ptr, $val */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_WRITE, 0 }
-	},
-	{	/* X86_LXADD8, X86_INS_XADD: xadd{b}	$ptr, $val */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_WRITE, 0 }
-	},
-	{	/* X86_LZCNT16rm, X86_INS_LZCNT: lzcnt{w}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LZCNT16rr, X86_INS_LZCNT: lzcnt{w}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LZCNT32rm, X86_INS_LZCNT: lzcnt{l}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LZCNT32rr, X86_INS_LZCNT: lzcnt{l}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LZCNT64rm, X86_INS_LZCNT: lzcnt{q}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_LZCNT64rr, X86_INS_LZCNT: lzcnt{q}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MASKMOVDQU, X86_INS_MASKMOVDQU: maskmovdqu	$src, $mask */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MASKMOVDQU64, X86_INS_MASKMOVDQU: maskmovdqu	$src, $mask */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MAXCPDrm, X86_INS_MAXPD: maxpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MAXCPDrr, X86_INS_MAXPD: maxpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MAXCPSrm, X86_INS_MAXPS: maxps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MAXCPSrr, X86_INS_MAXPS: maxps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MAXCSDrm, X86_INS_MAXSD: maxsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MAXCSDrr, X86_INS_MAXSD: maxsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MAXCSSrm, X86_INS_MAXSS: maxss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MAXCSSrr, X86_INS_MAXSS: maxss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MAXPDrm, X86_INS_MAXPD: maxpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MAXPDrr, X86_INS_MAXPD: maxpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MAXPSrm, X86_INS_MAXPS: maxps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MAXPSrr, X86_INS_MAXPS: maxps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MAXSDrm, X86_INS_MAXSD: maxsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MAXSDrm_Int, X86_INS_MAXSD: maxsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MAXSDrr, X86_INS_MAXSD: maxsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MAXSDrr_Int, X86_INS_MAXSD: maxsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MAXSSrm, X86_INS_MAXSS: maxss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MAXSSrm_Int, X86_INS_MAXSS: maxss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MAXSSrr, X86_INS_MAXSS: maxss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MAXSSrr_Int, X86_INS_MAXSS: maxss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MFENCE, X86_INS_MFENCE: mfence */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MINCPDrm, X86_INS_MINPD: minpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MINCPDrr, X86_INS_MINPD: minpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MINCPSrm, X86_INS_MINPS: minps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MINCPSrr, X86_INS_MINPS: minps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MINCSDrm, X86_INS_MINSD: minsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MINCSDrr, X86_INS_MINSD: minsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MINCSSrm, X86_INS_MINSS: minss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MINCSSrr, X86_INS_MINSS: minss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MINPDrm, X86_INS_MINPD: minpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MINPDrr, X86_INS_MINPD: minpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MINPSrm, X86_INS_MINPS: minps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MINPSrr, X86_INS_MINPS: minps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MINSDrm, X86_INS_MINSD: minsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MINSDrm_Int, X86_INS_MINSD: minsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MINSDrr, X86_INS_MINSD: minsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MINSDrr_Int, X86_INS_MINSD: minsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MINSSrm, X86_INS_MINSS: minss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MINSSrm_Int, X86_INS_MINSS: minss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MINSSrr, X86_INS_MINSS: minss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MINSSrr_Int, X86_INS_MINSS: minss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_CVTPD2PIirm, X86_INS_CVTPD2PI: cvtpd2pi	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_CVTPD2PIirr, X86_INS_CVTPD2PI: cvtpd2pi	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_CVTPI2PDirm, X86_INS_CVTPI2PD: cvtpi2pd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_CVTPI2PDirr, X86_INS_CVTPI2PD: cvtpi2pd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_CVTPI2PSirm, X86_INS_CVTPI2PS: cvtpi2ps	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_CVTPI2PSirr, X86_INS_CVTPI2PS: cvtpi2ps	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_CVTPS2PIirm, X86_INS_CVTPS2PI: cvtps2pi	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_CVTPS2PIirr, X86_INS_CVTPS2PI: cvtps2pi	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_CVTTPD2PIirm, X86_INS_CVTTPD2PI: cvttpd2pi	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_CVTTPD2PIirr, X86_INS_CVTTPD2PI: cvttpd2pi	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_CVTTPS2PIirm, X86_INS_CVTTPS2PI: cvttps2pi	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_CVTTPS2PIirr, X86_INS_CVTTPS2PI: cvttps2pi	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_EMMS, X86_INS_EMMS: emms */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MMX_MASKMOVQ, X86_INS_MASKMOVQ: maskmovq	$src, $mask */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_MASKMOVQ64, X86_INS_MASKMOVQ: maskmovq	$src, $mask */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_MOVD64from64rm, X86_INS_MOVD: movd	$dst, $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_MOVD64from64rr, X86_INS_MOVD: movd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_MOVD64grr, X86_INS_MOVD: movd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_MOVD64mr, X86_INS_MOVD: movd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_MOVD64rm, X86_INS_MOVD: movd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_MOVD64rr, X86_INS_MOVD: movd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_MOVD64to64rm, X86_INS_MOVD: movd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_MMX_MOVD64to64rr, X86_INS_MOVD: movd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_MOVDQ2Qrr, X86_INS_MOVDQ2Q: movdq2q	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_MOVFR642Qrr, X86_INS_MOVDQ2Q: movdq2q	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_MOVNTQmr, X86_INS_MOVNTQ: movntq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_MOVQ2DQrr, X86_INS_MOVQ2DQ: movq2dq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_MOVQ2FR64rr, X86_INS_MOVQ2DQ: movq2dq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_MOVQ64mr, X86_INS_MOVQ: movq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_MOVQ64rm, X86_INS_MOVQ: movq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_MOVQ64rr, X86_INS_MOVQ: movq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_MOVQ64rr_REV, X86_INS_MOVQ: movq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PABSBrm64, X86_INS_PABSB: pabsb	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PABSBrr64, X86_INS_PABSB: pabsb	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PABSDrm64, X86_INS_PABSD: pabsd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PABSDrr64, X86_INS_PABSD: pabsd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PABSWrm64, X86_INS_PABSW: pabsw	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PABSWrr64, X86_INS_PABSW: pabsw	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PACKSSDWirm, X86_INS_PACKSSDW: packssdw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PACKSSDWirr, X86_INS_PACKSSDW: packssdw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PACKSSWBirm, X86_INS_PACKSSWB: packsswb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PACKSSWBirr, X86_INS_PACKSSWB: packsswb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PACKUSWBirm, X86_INS_PACKUSWB: packuswb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PACKUSWBirr, X86_INS_PACKUSWB: packuswb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PADDBirm, X86_INS_PADDB: paddb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PADDBirr, X86_INS_PADDB: paddb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PADDDirm, X86_INS_PADDD: paddd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PADDDirr, X86_INS_PADDD: paddd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PADDQirm, X86_INS_PADDQ: paddq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PADDQirr, X86_INS_PADDQ: paddq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PADDSBirm, X86_INS_PADDSB: paddsb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PADDSBirr, X86_INS_PADDSB: paddsb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PADDSWirm, X86_INS_PADDSW: paddsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PADDSWirr, X86_INS_PADDSW: paddsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PADDUSBirm, X86_INS_PADDUSB: paddusb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PADDUSBirr, X86_INS_PADDUSB: paddusb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PADDUSWirm, X86_INS_PADDUSW: paddusw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PADDUSWirr, X86_INS_PADDUSW: paddusw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PADDWirm, X86_INS_PADDW: paddw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PADDWirr, X86_INS_PADDW: paddw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PALIGNR64irm, X86_INS_PALIGNR: palignr	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PALIGNR64irr, X86_INS_PALIGNR: palignr	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PANDNirm, X86_INS_PANDN: pandn	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PANDNirr, X86_INS_PANDN: pandn	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PANDirm, X86_INS_PAND: pand	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PANDirr, X86_INS_PAND: pand	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PAVGBirm, X86_INS_PAVGB: pavgb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PAVGBirr, X86_INS_PAVGB: pavgb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PAVGWirm, X86_INS_PAVGW: pavgw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PAVGWirr, X86_INS_PAVGW: pavgw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PCMPEQBirm, X86_INS_PCMPEQB: pcmpeqb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PCMPEQBirr, X86_INS_PCMPEQB: pcmpeqb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PCMPEQDirm, X86_INS_PCMPEQD: pcmpeqd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PCMPEQDirr, X86_INS_PCMPEQD: pcmpeqd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PCMPEQWirm, X86_INS_PCMPEQW: pcmpeqw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PCMPEQWirr, X86_INS_PCMPEQW: pcmpeqw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PCMPGTBirm, X86_INS_PCMPGTB: pcmpgtb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PCMPGTBirr, X86_INS_PCMPGTB: pcmpgtb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PCMPGTDirm, X86_INS_PCMPGTD: pcmpgtd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PCMPGTDirr, X86_INS_PCMPGTD: pcmpgtd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PCMPGTWirm, X86_INS_PCMPGTW: pcmpgtw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PCMPGTWirr, X86_INS_PCMPGTW: pcmpgtw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PEXTRWirri, X86_INS_PEXTRW: pextrw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PHADDSWrm64, X86_INS_PHADDSW: phaddsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PHADDSWrr64, X86_INS_PHADDSW: phaddsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PHADDWrm64, X86_INS_PHADDW: phaddw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PHADDWrr64, X86_INS_PHADDW: phaddw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PHADDrm64, X86_INS_PHADDD: phaddd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PHADDrr64, X86_INS_PHADDD: phaddd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PHSUBDrm64, X86_INS_PHSUBD: phsubd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PHSUBDrr64, X86_INS_PHSUBD: phsubd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PHSUBSWrm64, X86_INS_PHSUBSW: phsubsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PHSUBSWrr64, X86_INS_PHSUBSW: phsubsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PHSUBWrm64, X86_INS_PHSUBW: phsubw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PHSUBWrr64, X86_INS_PHSUBW: phsubw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PINSRWirmi, X86_INS_PINSRW: pinsrw	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PINSRWirri, X86_INS_PINSRW: pinsrw	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PMADDUBSWrm64, X86_INS_PMADDUBSW: pmaddubsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PMADDUBSWrr64, X86_INS_PMADDUBSW: pmaddubsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PMADDWDirm, X86_INS_PMADDWD: pmaddwd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PMADDWDirr, X86_INS_PMADDWD: pmaddwd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PMAXSWirm, X86_INS_PMAXSW: pmaxsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PMAXSWirr, X86_INS_PMAXSW: pmaxsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PMAXUBirm, X86_INS_PMAXUB: pmaxub	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PMAXUBirr, X86_INS_PMAXUB: pmaxub	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PMINSWirm, X86_INS_PMINSW: pminsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PMINSWirr, X86_INS_PMINSW: pminsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PMINUBirm, X86_INS_PMINUB: pminub	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PMINUBirr, X86_INS_PMINUB: pminub	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PMOVMSKBrr, X86_INS_PMOVMSKB: pmovmskb	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PMULHRSWrm64, X86_INS_PMULHRSW: pmulhrsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PMULHRSWrr64, X86_INS_PMULHRSW: pmulhrsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PMULHUWirm, X86_INS_PMULHUW: pmulhuw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PMULHUWirr, X86_INS_PMULHUW: pmulhuw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PMULHWirm, X86_INS_PMULHW: pmulhw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PMULHWirr, X86_INS_PMULHW: pmulhw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PMULLWirm, X86_INS_PMULLW: pmullw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PMULLWirr, X86_INS_PMULLW: pmullw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PMULUDQirm, X86_INS_PMULUDQ: pmuludq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PMULUDQirr, X86_INS_PMULUDQ: pmuludq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PORirm, X86_INS_POR: por	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PORirr, X86_INS_POR: por	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSADBWirm, X86_INS_PSADBW: psadbw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSADBWirr, X86_INS_PSADBW: psadbw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSHUFBrm64, X86_INS_PSHUFB: pshufb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSHUFBrr64, X86_INS_PSHUFB: pshufb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSHUFWmi, X86_INS_PSHUFW: pshufw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSHUFWri, X86_INS_PSHUFW: pshufw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSIGNBrm64, X86_INS_PSIGNB: psignb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSIGNBrr64, X86_INS_PSIGNB: psignb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSIGNDrm64, X86_INS_PSIGND: psignd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSIGNDrr64, X86_INS_PSIGND: psignd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSIGNWrm64, X86_INS_PSIGNW: psignw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSIGNWrr64, X86_INS_PSIGNW: psignw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSLLDri, X86_INS_PSLLD: pslld	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSLLDrm, X86_INS_PSLLD: pslld	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSLLDrr, X86_INS_PSLLD: pslld	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSLLQri, X86_INS_PSLLQ: psllq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSLLQrm, X86_INS_PSLLQ: psllq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSLLQrr, X86_INS_PSLLQ: psllq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSLLWri, X86_INS_PSLLW: psllw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSLLWrm, X86_INS_PSLLW: psllw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSLLWrr, X86_INS_PSLLW: psllw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSRADri, X86_INS_PSRAD: psrad	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSRADrm, X86_INS_PSRAD: psrad	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSRADrr, X86_INS_PSRAD: psrad	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSRAWri, X86_INS_PSRAW: psraw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSRAWrm, X86_INS_PSRAW: psraw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSRAWrr, X86_INS_PSRAW: psraw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSRLDri, X86_INS_PSRLD: psrld	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSRLDrm, X86_INS_PSRLD: psrld	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSRLDrr, X86_INS_PSRLD: psrld	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSRLQri, X86_INS_PSRLQ: psrlq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSRLQrm, X86_INS_PSRLQ: psrlq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSRLQrr, X86_INS_PSRLQ: psrlq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSRLWri, X86_INS_PSRLW: psrlw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSRLWrm, X86_INS_PSRLW: psrlw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSRLWrr, X86_INS_PSRLW: psrlw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSUBBirm, X86_INS_PSUBB: psubb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSUBBirr, X86_INS_PSUBB: psubb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSUBDirm, X86_INS_PSUBD: psubd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSUBDirr, X86_INS_PSUBD: psubd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSUBQirm, X86_INS_PSUBQ: psubq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSUBQirr, X86_INS_PSUBQ: psubq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSUBSBirm, X86_INS_PSUBSB: psubsb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSUBSBirr, X86_INS_PSUBSB: psubsb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSUBSWirm, X86_INS_PSUBSW: psubsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSUBSWirr, X86_INS_PSUBSW: psubsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSUBUSBirm, X86_INS_PSUBUSB: psubusb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSUBUSBirr, X86_INS_PSUBUSB: psubusb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSUBUSWirm, X86_INS_PSUBUSW: psubusw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSUBUSWirr, X86_INS_PSUBUSW: psubusw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSUBWirm, X86_INS_PSUBW: psubw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PSUBWirr, X86_INS_PSUBW: psubw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PUNPCKHBWirm, X86_INS_PUNPCKHBW: punpckhbw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PUNPCKHBWirr, X86_INS_PUNPCKHBW: punpckhbw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PUNPCKHDQirm, X86_INS_PUNPCKHDQ: punpckhdq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PUNPCKHDQirr, X86_INS_PUNPCKHDQ: punpckhdq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PUNPCKHWDirm, X86_INS_PUNPCKHWD: punpckhwd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PUNPCKHWDirr, X86_INS_PUNPCKHWD: punpckhwd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PUNPCKLBWirm, X86_INS_PUNPCKLBW: punpcklbw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PUNPCKLBWirr, X86_INS_PUNPCKLBW: punpcklbw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PUNPCKLDQirm, X86_INS_PUNPCKLDQ: punpckldq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PUNPCKLDQirr, X86_INS_PUNPCKLDQ: punpckldq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PUNPCKLWDirm, X86_INS_PUNPCKLWD: punpcklwd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PUNPCKLWDirr, X86_INS_PUNPCKLWD: punpcklwd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PXORirm, X86_INS_PXOR: pxor	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MMX_PXORirr, X86_INS_PXOR: pxor	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MONITORrrr, X86_INS_MONITOR: monitor */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MONTMUL, X86_INS_MONTMUL: montmul */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MOV16ao16, X86_INS_MOV: mov{w}	ax, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV16ao32, X86_INS_MOV: mov{w}	ax, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MOV16ao64, X86_INS_MOVABS: movabs{w}	ax, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MOV16mi, X86_INS_MOV: mov{w}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV16mr, X86_INS_MOV: mov{w}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV16ms, X86_INS_MOV: mov{w}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV16o16a, X86_INS_MOV: mov{w}	$dst, ax */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV16o32a, X86_INS_MOV: mov{w}	$dst, ax */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MOV16o64a, X86_INS_MOVABS: movabs{w}	$dst, ax */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MOV16ri, X86_INS_MOV: mov{w}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV16ri_alt, X86_INS_MOV: mov{w}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV16rm, X86_INS_MOV: mov{w}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV16rr, X86_INS_MOV: mov{w}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV16rr_REV, X86_INS_MOV: mov{w}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV16rs, X86_INS_MOV: mov{w}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV16sm, X86_INS_MOV: mov{w}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV16sr, X86_INS_MOV: mov{w}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV32ao16, X86_INS_MOV: mov{l}	eax, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MOV32ao32, X86_INS_MOV: mov{l}	eax, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV32ao64, X86_INS_MOVABS: movabs{l}	eax, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MOV32cr, X86_INS_MOV: mov{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV32dr, X86_INS_MOV: mov{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV32mi, X86_INS_MOV: mov{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV32mr, X86_INS_MOV: mov{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV32ms, X86_INS_MOV: mov{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV32o16a, X86_INS_MOV: mov{l}	$dst, eax */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MOV32o32a, X86_INS_MOV: mov{l}	$dst, eax */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV32o64a, X86_INS_MOVABS: movabs{l}	$dst, eax */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MOV32rc, X86_INS_MOV: mov{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV32rd, X86_INS_MOV: mov{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV32ri, X86_INS_MOV: mov{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV32ri_alt, X86_INS_MOV: mov{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV32rm, X86_INS_MOV: mov{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV32rr, X86_INS_MOV: mov{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV32rr_REV, X86_INS_MOV: mov{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV32rs, X86_INS_MOV: mov{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV32sm, X86_INS_MOV: mov{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV32sr, X86_INS_MOV: mov{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV64ao32, X86_INS_MOV: mov{q}	rax, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV64ao64, X86_INS_MOVABS: movabs{q}	rax, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV64cr, X86_INS_MOV: mov{q}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV64dr, X86_INS_MOV: mov{q}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV64mi32, X86_INS_MOV: mov{q}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV64mr, X86_INS_MOV: mov{q}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV64ms, X86_INS_MOV: mov{q}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV64o32a, X86_INS_MOV: mov{q}	$dst, rax */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV64o64a, X86_INS_MOVABS: movabs{q}	$dst, rax */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV64rc, X86_INS_MOV: mov{q}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV64rd, X86_INS_MOV: mov{q}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV64ri, X86_INS_MOVABS: movabs{q}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV64ri32, X86_INS_MOV: mov{q}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV64rm, X86_INS_MOV: mov{q}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV64rr, X86_INS_MOV: mov{q}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV64rr_REV, X86_INS_MOV: mov{q}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV64rs, X86_INS_MOV: mov{q}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV64sm, X86_INS_MOV: mov{q}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV64sr, X86_INS_MOV: mov{q}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV64toPQIrm, X86_INS_MOVQ: mov{d|q}	{$src, $dst|$dst, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MOV64toPQIrr, X86_INS_MOVQ: mov{d|q}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV64toSDrm, X86_INS_MOVQ: movq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV64toSDrr, X86_INS_MOVQ: mov{d|q}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV8ao16, X86_INS_MOV: mov{b}	al, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MOV8ao32, X86_INS_MOV: mov{b}	al, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MOV8ao64, X86_INS_MOVABS: movabs{b}	al, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MOV8mi, X86_INS_MOV: mov{b}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV8mr, X86_INS_MOV: mov{b}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV8mr_NOREX, X86_INS_MOV: mov{b}	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MOV8o16a, X86_INS_MOV: mov{b}	$dst, al */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MOV8o32a, X86_INS_MOV: mov{b}	$dst, al */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MOV8o64a, X86_INS_MOVABS: movabs{b}	$dst, al */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MOV8ri, X86_INS_MOV: mov{b}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV8ri_alt, X86_INS_MOV: mov{b}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV8rm, X86_INS_MOV: mov{b}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV8rm_NOREX, X86_INS_MOV: mov{b}	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MOV8rr, X86_INS_MOV: mov{b}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOV8rr_NOREX, X86_INS_MOV: mov{b}	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MOV8rr_REV, X86_INS_MOV: mov{b}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVAPDmr, X86_INS_MOVAPD: movapd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVAPDrm, X86_INS_MOVAPD: movapd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVAPDrr, X86_INS_MOVAPD: movapd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVAPDrr_REV, X86_INS_MOVAPD: movapd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVAPSmr, X86_INS_MOVAPS: movaps	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVAPSrm, X86_INS_MOVAPS: movaps	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVAPSrr, X86_INS_MOVAPS: movaps	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVAPSrr_REV, X86_INS_MOVAPS: movaps	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVBE16mr, X86_INS_MOVBE: movbe{w}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVBE16rm, X86_INS_MOVBE: movbe{w}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVBE32mr, X86_INS_MOVBE: movbe{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVBE32rm, X86_INS_MOVBE: movbe{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVBE64mr, X86_INS_MOVBE: movbe{q}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVBE64rm, X86_INS_MOVBE: movbe{q}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVDDUPrm, X86_INS_MOVDDUP: movddup	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVDDUPrr, X86_INS_MOVDDUP: movddup	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVDI2PDIrm, X86_INS_MOVD: movd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVDI2PDIrr, X86_INS_MOVD: movd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVDI2SSrm, X86_INS_MOVD: movd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVDI2SSrr, X86_INS_MOVD: movd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVDQAmr, X86_INS_MOVDQA: movdqa	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVDQArm, X86_INS_MOVDQA: movdqa	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVDQArr, X86_INS_MOVDQA: movdqa	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVDQArr_REV, X86_INS_MOVDQA: movdqa	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVDQUmr, X86_INS_MOVDQU: movdqu	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVDQUrm, X86_INS_MOVDQU: movdqu	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVDQUrr, X86_INS_MOVDQU: movdqu	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVDQUrr_REV, X86_INS_MOVDQU: movdqu	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVHLPSrr, X86_INS_MOVHLPS: movhlps	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVHPDmr, X86_INS_MOVHPD: movhpd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVHPDrm, X86_INS_MOVHPD: movhpd	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVHPSmr, X86_INS_MOVHPS: movhps	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVHPSrm, X86_INS_MOVHPS: movhps	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVLHPSrr, X86_INS_MOVLHPS: movlhps	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVLPDmr, X86_INS_MOVLPD: movlpd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVLPDrm, X86_INS_MOVLPD: movlpd	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVLPSmr, X86_INS_MOVLPS: movlps	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVLPSrm, X86_INS_MOVLPS: movlps	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVMSKPDrr, X86_INS_MOVMSKPD: movmskpd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVMSKPSrr, X86_INS_MOVMSKPS: movmskps	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVNTDQArm, X86_INS_MOVNTDQA: movntdqa	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVNTDQmr, X86_INS_MOVNTDQ: movntdq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVNTI_64mr, X86_INS_MOVNTI: movnti{q}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVNTImr, X86_INS_MOVNTI: movnti{l}	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVNTPDmr, X86_INS_MOVNTPD: movntpd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVNTPSmr, X86_INS_MOVNTPS: movntps	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVNTSD, X86_INS_MOVNTSD: movntsd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVNTSS, X86_INS_MOVNTSS: movntss	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVPDI2DImr, X86_INS_MOVD: movd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVPDI2DIrr, X86_INS_MOVD: movd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVPQI2QImr, X86_INS_MOVQ: movq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVPQI2QIrr, X86_INS_MOVQ: movq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVPQIto64rm, X86_INS_MOVQ: mov{d|q}	{$src, $dst|$dst, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MOVPQIto64rr, X86_INS_MOVQ: mov{d|q}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVQI2PQIrm, X86_INS_MOVQ: movq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSB, X86_INS_MOVSB: movsb	$dst, $src */
-		X86_EFLAGS_TEST_DF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSDmr, X86_INS_MOVSD: movsd	$dst, $src */
-		X86_EFLAGS_TEST_DF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSDrm, X86_INS_MOVSD: movsd	$dst, $src */
-		X86_EFLAGS_TEST_DF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSDrr, X86_INS_MOVSD: movsd	$dst, $src2 */
-		X86_EFLAGS_TEST_DF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSDrr_REV, X86_INS_MOVSD: movsd	$dst, $src2 */
-		X86_EFLAGS_TEST_DF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSDto64mr, X86_INS_MOVQ: movq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSDto64rr, X86_INS_MOVQ: mov{d|q}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSHDUPrm, X86_INS_MOVSHDUP: movshdup	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSHDUPrr, X86_INS_MOVSHDUP: movshdup	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSL, X86_INS_MOVSD: movs{l|d}	{$src, $dst|$dst, $src} */
-		X86_EFLAGS_TEST_DF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSLDUPrm, X86_INS_MOVSLDUP: movsldup	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSLDUPrr, X86_INS_MOVSLDUP: movsldup	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSQ, X86_INS_MOVSQ: movsq	$dst, $src */
-		X86_EFLAGS_TEST_DF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSS2DImr, X86_INS_MOVD: movd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSS2DIrr, X86_INS_MOVD: movd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSSmr, X86_INS_MOVSS: movss	$dst, $src */
-		X86_EFLAGS_TEST_DF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSSrm, X86_INS_MOVSS: movss	$dst, $src */
-		X86_EFLAGS_TEST_DF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSSrr, X86_INS_MOVSS: movss	$dst, $src2 */
-		X86_EFLAGS_TEST_DF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSSrr_REV, X86_INS_MOVSS: movss	$dst, $src2 */
-		X86_EFLAGS_TEST_DF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSW, X86_INS_MOVSW: movsw	$dst, $src */
-		X86_EFLAGS_TEST_DF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSX16rm8, X86_INS_MOVSX: movs{bw|x}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSX16rr8, X86_INS_MOVSX: movs{bw|x}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSX32_NOREXrm8, X86_INS_MOVSX: movs{bl|x}	{$src, $dst|$dst, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MOVSX32_NOREXrr8, X86_INS_MOVSX: movs{bl|x}	{$src, $dst|$dst, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MOVSX32rm16, X86_INS_MOVSX: movs{wl|x}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSX32rm8, X86_INS_MOVSX: movs{bl|x}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSX32rr16, X86_INS_MOVSX: movs{wl|x}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSX32rr8, X86_INS_MOVSX: movs{bl|x}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSX64_NOREXrr32, X86_INS_MOVSXD: movs{lq|xd}	{$src, $dst|$dst, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MOVSX64rm16, X86_INS_MOVSX: movs{wq|x}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSX64rm32, X86_INS_MOVSXD: movs{lq|xd}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSX64rm32_alt, X86_INS_MOVSXD: movs{lq|xd}	{$src, $dst|$dst, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_MOVSX64rm8, X86_INS_MOVSX: movs{bq|x}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSX64rr16, X86_INS_MOVSX: movs{wq|x}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSX64rr32, X86_INS_MOVSXD: movs{lq|xd}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVSX64rr8, X86_INS_MOVSX: movs{bq|x}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVUPDmr, X86_INS_MOVUPD: movupd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVUPDrm, X86_INS_MOVUPD: movupd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVUPDrr, X86_INS_MOVUPD: movupd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVUPDrr_REV, X86_INS_MOVUPD: movupd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVUPSmr, X86_INS_MOVUPS: movups	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVUPSrm, X86_INS_MOVUPS: movups	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVUPSrr, X86_INS_MOVUPS: movups	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVUPSrr_REV, X86_INS_MOVUPS: movups	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVZPQILo2PQIrm, X86_INS_MOVQ: movq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVZPQILo2PQIrr, X86_INS_MOVQ: movq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVZQI2PQIrm, X86_INS_MOVQ: movq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVZQI2PQIrr, X86_INS_MOVQ: mov{d|q}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVZX16rm8, X86_INS_MOVZX: movz{bw|x}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVZX16rr8, X86_INS_MOVZX: movz{bw|x}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVZX32_NOREXrm8, X86_INS_MOVZX: movz{bl|x}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVZX32_NOREXrr8, X86_INS_MOVZX: movz{bl|x}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVZX32rm16, X86_INS_MOVZX: movz{wl|x}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVZX32rm8, X86_INS_MOVZX: movz{bl|x}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVZX32rr16, X86_INS_MOVZX: movz{wl|x}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVZX32rr8, X86_INS_MOVZX: movz{bl|x}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVZX64rm16_Q, X86_INS_MOVZX: movz{wq|x}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVZX64rm8_Q, X86_INS_MOVZX: movz{bq|x}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVZX64rr16_Q, X86_INS_MOVZX: movz{wq|x}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MOVZX64rr8_Q, X86_INS_MOVZX: movz{bq|x}	{$src, $dst|$dst, $src} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MPSADBWrmi, X86_INS_MPSADBW: mpsadbw	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MPSADBWrri, X86_INS_MPSADBW: mpsadbw	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MUL16m, X86_INS_MUL: mul{w}	$src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MUL16r, X86_INS_MUL: mul{w}	$src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MUL32m, X86_INS_MUL: mul{l}	$src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MUL32r, X86_INS_MUL: mul{l}	$src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MUL64m, X86_INS_MUL: mul{q}	$src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MUL64r, X86_INS_MUL: mul{q}	$src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MUL8m, X86_INS_MUL: mul{b}	$src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MUL8r, X86_INS_MUL: mul{b}	$src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MULPDrm, X86_INS_MULPD: mulpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MULPDrr, X86_INS_MULPD: mulpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MULPSrm, X86_INS_MULPS: mulps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MULPSrr, X86_INS_MULPS: mulps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MULSDrm, X86_INS_MULSD: mulsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MULSDrm_Int, X86_INS_MULSD: mulsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MULSDrr, X86_INS_MULSD: mulsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MULSDrr_Int, X86_INS_MULSD: mulsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MULSSrm, X86_INS_MULSS: mulss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MULSSrm_Int, X86_INS_MULSS: mulss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MULSSrr, X86_INS_MULSS: mulss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MULSSrr_Int, X86_INS_MULSS: mulss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_MULX32rm, X86_INS_MULX: mulx{l}	$dst1, $dst2, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MULX32rr, X86_INS_MULX: mulx{l}	$dst1, $dst2, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MULX64rm, X86_INS_MULX: mulx{q}	$dst1, $dst2, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MULX64rr, X86_INS_MULX: mulx{q}	$dst1, $dst2, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MUL_F32m, X86_INS_FMUL: fmul{s}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MUL_F64m, X86_INS_FMUL: fmul{l}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MUL_FI16m, X86_INS_FIMUL: fimul{s}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MUL_FI32m, X86_INS_FIMUL: fimul{l}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MUL_FPrST0, X86_INS_FMULP: fmulp	$op */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MUL_FST0r, X86_INS_FMUL: fmul	$op */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MUL_FrST0, X86_INS_FMUL: fmul	$op, st(0) */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_MWAITrr, X86_INS_MWAIT: mwait */
-		0,
-		{ 0 }
-	},
-	{	/* X86_NEG16m, X86_INS_NEG: neg{w}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_NEG16r, X86_INS_NEG: neg{w}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_NEG32m, X86_INS_NEG: neg{l}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_NEG32r, X86_INS_NEG: neg{l}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_NEG64m, X86_INS_NEG: neg{q}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_NEG64r, X86_INS_NEG: neg{q}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_NEG8m, X86_INS_NEG: neg{b}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_NEG8r, X86_INS_NEG: neg{b}	$dst */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOP, X86_INS_NOP: nop */
-		0,
-		{ 0 }
-	},
-	{	/* X86_NOOP18_16m4, X86_INS_NOP: nop{w}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOP18_16m5, X86_INS_NOP: nop{w}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOP18_16m6, X86_INS_NOP: nop{w}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOP18_16m7, X86_INS_NOP: nop{w}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOP18_16r4, X86_INS_NOP: nop{w}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOP18_16r5, X86_INS_NOP: nop{w}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOP18_16r6, X86_INS_NOP: nop{w}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOP18_16r7, X86_INS_NOP: nop{w}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOP18_m4, X86_INS_NOP: nop{l}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOP18_m5, X86_INS_NOP: nop{l}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOP18_m6, X86_INS_NOP: nop{l}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOP18_m7, X86_INS_NOP: nop{l}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOP18_r4, X86_INS_NOP: nop{l}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOP18_r5, X86_INS_NOP: nop{l}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOP18_r6, X86_INS_NOP: nop{l}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOP18_r7, X86_INS_NOP: nop{l}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOP19rr, X86_INS_NOP: nop	$src, $val */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOPL, X86_INS_NOP: nop{l}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOPL_19, X86_INS_NOP: nop{l}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOPL_1a, X86_INS_NOP: nop{l}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOPL_1b, X86_INS_NOP: nop{l}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOPL_1c, X86_INS_NOP: nop{l}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOPL_1d, X86_INS_NOP: nop{l}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOPL_1e, X86_INS_NOP: nop{l}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOPW, X86_INS_NOP: nop{w}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOPW_19, X86_INS_NOP: nop{w}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOPW_1a, X86_INS_NOP: nop{w}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOPW_1b, X86_INS_NOP: nop{w}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOPW_1c, X86_INS_NOP: nop{w}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOPW_1d, X86_INS_NOP: nop{w}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOOPW_1e, X86_INS_NOP: nop{w}	$zero */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOT16m, X86_INS_NOT: not{w}	$dst */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOT16r, X86_INS_NOT: not{w}	$dst */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOT32m, X86_INS_NOT: not{l}	$dst */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOT32r, X86_INS_NOT: not{l}	$dst */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOT64m, X86_INS_NOT: not{q}	$dst */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOT64r, X86_INS_NOT: not{q}	$dst */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOT8m, X86_INS_NOT: not{b}	$dst */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_NOT8r, X86_INS_NOT: not{b}	$dst */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR16i16, X86_INS_OR: or{w}	ax, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR16mi, X86_INS_OR: or{w}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR16mi8, X86_INS_OR: or{w}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR16mr, X86_INS_OR: or{w}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR16ri, X86_INS_OR: or{w}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR16ri8, X86_INS_OR: or{w}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR16rm, X86_INS_OR: or{w}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR16rr, X86_INS_OR: or{w}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR16rr_REV, X86_INS_OR: or{w}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR32i32, X86_INS_OR: or{l}	eax, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR32mi, X86_INS_OR: or{l}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR32mi8, X86_INS_OR: or{l}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR32mr, X86_INS_OR: or{l}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR32mrLocked, X86_INS_OR: or{l}	$dst, $zero */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR32ri, X86_INS_OR: or{l}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR32ri8, X86_INS_OR: or{l}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR32rm, X86_INS_OR: or{l}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR32rr, X86_INS_OR: or{l}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR32rr_REV, X86_INS_OR: or{l}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR64i32, X86_INS_OR: or{q}	rax, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR64mi32, X86_INS_OR: or{q}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR64mi8, X86_INS_OR: or{q}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR64mr, X86_INS_OR: or{q}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR64ri32, X86_INS_OR: or{q}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR64ri8, X86_INS_OR: or{q}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR64rm, X86_INS_OR: or{q}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR64rr, X86_INS_OR: or{q}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR64rr_REV, X86_INS_OR: or{q}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR8i8, X86_INS_OR: or{b}	al, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR8mi, X86_INS_OR: or{b}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR8mi8, X86_INS_OR: or{b}	$dst, $src */
-		X86_REG_EFLAGS,
-		{ 0 }
-	},
-	{	/* X86_OR8mr, X86_INS_OR: or{b}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR8ri, X86_INS_OR: or{b}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR8ri8, X86_INS_OR: or{b}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR8rm, X86_INS_OR: or{b}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR8rr, X86_INS_OR: or{b}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_OR8rr_REV, X86_INS_OR: or{b}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ORPDrm, X86_INS_ORPD: orpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ORPDrr, X86_INS_ORPD: orpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ORPSrm, X86_INS_ORPS: orps	$dst, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ORPSrr, X86_INS_ORPS: orps	$dst, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_OUT16ir, X86_INS_OUT: out{w}	$port, ax */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_OUT16rr, X86_INS_OUT: out{w}	dx, ax */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_OUT32ir, X86_INS_OUT: out{l}	$port, eax */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_OUT32rr, X86_INS_OUT: out{l}	dx, eax */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_OUT8ir, X86_INS_OUT: out{b}	$port, al */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_OUT8rr, X86_INS_OUT: out{b}	dx, al */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_OUTSB, X86_INS_OUTSB: outsb	dx, $src */
-		X86_EFLAGS_TEST_DF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_OUTSL, X86_INS_OUTSD: outs{l|d}	{$src, %dx|dx, $src} */
-		X86_EFLAGS_TEST_DF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_OUTSW, X86_INS_OUTSW: outsw	dx, $src */
-		X86_EFLAGS_TEST_DF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PABSBrm128, X86_INS_PABSB: pabsb	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PABSBrr128, X86_INS_PABSB: pabsb	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PABSDrm128, X86_INS_PABSD: pabsd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PABSDrr128, X86_INS_PABSD: pabsd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PABSWrm128, X86_INS_PABSW: pabsw	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PABSWrr128, X86_INS_PABSW: pabsw	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PACKSSDWrm, X86_INS_PACKSSDW: packssdw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PACKSSDWrr, X86_INS_PACKSSDW: packssdw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PACKSSWBrm, X86_INS_PACKSSWB: packsswb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PACKSSWBrr, X86_INS_PACKSSWB: packsswb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PACKUSDWrm, X86_INS_PACKUSDW: packusdw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PACKUSDWrr, X86_INS_PACKUSDW: packusdw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PACKUSWBrm, X86_INS_PACKUSWB: packuswb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PACKUSWBrr, X86_INS_PACKUSWB: packuswb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PADDBrm, X86_INS_PADDB: paddb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PADDBrr, X86_INS_PADDB: paddb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PADDDrm, X86_INS_PADDD: paddd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PADDDrr, X86_INS_PADDD: paddd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PADDQrm, X86_INS_PADDQ: paddq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PADDQrr, X86_INS_PADDQ: paddq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PADDSBrm, X86_INS_PADDSB: paddsb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PADDSBrr, X86_INS_PADDSB: paddsb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PADDSWrm, X86_INS_PADDSW: paddsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PADDSWrr, X86_INS_PADDSW: paddsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PADDUSBrm, X86_INS_PADDUSB: paddusb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PADDUSBrr, X86_INS_PADDUSB: paddusb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PADDUSWrm, X86_INS_PADDUSW: paddusw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PADDUSWrr, X86_INS_PADDUSW: paddusw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PADDWrm, X86_INS_PADDW: paddw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PADDWrr, X86_INS_PADDW: paddw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PALIGNR128rm, X86_INS_PALIGNR: palignr	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PALIGNR128rr, X86_INS_PALIGNR: palignr	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PANDNrm, X86_INS_PANDN: pandn	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PANDNrr, X86_INS_PANDN: pandn	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PANDrm, X86_INS_PAND: pand	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PANDrr, X86_INS_PAND: pand	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PAUSE, X86_INS_PAUSE: pause */
-		0,
-		{ 0 }
-	},
-	{	/* X86_PAVGBrm, X86_INS_PAVGB: pavgb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PAVGBrr, X86_INS_PAVGB: pavgb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PAVGUSBrm, X86_INS_PAVGUSB: pavgusb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PAVGUSBrr, X86_INS_PAVGUSB: pavgusb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PAVGWrm, X86_INS_PAVGW: pavgw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PAVGWrr, X86_INS_PAVGW: pavgw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PBLENDVBrm0, X86_INS_PBLENDVB: pblendvb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PBLENDVBrr0, X86_INS_PBLENDVB: pblendvb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PBLENDWrmi, X86_INS_PBLENDW: pblendw	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PBLENDWrri, X86_INS_PBLENDW: pblendw	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCLMULQDQrm, X86_INS_PCLMULQDQ: pclmulqdq	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCLMULQDQrr, X86_INS_PCLMULQDQ: pclmulqdq	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCMPEQBrm, X86_INS_PCMPEQB: pcmpeqb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCMPEQBrr, X86_INS_PCMPEQB: pcmpeqb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCMPEQDrm, X86_INS_PCMPEQD: pcmpeqd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCMPEQDrr, X86_INS_PCMPEQD: pcmpeqd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCMPEQQrm, X86_INS_PCMPEQQ: pcmpeqq	$dst, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCMPEQQrr, X86_INS_PCMPEQQ: pcmpeqq	$dst, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCMPEQWrm, X86_INS_PCMPEQW: pcmpeqw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCMPEQWrr, X86_INS_PCMPEQW: pcmpeqw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCMPESTRIrm, X86_INS_PCMPESTRI: pcmpestri	$src1, $src3, $src5 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCMPESTRIrr, X86_INS_PCMPESTRI: pcmpestri	$src1, $src3, $src5 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCMPESTRM128rm, X86_INS_PCMPESTRM: pcmpestrm	$src1, $src3, $src5 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCMPESTRM128rr, X86_INS_PCMPESTRM: pcmpestrm	$src1, $src3, $src5 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCMPGTBrm, X86_INS_PCMPGTB: pcmpgtb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCMPGTBrr, X86_INS_PCMPGTB: pcmpgtb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCMPGTDrm, X86_INS_PCMPGTD: pcmpgtd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCMPGTDrr, X86_INS_PCMPGTD: pcmpgtd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCMPGTQrm, X86_INS_PCMPGTQ: pcmpgtq	$dst, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCMPGTQrr, X86_INS_PCMPGTQ: pcmpgtq	$dst, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCMPGTWrm, X86_INS_PCMPGTW: pcmpgtw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCMPGTWrr, X86_INS_PCMPGTW: pcmpgtw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCMPISTRIrm, X86_INS_PCMPISTRI: pcmpistri	$src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCMPISTRIrr, X86_INS_PCMPISTRI: pcmpistri	$src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCMPISTRM128rm, X86_INS_PCMPISTRM: pcmpistrm	$src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCMPISTRM128rr, X86_INS_PCMPISTRM: pcmpistrm	$src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PCOMMIT, X86_INS_PCOMMIT: pcommit */
-		0,
-		{ 0 }
-	},
-	{	/* X86_PDEP32rm, X86_INS_PDEP: pdep{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PDEP32rr, X86_INS_PDEP: pdep{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PDEP64rm, X86_INS_PDEP: pdep{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PDEP64rr, X86_INS_PDEP: pdep{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PEXT32rm, X86_INS_PEXT: pext{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PEXT32rr, X86_INS_PEXT: pext{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PEXT64rm, X86_INS_PEXT: pext{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PEXT64rr, X86_INS_PEXT: pext{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PEXTRBmr, X86_INS_PEXTRB: pextrb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PEXTRBrr, X86_INS_PEXTRB: pextrb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PEXTRDmr, X86_INS_PEXTRD: pextrd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PEXTRDrr, X86_INS_PEXTRD: pextrd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PEXTRQmr, X86_INS_PEXTRQ: pextrq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PEXTRQrr, X86_INS_PEXTRQ: pextrq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PEXTRWmr, X86_INS_PEXTRW: pextrw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PEXTRWri, X86_INS_PEXTRW: pextrw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PEXTRWrr_REV, X86_INS_PEXTRW: pextrw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PF2IDrm, X86_INS_PF2ID: pf2id	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PF2IDrr, X86_INS_PF2ID: pf2id	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PF2IWrm, X86_INS_PF2IW: pf2iw	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PF2IWrr, X86_INS_PF2IW: pf2iw	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFACCrm, X86_INS_PFACC: pfacc	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFACCrr, X86_INS_PFACC: pfacc	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFADDrm, X86_INS_PFADD: pfadd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFADDrr, X86_INS_PFADD: pfadd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFCMPEQrm, X86_INS_PFCMPEQ: pfcmpeq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFCMPEQrr, X86_INS_PFCMPEQ: pfcmpeq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFCMPGErm, X86_INS_PFCMPGE: pfcmpge	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFCMPGErr, X86_INS_PFCMPGE: pfcmpge	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFCMPGTrm, X86_INS_PFCMPGT: pfcmpgt	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFCMPGTrr, X86_INS_PFCMPGT: pfcmpgt	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFMAXrm, X86_INS_PFMAX: pfmax	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFMAXrr, X86_INS_PFMAX: pfmax	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFMINrm, X86_INS_PFMIN: pfmin	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFMINrr, X86_INS_PFMIN: pfmin	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFMULrm, X86_INS_PFMUL: pfmul	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFMULrr, X86_INS_PFMUL: pfmul	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFNACCrm, X86_INS_PFNACC: pfnacc	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFNACCrr, X86_INS_PFNACC: pfnacc	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFPNACCrm, X86_INS_PFPNACC: pfpnacc	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFPNACCrr, X86_INS_PFPNACC: pfpnacc	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFRCPIT1rm, X86_INS_PFRCPIT1: pfrcpit1	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFRCPIT1rr, X86_INS_PFRCPIT1: pfrcpit1	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFRCPIT2rm, X86_INS_PFRCPIT2: pfrcpit2	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFRCPIT2rr, X86_INS_PFRCPIT2: pfrcpit2	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFRCPrm, X86_INS_PFRCP: pfrcp	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFRCPrr, X86_INS_PFRCP: pfrcp	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFRSQIT1rm, X86_INS_PFRSQIT1: pfrsqit1	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFRSQIT1rr, X86_INS_PFRSQIT1: pfrsqit1	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFRSQRTrm, X86_INS_PFRSQRT: pfrsqrt	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFRSQRTrr, X86_INS_PFRSQRT: pfrsqrt	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFSUBRrm, X86_INS_PFSUBR: pfsubr	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFSUBRrr, X86_INS_PFSUBR: pfsubr	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFSUBrm, X86_INS_PFSUB: pfsub	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PFSUBrr, X86_INS_PFSUB: pfsub	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PHADDDrm, X86_INS_PHADDD: phaddd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PHADDDrr, X86_INS_PHADDD: phaddd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PHADDSWrm128, X86_INS_PHADDSW: phaddsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PHADDSWrr128, X86_INS_PHADDSW: phaddsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PHADDWrm, X86_INS_PHADDW: phaddw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PHADDWrr, X86_INS_PHADDW: phaddw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PHMINPOSUWrm128, X86_INS_PHMINPOSUW: phminposuw	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PHMINPOSUWrr128, X86_INS_PHMINPOSUW: phminposuw	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PHSUBDrm, X86_INS_PHSUBD: phsubd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PHSUBDrr, X86_INS_PHSUBD: phsubd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PHSUBSWrm128, X86_INS_PHSUBSW: phsubsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PHSUBSWrr128, X86_INS_PHSUBSW: phsubsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PHSUBWrm, X86_INS_PHSUBW: phsubw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PHSUBWrr, X86_INS_PHSUBW: phsubw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PI2FDrm, X86_INS_PI2FD: pi2fd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PI2FDrr, X86_INS_PI2FD: pi2fd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PI2FWrm, X86_INS_PI2FW: pi2fw	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PI2FWrr, X86_INS_PI2FW: pi2fw	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PINSRBrm, X86_INS_PINSRB: pinsrb	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PINSRBrr, X86_INS_PINSRB: pinsrb	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PINSRDrm, X86_INS_PINSRD: pinsrd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PINSRDrr, X86_INS_PINSRD: pinsrd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PINSRQrm, X86_INS_PINSRQ: pinsrq	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PINSRQrr, X86_INS_PINSRQ: pinsrq	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PINSRWrmi, X86_INS_PINSRW: pinsrw	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PINSRWrri, X86_INS_PINSRW: pinsrw	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMADDUBSWrm128, X86_INS_PMADDUBSW: pmaddubsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMADDUBSWrr128, X86_INS_PMADDUBSW: pmaddubsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMADDWDrm, X86_INS_PMADDWD: pmaddwd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMADDWDrr, X86_INS_PMADDWD: pmaddwd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMAXSBrm, X86_INS_PMAXSB: pmaxsb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMAXSBrr, X86_INS_PMAXSB: pmaxsb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMAXSDrm, X86_INS_PMAXSD: pmaxsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMAXSDrr, X86_INS_PMAXSD: pmaxsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMAXSWrm, X86_INS_PMAXSW: pmaxsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMAXSWrr, X86_INS_PMAXSW: pmaxsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMAXUBrm, X86_INS_PMAXUB: pmaxub	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMAXUBrr, X86_INS_PMAXUB: pmaxub	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMAXUDrm, X86_INS_PMAXUD: pmaxud	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMAXUDrr, X86_INS_PMAXUD: pmaxud	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMAXUWrm, X86_INS_PMAXUW: pmaxuw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMAXUWrr, X86_INS_PMAXUW: pmaxuw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMINSBrm, X86_INS_PMINSB: pminsb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMINSBrr, X86_INS_PMINSB: pminsb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMINSDrm, X86_INS_PMINSD: pminsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMINSDrr, X86_INS_PMINSD: pminsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMINSWrm, X86_INS_PMINSW: pminsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMINSWrr, X86_INS_PMINSW: pminsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMINUBrm, X86_INS_PMINUB: pminub	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMINUBrr, X86_INS_PMINUB: pminub	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMINUDrm, X86_INS_PMINUD: pminud	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMINUDrr, X86_INS_PMINUD: pminud	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMINUWrm, X86_INS_PMINUW: pminuw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMINUWrr, X86_INS_PMINUW: pminuw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMOVMSKBrr, X86_INS_PMOVMSKB: pmovmskb	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMOVSXBDrm, X86_INS_PMOVSXBD: pmovsxbd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMOVSXBDrr, X86_INS_PMOVSXBD: pmovsxbd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMOVSXBQrm, X86_INS_PMOVSXBQ: pmovsxbq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMOVSXBQrr, X86_INS_PMOVSXBQ: pmovsxbq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMOVSXBWrm, X86_INS_PMOVSXBW: pmovsxbw	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMOVSXBWrr, X86_INS_PMOVSXBW: pmovsxbw	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMOVSXDQrm, X86_INS_PMOVSXDQ: pmovsxdq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMOVSXDQrr, X86_INS_PMOVSXDQ: pmovsxdq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMOVSXWDrm, X86_INS_PMOVSXWD: pmovsxwd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMOVSXWDrr, X86_INS_PMOVSXWD: pmovsxwd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMOVSXWQrm, X86_INS_PMOVSXWQ: pmovsxwq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMOVSXWQrr, X86_INS_PMOVSXWQ: pmovsxwq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMOVZXBDrm, X86_INS_PMOVZXBD: pmovzxbd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMOVZXBDrr, X86_INS_PMOVZXBD: pmovzxbd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMOVZXBQrm, X86_INS_PMOVZXBQ: pmovzxbq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMOVZXBQrr, X86_INS_PMOVZXBQ: pmovzxbq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMOVZXBWrm, X86_INS_PMOVZXBW: pmovzxbw	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMOVZXBWrr, X86_INS_PMOVZXBW: pmovzxbw	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMOVZXDQrm, X86_INS_PMOVZXDQ: pmovzxdq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMOVZXDQrr, X86_INS_PMOVZXDQ: pmovzxdq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMOVZXWDrm, X86_INS_PMOVZXWD: pmovzxwd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMOVZXWDrr, X86_INS_PMOVZXWD: pmovzxwd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMOVZXWQrm, X86_INS_PMOVZXWQ: pmovzxwq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMOVZXWQrr, X86_INS_PMOVZXWQ: pmovzxwq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMULDQrm, X86_INS_PMULDQ: pmuldq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMULDQrr, X86_INS_PMULDQ: pmuldq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMULHRSWrm128, X86_INS_PMULHRSW: pmulhrsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMULHRSWrr128, X86_INS_PMULHRSW: pmulhrsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMULHRWrm, X86_INS_PMULHRW: pmulhrw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMULHRWrr, X86_INS_PMULHRW: pmulhrw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMULHUWrm, X86_INS_PMULHUW: pmulhuw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMULHUWrr, X86_INS_PMULHUW: pmulhuw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMULHWrm, X86_INS_PMULHW: pmulhw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMULHWrr, X86_INS_PMULHW: pmulhw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMULLDrm, X86_INS_PMULLD: pmulld	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMULLDrr, X86_INS_PMULLD: pmulld	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMULLWrm, X86_INS_PMULLW: pmullw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMULLWrr, X86_INS_PMULLW: pmullw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMULUDQrm, X86_INS_PMULUDQ: pmuludq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PMULUDQrr, X86_INS_PMULUDQ: pmuludq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POP16r, X86_INS_POP: pop{w}	$reg */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POP16rmm, X86_INS_POP: pop{w}	$dst */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POP16rmr, X86_INS_POP: pop{w}	$reg */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POP32r, X86_INS_POP: pop{l}	$reg */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POP32rmm, X86_INS_POP: pop{l}	$dst */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POP32rmr, X86_INS_POP: pop{l}	$reg */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POP64r, X86_INS_POP: pop{q}	$reg */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POP64rmm, X86_INS_POP: pop{q}	$dst */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POP64rmr, X86_INS_POP: pop{q}	$reg */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POPA16, X86_INS_POPAW: popaw */
-		0,
-		{ 0 }
-	},
-	{	/* X86_POPA32, X86_INS_POPAL: popal */
-		0,
-		{ 0 }
-	},
-	{	/* X86_POPCNT16rm, X86_INS_POPCNT: popcnt{w}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POPCNT16rr, X86_INS_POPCNT: popcnt{w}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POPCNT32rm, X86_INS_POPCNT: popcnt{l}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POPCNT32rr, X86_INS_POPCNT: popcnt{l}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POPCNT64rm, X86_INS_POPCNT: popcnt{q}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POPCNT64rr, X86_INS_POPCNT: popcnt{q}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POPDS16, X86_INS_POP: pop{w}	ds */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POPDS32, X86_INS_POP: pop{l}	ds */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POPES16, X86_INS_POP: pop{w}	es */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POPES32, X86_INS_POP: pop{l}	es */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POPF16, X86_INS_POPF: popf{w} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_POPF32, X86_INS_POPFD: popfd */
-		X86_EFLAGS_PRIOR_OF | X86_EFLAGS_PRIOR_SF | X86_EFLAGS_PRIOR_ZF | X86_EFLAGS_PRIOR_AF | X86_EFLAGS_PRIOR_PF | X86_EFLAGS_PRIOR_CF | X86_EFLAGS_PRIOR_TF | X86_EFLAGS_PRIOR_IF | X86_EFLAGS_PRIOR_DF | X86_EFLAGS_PRIOR_NT,
-		{ 0 }
-	},
-	{	/* X86_POPF64, X86_INS_POPFQ: popfq */
-		X86_EFLAGS_PRIOR_OF | X86_EFLAGS_PRIOR_SF | X86_EFLAGS_PRIOR_ZF | X86_EFLAGS_PRIOR_AF | X86_EFLAGS_PRIOR_PF | X86_EFLAGS_PRIOR_CF | X86_EFLAGS_PRIOR_TF | X86_EFLAGS_PRIOR_IF | X86_EFLAGS_PRIOR_DF | X86_EFLAGS_PRIOR_NT,
-		{ 0 }
-	},
-	{	/* X86_POPFS16, X86_INS_POP: pop{w}	fs */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POPFS32, X86_INS_POP: pop{l}	fs */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POPFS64, X86_INS_POP: pop{q}	fs */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POPGS16, X86_INS_POP: pop{w}	gs */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POPGS32, X86_INS_POP: pop{l}	gs */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POPGS64, X86_INS_POP: pop{q}	gs */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POPSS16, X86_INS_POP: pop{w}	ss */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_POPSS32, X86_INS_POP: pop{l}	ss */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PORrm, X86_INS_POR: por	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PORrr, X86_INS_POR: por	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PREFETCH, X86_INS_PREFETCH: prefetch	$addr */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PREFETCHNTA, X86_INS_PREFETCHNTA: prefetchnta	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PREFETCHT0, X86_INS_PREFETCHT0: prefetcht0	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PREFETCHT1, X86_INS_PREFETCHT1: prefetcht1	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PREFETCHT2, X86_INS_PREFETCHT2: prefetcht2	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PREFETCHW, X86_INS_PREFETCHW: prefetchw	$addr */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSADBWrm, X86_INS_PSADBW: psadbw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSADBWrr, X86_INS_PSADBW: psadbw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSHUFBrm, X86_INS_PSHUFB: pshufb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSHUFBrr, X86_INS_PSHUFB: pshufb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSHUFDmi, X86_INS_PSHUFD: pshufd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSHUFDri, X86_INS_PSHUFD: pshufd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSHUFHWmi, X86_INS_PSHUFHW: pshufhw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSHUFHWri, X86_INS_PSHUFHW: pshufhw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSHUFLWmi, X86_INS_PSHUFLW: pshuflw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSHUFLWri, X86_INS_PSHUFLW: pshuflw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSIGNBrm, X86_INS_PSIGNB: psignb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSIGNBrr, X86_INS_PSIGNB: psignb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSIGNDrm, X86_INS_PSIGND: psignd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSIGNDrr, X86_INS_PSIGND: psignd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSIGNWrm, X86_INS_PSIGNW: psignw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSIGNWrr, X86_INS_PSIGNW: psignw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSLLDQri, X86_INS_PSLLDQ: pslldq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSLLDri, X86_INS_PSLLD: pslld	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSLLDrm, X86_INS_PSLLD: pslld	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSLLDrr, X86_INS_PSLLD: pslld	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSLLQri, X86_INS_PSLLQ: psllq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSLLQrm, X86_INS_PSLLQ: psllq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSLLQrr, X86_INS_PSLLQ: psllq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSLLWri, X86_INS_PSLLW: psllw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSLLWrm, X86_INS_PSLLW: psllw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSLLWrr, X86_INS_PSLLW: psllw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSRADri, X86_INS_PSRAD: psrad	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSRADrm, X86_INS_PSRAD: psrad	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSRADrr, X86_INS_PSRAD: psrad	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSRAWri, X86_INS_PSRAW: psraw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSRAWrm, X86_INS_PSRAW: psraw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSRAWrr, X86_INS_PSRAW: psraw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSRLDQri, X86_INS_PSRLDQ: psrldq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSRLDri, X86_INS_PSRLD: psrld	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSRLDrm, X86_INS_PSRLD: psrld	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSRLDrr, X86_INS_PSRLD: psrld	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSRLQri, X86_INS_PSRLQ: psrlq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSRLQrm, X86_INS_PSRLQ: psrlq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSRLQrr, X86_INS_PSRLQ: psrlq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSRLWri, X86_INS_PSRLW: psrlw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSRLWrm, X86_INS_PSRLW: psrlw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSRLWrr, X86_INS_PSRLW: psrlw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSUBBrm, X86_INS_PSUBB: psubb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSUBBrr, X86_INS_PSUBB: psubb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSUBDrm, X86_INS_PSUBD: psubd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSUBDrr, X86_INS_PSUBD: psubd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSUBQrm, X86_INS_PSUBQ: psubq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSUBQrr, X86_INS_PSUBQ: psubq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSUBSBrm, X86_INS_PSUBSB: psubsb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSUBSBrr, X86_INS_PSUBSB: psubsb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSUBSWrm, X86_INS_PSUBSW: psubsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSUBSWrr, X86_INS_PSUBSW: psubsw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSUBUSBrm, X86_INS_PSUBUSB: psubusb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSUBUSBrr, X86_INS_PSUBUSB: psubusb	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSUBUSWrm, X86_INS_PSUBUSW: psubusw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSUBUSWrr, X86_INS_PSUBUSW: psubusw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSUBWrm, X86_INS_PSUBW: psubw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSUBWrr, X86_INS_PSUBW: psubw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSWAPDrm, X86_INS_PSWAPD: pswapd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PSWAPDrr, X86_INS_PSWAPD: pswapd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PTESTrm, X86_INS_PTEST: ptest	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PTESTrr, X86_INS_PTEST: ptest	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUNPCKHBWrm, X86_INS_PUNPCKHBW: punpckhbw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUNPCKHBWrr, X86_INS_PUNPCKHBW: punpckhbw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUNPCKHDQrm, X86_INS_PUNPCKHDQ: punpckhdq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUNPCKHDQrr, X86_INS_PUNPCKHDQ: punpckhdq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUNPCKHQDQrm, X86_INS_PUNPCKHQDQ: punpckhqdq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUNPCKHQDQrr, X86_INS_PUNPCKHQDQ: punpckhqdq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUNPCKHWDrm, X86_INS_PUNPCKHWD: punpckhwd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUNPCKHWDrr, X86_INS_PUNPCKHWD: punpckhwd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUNPCKLBWrm, X86_INS_PUNPCKLBW: punpcklbw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUNPCKLBWrr, X86_INS_PUNPCKLBW: punpcklbw	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUNPCKLDQrm, X86_INS_PUNPCKLDQ: punpckldq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUNPCKLDQrr, X86_INS_PUNPCKLDQ: punpckldq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUNPCKLQDQrm, X86_INS_PUNPCKLQDQ: punpcklqdq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUNPCKLQDQrr, X86_INS_PUNPCKLQDQ: punpcklqdq	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUNPCKLWDrm, X86_INS_PUNPCKLWD: punpcklwd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUNPCKLWDrr, X86_INS_PUNPCKLWD: punpcklwd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSH16i8, X86_INS_PUSH: push{w}	$imm */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSH16r, X86_INS_PUSH: push{w}	$reg */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSH16rmm, X86_INS_PUSH: push{w}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSH16rmr, X86_INS_PUSH: push{w}	$reg */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSH32i8, X86_INS_PUSH: push{l}	$imm */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSH32r, X86_INS_PUSH: push{l}	$reg */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSH32rmm, X86_INS_PUSH: push{l}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSH32rmr, X86_INS_PUSH: push{l}	$reg */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSH64i16, X86_INS_PUSH: push{w}	$imm */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSH64i32, X86_INS_PUSH: push{q}	$imm */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSH64i8, X86_INS_PUSH: push{q}	$imm */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSH64r, X86_INS_PUSH: push{q}	$reg */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSH64rmm, X86_INS_PUSH: push{q}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSH64rmr, X86_INS_PUSH: push{q}	$reg */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSHA16, X86_INS_PUSHAW: pushaw */
-		0,
-		{ 0 }
-	},
-	{	/* X86_PUSHA32, X86_INS_PUSHAL: pushal */
-		0,
-		{ 0 }
-	},
-	{	/* X86_PUSHCS16, X86_INS_PUSH: push{w}	cs */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSHCS32, X86_INS_PUSH: push{l}	cs */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSHDS16, X86_INS_PUSH: push{w}	ds */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSHDS32, X86_INS_PUSH: push{l}	ds */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSHES16, X86_INS_PUSH: push{w}	es */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSHES32, X86_INS_PUSH: push{l}	es */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSHF16, X86_INS_PUSHF: pushf{w} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_PUSHF32, X86_INS_PUSHFD: pushfd */
-		0,
-		{ 0 }
-	},
-	{	/* X86_PUSHF64, X86_INS_PUSHFQ: pushfq */
-		0,
-		{ 0 }
-	},
-	{	/* X86_PUSHFS16, X86_INS_PUSH: push{w}	fs */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSHFS32, X86_INS_PUSH: push{l}	fs */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSHFS64, X86_INS_PUSH: push{q}	fs */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSHGS16, X86_INS_PUSH: push{w}	gs */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSHGS32, X86_INS_PUSH: push{l}	gs */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSHGS64, X86_INS_PUSH: push{q}	gs */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSHSS16, X86_INS_PUSH: push{w}	ss */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSHSS32, X86_INS_PUSH: push{l}	ss */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSHi16, X86_INS_PUSH: push{w}	$imm */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PUSHi32, X86_INS_PUSH: push{l}	$imm */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_PXORrm, X86_INS_PXOR: pxor	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_PXORrr, X86_INS_PXOR: pxor	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCL16m1, X86_INS_RCL: rcl{w}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCL16mCL, X86_INS_RCL: rcl{w}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCL16mi, X86_INS_RCL: rcl{w}	$dst, $cnt */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCL16r1, X86_INS_RCL: rcl{w}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCL16rCL, X86_INS_RCL: rcl{w}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCL16ri, X86_INS_RCL: rcl{w}	$dst, $cnt */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCL32m1, X86_INS_RCL: rcl{l}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCL32mCL, X86_INS_RCL: rcl{l}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCL32mi, X86_INS_RCL: rcl{l}	$dst, $cnt */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCL32r1, X86_INS_RCL: rcl{l}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCL32rCL, X86_INS_RCL: rcl{l}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCL32ri, X86_INS_RCL: rcl{l}	$dst, $cnt */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCL64m1, X86_INS_RCL: rcl{q}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCL64mCL, X86_INS_RCL: rcl{q}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCL64mi, X86_INS_RCL: rcl{q}	$dst, $cnt */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCL64r1, X86_INS_RCL: rcl{q}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCL64rCL, X86_INS_RCL: rcl{q}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCL64ri, X86_INS_RCL: rcl{q}	$dst, $cnt */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCL8m1, X86_INS_RCL: rcl{b}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCL8mCL, X86_INS_RCL: rcl{b}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCL8mi, X86_INS_RCL: rcl{b}	$dst, $cnt */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCL8r1, X86_INS_RCL: rcl{b}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCL8rCL, X86_INS_RCL: rcl{b}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCL8ri, X86_INS_RCL: rcl{b}	$dst, $cnt */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCPPSm, X86_INS_RCPPS: rcpps	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCPPSm_Int, X86_INS_RCPPS: rcpps	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCPPSr, X86_INS_RCPPS: rcpps	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCPPSr_Int, X86_INS_RCPPS: rcpps	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCPSSm, X86_INS_RCPSS: rcpss	$dst, $src1 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCPSSm_Int, X86_INS_RCPSS: rcpss	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCPSSr, X86_INS_RCPSS: rcpss	$dst, $src1 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCPSSr_Int, X86_INS_RCPSS: rcpss	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCR16m1, X86_INS_RCR: rcr{w}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCR16mCL, X86_INS_RCR: rcr{w}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCR16mi, X86_INS_RCR: rcr{w}	$dst, $cnt */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCR16r1, X86_INS_RCR: rcr{w}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCR16rCL, X86_INS_RCR: rcr{w}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCR16ri, X86_INS_RCR: rcr{w}	$dst, $cnt */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCR32m1, X86_INS_RCR: rcr{l}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCR32mCL, X86_INS_RCR: rcr{l}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCR32mi, X86_INS_RCR: rcr{l}	$dst, $cnt */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCR32r1, X86_INS_RCR: rcr{l}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCR32rCL, X86_INS_RCR: rcr{l}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCR32ri, X86_INS_RCR: rcr{l}	$dst, $cnt */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCR64m1, X86_INS_RCR: rcr{q}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCR64mCL, X86_INS_RCR: rcr{q}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCR64mi, X86_INS_RCR: rcr{q}	$dst, $cnt */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCR64r1, X86_INS_RCR: rcr{q}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCR64rCL, X86_INS_RCR: rcr{q}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCR64ri, X86_INS_RCR: rcr{q}	$dst, $cnt */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCR8m1, X86_INS_RCR: rcr{b}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCR8mCL, X86_INS_RCR: rcr{b}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCR8mi, X86_INS_RCR: rcr{b}	$dst, $cnt */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCR8r1, X86_INS_RCR: rcr{b}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCR8rCL, X86_INS_RCR: rcr{b}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RCR8ri, X86_INS_RCR: rcr{b}	$dst, $cnt */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RDFSBASE, X86_INS_RDFSBASE: rdfsbase{l}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_RDFSBASE64, X86_INS_RDFSBASE: rdfsbase{q}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_RDGSBASE, X86_INS_RDGSBASE: rdgsbase{l}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_RDGSBASE64, X86_INS_RDGSBASE: rdgsbase{q}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_RDMSR, X86_INS_RDMSR: rdmsr */
-		0,
-		{ 0 }
-	},
-	{	/* X86_RDPMC, X86_INS_RDPMC: rdpmc */
-		0,
-		{ 0 }
-	},
-	{	/* X86_RDRAND16r, X86_INS_RDRAND: rdrand{w}	$dst */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RDRAND32r, X86_INS_RDRAND: rdrand{l}	$dst */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RDRAND64r, X86_INS_RDRAND: rdrand{q}	$dst */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RDSEED16r, X86_INS_RDSEED: rdseed{w}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_RDSEED32r, X86_INS_RDSEED: rdseed{l}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_RDSEED64r, X86_INS_RDSEED: rdseed{q}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_RDTSC, X86_INS_RDTSC: rdtsc */
-		0,
-		{ 0 }
-	},
-	{	/* X86_RDTSCP, X86_INS_RDTSCP: rdtscp */
-		0,
-		{ 0 }
-	},
-	{	/* X86_RETIL, X86_INS_RET: ret{l}	$amt */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_RETIQ, X86_INS_RET: ret{q}	$amt */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_RETIW, X86_INS_RET: ret{w}	$amt */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_RETL, X86_INS_RET: ret{l} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_RETQ, X86_INS_RET: ret{q} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_RETW, X86_INS_RET: ret{w} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_ROL16m1, X86_INS_ROL: rol{w}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROL16mCL, X86_INS_ROL: rol{w}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROL16mi, X86_INS_ROL: rol{w}	$dst, $src1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROL16r1, X86_INS_ROL: rol{w}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROL16rCL, X86_INS_ROL: rol{w}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROL16ri, X86_INS_ROL: rol{w}	$dst, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROL32m1, X86_INS_ROL: rol{l}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROL32mCL, X86_INS_ROL: rol{l}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROL32mi, X86_INS_ROL: rol{l}	$dst, $src1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROL32r1, X86_INS_ROL: rol{l}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROL32rCL, X86_INS_ROL: rol{l}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROL32ri, X86_INS_ROL: rol{l}	$dst, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROL64m1, X86_INS_ROL: rol{q}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROL64mCL, X86_INS_ROL: rol{q}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROL64mi, X86_INS_ROL: rol{q}	$dst, $src1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROL64r1, X86_INS_ROL: rol{q}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROL64rCL, X86_INS_ROL: rol{q}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROL64ri, X86_INS_ROL: rol{q}	$dst, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROL8m1, X86_INS_ROL: rol{b}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROL8mCL, X86_INS_ROL: rol{b}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROL8mi, X86_INS_ROL: rol{b}	$dst, $src1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROL8r1, X86_INS_ROL: rol{b}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROL8rCL, X86_INS_ROL: rol{b}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROL8ri, X86_INS_ROL: rol{b}	$dst, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROR16m1, X86_INS_ROR: ror{w}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROR16mCL, X86_INS_ROR: ror{w}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROR16mi, X86_INS_ROR: ror{w}	$dst, $src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROR16r1, X86_INS_ROR: ror{w}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROR16rCL, X86_INS_ROR: ror{w}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROR16ri, X86_INS_ROR: ror{w}	$dst, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROR32m1, X86_INS_ROR: ror{l}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROR32mCL, X86_INS_ROR: ror{l}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROR32mi, X86_INS_ROR: ror{l}	$dst, $src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROR32r1, X86_INS_ROR: ror{l}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROR32rCL, X86_INS_ROR: ror{l}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROR32ri, X86_INS_ROR: ror{l}	$dst, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROR64m1, X86_INS_ROR: ror{q}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROR64mCL, X86_INS_ROR: ror{q}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROR64mi, X86_INS_ROR: ror{q}	$dst, $src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROR64r1, X86_INS_ROR: ror{q}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROR64rCL, X86_INS_ROR: ror{q}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROR64ri, X86_INS_ROR: ror{q}	$dst, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROR8m1, X86_INS_ROR: ror{b}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROR8mCL, X86_INS_ROR: ror{b}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROR8mi, X86_INS_ROR: ror{b}	$dst, $src */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROR8r1, X86_INS_ROR: ror{b}	$dst, 1 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROR8rCL, X86_INS_ROR: ror{b}	$dst, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROR8ri, X86_INS_ROR: ror{b}	$dst, $src2 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RORX32mi, X86_INS_RORX: rorx{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_RORX32ri, X86_INS_RORX: rorx{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_RORX64mi, X86_INS_RORX: rorx{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_RORX64ri, X86_INS_RORX: rorx{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROUNDPDm, X86_INS_ROUNDPD: roundpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROUNDPDr, X86_INS_ROUNDPD: roundpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROUNDPSm, X86_INS_ROUNDPS: roundps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROUNDPSr, X86_INS_ROUNDPS: roundps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROUNDSDm, X86_INS_ROUNDSD: roundsd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROUNDSDr, X86_INS_ROUNDSD: roundsd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROUNDSDr_Int, X86_INS_ROUNDSD: roundsd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROUNDSSm, X86_INS_ROUNDSS: roundss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROUNDSSr, X86_INS_ROUNDSS: roundss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_ROUNDSSr_Int, X86_INS_ROUNDSS: roundss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RSM, X86_INS_RSM: rsm */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF,
-		{ 0 }
-	},
-	{	/* X86_RSQRTPSm, X86_INS_RSQRTPS: rsqrtps	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RSQRTPSm_Int, X86_INS_RSQRTPS: rsqrtps	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RSQRTPSr, X86_INS_RSQRTPS: rsqrtps	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RSQRTPSr_Int, X86_INS_RSQRTPS: rsqrtps	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RSQRTSSm, X86_INS_RSQRTSS: rsqrtss	$dst, $src1 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RSQRTSSm_Int, X86_INS_RSQRTSS: rsqrtss	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RSQRTSSr, X86_INS_RSQRTSS: rsqrtss	$dst, $src1 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_RSQRTSSr_Int, X86_INS_RSQRTSS: rsqrtss	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAHF, X86_INS_SAHF: sahf */
-		X86_EFLAGS_PRIOR_SF | X86_EFLAGS_PRIOR_ZF | X86_EFLAGS_PRIOR_AF | X86_EFLAGS_PRIOR_PF | X86_EFLAGS_PRIOR_CF,
-		{ 0 }
-	},
-	{	/* X86_SAL16m1, X86_INS_SAL: sal{w}	$dst, 1 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAL16mCL, X86_INS_SAL: sal{w}	$dst, cl */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAL16mi, X86_INS_SAL: sal{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAL16r1, X86_INS_SAL: sal{w}	$dst, 1 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAL16rCL, X86_INS_SAL: sal{w}	$dst, cl */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAL16ri, X86_INS_SAL: sal{w}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAL32m1, X86_INS_SAL: sal{l}	$dst, 1 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAL32mCL, X86_INS_SAL: sal{l}	$dst, cl */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAL32mi, X86_INS_SAL: sal{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAL32r1, X86_INS_SAL: sal{l}	$dst, 1 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAL32rCL, X86_INS_SAL: sal{l}	$dst, cl */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAL32ri, X86_INS_SAL: sal{l}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAL64m1, X86_INS_SAL: sal{q}	$dst, 1 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAL64mCL, X86_INS_SAL: sal{q}	$dst, cl */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAL64mi, X86_INS_SAL: sal{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAL64r1, X86_INS_SAL: sal{q}	$dst, 1 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAL64rCL, X86_INS_SAL: sal{q}	$dst, cl */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAL64ri, X86_INS_SAL: sal{q}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAL8m1, X86_INS_SAL: sal{b}	$dst, 1 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAL8mCL, X86_INS_SAL: sal{b}	$dst, cl */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAL8mi, X86_INS_SAL: sal{b}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAL8r1, X86_INS_SAL: sal{b}	$dst, 1 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAL8rCL, X86_INS_SAL: sal{b}	$dst, cl */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAL8ri, X86_INS_SAL: sal{b}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SALC, X86_INS_SALC: salc */
-		0,
-		{ 0 }
-	},
-	{	/* X86_SAR16m1, X86_INS_SAR: sar{w}	$dst, 1 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAR16mCL, X86_INS_SAR: sar{w}	$dst, cl */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAR16mi, X86_INS_SAR: sar{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAR16r1, X86_INS_SAR: sar{w}	$dst, 1 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAR16rCL, X86_INS_SAR: sar{w}	$dst, cl */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAR16ri, X86_INS_SAR: sar{w}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAR32m1, X86_INS_SAR: sar{l}	$dst, 1 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAR32mCL, X86_INS_SAR: sar{l}	$dst, cl */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAR32mi, X86_INS_SAR: sar{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAR32r1, X86_INS_SAR: sar{l}	$dst, 1 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAR32rCL, X86_INS_SAR: sar{l}	$dst, cl */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAR32ri, X86_INS_SAR: sar{l}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAR64m1, X86_INS_SAR: sar{q}	$dst, 1 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAR64mCL, X86_INS_SAR: sar{q}	$dst, cl */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAR64mi, X86_INS_SAR: sar{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAR64r1, X86_INS_SAR: sar{q}	$dst, 1 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAR64rCL, X86_INS_SAR: sar{q}	$dst, cl */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAR64ri, X86_INS_SAR: sar{q}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAR8m1, X86_INS_SAR: sar{b}	$dst, 1 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAR8mCL, X86_INS_SAR: sar{b}	$dst, cl */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAR8mi, X86_INS_SAR: sar{b}	$dst, $src */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAR8r1, X86_INS_SAR: sar{b}	$dst, 1 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAR8rCL, X86_INS_SAR: sar{b}	$dst, cl */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SAR8ri, X86_INS_SAR: sar{b}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SARX32rm, X86_INS_SARX: sarx{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SARX32rr, X86_INS_SARX: sarx{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SARX64rm, X86_INS_SARX: sarx{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SARX64rr, X86_INS_SARX: sarx{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB16i16, X86_INS_SBB: sbb{w}	ax, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB16mi, X86_INS_SBB: sbb{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB16mi8, X86_INS_SBB: sbb{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB16mr, X86_INS_SBB: sbb{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB16ri, X86_INS_SBB: sbb{w}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB16ri8, X86_INS_SBB: sbb{w}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB16rm, X86_INS_SBB: sbb{w}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB16rr, X86_INS_SBB: sbb{w}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB16rr_REV, X86_INS_SBB: sbb{w}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB32i32, X86_INS_SBB: sbb{l}	eax, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB32mi, X86_INS_SBB: sbb{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB32mi8, X86_INS_SBB: sbb{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB32mr, X86_INS_SBB: sbb{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB32ri, X86_INS_SBB: sbb{l}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB32ri8, X86_INS_SBB: sbb{l}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB32rm, X86_INS_SBB: sbb{l}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB32rr, X86_INS_SBB: sbb{l}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB32rr_REV, X86_INS_SBB: sbb{l}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB64i32, X86_INS_SBB: sbb{q}	rax, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB64mi32, X86_INS_SBB: sbb{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB64mi8, X86_INS_SBB: sbb{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB64mr, X86_INS_SBB: sbb{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB64ri32, X86_INS_SBB: sbb{q}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB64ri8, X86_INS_SBB: sbb{q}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB64rm, X86_INS_SBB: sbb{q}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB64rr, X86_INS_SBB: sbb{q}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB64rr_REV, X86_INS_SBB: sbb{q}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB8i8, X86_INS_SBB: sbb{b}	al, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB8mi, X86_INS_SBB: sbb{b}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB8mi8, X86_INS_SBB: sbb{b}	$dst, $src */
-		X86_REG_EFLAGS,
-		{ 0 }
-	},
-	{	/* X86_SBB8mr, X86_INS_SBB: sbb{b}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB8ri, X86_INS_SBB: sbb{b}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB8ri8, X86_INS_SBB: sbb{b}	$src1, $src2 */
-		X86_REG_EFLAGS,
-		{ CS_OP_READ | CS_OP_WRITE, 0 }
-	},
-	{	/* X86_SBB8rm, X86_INS_SBB: sbb{b}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB8rr, X86_INS_SBB: sbb{b}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SBB8rr_REV, X86_INS_SBB: sbb{b}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SCASB, X86_INS_SCASB: scasb	al, $dst */
-		X86_REG_EFLAGS,
-		{ 0 }
-	},
-	{	/* X86_SCASL, X86_INS_SCASD: scas{l|d}	{$dst, %eax|eax, $dst} */
-		X86_REG_EFLAGS,
-		{ 0 }
-	},
-	{	/* X86_SCASQ, X86_INS_SCASQ: scasq	rax, $dst */
-		X86_REG_EFLAGS,
-		{ 0 }
-	},
-	{	/* X86_SCASW, X86_INS_SCASW: scasw	ax, $dst */
-		X86_REG_EFLAGS,
-		{ 0 }
-	},
-	{	/* X86_SETAEm, X86_INS_SETAE: setae	$dst */
-		X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETAEr, X86_INS_SETAE: setae	$dst */
-		X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETAm, X86_INS_SETA: seta	$dst */
-		X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETAr, X86_INS_SETA: seta	$dst */
-		X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETBEm, X86_INS_SETBE: setbe	$dst */
-		X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETBEr, X86_INS_SETBE: setbe	$dst */
-		X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETBm, X86_INS_SETB: setb	$dst */
-		X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETBr, X86_INS_SETB: setb	$dst */
-		X86_EFLAGS_TEST_CF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETEm, X86_INS_SETE: sete	$dst */
-		X86_EFLAGS_TEST_ZF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETEr, X86_INS_SETE: sete	$dst */
-		X86_EFLAGS_TEST_ZF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETGEm, X86_INS_SETGE: setge	$dst */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETGEr, X86_INS_SETGE: setge	$dst */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETGm, X86_INS_SETG: setg	$dst */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETGr, X86_INS_SETG: setg	$dst */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETLEm, X86_INS_SETLE: setle	$dst */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETLEr, X86_INS_SETLE: setle	$dst */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETLm, X86_INS_SETL: setl	$dst */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETLr, X86_INS_SETL: setl	$dst */
-		X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETNEm, X86_INS_SETNE: setne	$dst */
-		X86_EFLAGS_TEST_ZF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETNEr, X86_INS_SETNE: setne	$dst */
-		X86_EFLAGS_TEST_ZF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETNOm, X86_INS_SETNO: setno	$dst */
-		X86_EFLAGS_TEST_OF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETNOr, X86_INS_SETNO: setno	$dst */
-		X86_EFLAGS_TEST_OF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETNPm, X86_INS_SETNP: setnp	$dst */
-		X86_EFLAGS_TEST_PF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETNPr, X86_INS_SETNP: setnp	$dst */
-		X86_EFLAGS_TEST_PF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETNSm, X86_INS_SETNS: setns	$dst */
-		X86_EFLAGS_TEST_SF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETNSr, X86_INS_SETNS: setns	$dst */
-		X86_EFLAGS_TEST_SF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETOm, X86_INS_SETO: seto	$dst */
-		X86_EFLAGS_TEST_OF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETOr, X86_INS_SETO: seto	$dst */
-		X86_EFLAGS_TEST_OF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETPm, X86_INS_SETP: setp	$dst */
-		X86_EFLAGS_TEST_PF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETPr, X86_INS_SETP: setp	$dst */
-		X86_EFLAGS_TEST_PF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETSm, X86_INS_SETS: sets	$dst */
-		X86_EFLAGS_TEST_SF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SETSr, X86_INS_SETS: sets	$dst */
-		X86_EFLAGS_TEST_SF,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SFENCE, X86_INS_SFENCE: sfence */
-		0,
-		{ 0 }
-	},
-	{	/* X86_SGDT16m, X86_INS_SGDT: sgdt{w}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SGDT32m, X86_INS_SGDT: sgdt{l}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SGDT64m, X86_INS_SGDT: sgdt{q}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHA1MSG1rm, X86_INS_SHA1MSG1: sha1msg1	$dst, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHA1MSG1rr, X86_INS_SHA1MSG1: sha1msg1	$dst, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHA1MSG2rm, X86_INS_SHA1MSG2: sha1msg2	$dst, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHA1MSG2rr, X86_INS_SHA1MSG2: sha1msg2	$dst, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHA1NEXTErm, X86_INS_SHA1NEXTE: sha1nexte	$dst, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHA1NEXTErr, X86_INS_SHA1NEXTE: sha1nexte	$dst, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHA1RNDS4rmi, X86_INS_SHA1RNDS4: sha1rnds4	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHA1RNDS4rri, X86_INS_SHA1RNDS4: sha1rnds4	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHA256MSG1rm, X86_INS_SHA256MSG1: sha256msg1	$dst, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHA256MSG1rr, X86_INS_SHA256MSG1: sha256msg1	$dst, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHA256MSG2rm, X86_INS_SHA256MSG2: sha256msg2	$dst, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHA256MSG2rr, X86_INS_SHA256MSG2: sha256msg2	$dst, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHA256RNDS2rm, X86_INS_SHA256RNDS2: sha256rnds2	$dst, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHA256RNDS2rr, X86_INS_SHA256RNDS2: sha256rnds2	$dst, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHL16m1, X86_INS_SHL: shl{w}	$dst, 1 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHL16mCL, X86_INS_SHL: shl{w}	$dst, cl */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHL16mi, X86_INS_SHL: shl{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHL16r1, X86_INS_SHL: shl{w}	$dst, 1 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHL16rCL, X86_INS_SHL: shl{w}	$dst, cl */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHL16ri, X86_INS_SHL: shl{w}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHL32m1, X86_INS_SHL: shl{l}	$dst, 1 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHL32mCL, X86_INS_SHL: shl{l}	$dst, cl */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHL32mi, X86_INS_SHL: shl{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHL32r1, X86_INS_SHL: shl{l}	$dst, 1 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHL32rCL, X86_INS_SHL: shl{l}	$dst, cl */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHL32ri, X86_INS_SHL: shl{l}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHL64m1, X86_INS_SHL: shl{q}	$dst, 1 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHL64mCL, X86_INS_SHL: shl{q}	$dst, cl */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHL64mi, X86_INS_SHL: shl{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHL64r1, X86_INS_SHL: shl{q}	$dst, 1 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHL64rCL, X86_INS_SHL: shl{q}	$dst, cl */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHL64ri, X86_INS_SHL: shl{q}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHL8m1, X86_INS_SHL: shl{b}	$dst, 1 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHL8mCL, X86_INS_SHL: shl{b}	$dst, cl */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHL8mi, X86_INS_SHL: shl{b}	$dst, $src */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHL8r1, X86_INS_SHL: shl{b}	$dst, 1 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHL8rCL, X86_INS_SHL: shl{b}	$dst, cl */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHL8ri, X86_INS_SHL: shl{b}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHLD16mrCL, X86_INS_SHLD: shld{w}	$dst, $src2, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHLD16mri8, X86_INS_SHLD: shld{w}	$dst, $src2, $src3 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHLD16rrCL, X86_INS_SHLD: shld{w}	$dst, $src2, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHLD16rri8, X86_INS_SHLD: shld{w}	$dst, $src2, $src3 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHLD32mrCL, X86_INS_SHLD: shld{l}	$dst, $src2, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHLD32mri8, X86_INS_SHLD: shld{l}	$dst, $src2, $src3 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHLD32rrCL, X86_INS_SHLD: shld{l}	$dst, $src2, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHLD32rri8, X86_INS_SHLD: shld{l}	$dst, $src2, $src3 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHLD64mrCL, X86_INS_SHLD: shld{q}	$dst, $src2, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHLD64mri8, X86_INS_SHLD: shld{q}	$dst, $src2, $src3 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHLD64rrCL, X86_INS_SHLD: shld{q}	$dst, $src2, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHLD64rri8, X86_INS_SHLD: shld{q}	$dst, $src2, $src3 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHLX32rm, X86_INS_SHLX: shlx{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHLX32rr, X86_INS_SHLX: shlx{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHLX64rm, X86_INS_SHLX: shlx{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHLX64rr, X86_INS_SHLX: shlx{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHR16m1, X86_INS_SHR: shr{w}	$dst, 1 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHR16mCL, X86_INS_SHR: shr{w}	$dst, cl */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHR16mi, X86_INS_SHR: shr{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHR16r1, X86_INS_SHR: shr{w}	$dst, 1 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHR16rCL, X86_INS_SHR: shr{w}	$dst, cl */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHR16ri, X86_INS_SHR: shr{w}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHR32m1, X86_INS_SHR: shr{l}	$dst, 1 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHR32mCL, X86_INS_SHR: shr{l}	$dst, cl */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHR32mi, X86_INS_SHR: shr{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHR32r1, X86_INS_SHR: shr{l}	$dst, 1 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHR32rCL, X86_INS_SHR: shr{l}	$dst, cl */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHR32ri, X86_INS_SHR: shr{l}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHR64m1, X86_INS_SHR: shr{q}	$dst, 1 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHR64mCL, X86_INS_SHR: shr{q}	$dst, cl */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHR64mi, X86_INS_SHR: shr{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHR64r1, X86_INS_SHR: shr{q}	$dst, 1 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHR64rCL, X86_INS_SHR: shr{q}	$dst, cl */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHR64ri, X86_INS_SHR: shr{q}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHR8m1, X86_INS_SHR: shr{b}	$dst, 1 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHR8mCL, X86_INS_SHR: shr{b}	$dst, cl */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHR8mi, X86_INS_SHR: shr{b}	$dst, $src */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHR8r1, X86_INS_SHR: shr{b}	$dst, 1 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHR8rCL, X86_INS_SHR: shr{b}	$dst, cl */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHR8ri, X86_INS_SHR: shr{b}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHRD16mrCL, X86_INS_SHRD: shrd{w}	$dst, $src2, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHRD16mri8, X86_INS_SHRD: shrd{w}	$dst, $src2, $src3 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHRD16rrCL, X86_INS_SHRD: shrd{w}	$dst, $src2, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHRD16rri8, X86_INS_SHRD: shrd{w}	$dst, $src2, $src3 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHRD32mrCL, X86_INS_SHRD: shrd{l}	$dst, $src2, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHRD32mri8, X86_INS_SHRD: shrd{l}	$dst, $src2, $src3 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHRD32rrCL, X86_INS_SHRD: shrd{l}	$dst, $src2, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHRD32rri8, X86_INS_SHRD: shrd{l}	$dst, $src2, $src3 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHRD64mrCL, X86_INS_SHRD: shrd{q}	$dst, $src2, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHRD64mri8, X86_INS_SHRD: shrd{q}	$dst, $src2, $src3 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHRD64rrCL, X86_INS_SHRD: shrd{q}	$dst, $src2, cl */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHRD64rri8, X86_INS_SHRD: shrd{q}	$dst, $src2, $src3 */
-		X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHRX32rm, X86_INS_SHRX: shrx{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHRX32rr, X86_INS_SHRX: shrx{l}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHRX64rm, X86_INS_SHRX: shrx{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHRX64rr, X86_INS_SHRX: shrx{q}	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHUFPDrmi, X86_INS_SHUFPD: shufpd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHUFPDrri, X86_INS_SHUFPD: shufpd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHUFPSrmi, X86_INS_SHUFPS: shufps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SHUFPSrri, X86_INS_SHUFPS: shufps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SIDT16m, X86_INS_SIDT: sidt{w}	$dst */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SIDT32m, X86_INS_SIDT: sidt{l}	$dst */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SIDT64m, X86_INS_SIDT: sidt{q}	$dst */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SIN_F, X86_INS_FSIN: fsin */
-		0,
-		{ 0 }
-	},
-	{	/* X86_SKINIT, X86_INS_SKINIT: skinit	eax */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SLDT16m, X86_INS_SLDT: sldt{w}	$dst */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SLDT16r, X86_INS_SLDT: sldt{w}	$dst */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SLDT32r, X86_INS_SLDT: sldt{l}	$dst */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SLDT64m, X86_INS_SLDT: sldt{q}	$dst */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SLDT64r, X86_INS_SLDT: sldt{q}	$dst */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SMSW16m, X86_INS_SMSW: smsw{w}	$dst */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SMSW16r, X86_INS_SMSW: smsw{w}	$dst */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SMSW32r, X86_INS_SMSW: smsw{l}	$dst */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SMSW64r, X86_INS_SMSW: smsw{q}	$dst */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SQRTPDm, X86_INS_SQRTPD: sqrtpd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SQRTPDr, X86_INS_SQRTPD: sqrtpd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SQRTPSm, X86_INS_SQRTPS: sqrtps	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SQRTPSr, X86_INS_SQRTPS: sqrtps	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SQRTSDm, X86_INS_SQRTSD: sqrtsd	$dst, $src1 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SQRTSDm_Int, X86_INS_SQRTSD: sqrtsd	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SQRTSDr, X86_INS_SQRTSD: sqrtsd	$dst, $src1 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SQRTSDr_Int, X86_INS_SQRTSD: sqrtsd	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SQRTSSm, X86_INS_SQRTSS: sqrtss	$dst, $src1 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SQRTSSm_Int, X86_INS_SQRTSS: sqrtss	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SQRTSSr, X86_INS_SQRTSS: sqrtss	$dst, $src1 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SQRTSSr_Int, X86_INS_SQRTSS: sqrtss	$dst, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SQRT_F, X86_INS_FSQRT: fsqrt */
-		0,
-		{ 0 }
-	},
-	{	/* X86_STAC, X86_INS_STAC: stac */
-		0,
-		{ 0 }
-	},
-	{	/* X86_STC, X86_INS_STC: stc */
-		X86_EFLAGS_SET_CF,
-		{ 0 }
-	},
-	{	/* X86_STD, X86_INS_STD: std */
-		X86_EFLAGS_SET_DF,
-		{ 0 }
-	},
-	{	/* X86_STGI, X86_INS_STGI: stgi */
-		0,
-		{ 0 }
-	},
-	{	/* X86_STI, X86_INS_STI: sti */
-		X86_EFLAGS_SET_IF,
-		{ 0 }
-	},
-	{	/* X86_STMXCSR, X86_INS_STMXCSR: stmxcsr	$dst */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_STOSB, X86_INS_STOSB: stosb	$dst, al */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_STOSL, X86_INS_STOSD: stos{l|d}	{%eax, $dst|$dst, eax} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_STOSQ, X86_INS_STOSQ: stosq	$dst, rax */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_STOSW, X86_INS_STOSW: stosw	$dst, ax */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_STR16r, X86_INS_STR: str{w}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_STR32r, X86_INS_STR: str{l}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_STR64r, X86_INS_STR: str{q}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_STRm, X86_INS_STR: str{w}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ST_F32m, X86_INS_FST: fst{s}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ST_F64m, X86_INS_FST: fst{l}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ST_FCOMPST0r, X86_INS_FCOMP: fcomp	st(0), $op */
-		0,
-		{ 0 }
-	},
-	{	/* X86_ST_FCOMPST0r_alt, X86_INS_FCOMP: fcomp	st(0), $op */
-		0,
-		{ 0 }
-	},
-	{	/* X86_ST_FCOMST0r, X86_INS_FCOM: fcom	st(0), $op */
-		0,
-		{ 0 }
-	},
-	{	/* X86_ST_FP32m, X86_INS_FSTP: fstp{s}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ST_FP64m, X86_INS_FSTP: fstp{l}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ST_FP80m, X86_INS_FSTP: fstp{t}	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ST_FPNCEST0r, X86_INS_FSTPNCE: fstpnce	$op, st(0) */
-		0,
-		{ 0 }
-	},
-	{	/* X86_ST_FPST0r, X86_INS_FSTP: fstp	$op, st(0) */
-		0,
-		{ 0 }
-	},
-	{	/* X86_ST_FPST0r_alt, X86_INS_FSTP: fstp	$op, st(0) */
-		0,
-		{ 0 }
-	},
-	{	/* X86_ST_FPrr, X86_INS_FSTP: fstp	$op */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_ST_FXCHST0r, X86_INS_FXCH: fxch	st(0), $op */
-		0,
-		{ 0 }
-	},
-	{	/* X86_ST_FXCHST0r_alt, X86_INS_FXCH: fxch	st(0), $op */
-		0,
-		{ 0 }
-	},
-	{	/* X86_ST_Frr, X86_INS_FST: fst	$op */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB16i16, X86_INS_SUB: sub{w}	ax, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB16mi, X86_INS_SUB: sub{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB16mi8, X86_INS_SUB: sub{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB16mr, X86_INS_SUB: sub{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB16ri, X86_INS_SUB: sub{w}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB16ri8, X86_INS_SUB: sub{w}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB16rm, X86_INS_SUB: sub{w}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB16rr, X86_INS_SUB: sub{w}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB16rr_REV, X86_INS_SUB: sub{w}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB32i32, X86_INS_SUB: sub{l}	eax, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB32mi, X86_INS_SUB: sub{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB32mi8, X86_INS_SUB: sub{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB32mr, X86_INS_SUB: sub{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB32ri, X86_INS_SUB: sub{l}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB32ri8, X86_INS_SUB: sub{l}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB32rm, X86_INS_SUB: sub{l}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB32rr, X86_INS_SUB: sub{l}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB32rr_REV, X86_INS_SUB: sub{l}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB64i32, X86_INS_SUB: sub{q}	rax, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB64mi32, X86_INS_SUB: sub{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB64mi8, X86_INS_SUB: sub{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB64mr, X86_INS_SUB: sub{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB64ri32, X86_INS_SUB: sub{q}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB64ri8, X86_INS_SUB: sub{q}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB64rm, X86_INS_SUB: sub{q}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB64rr, X86_INS_SUB: sub{q}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB64rr_REV, X86_INS_SUB: sub{q}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB8i8, X86_INS_SUB: sub{b}	al, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB8mi, X86_INS_SUB: sub{b}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB8mi8, X86_INS_SUB: sub{b}	$dst, $src */
-		X86_REG_EFLAGS,
-		{ 0 }
-	},
-	{	/* X86_SUB8mr, X86_INS_SUB: sub{b}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB8ri, X86_INS_SUB: sub{b}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB8ri8, X86_INS_SUB: sub{b}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB8rm, X86_INS_SUB: sub{b}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB8rr, X86_INS_SUB: sub{b}	$src1, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB8rr_REV, X86_INS_SUB: sub{b}	$dst, $src2 */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUBPDrm, X86_INS_SUBPD: subpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUBPDrr, X86_INS_SUBPD: subpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUBPSrm, X86_INS_SUBPS: subps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUBPSrr, X86_INS_SUBPS: subps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUBR_F32m, X86_INS_FSUBR: fsubr{s}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUBR_F64m, X86_INS_FSUBR: fsubr{l}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUBR_FI16m, X86_INS_FISUBR: fisubr{s}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUBR_FI32m, X86_INS_FISUBR: fisubr{l}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUBR_FPrST0, X86_INS_FSUBRP: fsubrp	$op */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUBR_FST0r, X86_INS_FSUBR: fsubr	$op */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUBR_FrST0, X86_INS_FSUBR: fsub{|r}	{%st(0), $op|$op, st(0)} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUBSDrm, X86_INS_SUBSD: subsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUBSDrm_Int, X86_INS_SUBSD: subsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUBSDrr, X86_INS_SUBSD: subsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUBSDrr_Int, X86_INS_SUBSD: subsd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUBSSrm, X86_INS_SUBSS: subss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUBSSrm_Int, X86_INS_SUBSS: subss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUBSSrr, X86_INS_SUBSS: subss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUBSSrr_Int, X86_INS_SUBSS: subss	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB_F32m, X86_INS_FSUB: fsub{s}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB_F64m, X86_INS_FSUB: fsub{l}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB_FI16m, X86_INS_FISUB: fisub{s}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB_FI32m, X86_INS_FISUB: fisub{l}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB_FPrST0, X86_INS_FSUBP: fsub{r}p	$op */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB_FST0r, X86_INS_FSUB: fsub	$op */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SUB_FrST0, X86_INS_FSUB: fsub{r}	$op, st(0) */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_SWAPGS, X86_INS_SWAPGS: swapgs */
-		0,
-		{ 0 }
-	},
-	{	/* X86_SYSCALL, X86_INS_SYSCALL: syscall */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF,
-		{ 0 }
-	},
-	{	/* X86_SYSENTER, X86_INS_SYSENTER: sysenter */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF,
-		{ 0 }
-	},
-	{	/* X86_SYSEXIT, X86_INS_SYSEXIT: sysexit{l} */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF,
-		{ 0 }
-	},
-	{	/* X86_SYSEXIT64, X86_INS_SYSEXIT: sysexit{q} */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF,
-		{ 0 }
-	},
-	{	/* X86_SYSRET, X86_INS_SYSRET: sysret{l} */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF,
-		{ 0 }
-	},
-	{	/* X86_SYSRET64, X86_INS_SYSRET: sysret{q} */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF,
-		{ 0 }
-	},
-	{	/* X86_T1MSKC32rm, X86_INS_T1MSKC: t1mskc	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_T1MSKC32rr, X86_INS_T1MSKC: t1mskc	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_T1MSKC64rm, X86_INS_T1MSKC: t1mskc	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_T1MSKC64rr, X86_INS_T1MSKC: t1mskc	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST16i16, X86_INS_TEST: test{w}	ax, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST16mi, X86_INS_TEST: test{w}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST16mi_alt, X86_INS_TEST: test{w}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST16ri, X86_INS_TEST: test{w}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST16ri_alt, X86_INS_TEST: test{w}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST16rm, X86_INS_TEST: test{w}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST16rr, X86_INS_TEST: test{w}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST32i32, X86_INS_TEST: test{l}	eax, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST32mi, X86_INS_TEST: test{l}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST32mi_alt, X86_INS_TEST: test{l}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST32ri, X86_INS_TEST: test{l}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST32ri_alt, X86_INS_TEST: test{l}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST32rm, X86_INS_TEST: test{l}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST32rr, X86_INS_TEST: test{l}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST64i32, X86_INS_TEST: test{q}	rax, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST64mi32, X86_INS_TEST: test{q}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST64mi32_alt, X86_INS_TEST: test{q}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST64ri32, X86_INS_TEST: test{q}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST64ri32_alt, X86_INS_TEST: test{q}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST64rm, X86_INS_TEST: test{q}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST64rr, X86_INS_TEST: test{q}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST8i8, X86_INS_TEST: test{b}	al, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST8mi, X86_INS_TEST: test{b}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST8mi_alt, X86_INS_TEST: test{b}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST8ri, X86_INS_TEST: test{b}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST8ri_alt, X86_INS_TEST: test{b}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST8rm, X86_INS_TEST: test{b}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TEST8rr, X86_INS_TEST: test{b}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TRAP, X86_INS_UD2: ud2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_TST_F, X86_INS_FTST: ftst */
-		0,
-		{ 0 }
-	},
-	{	/* X86_TZCNT16rm, X86_INS_TZCNT: tzcnt{w}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TZCNT16rr, X86_INS_TZCNT: tzcnt{w}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TZCNT32rm, X86_INS_TZCNT: tzcnt{l}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TZCNT32rr, X86_INS_TZCNT: tzcnt{l}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TZCNT64rm, X86_INS_TZCNT: tzcnt{q}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TZCNT64rr, X86_INS_TZCNT: tzcnt{q}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TZMSK32rm, X86_INS_TZMSK: tzmsk	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TZMSK32rr, X86_INS_TZMSK: tzmsk	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TZMSK64rm, X86_INS_TZMSK: tzmsk	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_TZMSK64rr, X86_INS_TZMSK: tzmsk	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_UCOMISDrm, X86_INS_UCOMISD: ucomisd	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_UCOMISDrr, X86_INS_UCOMISD: ucomisd	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_UCOMISSrm, X86_INS_UCOMISS: ucomiss	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_UCOMISSrr, X86_INS_UCOMISS: ucomiss	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_UCOM_FIPr, X86_INS_FUCOMPI: fucompi	$reg */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_UCOM_FIr, X86_INS_FUCOMI: fucomi	$reg */
-		X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_UCOM_FPPr, X86_INS_FUCOMPP: fucompp */
-		0,
-		{ 0 }
-	},
-	{	/* X86_UCOM_FPr, X86_INS_FUCOMP: fucomp	$reg */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_UCOM_Fr, X86_INS_FUCOM: fucom	$reg */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_UD2B, X86_INS_UD2B: ud2b */
-		0,
-		{ 0 }
-	},
-	{	/* X86_UNPCKHPDrm, X86_INS_UNPCKHPD: unpckhpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_UNPCKHPDrr, X86_INS_UNPCKHPD: unpckhpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_UNPCKHPSrm, X86_INS_UNPCKHPS: unpckhps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_UNPCKHPSrr, X86_INS_UNPCKHPS: unpckhps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_UNPCKLPDrm, X86_INS_UNPCKLPD: unpcklpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_UNPCKLPDrr, X86_INS_UNPCKLPD: unpcklpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_UNPCKLPSrm, X86_INS_UNPCKLPS: unpcklps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_UNPCKLPSrr, X86_INS_UNPCKLPS: unpcklps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDPDYrm, X86_INS_VADDPD: vaddpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDPDYrr, X86_INS_VADDPD: vaddpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDPDZ128rm, X86_INS_VADDPD: vaddpd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPDZ128rmb, X86_INS_VADDPD: vaddpd	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPDZ128rmbk, X86_INS_VADDPD: vaddpd	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPDZ128rmbkz, X86_INS_VADDPD: vaddpd	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPDZ128rmk, X86_INS_VADDPD: vaddpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPDZ128rmkz, X86_INS_VADDPD: vaddpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPDZ128rr, X86_INS_VADDPD: vaddpd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPDZ128rrk, X86_INS_VADDPD: vaddpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPDZ128rrkz, X86_INS_VADDPD: vaddpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPDZ256rm, X86_INS_VADDPD: vaddpd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPDZ256rmb, X86_INS_VADDPD: vaddpd	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPDZ256rmbk, X86_INS_VADDPD: vaddpd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPDZ256rmbkz, X86_INS_VADDPD: vaddpd	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPDZ256rmk, X86_INS_VADDPD: vaddpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPDZ256rmkz, X86_INS_VADDPD: vaddpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPDZ256rr, X86_INS_VADDPD: vaddpd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPDZ256rrk, X86_INS_VADDPD: vaddpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPDZ256rrkz, X86_INS_VADDPD: vaddpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPDZrb, X86_INS_VADDPD: vaddpd	$dst , $src1, $src2, $rc */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VADDPDZrbk, X86_INS_VADDPD: vaddpd	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VADDPDZrbkz, X86_INS_VADDPD: vaddpd	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VADDPDZrm, X86_INS_VADDPD: vaddpd	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDPDZrmb, X86_INS_VADDPD: vaddpd	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDPDZrmbk, X86_INS_VADDPD: vaddpd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VADDPDZrmbkz, X86_INS_VADDPD: vaddpd	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VADDPDZrmk, X86_INS_VADDPD: vaddpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VADDPDZrmkz, X86_INS_VADDPD: vaddpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VADDPDZrr, X86_INS_VADDPD: vaddpd	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDPDZrrk, X86_INS_VADDPD: vaddpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VADDPDZrrkz, X86_INS_VADDPD: vaddpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VADDPDrm, X86_INS_VADDPD: vaddpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDPDrr, X86_INS_VADDPD: vaddpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDPSYrm, X86_INS_VADDPS: vaddps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDPSYrr, X86_INS_VADDPS: vaddps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDPSZ128rm, X86_INS_VADDPS: vaddps	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPSZ128rmb, X86_INS_VADDPS: vaddps	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPSZ128rmbk, X86_INS_VADDPS: vaddps	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPSZ128rmbkz, X86_INS_VADDPS: vaddps	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPSZ128rmk, X86_INS_VADDPS: vaddps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPSZ128rmkz, X86_INS_VADDPS: vaddps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPSZ128rr, X86_INS_VADDPS: vaddps	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPSZ128rrk, X86_INS_VADDPS: vaddps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPSZ128rrkz, X86_INS_VADDPS: vaddps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPSZ256rm, X86_INS_VADDPS: vaddps	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPSZ256rmb, X86_INS_VADDPS: vaddps	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPSZ256rmbk, X86_INS_VADDPS: vaddps	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPSZ256rmbkz, X86_INS_VADDPS: vaddps	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPSZ256rmk, X86_INS_VADDPS: vaddps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPSZ256rmkz, X86_INS_VADDPS: vaddps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPSZ256rr, X86_INS_VADDPS: vaddps	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPSZ256rrk, X86_INS_VADDPS: vaddps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPSZ256rrkz, X86_INS_VADDPS: vaddps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDPSZrb, X86_INS_VADDPS: vaddps	$dst , $src1, $src2, $rc */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VADDPSZrbk, X86_INS_VADDPS: vaddps	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VADDPSZrbkz, X86_INS_VADDPS: vaddps	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VADDPSZrm, X86_INS_VADDPS: vaddps	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDPSZrmb, X86_INS_VADDPS: vaddps	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDPSZrmbk, X86_INS_VADDPS: vaddps	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VADDPSZrmbkz, X86_INS_VADDPS: vaddps	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VADDPSZrmk, X86_INS_VADDPS: vaddps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VADDPSZrmkz, X86_INS_VADDPS: vaddps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VADDPSZrr, X86_INS_VADDPS: vaddps	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDPSZrrk, X86_INS_VADDPS: vaddps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VADDPSZrrkz, X86_INS_VADDPS: vaddps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VADDPSrm, X86_INS_VADDPS: vaddps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDPSrr, X86_INS_VADDPS: vaddps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDSDZrm, X86_INS_VADDSD: vaddsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDSDZrm_Int, X86_INS_VADDSD: vaddsd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDSDZrm_Intk, X86_INS_VADDSD: vaddsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDSDZrm_Intkz, X86_INS_VADDSD: vaddsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDSDZrr, X86_INS_VADDSD: vaddsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDSDZrr_Int, X86_INS_VADDSD: vaddsd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDSDZrr_Intk, X86_INS_VADDSD: vaddsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDSDZrr_Intkz, X86_INS_VADDSD: vaddsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDSDZrrb, X86_INS_VADDSD: vaddsd	$dst , $src1, $src2, $rc */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDSDZrrbk, X86_INS_VADDSD: vaddsd	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDSDZrrbkz, X86_INS_VADDSD: vaddsd	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDSDrm, X86_INS_VADDSD: vaddsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDSDrm_Int, X86_INS_VADDSD: vaddsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDSDrr, X86_INS_VADDSD: vaddsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDSDrr_Int, X86_INS_VADDSD: vaddsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDSSZrm, X86_INS_VADDSS: vaddss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDSSZrm_Int, X86_INS_VADDSS: vaddss	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDSSZrm_Intk, X86_INS_VADDSS: vaddss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDSSZrm_Intkz, X86_INS_VADDSS: vaddss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDSSZrr, X86_INS_VADDSS: vaddss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDSSZrr_Int, X86_INS_VADDSS: vaddss	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDSSZrr_Intk, X86_INS_VADDSS: vaddss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDSSZrr_Intkz, X86_INS_VADDSS: vaddss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDSSZrrb, X86_INS_VADDSS: vaddss	$dst , $src1, $src2, $rc */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDSSZrrbk, X86_INS_VADDSS: vaddss	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDSSZrrbkz, X86_INS_VADDSS: vaddss	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VADDSSrm, X86_INS_VADDSS: vaddss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDSSrm_Int, X86_INS_VADDSS: vaddss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDSSrr, X86_INS_VADDSS: vaddss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDSSrr_Int, X86_INS_VADDSS: vaddss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDSUBPDYrm, X86_INS_VADDSUBPD: vaddsubpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDSUBPDYrr, X86_INS_VADDSUBPD: vaddsubpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDSUBPDrm, X86_INS_VADDSUBPD: vaddsubpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDSUBPDrr, X86_INS_VADDSUBPD: vaddsubpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDSUBPSYrm, X86_INS_VADDSUBPS: vaddsubps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDSUBPSYrr, X86_INS_VADDSUBPS: vaddsubps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDSUBPSrm, X86_INS_VADDSUBPS: vaddsubps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VADDSUBPSrr, X86_INS_VADDSUBPS: vaddsubps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VAESDECLASTrm, X86_INS_VAESDECLAST: vaesdeclast	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VAESDECLASTrr, X86_INS_VAESDECLAST: vaesdeclast	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VAESDECrm, X86_INS_VAESDEC: vaesdec	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VAESDECrr, X86_INS_VAESDEC: vaesdec	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VAESENCLASTrm, X86_INS_VAESENCLAST: vaesenclast	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VAESENCLASTrr, X86_INS_VAESENCLAST: vaesenclast	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VAESENCrm, X86_INS_VAESENC: vaesenc	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VAESENCrr, X86_INS_VAESENC: vaesenc	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VAESIMCrm, X86_INS_VAESIMC: vaesimc	$dst, $src1 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VAESIMCrr, X86_INS_VAESIMC: vaesimc	$dst, $src1 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VAESKEYGENASSIST128rm, X86_INS_VAESKEYGENASSIST: vaeskeygenassist	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VAESKEYGENASSIST128rr, X86_INS_VAESKEYGENASSIST: vaeskeygenassist	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VALIGNDrmi, X86_INS_VALIGND: valignd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VALIGNDrri, X86_INS_VALIGND: valignd	$dst , $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VALIGNDrrik, X86_INS_VALIGND: valignd	{$src3, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VALIGNDrrikz, X86_INS_VALIGND: valignd	{$src3, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VALIGNQrmi, X86_INS_VALIGNQ: valignq	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VALIGNQrri, X86_INS_VALIGNQ: valignq	$dst , $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VALIGNQrrik, X86_INS_VALIGNQ: valignq	{$src3, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VALIGNQrrikz, X86_INS_VALIGNQ: valignq	{$src3, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VANDNPDYrm, X86_INS_VANDNPD: vandnpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VANDNPDYrr, X86_INS_VANDNPD: vandnpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VANDNPDrm, X86_INS_VANDNPD: vandnpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VANDNPDrr, X86_INS_VANDNPD: vandnpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VANDNPSYrm, X86_INS_VANDNPS: vandnps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VANDNPSYrr, X86_INS_VANDNPS: vandnps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VANDNPSrm, X86_INS_VANDNPS: vandnps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VANDNPSrr, X86_INS_VANDNPS: vandnps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VANDPDYrm, X86_INS_VANDPD: vandpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VANDPDYrr, X86_INS_VANDPD: vandpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VANDPDrm, X86_INS_VANDPD: vandpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VANDPDrr, X86_INS_VANDPD: vandpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VANDPSYrm, X86_INS_VANDPS: vandps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VANDPSYrr, X86_INS_VANDPS: vandps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VANDPSrm, X86_INS_VANDPS: vandps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VANDPSrr, X86_INS_VANDPS: vandps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBLENDMPDZ128rm, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPDZ128rmb, X86_INS_VBLENDMPD: vblendmpd	{${src2}{1to2}, $src1, $dst|$dst, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPDZ128rmbk, X86_INS_VBLENDMPD: vblendmpd	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPDZ128rmk, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPDZ128rmkz, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPDZ128rr, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPDZ128rrk, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPDZ128rrkz, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPDZ256rm, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPDZ256rmb, X86_INS_VBLENDMPD: vblendmpd	{${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPDZ256rmbk, X86_INS_VBLENDMPD: vblendmpd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPDZ256rmk, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPDZ256rmkz, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPDZ256rr, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPDZ256rrk, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPDZ256rrkz, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPDZrm, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBLENDMPDZrmb, X86_INS_VBLENDMPD: vblendmpd	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VBLENDMPDZrmbk, X86_INS_VBLENDMPD: vblendmpd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VBLENDMPDZrmk, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VBLENDMPDZrmkz, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VBLENDMPDZrr, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBLENDMPDZrrk, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VBLENDMPDZrrkz, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VBLENDMPSZ128rm, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPSZ128rmb, X86_INS_VBLENDMPS: vblendmps	{${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPSZ128rmbk, X86_INS_VBLENDMPS: vblendmps	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPSZ128rmk, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPSZ128rmkz, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPSZ128rr, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPSZ128rrk, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPSZ128rrkz, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPSZ256rm, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPSZ256rmb, X86_INS_VBLENDMPS: vblendmps	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPSZ256rmbk, X86_INS_VBLENDMPS: vblendmps	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPSZ256rmk, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPSZ256rmkz, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPSZ256rr, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPSZ256rrk, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPSZ256rrkz, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBLENDMPSZrm, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBLENDMPSZrmb, X86_INS_VBLENDMPS: vblendmps	{${src2}{1to16}, $src1, $dst|$dst, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VBLENDMPSZrmbk, X86_INS_VBLENDMPS: vblendmps	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VBLENDMPSZrmk, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VBLENDMPSZrmkz, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VBLENDMPSZrr, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBLENDMPSZrrk, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VBLENDMPSZrrkz, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VBLENDPDYrmi, X86_INS_VBLENDPD: vblendpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBLENDPDYrri, X86_INS_VBLENDPD: vblendpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBLENDPDrmi, X86_INS_VBLENDPD: vblendpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBLENDPDrri, X86_INS_VBLENDPD: vblendpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBLENDPSYrmi, X86_INS_VBLENDPS: vblendps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBLENDPSYrri, X86_INS_VBLENDPS: vblendps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBLENDPSrmi, X86_INS_VBLENDPS: vblendps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBLENDPSrri, X86_INS_VBLENDPS: vblendps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBLENDVPDYrm, X86_INS_VBLENDVPD: vblendvpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBLENDVPDYrr, X86_INS_VBLENDVPD: vblendvpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBLENDVPDrm, X86_INS_VBLENDVPD: vblendvpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBLENDVPDrr, X86_INS_VBLENDVPD: vblendvpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBLENDVPSYrm, X86_INS_VBLENDVPS: vblendvps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBLENDVPSYrr, X86_INS_VBLENDVPS: vblendvps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBLENDVPSrm, X86_INS_VBLENDVPS: vblendvps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBLENDVPSrr, X86_INS_VBLENDVPS: vblendvps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBROADCASTF128, X86_INS_VBROADCASTF128: vbroadcastf128	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBROADCASTI32X4krm, X86_INS_VBROADCASTI32X4: vbroadcasti32x4	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTI32X4rm, X86_INS_VBROADCASTI32X4: vbroadcasti32x4	$dst, $src */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VBROADCASTI64X4krm, X86_INS_VBROADCASTI64X4: vbroadcasti64x4	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTI64X4rm, X86_INS_VBROADCASTI64X4: vbroadcasti64x4	$dst, $src */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VBROADCASTSDYrm, X86_INS_VBROADCASTSD: vbroadcastsd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBROADCASTSDYrr, X86_INS_VBROADCASTSD: vbroadcastsd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBROADCASTSDZ256m, X86_INS_VBROADCASTSD: vbroadcastsd	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSDZ256mk, X86_INS_VBROADCASTSD: vbroadcastsd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSDZ256mkz, X86_INS_VBROADCASTSD: vbroadcastsd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSDZ256r, X86_INS_VBROADCASTSD: vbroadcastsd	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSDZ256rk, X86_INS_VBROADCASTSD: vbroadcastsd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSDZ256rkz, X86_INS_VBROADCASTSD: vbroadcastsd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSDZm, X86_INS_VBROADCASTSD: vbroadcastsd	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSDZmk, X86_INS_VBROADCASTSD: vbroadcastsd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSDZmkz, X86_INS_VBROADCASTSD: vbroadcastsd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSDZr, X86_INS_VBROADCASTSD: vbroadcastsd	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSDZrk, X86_INS_VBROADCASTSD: vbroadcastsd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSDZrkz, X86_INS_VBROADCASTSD: vbroadcastsd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSSYrm, X86_INS_VBROADCASTSS: vbroadcastss	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBROADCASTSSYrr, X86_INS_VBROADCASTSS: vbroadcastss	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBROADCASTSSZ128m, X86_INS_VBROADCASTSS: vbroadcastss	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSSZ128mk, X86_INS_VBROADCASTSS: vbroadcastss	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSSZ128mkz, X86_INS_VBROADCASTSS: vbroadcastss	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSSZ128r, X86_INS_VBROADCASTSS: vbroadcastss	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSSZ128rk, X86_INS_VBROADCASTSS: vbroadcastss	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSSZ128rkz, X86_INS_VBROADCASTSS: vbroadcastss	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSSZ256m, X86_INS_VBROADCASTSS: vbroadcastss	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSSZ256mk, X86_INS_VBROADCASTSS: vbroadcastss	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSSZ256mkz, X86_INS_VBROADCASTSS: vbroadcastss	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSSZ256r, X86_INS_VBROADCASTSS: vbroadcastss	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSSZ256rk, X86_INS_VBROADCASTSS: vbroadcastss	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSSZ256rkz, X86_INS_VBROADCASTSS: vbroadcastss	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSSZm, X86_INS_VBROADCASTSS: vbroadcastss	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSSZmk, X86_INS_VBROADCASTSS: vbroadcastss	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSSZmkz, X86_INS_VBROADCASTSS: vbroadcastss	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSSZr, X86_INS_VBROADCASTSS: vbroadcastss	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSSZrk, X86_INS_VBROADCASTSS: vbroadcastss	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSSZrkz, X86_INS_VBROADCASTSS: vbroadcastss	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VBROADCASTSSrm, X86_INS_VBROADCASTSS: vbroadcastss	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VBROADCASTSSrr, X86_INS_VBROADCASTSS: vbroadcastss	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPPDYrmi, X86_INS_VCMPPD: vcmp${cc}pd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPPDYrmi_alt, X86_INS_VCMPPD: vcmppd	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPPDYrri, X86_INS_VCMPPD: vcmp${cc}pd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPPDYrri_alt, X86_INS_VCMPPD: vcmppd	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPPDZrmi, X86_INS_VCMPPD: vcmp${cc}pd	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPPDZrmi_alt, X86_INS_VCMPPD: vcmppd	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPPDZrri, X86_INS_VCMPPD: vcmp${cc}pd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPPDZrri_alt, X86_INS_VCMPPD: vcmppd	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPPDZrrib, X86_INS_VCMPPD: vcmp${cc}pd	{{sae}, $src2, $src1, $dst|$dst, $src1, $src2, {sae}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPPDZrrib_alt, X86_INS_VCMPPD: vcmppd	{{sae}, $cc, $src2, $src1, $dst|$dst, $src1, $src2, $cc, {sae}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VCMPPDrmi, X86_INS_VCMPPD: vcmp${cc}pd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPPDrmi_alt, X86_INS_VCMPPD: vcmppd	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPPDrri, X86_INS_VCMPPD: vcmp${cc}pd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPPDrri_alt, X86_INS_VCMPPD: vcmppd	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPPSYrmi, X86_INS_VCMPPS: vcmp${cc}ps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPPSYrmi_alt, X86_INS_VCMPPS: vcmpps	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPPSYrri, X86_INS_VCMPPS: vcmp${cc}ps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPPSYrri_alt, X86_INS_VCMPPS: vcmpps	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPPSZrmi, X86_INS_VCMPPS: vcmp${cc}ps	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPPSZrmi_alt, X86_INS_VCMPPS: vcmpps	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPPSZrri, X86_INS_VCMPPS: vcmp${cc}ps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPPSZrri_alt, X86_INS_VCMPPS: vcmpps	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPPSZrrib, X86_INS_VCMPPS: vcmp${cc}ps	{{sae}, $src2, $src1, $dst|$dst, $src1, $src2, {sae}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPPSZrrib_alt, X86_INS_VCMPPS: vcmpps	{{sae}, $cc, $src2, $src1, $dst|$dst, $src1, $src2, $cc, {sae}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VCMPPSrmi, X86_INS_VCMPPS: vcmp${cc}ps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPPSrmi_alt, X86_INS_VCMPPS: vcmpps	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPPSrri, X86_INS_VCMPPS: vcmp${cc}ps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPPSrri_alt, X86_INS_VCMPPS: vcmpps	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPSDZrm, X86_INS_VCMPSD: vcmp${cc}sd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPSDZrmi_alt, X86_INS_VCMPSD: vcmpsd	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPSDZrr, X86_INS_VCMPSD: vcmp${cc}sd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPSDZrri_alt, X86_INS_VCMPSD: vcmpsd	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPSDrm, X86_INS_VCMPSD: vcmp${cc}sd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPSDrm_alt, X86_INS_VCMPSD: vcmpsd	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPSDrr, X86_INS_VCMPSD: vcmp${cc}sd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPSDrr_alt, X86_INS_VCMPSD: vcmpsd	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPSSZrm, X86_INS_VCMPSS: vcmp${cc}ss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPSSZrmi_alt, X86_INS_VCMPSS: vcmpss	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPSSZrr, X86_INS_VCMPSS: vcmp${cc}ss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPSSZrri_alt, X86_INS_VCMPSS: vcmpss	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPSSrm, X86_INS_VCMPSS: vcmp${cc}ss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPSSrm_alt, X86_INS_VCMPSS: vcmpss	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPSSrr, X86_INS_VCMPSS: vcmp${cc}ss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCMPSSrr_alt, X86_INS_VCMPSS: vcmpss	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCOMISDZrm, X86_INS_VCOMISD: vcomisd	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCOMISDZrr, X86_INS_VCOMISD: vcomisd	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCOMISDrm, X86_INS_VCOMISD: vcomisd	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCOMISDrr, X86_INS_VCOMISD: vcomisd	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCOMISSZrm, X86_INS_VCOMISS: vcomiss	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCOMISSZrr, X86_INS_VCOMISS: vcomiss	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCOMISSrm, X86_INS_VCOMISS: vcomiss	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCOMISSrr, X86_INS_VCOMISS: vcomiss	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCOMPRESSPDZ128mrk, X86_INS_VCOMPRESSPD: vcompresspd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VCOMPRESSPDZ128rrk, X86_INS_VCOMPRESSPD: vcompresspd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VCOMPRESSPDZ128rrkz, X86_INS_VCOMPRESSPD: vcompresspd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VCOMPRESSPDZ256mrk, X86_INS_VCOMPRESSPD: vcompresspd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VCOMPRESSPDZ256rrk, X86_INS_VCOMPRESSPD: vcompresspd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VCOMPRESSPDZ256rrkz, X86_INS_VCOMPRESSPD: vcompresspd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VCOMPRESSPDZmrk, X86_INS_VCOMPRESSPD: vcompresspd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VCOMPRESSPDZrrk, X86_INS_VCOMPRESSPD: vcompresspd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VCOMPRESSPDZrrkz, X86_INS_VCOMPRESSPD: vcompresspd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VCOMPRESSPSZ128mrk, X86_INS_VCOMPRESSPS: vcompressps	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VCOMPRESSPSZ128rrk, X86_INS_VCOMPRESSPS: vcompressps	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VCOMPRESSPSZ128rrkz, X86_INS_VCOMPRESSPS: vcompressps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VCOMPRESSPSZ256mrk, X86_INS_VCOMPRESSPS: vcompressps	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VCOMPRESSPSZ256rrk, X86_INS_VCOMPRESSPS: vcompressps	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VCOMPRESSPSZ256rrkz, X86_INS_VCOMPRESSPS: vcompressps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VCOMPRESSPSZmrk, X86_INS_VCOMPRESSPS: vcompressps	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VCOMPRESSPSZrrk, X86_INS_VCOMPRESSPS: vcompressps	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VCOMPRESSPSZrrkz, X86_INS_VCOMPRESSPS: vcompressps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VCVTDQ2PDYrm, X86_INS_VCVTDQ2PD: vcvtdq2pd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTDQ2PDYrr, X86_INS_VCVTDQ2PD: vcvtdq2pd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTDQ2PDZrm, X86_INS_VCVTDQ2PD: vcvtdq2pd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTDQ2PDZrr, X86_INS_VCVTDQ2PD: vcvtdq2pd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTDQ2PDrm, X86_INS_VCVTDQ2PD: vcvtdq2pd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTDQ2PDrr, X86_INS_VCVTDQ2PD: vcvtdq2pd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTDQ2PSYrm, X86_INS_VCVTDQ2PS: vcvtdq2ps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTDQ2PSYrr, X86_INS_VCVTDQ2PS: vcvtdq2ps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTDQ2PSZrm, X86_INS_VCVTDQ2PS: vcvtdq2ps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTDQ2PSZrr, X86_INS_VCVTDQ2PS: vcvtdq2ps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTDQ2PSZrrb, X86_INS_VCVTDQ2PS: vcvtdq2ps	$dst, $src, $rc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTDQ2PSrm, X86_INS_VCVTDQ2PS: vcvtdq2ps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTDQ2PSrr, X86_INS_VCVTDQ2PS: vcvtdq2ps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPD2DQXrm, X86_INS_VCVTPD2DQX: vcvtpd2dqx	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPD2DQYrm, X86_INS_VCVTPD2DQ: vcvtpd2dq{y}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPD2DQYrr, X86_INS_VCVTPD2DQ: vcvtpd2dq{y}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPD2DQZrm, X86_INS_VCVTPD2DQ: vcvtpd2dq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPD2DQZrr, X86_INS_VCVTPD2DQ: vcvtpd2dq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPD2DQZrrb, X86_INS_VCVTPD2DQ: vcvtpd2dq	$dst, $src, $rc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPD2DQrr, X86_INS_VCVTPD2DQ: vcvtpd2dq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPD2PSXrm, X86_INS_VCVTPD2PSX: vcvtpd2psx	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPD2PSYrm, X86_INS_VCVTPD2PS: vcvtpd2ps{y}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPD2PSYrr, X86_INS_VCVTPD2PS: vcvtpd2ps{y}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPD2PSZrm, X86_INS_VCVTPD2PS: vcvtpd2ps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPD2PSZrr, X86_INS_VCVTPD2PS: vcvtpd2ps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPD2PSZrrb, X86_INS_VCVTPD2PS: vcvtpd2ps	$dst, $src, $rc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPD2PSrr, X86_INS_VCVTPD2PS: vcvtpd2ps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPD2UDQZrm, X86_INS_VCVTPD2UDQ: vcvtpd2udq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPD2UDQZrr, X86_INS_VCVTPD2UDQ: vcvtpd2udq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPD2UDQZrrb, X86_INS_VCVTPD2UDQ: vcvtpd2udq	$dst, $src, $rc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPH2PSYrm, X86_INS_VCVTPH2PS: vcvtph2ps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPH2PSYrr, X86_INS_VCVTPH2PS: vcvtph2ps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPH2PSZrm, X86_INS_VCVTPH2PS: vcvtph2ps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPH2PSZrr, X86_INS_VCVTPH2PS: vcvtph2ps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPH2PSrm, X86_INS_VCVTPH2PS: vcvtph2ps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPH2PSrr, X86_INS_VCVTPH2PS: vcvtph2ps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPS2DQYrm, X86_INS_VCVTPS2DQ: vcvtps2dq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPS2DQYrr, X86_INS_VCVTPS2DQ: vcvtps2dq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPS2DQZrm, X86_INS_VCVTPS2DQ: vcvtps2dq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPS2DQZrr, X86_INS_VCVTPS2DQ: vcvtps2dq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPS2DQZrrb, X86_INS_VCVTPS2DQ: vcvtps2dq	$dst, $src, $rc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPS2DQrm, X86_INS_VCVTPS2DQ: vcvtps2dq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPS2DQrr, X86_INS_VCVTPS2DQ: vcvtps2dq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPS2PDYrm, X86_INS_VCVTPS2PD: vcvtps2pd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPS2PDYrr, X86_INS_VCVTPS2PD: vcvtps2pd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPS2PDZrm, X86_INS_VCVTPS2PD: vcvtps2pd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPS2PDZrr, X86_INS_VCVTPS2PD: vcvtps2pd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPS2PDrm, X86_INS_VCVTPS2PD: vcvtps2pd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPS2PDrr, X86_INS_VCVTPS2PD: vcvtps2pd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPS2PHYmr, X86_INS_VCVTPS2PH: vcvtps2ph	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPS2PHYrr, X86_INS_VCVTPS2PH: vcvtps2ph	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPS2PHZmr, X86_INS_VCVTPS2PH: vcvtps2ph	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPS2PHZrr, X86_INS_VCVTPS2PH: vcvtps2ph	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPS2PHmr, X86_INS_VCVTPS2PH: vcvtps2ph	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPS2PHrr, X86_INS_VCVTPS2PH: vcvtps2ph	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPS2UDQZrm, X86_INS_VCVTPS2UDQ: vcvtps2udq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPS2UDQZrr, X86_INS_VCVTPS2UDQ: vcvtps2udq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTPS2UDQZrrb, X86_INS_VCVTPS2UDQ: vcvtps2udq	$dst, $src, $rc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSD2SI64Zrm, X86_INS_VCVTSD2SI: vcvtsd2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSD2SI64Zrr, X86_INS_VCVTSD2SI: vcvtsd2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSD2SI64rm, X86_INS_VCVTSD2SI: vcvtsd2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSD2SI64rr, X86_INS_VCVTSD2SI: vcvtsd2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSD2SIZrm, X86_INS_VCVTSD2SI: vcvtsd2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSD2SIZrr, X86_INS_VCVTSD2SI: vcvtsd2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSD2SIrm, X86_INS_VCVTSD2SI: vcvtsd2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSD2SIrr, X86_INS_VCVTSD2SI: vcvtsd2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSD2SSZrm, X86_INS_VCVTSD2SS: vcvtsd2ss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSD2SSZrr, X86_INS_VCVTSD2SS: vcvtsd2ss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSD2SSrm, X86_INS_VCVTSD2SS: vcvtsd2ss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSD2SSrr, X86_INS_VCVTSD2SS: vcvtsd2ss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSD2USI64Zrm, X86_INS_VCVTSD2USI: vcvtsd2usi	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSD2USI64Zrr, X86_INS_VCVTSD2USI: vcvtsd2usi	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSD2USIZrm, X86_INS_VCVTSD2USI: vcvtsd2usi	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSD2USIZrr, X86_INS_VCVTSD2USI: vcvtsd2usi	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSI2SD64rm, X86_INS_VCVTSI2SD: vcvtsi2sd{q}	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSI2SD64rr, X86_INS_VCVTSI2SD: vcvtsi2sd{q}	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSI2SDZrm, X86_INS_VCVTSI2SD: vcvtsi2sd{l}	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSI2SDZrr, X86_INS_VCVTSI2SD: vcvtsi2sd{l}	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSI2SDrm, X86_INS_VCVTSI2SD: vcvtsi2sd{l}	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSI2SDrr, X86_INS_VCVTSI2SD: vcvtsi2sd{l}	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSI2SS64rm, X86_INS_VCVTSI2SS: vcvtsi2ss{q}	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSI2SS64rr, X86_INS_VCVTSI2SS: vcvtsi2ss{q}	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSI2SSZrm, X86_INS_VCVTSI2SS: vcvtsi2ss{l}	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSI2SSZrr, X86_INS_VCVTSI2SS: vcvtsi2ss{l}	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSI2SSrm, X86_INS_VCVTSI2SS: vcvtsi2ss{l}	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSI2SSrr, X86_INS_VCVTSI2SS: vcvtsi2ss{l}	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSI642SDZrm, X86_INS_VCVTSI2SD: vcvtsi2sd{q}	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSI642SDZrr, X86_INS_VCVTSI2SD: vcvtsi2sd{q}	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSI642SSZrm, X86_INS_VCVTSI2SS: vcvtsi2ss{q}	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSI642SSZrr, X86_INS_VCVTSI2SS: vcvtsi2ss{q}	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSS2SDZrm, X86_INS_VCVTSS2SD: vcvtss2sd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSS2SDZrr, X86_INS_VCVTSS2SD: vcvtss2sd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSS2SDrm, X86_INS_VCVTSS2SD: vcvtss2sd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSS2SDrr, X86_INS_VCVTSS2SD: vcvtss2sd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSS2SI64Zrm, X86_INS_VCVTSS2SI: vcvtss2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSS2SI64Zrr, X86_INS_VCVTSS2SI: vcvtss2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSS2SI64rm, X86_INS_VCVTSS2SI: vcvtss2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSS2SI64rr, X86_INS_VCVTSS2SI: vcvtss2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSS2SIZrm, X86_INS_VCVTSS2SI: vcvtss2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSS2SIZrr, X86_INS_VCVTSS2SI: vcvtss2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSS2SIrm, X86_INS_VCVTSS2SI: vcvtss2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSS2SIrr, X86_INS_VCVTSS2SI: vcvtss2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSS2USI64Zrm, X86_INS_VCVTSS2USI: vcvtss2usi	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSS2USI64Zrr, X86_INS_VCVTSS2USI: vcvtss2usi	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSS2USIZrm, X86_INS_VCVTSS2USI: vcvtss2usi	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTSS2USIZrr, X86_INS_VCVTSS2USI: vcvtss2usi	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTPD2DQXrm, X86_INS_VCVTTPD2DQX: vcvttpd2dqx	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTPD2DQYrm, X86_INS_VCVTTPD2DQ: vcvttpd2dq{y}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTPD2DQYrr, X86_INS_VCVTTPD2DQ: vcvttpd2dq{y}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTPD2DQZrm, X86_INS_VCVTTPD2DQ: vcvttpd2dq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTPD2DQZrr, X86_INS_VCVTTPD2DQ: vcvttpd2dq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTPD2DQrr, X86_INS_VCVTTPD2DQ: vcvttpd2dq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTPD2UDQZrm, X86_INS_VCVTTPD2UDQ: vcvttpd2udq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTPD2UDQZrr, X86_INS_VCVTTPD2UDQ: vcvttpd2udq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTPS2DQYrm, X86_INS_VCVTTPS2DQ: vcvttps2dq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTPS2DQYrr, X86_INS_VCVTTPS2DQ: vcvttps2dq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTPS2DQZrm, X86_INS_VCVTTPS2DQ: vcvttps2dq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTPS2DQZrr, X86_INS_VCVTTPS2DQ: vcvttps2dq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTPS2DQrm, X86_INS_VCVTTPS2DQ: vcvttps2dq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTPS2DQrr, X86_INS_VCVTTPS2DQ: vcvttps2dq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTPS2UDQZrm, X86_INS_VCVTTPS2UDQ: vcvttps2udq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTPS2UDQZrr, X86_INS_VCVTTPS2UDQ: vcvttps2udq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTSD2SI64Zrm, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTSD2SI64Zrr, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTSD2SI64rm, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTSD2SI64rr, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTSD2SIZrm, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTSD2SIZrr, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTSD2SIrm, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTSD2SIrr, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTSD2USI64Zrm, X86_INS_VCVTTSD2USI: vcvttsd2usi	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTSD2USI64Zrr, X86_INS_VCVTTSD2USI: vcvttsd2usi	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTSD2USIZrm, X86_INS_VCVTTSD2USI: vcvttsd2usi	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTSD2USIZrr, X86_INS_VCVTTSD2USI: vcvttsd2usi	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTSS2SI64Zrm, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTSS2SI64Zrr, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTSS2SI64rm, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTSS2SI64rr, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTSS2SIZrm, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTSS2SIZrr, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTSS2SIrm, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTSS2SIrr, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTSS2USI64Zrm, X86_INS_VCVTTSS2USI: vcvttss2usi	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTSS2USI64Zrr, X86_INS_VCVTTSS2USI: vcvttss2usi	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTSS2USIZrm, X86_INS_VCVTTSS2USI: vcvttss2usi	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTTSS2USIZrr, X86_INS_VCVTTSS2USI: vcvttss2usi	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTUDQ2PDZrm, X86_INS_VCVTUDQ2PD: vcvtudq2pd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTUDQ2PDZrr, X86_INS_VCVTUDQ2PD: vcvtudq2pd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTUDQ2PSZrm, X86_INS_VCVTUDQ2PS: vcvtudq2ps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTUDQ2PSZrr, X86_INS_VCVTUDQ2PS: vcvtudq2ps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTUDQ2PSZrrb, X86_INS_VCVTUDQ2PS: vcvtudq2ps	$dst, $src, $rc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTUSI2SDZrm, X86_INS_VCVTUSI2SD: vcvtusi2sd{l}	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTUSI2SDZrr, X86_INS_VCVTUSI2SD: vcvtusi2sd{l}	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTUSI2SSZrm, X86_INS_VCVTUSI2SS: vcvtusi2ss{l}	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTUSI2SSZrr, X86_INS_VCVTUSI2SS: vcvtusi2ss{l}	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTUSI642SDZrm, X86_INS_VCVTUSI2SD: vcvtusi2sd{q}	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTUSI642SDZrr, X86_INS_VCVTUSI2SD: vcvtusi2sd{q}	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTUSI642SSZrm, X86_INS_VCVTUSI2SS: vcvtusi2ss{q}	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VCVTUSI642SSZrr, X86_INS_VCVTUSI2SS: vcvtusi2ss{q}	$dst, $src1, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDIVPDYrm, X86_INS_VDIVPD: vdivpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDIVPDYrr, X86_INS_VDIVPD: vdivpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDIVPDZ128rm, X86_INS_VDIVPD: vdivpd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPDZ128rmb, X86_INS_VDIVPD: vdivpd	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPDZ128rmbk, X86_INS_VDIVPD: vdivpd	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPDZ128rmbkz, X86_INS_VDIVPD: vdivpd	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPDZ128rmk, X86_INS_VDIVPD: vdivpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPDZ128rmkz, X86_INS_VDIVPD: vdivpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPDZ128rr, X86_INS_VDIVPD: vdivpd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPDZ128rrk, X86_INS_VDIVPD: vdivpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPDZ128rrkz, X86_INS_VDIVPD: vdivpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPDZ256rm, X86_INS_VDIVPD: vdivpd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPDZ256rmb, X86_INS_VDIVPD: vdivpd	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPDZ256rmbk, X86_INS_VDIVPD: vdivpd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPDZ256rmbkz, X86_INS_VDIVPD: vdivpd	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPDZ256rmk, X86_INS_VDIVPD: vdivpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPDZ256rmkz, X86_INS_VDIVPD: vdivpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPDZ256rr, X86_INS_VDIVPD: vdivpd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPDZ256rrk, X86_INS_VDIVPD: vdivpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPDZ256rrkz, X86_INS_VDIVPD: vdivpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPDZrb, X86_INS_VDIVPD: vdivpd	$dst , $src1, $src2, $rc */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VDIVPDZrbk, X86_INS_VDIVPD: vdivpd	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VDIVPDZrbkz, X86_INS_VDIVPD: vdivpd	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VDIVPDZrm, X86_INS_VDIVPD: vdivpd	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDIVPDZrmb, X86_INS_VDIVPD: vdivpd	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDIVPDZrmbk, X86_INS_VDIVPD: vdivpd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VDIVPDZrmbkz, X86_INS_VDIVPD: vdivpd	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VDIVPDZrmk, X86_INS_VDIVPD: vdivpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VDIVPDZrmkz, X86_INS_VDIVPD: vdivpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VDIVPDZrr, X86_INS_VDIVPD: vdivpd	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDIVPDZrrk, X86_INS_VDIVPD: vdivpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VDIVPDZrrkz, X86_INS_VDIVPD: vdivpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VDIVPDrm, X86_INS_VDIVPD: vdivpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDIVPDrr, X86_INS_VDIVPD: vdivpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDIVPSYrm, X86_INS_VDIVPS: vdivps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDIVPSYrr, X86_INS_VDIVPS: vdivps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDIVPSZ128rm, X86_INS_VDIVPS: vdivps	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPSZ128rmb, X86_INS_VDIVPS: vdivps	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPSZ128rmbk, X86_INS_VDIVPS: vdivps	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPSZ128rmbkz, X86_INS_VDIVPS: vdivps	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPSZ128rmk, X86_INS_VDIVPS: vdivps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPSZ128rmkz, X86_INS_VDIVPS: vdivps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPSZ128rr, X86_INS_VDIVPS: vdivps	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPSZ128rrk, X86_INS_VDIVPS: vdivps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPSZ128rrkz, X86_INS_VDIVPS: vdivps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPSZ256rm, X86_INS_VDIVPS: vdivps	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPSZ256rmb, X86_INS_VDIVPS: vdivps	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPSZ256rmbk, X86_INS_VDIVPS: vdivps	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPSZ256rmbkz, X86_INS_VDIVPS: vdivps	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPSZ256rmk, X86_INS_VDIVPS: vdivps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPSZ256rmkz, X86_INS_VDIVPS: vdivps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPSZ256rr, X86_INS_VDIVPS: vdivps	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPSZ256rrk, X86_INS_VDIVPS: vdivps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPSZ256rrkz, X86_INS_VDIVPS: vdivps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVPSZrb, X86_INS_VDIVPS: vdivps	$dst , $src1, $src2, $rc */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VDIVPSZrbk, X86_INS_VDIVPS: vdivps	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VDIVPSZrbkz, X86_INS_VDIVPS: vdivps	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VDIVPSZrm, X86_INS_VDIVPS: vdivps	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDIVPSZrmb, X86_INS_VDIVPS: vdivps	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDIVPSZrmbk, X86_INS_VDIVPS: vdivps	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VDIVPSZrmbkz, X86_INS_VDIVPS: vdivps	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VDIVPSZrmk, X86_INS_VDIVPS: vdivps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VDIVPSZrmkz, X86_INS_VDIVPS: vdivps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VDIVPSZrr, X86_INS_VDIVPS: vdivps	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDIVPSZrrk, X86_INS_VDIVPS: vdivps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VDIVPSZrrkz, X86_INS_VDIVPS: vdivps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VDIVPSrm, X86_INS_VDIVPS: vdivps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDIVPSrr, X86_INS_VDIVPS: vdivps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDIVSDZrm, X86_INS_VDIVSD: vdivsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDIVSDZrm_Int, X86_INS_VDIVSD: vdivsd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVSDZrm_Intk, X86_INS_VDIVSD: vdivsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVSDZrm_Intkz, X86_INS_VDIVSD: vdivsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVSDZrr, X86_INS_VDIVSD: vdivsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDIVSDZrr_Int, X86_INS_VDIVSD: vdivsd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVSDZrr_Intk, X86_INS_VDIVSD: vdivsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVSDZrr_Intkz, X86_INS_VDIVSD: vdivsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVSDZrrb, X86_INS_VDIVSD: vdivsd	$dst , $src1, $src2, $rc */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVSDZrrbk, X86_INS_VDIVSD: vdivsd	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVSDZrrbkz, X86_INS_VDIVSD: vdivsd	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVSDrm, X86_INS_VDIVSD: vdivsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDIVSDrm_Int, X86_INS_VDIVSD: vdivsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDIVSDrr, X86_INS_VDIVSD: vdivsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDIVSDrr_Int, X86_INS_VDIVSD: vdivsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDIVSSZrm, X86_INS_VDIVSS: vdivss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDIVSSZrm_Int, X86_INS_VDIVSS: vdivss	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVSSZrm_Intk, X86_INS_VDIVSS: vdivss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVSSZrm_Intkz, X86_INS_VDIVSS: vdivss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVSSZrr, X86_INS_VDIVSS: vdivss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDIVSSZrr_Int, X86_INS_VDIVSS: vdivss	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVSSZrr_Intk, X86_INS_VDIVSS: vdivss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVSSZrr_Intkz, X86_INS_VDIVSS: vdivss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVSSZrrb, X86_INS_VDIVSS: vdivss	$dst , $src1, $src2, $rc */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVSSZrrbk, X86_INS_VDIVSS: vdivss	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVSSZrrbkz, X86_INS_VDIVSS: vdivss	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VDIVSSrm, X86_INS_VDIVSS: vdivss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDIVSSrm_Int, X86_INS_VDIVSS: vdivss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDIVSSrr, X86_INS_VDIVSS: vdivss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDIVSSrr_Int, X86_INS_VDIVSS: vdivss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDPPDrmi, X86_INS_VDPPD: vdppd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDPPDrri, X86_INS_VDPPD: vdppd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDPPSYrmi, X86_INS_VDPPS: vdpps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDPPSYrri, X86_INS_VDPPS: vdpps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDPPSrmi, X86_INS_VDPPS: vdpps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VDPPSrri, X86_INS_VDPPS: vdpps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VERRm, X86_INS_VERR: verr	$seg */
-		X86_EFLAGS_MODIFY_ZF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VERRr, X86_INS_VERR: verr	$seg */
-		X86_EFLAGS_MODIFY_ZF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VERWm, X86_INS_VERW: verw	$seg */
-		X86_EFLAGS_MODIFY_ZF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VERWr, X86_INS_VERW: verw	$seg */
-		X86_EFLAGS_MODIFY_ZF,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VEXP2PDm, X86_INS_VEXP2PD: vexp2pd	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXP2PDmb, X86_INS_VEXP2PD: vexp2pd	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXP2PDmbk, X86_INS_VEXP2PD: vexp2pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXP2PDmbkz, X86_INS_VEXP2PD: vexp2pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXP2PDmk, X86_INS_VEXP2PD: vexp2pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXP2PDmkz, X86_INS_VEXP2PD: vexp2pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXP2PDr, X86_INS_VEXP2PD: vexp2pd	$dst , $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VEXP2PDrb, X86_INS_VEXP2PD: vexp2pd	{$src, $dst {sae}|$dst {sae}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXP2PDrbk, X86_INS_VEXP2PD: vexp2pd	{$src, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXP2PDrbkz, X86_INS_VEXP2PD: vexp2pd	{$src, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXP2PDrk, X86_INS_VEXP2PD: vexp2pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXP2PDrkz, X86_INS_VEXP2PD: vexp2pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXP2PSm, X86_INS_VEXP2PS: vexp2ps	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXP2PSmb, X86_INS_VEXP2PS: vexp2ps	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXP2PSmbk, X86_INS_VEXP2PS: vexp2ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXP2PSmbkz, X86_INS_VEXP2PS: vexp2ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXP2PSmk, X86_INS_VEXP2PS: vexp2ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXP2PSmkz, X86_INS_VEXP2PS: vexp2ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXP2PSr, X86_INS_VEXP2PS: vexp2ps	$dst , $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VEXP2PSrb, X86_INS_VEXP2PS: vexp2ps	{$src, $dst {sae}|$dst {sae}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXP2PSrbk, X86_INS_VEXP2PS: vexp2ps	{$src, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXP2PSrbkz, X86_INS_VEXP2PS: vexp2ps	{$src, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXP2PSrk, X86_INS_VEXP2PS: vexp2ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXP2PSrkz, X86_INS_VEXP2PS: vexp2ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXPANDPDZ128rmk, X86_INS_VEXPANDPD: vexpandpd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXPANDPDZ128rmkz, X86_INS_VEXPANDPD: vexpandpd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXPANDPDZ128rrk, X86_INS_VEXPANDPD: vexpandpd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXPANDPDZ128rrkz, X86_INS_VEXPANDPD: vexpandpd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXPANDPDZ256rmk, X86_INS_VEXPANDPD: vexpandpd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXPANDPDZ256rmkz, X86_INS_VEXPANDPD: vexpandpd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXPANDPDZ256rrk, X86_INS_VEXPANDPD: vexpandpd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXPANDPDZ256rrkz, X86_INS_VEXPANDPD: vexpandpd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXPANDPDZrmk, X86_INS_VEXPANDPD: vexpandpd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXPANDPDZrmkz, X86_INS_VEXPANDPD: vexpandpd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXPANDPDZrrk, X86_INS_VEXPANDPD: vexpandpd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXPANDPDZrrkz, X86_INS_VEXPANDPD: vexpandpd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXPANDPSZ128rmk, X86_INS_VEXPANDPS: vexpandps	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXPANDPSZ128rmkz, X86_INS_VEXPANDPS: vexpandps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXPANDPSZ128rrk, X86_INS_VEXPANDPS: vexpandps	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXPANDPSZ128rrkz, X86_INS_VEXPANDPS: vexpandps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXPANDPSZ256rmk, X86_INS_VEXPANDPS: vexpandps	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXPANDPSZ256rmkz, X86_INS_VEXPANDPS: vexpandps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXPANDPSZ256rrk, X86_INS_VEXPANDPS: vexpandps	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXPANDPSZ256rrkz, X86_INS_VEXPANDPS: vexpandps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXPANDPSZrmk, X86_INS_VEXPANDPS: vexpandps	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXPANDPSZrmkz, X86_INS_VEXPANDPS: vexpandps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXPANDPSZrrk, X86_INS_VEXPANDPS: vexpandps	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXPANDPSZrrkz, X86_INS_VEXPANDPS: vexpandps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VEXTRACTF128mr, X86_INS_VEXTRACTF128: vextractf128	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VEXTRACTF128rr, X86_INS_VEXTRACTF128: vextractf128	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VEXTRACTF32x4rm, X86_INS_VEXTRACTF32X4: vextractf32x4	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VEXTRACTF32x4rr, X86_INS_VEXTRACTF32X4: vextractf32x4	$dst , $src1, $idx */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VEXTRACTF32x4rrk, X86_INS_VEXTRACTF32X4: vextractf32x4	{$idx, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $idx} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VEXTRACTF32x4rrkz, X86_INS_VEXTRACTF32X4: vextractf32x4	{$idx, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $idx} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VEXTRACTF64x4rm, X86_INS_VEXTRACTF64X4: vextractf64x4	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VEXTRACTF64x4rr, X86_INS_VEXTRACTF64X4: vextractf64x4	$dst , $src1, $idx */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VEXTRACTF64x4rrk, X86_INS_VEXTRACTF64X4: vextractf64x4	{$idx, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $idx} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VEXTRACTF64x4rrkz, X86_INS_VEXTRACTF64X4: vextractf64x4	{$idx, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $idx} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VEXTRACTI128mr, X86_INS_VEXTRACTI128: vextracti128	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VEXTRACTI128rr, X86_INS_VEXTRACTI128: vextracti128	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VEXTRACTI32x4rm, X86_INS_VEXTRACTI32X4: vextracti32x4	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VEXTRACTI32x4rr, X86_INS_VEXTRACTI32X4: vextracti32x4	$dst , $src1, $idx */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VEXTRACTI32x4rrk, X86_INS_VEXTRACTI32X4: vextracti32x4	{$idx, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $idx} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VEXTRACTI32x4rrkz, X86_INS_VEXTRACTI32X4: vextracti32x4	{$idx, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $idx} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VEXTRACTI64x4rm, X86_INS_VEXTRACTI64X4: vextracti64x4	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VEXTRACTI64x4rr, X86_INS_VEXTRACTI64X4: vextracti64x4	$dst , $src1, $idx */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VEXTRACTI64x4rrk, X86_INS_VEXTRACTI64X4: vextracti64x4	{$idx, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $idx} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VEXTRACTI64x4rrkz, X86_INS_VEXTRACTI64X4: vextracti64x4	{$idx, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $idx} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VEXTRACTPSmr, X86_INS_VEXTRACTPS: vextractps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VEXTRACTPSrr, X86_INS_VEXTRACTPS: vextractps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VEXTRACTPSzmr, X86_INS_VEXTRACTPS: vextractps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VEXTRACTPSzrr, X86_INS_VEXTRACTPS: vextractps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADD132PDZ128m, X86_INS_VFMADD132PD: vfmadd132pd	$dst, $src3, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADD132PDZ128mb, X86_INS_VFMADD132PD: vfmadd132pd	{${src2}{1to2}, $src3, $dst|$dst, $src3, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADD132PDZ256m, X86_INS_VFMADD132PD: vfmadd132pd	$dst, $src3, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADD132PDZ256mb, X86_INS_VFMADD132PD: vfmadd132pd	{${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADD132PDZm, X86_INS_VFMADD132PD: vfmadd132pd	$dst, $src3, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADD132PDZmb, X86_INS_VFMADD132PD: vfmadd132pd	{${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADD132PSZ128m, X86_INS_VFMADD132PS: vfmadd132ps	$dst, $src3, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADD132PSZ128mb, X86_INS_VFMADD132PS: vfmadd132ps	{${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADD132PSZ256m, X86_INS_VFMADD132PS: vfmadd132ps	$dst, $src3, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADD132PSZ256mb, X86_INS_VFMADD132PS: vfmadd132ps	{${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADD132PSZm, X86_INS_VFMADD132PS: vfmadd132ps	$dst, $src3, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADD132PSZmb, X86_INS_VFMADD132PS: vfmadd132ps	{${src2}{1to16}, $src3, $dst|$dst, $src3, ${src2}{1to16}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPD4mr, X86_INS_VFMADDPD: vfmaddpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPD4mrY, X86_INS_VFMADDPD: vfmaddpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPD4rm, X86_INS_VFMADDPD: vfmaddpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPD4rmY, X86_INS_VFMADDPD: vfmaddpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPD4rr, X86_INS_VFMADDPD: vfmaddpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPD4rrY, X86_INS_VFMADDPD: vfmaddpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPD4rrY_REV, X86_INS_VFMADDPD: vfmaddpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPD4rr_REV, X86_INS_VFMADDPD: vfmaddpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPDZ128v213rm, X86_INS_VFMADD213PD: vfmadd213pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ128v213rmb, X86_INS_VFMADD213PD: vfmadd213pd	{${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ128v213rmbk, X86_INS_VFMADD213PD: vfmadd213pd	{${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ128v213rmbkz, X86_INS_VFMADD213PD: vfmadd213pd	{${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ128v213rmk, X86_INS_VFMADD213PD: vfmadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ128v213rmkz, X86_INS_VFMADD213PD: vfmadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ128v213rr, X86_INS_VFMADD213PD: vfmadd213pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ128v213rrk, X86_INS_VFMADD213PD: vfmadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ128v213rrkz, X86_INS_VFMADD213PD: vfmadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ128v231rm, X86_INS_VFMADD231PD: vfmadd231pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ128v231rmb, X86_INS_VFMADD231PD: vfmadd231pd	{${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ128v231rmbk, X86_INS_VFMADD231PD: vfmadd231pd	{${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ128v231rmbkz, X86_INS_VFMADD231PD: vfmadd231pd	{${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ128v231rmk, X86_INS_VFMADD231PD: vfmadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ128v231rmkz, X86_INS_VFMADD231PD: vfmadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ128v231rr, X86_INS_VFMADD231PD: vfmadd231pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ128v231rrk, X86_INS_VFMADD231PD: vfmadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ128v231rrkz, X86_INS_VFMADD231PD: vfmadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ256v213rm, X86_INS_VFMADD213PD: vfmadd213pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ256v213rmb, X86_INS_VFMADD213PD: vfmadd213pd	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ256v213rmbk, X86_INS_VFMADD213PD: vfmadd213pd	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ256v213rmbkz, X86_INS_VFMADD213PD: vfmadd213pd	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ256v213rmk, X86_INS_VFMADD213PD: vfmadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ256v213rmkz, X86_INS_VFMADD213PD: vfmadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ256v213rr, X86_INS_VFMADD213PD: vfmadd213pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ256v213rrk, X86_INS_VFMADD213PD: vfmadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ256v213rrkz, X86_INS_VFMADD213PD: vfmadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ256v231rm, X86_INS_VFMADD231PD: vfmadd231pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ256v231rmb, X86_INS_VFMADD231PD: vfmadd231pd	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ256v231rmbk, X86_INS_VFMADD231PD: vfmadd231pd	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ256v231rmbkz, X86_INS_VFMADD231PD: vfmadd231pd	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ256v231rmk, X86_INS_VFMADD231PD: vfmadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ256v231rmkz, X86_INS_VFMADD231PD: vfmadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ256v231rr, X86_INS_VFMADD231PD: vfmadd231pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ256v231rrk, X86_INS_VFMADD231PD: vfmadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZ256v231rrkz, X86_INS_VFMADD231PD: vfmadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPDZv213rm, X86_INS_VFMADD213PD: vfmadd213pd	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPDZv213rmb, X86_INS_VFMADD213PD: vfmadd213pd	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPDZv213rmbk, X86_INS_VFMADD213PD: vfmadd213pd	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPDZv213rmbkz, X86_INS_VFMADD213PD: vfmadd213pd	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPDZv213rmk, X86_INS_VFMADD213PD: vfmadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPDZv213rmkz, X86_INS_VFMADD213PD: vfmadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPDZv213rr, X86_INS_VFMADD213PD: vfmadd213pd	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPDZv213rrb, X86_INS_VFMADD213PD: vfmadd213pd	$dst , $src2, $src3, $rc */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPDZv213rrbk, X86_INS_VFMADD213PD: vfmadd213pd	{$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPDZv213rrbkz, X86_INS_VFMADD213PD: vfmadd213pd	{$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPDZv213rrk, X86_INS_VFMADD213PD: vfmadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPDZv213rrkz, X86_INS_VFMADD213PD: vfmadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPDZv231rm, X86_INS_VFMADD231PD: vfmadd231pd	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPDZv231rmb, X86_INS_VFMADD231PD: vfmadd231pd	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPDZv231rmbk, X86_INS_VFMADD231PD: vfmadd231pd	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPDZv231rmbkz, X86_INS_VFMADD231PD: vfmadd231pd	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPDZv231rmk, X86_INS_VFMADD231PD: vfmadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPDZv231rmkz, X86_INS_VFMADD231PD: vfmadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPDZv231rr, X86_INS_VFMADD231PD: vfmadd231pd	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPDZv231rrk, X86_INS_VFMADD231PD: vfmadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPDZv231rrkz, X86_INS_VFMADD231PD: vfmadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPDr132m, X86_INS_VFMADD132PD: vfmadd132pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPDr132mY, X86_INS_VFMADD132PD: vfmadd132pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPDr132r, X86_INS_VFMADD132PD: vfmadd132pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPDr132rY, X86_INS_VFMADD132PD: vfmadd132pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPDr213m, X86_INS_VFMADD213PD: vfmadd213pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPDr213mY, X86_INS_VFMADD213PD: vfmadd213pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPDr213r, X86_INS_VFMADD213PD: vfmadd213pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPDr213rY, X86_INS_VFMADD213PD: vfmadd213pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPDr231m, X86_INS_VFMADD231PD: vfmadd231pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPDr231mY, X86_INS_VFMADD231PD: vfmadd231pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPDr231r, X86_INS_VFMADD231PD: vfmadd231pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPDr231rY, X86_INS_VFMADD231PD: vfmadd231pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPS4mr, X86_INS_VFMADDPS: vfmaddps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPS4mrY, X86_INS_VFMADDPS: vfmaddps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPS4rm, X86_INS_VFMADDPS: vfmaddps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPS4rmY, X86_INS_VFMADDPS: vfmaddps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPS4rr, X86_INS_VFMADDPS: vfmaddps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPS4rrY, X86_INS_VFMADDPS: vfmaddps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPS4rrY_REV, X86_INS_VFMADDPS: vfmaddps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPS4rr_REV, X86_INS_VFMADDPS: vfmaddps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPSZ128v213rm, X86_INS_VFMADD213PS: vfmadd213ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ128v213rmb, X86_INS_VFMADD213PS: vfmadd213ps	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ128v213rmbk, X86_INS_VFMADD213PS: vfmadd213ps	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ128v213rmbkz, X86_INS_VFMADD213PS: vfmadd213ps	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ128v213rmk, X86_INS_VFMADD213PS: vfmadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ128v213rmkz, X86_INS_VFMADD213PS: vfmadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ128v213rr, X86_INS_VFMADD213PS: vfmadd213ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ128v213rrk, X86_INS_VFMADD213PS: vfmadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ128v213rrkz, X86_INS_VFMADD213PS: vfmadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ128v231rm, X86_INS_VFMADD231PS: vfmadd231ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ128v231rmb, X86_INS_VFMADD231PS: vfmadd231ps	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ128v231rmbk, X86_INS_VFMADD231PS: vfmadd231ps	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ128v231rmbkz, X86_INS_VFMADD231PS: vfmadd231ps	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ128v231rmk, X86_INS_VFMADD231PS: vfmadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ128v231rmkz, X86_INS_VFMADD231PS: vfmadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ128v231rr, X86_INS_VFMADD231PS: vfmadd231ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ128v231rrk, X86_INS_VFMADD231PS: vfmadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ128v231rrkz, X86_INS_VFMADD231PS: vfmadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ256v213rm, X86_INS_VFMADD213PS: vfmadd213ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ256v213rmb, X86_INS_VFMADD213PS: vfmadd213ps	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ256v213rmbk, X86_INS_VFMADD213PS: vfmadd213ps	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ256v213rmbkz, X86_INS_VFMADD213PS: vfmadd213ps	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ256v213rmk, X86_INS_VFMADD213PS: vfmadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ256v213rmkz, X86_INS_VFMADD213PS: vfmadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ256v213rr, X86_INS_VFMADD213PS: vfmadd213ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ256v213rrk, X86_INS_VFMADD213PS: vfmadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ256v213rrkz, X86_INS_VFMADD213PS: vfmadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ256v231rm, X86_INS_VFMADD231PS: vfmadd231ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ256v231rmb, X86_INS_VFMADD231PS: vfmadd231ps	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ256v231rmbk, X86_INS_VFMADD231PS: vfmadd231ps	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ256v231rmbkz, X86_INS_VFMADD231PS: vfmadd231ps	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ256v231rmk, X86_INS_VFMADD231PS: vfmadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ256v231rmkz, X86_INS_VFMADD231PS: vfmadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ256v231rr, X86_INS_VFMADD231PS: vfmadd231ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ256v231rrk, X86_INS_VFMADD231PS: vfmadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZ256v231rrkz, X86_INS_VFMADD231PS: vfmadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDPSZv213rm, X86_INS_VFMADD213PS: vfmadd213ps	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPSZv213rmb, X86_INS_VFMADD213PS: vfmadd213ps	{${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPSZv213rmbk, X86_INS_VFMADD213PS: vfmadd213ps	{${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPSZv213rmbkz, X86_INS_VFMADD213PS: vfmadd213ps	{${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPSZv213rmk, X86_INS_VFMADD213PS: vfmadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPSZv213rmkz, X86_INS_VFMADD213PS: vfmadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPSZv213rr, X86_INS_VFMADD213PS: vfmadd213ps	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPSZv213rrb, X86_INS_VFMADD213PS: vfmadd213ps	$dst , $src2, $src3, $rc */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPSZv213rrbk, X86_INS_VFMADD213PS: vfmadd213ps	{$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPSZv213rrbkz, X86_INS_VFMADD213PS: vfmadd213ps	{$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPSZv213rrk, X86_INS_VFMADD213PS: vfmadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPSZv213rrkz, X86_INS_VFMADD213PS: vfmadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPSZv231rm, X86_INS_VFMADD231PS: vfmadd231ps	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPSZv231rmb, X86_INS_VFMADD231PS: vfmadd231ps	{${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPSZv231rmbk, X86_INS_VFMADD231PS: vfmadd231ps	{${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPSZv231rmbkz, X86_INS_VFMADD231PS: vfmadd231ps	{${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPSZv231rmk, X86_INS_VFMADD231PS: vfmadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPSZv231rmkz, X86_INS_VFMADD231PS: vfmadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPSZv231rr, X86_INS_VFMADD231PS: vfmadd231ps	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPSZv231rrk, X86_INS_VFMADD231PS: vfmadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPSZv231rrkz, X86_INS_VFMADD231PS: vfmadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDPSr132m, X86_INS_VFMADD132PS: vfmadd132ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPSr132mY, X86_INS_VFMADD132PS: vfmadd132ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPSr132r, X86_INS_VFMADD132PS: vfmadd132ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPSr132rY, X86_INS_VFMADD132PS: vfmadd132ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPSr213m, X86_INS_VFMADD213PS: vfmadd213ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPSr213mY, X86_INS_VFMADD213PS: vfmadd213ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPSr213r, X86_INS_VFMADD213PS: vfmadd213ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPSr213rY, X86_INS_VFMADD213PS: vfmadd213ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPSr231m, X86_INS_VFMADD231PS: vfmadd231ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPSr231mY, X86_INS_VFMADD231PS: vfmadd231ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPSr231r, X86_INS_VFMADD231PS: vfmadd231ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDPSr231rY, X86_INS_VFMADD231PS: vfmadd231ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSD4mr, X86_INS_VFMADDSD: vfmaddsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSD4mr_Int, X86_INS_VFMADDSD: vfmaddsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSD4rm, X86_INS_VFMADDSD: vfmaddsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSD4rm_Int, X86_INS_VFMADDSD: vfmaddsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSD4rr, X86_INS_VFMADDSD: vfmaddsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSD4rr_Int, X86_INS_VFMADDSD: vfmaddsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSD4rr_REV, X86_INS_VFMADDSD: vfmaddsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSDZm, X86_INS_VFMADD213SD: vfmadd213sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSDZr, X86_INS_VFMADD213SD: vfmadd213sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSDr132m, X86_INS_VFMADD132SD: vfmadd132sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSDr132r, X86_INS_VFMADD132SD: vfmadd132sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSDr213m, X86_INS_VFMADD213SD: vfmadd213sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSDr213r, X86_INS_VFMADD213SD: vfmadd213sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSDr231m, X86_INS_VFMADD231SD: vfmadd231sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSDr231r, X86_INS_VFMADD231SD: vfmadd231sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSS4mr, X86_INS_VFMADDSS: vfmaddss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSS4mr_Int, X86_INS_VFMADDSS: vfmaddss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSS4rm, X86_INS_VFMADDSS: vfmaddss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSS4rm_Int, X86_INS_VFMADDSS: vfmaddss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSS4rr, X86_INS_VFMADDSS: vfmaddss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSS4rr_Int, X86_INS_VFMADDSS: vfmaddss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSS4rr_REV, X86_INS_VFMADDSS: vfmaddss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSSZm, X86_INS_VFMADD213SS: vfmadd213ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSSZr, X86_INS_VFMADD213SS: vfmadd213ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSSr132m, X86_INS_VFMADD132SS: vfmadd132ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSSr132r, X86_INS_VFMADD132SS: vfmadd132ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSSr213m, X86_INS_VFMADD213SS: vfmadd213ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSSr213r, X86_INS_VFMADD213SS: vfmadd213ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSSr231m, X86_INS_VFMADD231SS: vfmadd231ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSSr231r, X86_INS_VFMADD231SS: vfmadd231ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUB132PDZ128m, X86_INS_VFMADDSUB132PD: vfmaddsub132pd	$dst, $src3, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUB132PDZ128mb, X86_INS_VFMADDSUB132PD: vfmaddsub132pd	{${src2}{1to2}, $src3, $dst|$dst, $src3, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUB132PDZ256m, X86_INS_VFMADDSUB132PD: vfmaddsub132pd	$dst, $src3, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUB132PDZ256mb, X86_INS_VFMADDSUB132PD: vfmaddsub132pd	{${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUB132PDZm, X86_INS_VFMADDSUB132PD: vfmaddsub132pd	$dst, $src3, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUB132PDZmb, X86_INS_VFMADDSUB132PD: vfmaddsub132pd	{${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUB132PSZ128m, X86_INS_VFMADDSUB132PS: vfmaddsub132ps	$dst, $src3, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUB132PSZ128mb, X86_INS_VFMADDSUB132PS: vfmaddsub132ps	{${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUB132PSZ256m, X86_INS_VFMADDSUB132PS: vfmaddsub132ps	$dst, $src3, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUB132PSZ256mb, X86_INS_VFMADDSUB132PS: vfmaddsub132ps	{${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUB132PSZm, X86_INS_VFMADDSUB132PS: vfmaddsub132ps	$dst, $src3, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUB132PSZmb, X86_INS_VFMADDSUB132PS: vfmaddsub132ps	{${src2}{1to16}, $src3, $dst|$dst, $src3, ${src2}{1to16}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPD4mr, X86_INS_VFMADDSUBPD: vfmaddsubpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPD4mrY, X86_INS_VFMADDSUBPD: vfmaddsubpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPD4rm, X86_INS_VFMADDSUBPD: vfmaddsubpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPD4rmY, X86_INS_VFMADDSUBPD: vfmaddsubpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPD4rr, X86_INS_VFMADDSUBPD: vfmaddsubpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPD4rrY, X86_INS_VFMADDSUBPD: vfmaddsubpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPD4rrY_REV, X86_INS_VFMADDSUBPD: vfmaddsubpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPD4rr_REV, X86_INS_VFMADDSUBPD: vfmaddsubpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ128v213rm, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ128v213rmb, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ128v213rmbk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ128v213rmbkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ128v213rmk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ128v213rmkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ128v213rr, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ128v213rrk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ128v213rrkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ128v231rm, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ128v231rmb, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ128v231rmbk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ128v231rmbkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ128v231rmk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ128v231rmkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ128v231rr, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ128v231rrk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ128v231rrkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ256v213rm, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ256v213rmb, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ256v213rmbk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ256v213rmbkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ256v213rmk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ256v213rmkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ256v213rr, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ256v213rrk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ256v213rrkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ256v231rm, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ256v231rmb, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ256v231rmbk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ256v231rmbkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ256v231rmk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ256v231rmkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ256v231rr, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ256v231rrk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZ256v231rrkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPDZv213rm, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPDZv213rmb, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPDZv213rmbk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPDZv213rmbkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPDZv213rmk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPDZv213rmkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPDZv213rr, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPDZv213rrb, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	$dst , $src2, $src3, $rc */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPDZv213rrbk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPDZv213rrbkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPDZv213rrk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPDZv213rrkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPDZv231rm, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPDZv231rmb, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPDZv231rmbk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPDZv231rmbkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPDZv231rmk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPDZv231rmkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPDZv231rr, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPDZv231rrk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPDZv231rrkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPDr132m, X86_INS_VFMADDSUB132PD: vfmaddsub132pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPDr132mY, X86_INS_VFMADDSUB132PD: vfmaddsub132pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPDr132r, X86_INS_VFMADDSUB132PD: vfmaddsub132pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPDr132rY, X86_INS_VFMADDSUB132PD: vfmaddsub132pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPDr213m, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPDr213mY, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPDr213r, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPDr213rY, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPDr231m, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPDr231mY, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPDr231r, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPDr231rY, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPS4mr, X86_INS_VFMADDSUBPS: vfmaddsubps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPS4mrY, X86_INS_VFMADDSUBPS: vfmaddsubps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPS4rm, X86_INS_VFMADDSUBPS: vfmaddsubps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPS4rmY, X86_INS_VFMADDSUBPS: vfmaddsubps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPS4rr, X86_INS_VFMADDSUBPS: vfmaddsubps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPS4rrY, X86_INS_VFMADDSUBPS: vfmaddsubps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPS4rrY_REV, X86_INS_VFMADDSUBPS: vfmaddsubps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPS4rr_REV, X86_INS_VFMADDSUBPS: vfmaddsubps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ128v213rm, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ128v213rmb, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ128v213rmbk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ128v213rmbkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ128v213rmk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ128v213rmkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ128v213rr, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ128v213rrk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ128v213rrkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ128v231rm, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ128v231rmb, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ128v231rmbk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ128v231rmbkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ128v231rmk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ128v231rmkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ128v231rr, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ128v231rrk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ128v231rrkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ256v213rm, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ256v213rmb, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ256v213rmbk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ256v213rmbkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ256v213rmk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ256v213rmkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ256v213rr, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ256v213rrk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ256v213rrkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ256v231rm, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ256v231rmb, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ256v231rmbk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ256v231rmbkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ256v231rmk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ256v231rmkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ256v231rr, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ256v231rrk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZ256v231rrkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMADDSUBPSZv213rm, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPSZv213rmb, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPSZv213rmbk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPSZv213rmbkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPSZv213rmk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPSZv213rmkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPSZv213rr, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPSZv213rrb, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	$dst , $src2, $src3, $rc */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPSZv213rrbk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPSZv213rrbkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPSZv213rrk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPSZv213rrkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPSZv231rm, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPSZv231rmb, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPSZv231rmbk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPSZv231rmbkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPSZv231rmk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPSZv231rmkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPSZv231rr, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPSZv231rrk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPSZv231rrkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMADDSUBPSr132m, X86_INS_VFMADDSUB132PS: vfmaddsub132ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPSr132mY, X86_INS_VFMADDSUB132PS: vfmaddsub132ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPSr132r, X86_INS_VFMADDSUB132PS: vfmaddsub132ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPSr132rY, X86_INS_VFMADDSUB132PS: vfmaddsub132ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPSr213m, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPSr213mY, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPSr213r, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPSr213rY, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPSr231m, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPSr231mY, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPSr231r, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMADDSUBPSr231rY, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUB132PDZ128m, X86_INS_VFMSUB132PD: vfmsub132pd	$dst, $src3, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUB132PDZ128mb, X86_INS_VFMSUB132PD: vfmsub132pd	{${src2}{1to2}, $src3, $dst|$dst, $src3, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUB132PDZ256m, X86_INS_VFMSUB132PD: vfmsub132pd	$dst, $src3, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUB132PDZ256mb, X86_INS_VFMSUB132PD: vfmsub132pd	{${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUB132PDZm, X86_INS_VFMSUB132PD: vfmsub132pd	$dst, $src3, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUB132PDZmb, X86_INS_VFMSUB132PD: vfmsub132pd	{${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUB132PSZ128m, X86_INS_VFMSUB132PS: vfmsub132ps	$dst, $src3, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUB132PSZ128mb, X86_INS_VFMSUB132PS: vfmsub132ps	{${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUB132PSZ256m, X86_INS_VFMSUB132PS: vfmsub132ps	$dst, $src3, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUB132PSZ256mb, X86_INS_VFMSUB132PS: vfmsub132ps	{${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUB132PSZm, X86_INS_VFMSUB132PS: vfmsub132ps	$dst, $src3, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUB132PSZmb, X86_INS_VFMSUB132PS: vfmsub132ps	{${src2}{1to16}, $src3, $dst|$dst, $src3, ${src2}{1to16}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADD132PDZ128m, X86_INS_VFMSUBADD132PD: vfmsubadd132pd	$dst, $src3, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADD132PDZ128mb, X86_INS_VFMSUBADD132PD: vfmsubadd132pd	{${src2}{1to2}, $src3, $dst|$dst, $src3, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADD132PDZ256m, X86_INS_VFMSUBADD132PD: vfmsubadd132pd	$dst, $src3, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADD132PDZ256mb, X86_INS_VFMSUBADD132PD: vfmsubadd132pd	{${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADD132PDZm, X86_INS_VFMSUBADD132PD: vfmsubadd132pd	$dst, $src3, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADD132PDZmb, X86_INS_VFMSUBADD132PD: vfmsubadd132pd	{${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADD132PSZ128m, X86_INS_VFMSUBADD132PS: vfmsubadd132ps	$dst, $src3, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADD132PSZ128mb, X86_INS_VFMSUBADD132PS: vfmsubadd132ps	{${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADD132PSZ256m, X86_INS_VFMSUBADD132PS: vfmsubadd132ps	$dst, $src3, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADD132PSZ256mb, X86_INS_VFMSUBADD132PS: vfmsubadd132ps	{${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADD132PSZm, X86_INS_VFMSUBADD132PS: vfmsubadd132ps	$dst, $src3, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADD132PSZmb, X86_INS_VFMSUBADD132PS: vfmsubadd132ps	{${src2}{1to16}, $src3, $dst|$dst, $src3, ${src2}{1to16}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPD4mr, X86_INS_VFMSUBADDPD: vfmsubaddpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPD4mrY, X86_INS_VFMSUBADDPD: vfmsubaddpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPD4rm, X86_INS_VFMSUBADDPD: vfmsubaddpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPD4rmY, X86_INS_VFMSUBADDPD: vfmsubaddpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPD4rr, X86_INS_VFMSUBADDPD: vfmsubaddpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPD4rrY, X86_INS_VFMSUBADDPD: vfmsubaddpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPD4rrY_REV, X86_INS_VFMSUBADDPD: vfmsubaddpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPD4rr_REV, X86_INS_VFMSUBADDPD: vfmsubaddpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ128v213rm, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ128v213rmb, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ128v213rmbk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ128v213rmbkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ128v213rmk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ128v213rmkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ128v213rr, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ128v213rrk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ128v213rrkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ128v231rm, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ128v231rmb, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ128v231rmbk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ128v231rmbkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ128v231rmk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ128v231rmkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ128v231rr, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ128v231rrk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ128v231rrkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ256v213rm, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ256v213rmb, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ256v213rmbk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ256v213rmbkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ256v213rmk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ256v213rmkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ256v213rr, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ256v213rrk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ256v213rrkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ256v231rm, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ256v231rmb, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ256v231rmbk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ256v231rmbkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ256v231rmk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ256v231rmkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ256v231rr, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ256v231rrk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZ256v231rrkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPDZv213rm, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPDZv213rmb, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPDZv213rmbk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPDZv213rmbkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPDZv213rmk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPDZv213rmkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPDZv213rr, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPDZv213rrb, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	$dst , $src2, $src3, $rc */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPDZv213rrbk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPDZv213rrbkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPDZv213rrk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPDZv213rrkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPDZv231rm, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPDZv231rmb, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPDZv231rmbk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPDZv231rmbkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPDZv231rmk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPDZv231rmkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPDZv231rr, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPDZv231rrk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPDZv231rrkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPDr132m, X86_INS_VFMSUBADD132PD: vfmsubadd132pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPDr132mY, X86_INS_VFMSUBADD132PD: vfmsubadd132pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPDr132r, X86_INS_VFMSUBADD132PD: vfmsubadd132pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPDr132rY, X86_INS_VFMSUBADD132PD: vfmsubadd132pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPDr213m, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPDr213mY, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPDr213r, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPDr213rY, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPDr231m, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPDr231mY, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPDr231r, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPDr231rY, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPS4mr, X86_INS_VFMSUBADDPS: vfmsubaddps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPS4mrY, X86_INS_VFMSUBADDPS: vfmsubaddps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPS4rm, X86_INS_VFMSUBADDPS: vfmsubaddps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPS4rmY, X86_INS_VFMSUBADDPS: vfmsubaddps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPS4rr, X86_INS_VFMSUBADDPS: vfmsubaddps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPS4rrY, X86_INS_VFMSUBADDPS: vfmsubaddps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPS4rrY_REV, X86_INS_VFMSUBADDPS: vfmsubaddps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPS4rr_REV, X86_INS_VFMSUBADDPS: vfmsubaddps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ128v213rm, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ128v213rmb, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ128v213rmbk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ128v213rmbkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ128v213rmk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ128v213rmkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ128v213rr, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ128v213rrk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ128v213rrkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ128v231rm, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ128v231rmb, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ128v231rmbk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ128v231rmbkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ128v231rmk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ128v231rmkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ128v231rr, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ128v231rrk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ128v231rrkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ256v213rm, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ256v213rmb, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ256v213rmbk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ256v213rmbkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ256v213rmk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ256v213rmkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ256v213rr, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ256v213rrk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ256v213rrkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ256v231rm, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ256v231rmb, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ256v231rmbk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ256v231rmbkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ256v231rmk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ256v231rmkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ256v231rr, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ256v231rrk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZ256v231rrkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBADDPSZv213rm, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPSZv213rmb, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPSZv213rmbk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPSZv213rmbkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPSZv213rmk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPSZv213rmkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPSZv213rr, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPSZv213rrb, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	$dst , $src2, $src3, $rc */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPSZv213rrbk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPSZv213rrbkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPSZv213rrk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPSZv213rrkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPSZv231rm, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPSZv231rmb, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPSZv231rmbk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPSZv231rmbkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPSZv231rmk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPSZv231rmkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPSZv231rr, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPSZv231rrk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPSZv231rrkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBADDPSr132m, X86_INS_VFMSUBADD132PS: vfmsubadd132ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPSr132mY, X86_INS_VFMSUBADD132PS: vfmsubadd132ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPSr132r, X86_INS_VFMSUBADD132PS: vfmsubadd132ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPSr132rY, X86_INS_VFMSUBADD132PS: vfmsubadd132ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPSr213m, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPSr213mY, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPSr213r, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPSr213rY, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPSr231m, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPSr231mY, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPSr231r, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBADDPSr231rY, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPD4mr, X86_INS_VFMSUBPD: vfmsubpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPD4mrY, X86_INS_VFMSUBPD: vfmsubpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPD4rm, X86_INS_VFMSUBPD: vfmsubpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPD4rmY, X86_INS_VFMSUBPD: vfmsubpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPD4rr, X86_INS_VFMSUBPD: vfmsubpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPD4rrY, X86_INS_VFMSUBPD: vfmsubpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPD4rrY_REV, X86_INS_VFMSUBPD: vfmsubpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPD4rr_REV, X86_INS_VFMSUBPD: vfmsubpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPDZ128v213rm, X86_INS_VFMSUB213PD: vfmsub213pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ128v213rmb, X86_INS_VFMSUB213PD: vfmsub213pd	{${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ128v213rmbk, X86_INS_VFMSUB213PD: vfmsub213pd	{${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ128v213rmbkz, X86_INS_VFMSUB213PD: vfmsub213pd	{${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ128v213rmk, X86_INS_VFMSUB213PD: vfmsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ128v213rmkz, X86_INS_VFMSUB213PD: vfmsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ128v213rr, X86_INS_VFMSUB213PD: vfmsub213pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ128v213rrk, X86_INS_VFMSUB213PD: vfmsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ128v213rrkz, X86_INS_VFMSUB213PD: vfmsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ128v231rm, X86_INS_VFMSUB231PD: vfmsub231pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ128v231rmb, X86_INS_VFMSUB231PD: vfmsub231pd	{${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ128v231rmbk, X86_INS_VFMSUB231PD: vfmsub231pd	{${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ128v231rmbkz, X86_INS_VFMSUB231PD: vfmsub231pd	{${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ128v231rmk, X86_INS_VFMSUB231PD: vfmsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ128v231rmkz, X86_INS_VFMSUB231PD: vfmsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ128v231rr, X86_INS_VFMSUB231PD: vfmsub231pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ128v231rrk, X86_INS_VFMSUB231PD: vfmsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ128v231rrkz, X86_INS_VFMSUB231PD: vfmsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ256v213rm, X86_INS_VFMSUB213PD: vfmsub213pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ256v213rmb, X86_INS_VFMSUB213PD: vfmsub213pd	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ256v213rmbk, X86_INS_VFMSUB213PD: vfmsub213pd	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ256v213rmbkz, X86_INS_VFMSUB213PD: vfmsub213pd	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ256v213rmk, X86_INS_VFMSUB213PD: vfmsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ256v213rmkz, X86_INS_VFMSUB213PD: vfmsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ256v213rr, X86_INS_VFMSUB213PD: vfmsub213pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ256v213rrk, X86_INS_VFMSUB213PD: vfmsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ256v213rrkz, X86_INS_VFMSUB213PD: vfmsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ256v231rm, X86_INS_VFMSUB231PD: vfmsub231pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ256v231rmb, X86_INS_VFMSUB231PD: vfmsub231pd	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ256v231rmbk, X86_INS_VFMSUB231PD: vfmsub231pd	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ256v231rmbkz, X86_INS_VFMSUB231PD: vfmsub231pd	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ256v231rmk, X86_INS_VFMSUB231PD: vfmsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ256v231rmkz, X86_INS_VFMSUB231PD: vfmsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ256v231rr, X86_INS_VFMSUB231PD: vfmsub231pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ256v231rrk, X86_INS_VFMSUB231PD: vfmsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZ256v231rrkz, X86_INS_VFMSUB231PD: vfmsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPDZv213rm, X86_INS_VFMSUB213PD: vfmsub213pd	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPDZv213rmb, X86_INS_VFMSUB213PD: vfmsub213pd	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPDZv213rmbk, X86_INS_VFMSUB213PD: vfmsub213pd	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPDZv213rmbkz, X86_INS_VFMSUB213PD: vfmsub213pd	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPDZv213rmk, X86_INS_VFMSUB213PD: vfmsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPDZv213rmkz, X86_INS_VFMSUB213PD: vfmsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPDZv213rr, X86_INS_VFMSUB213PD: vfmsub213pd	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPDZv213rrb, X86_INS_VFMSUB213PD: vfmsub213pd	$dst , $src2, $src3, $rc */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPDZv213rrbk, X86_INS_VFMSUB213PD: vfmsub213pd	{$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPDZv213rrbkz, X86_INS_VFMSUB213PD: vfmsub213pd	{$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPDZv213rrk, X86_INS_VFMSUB213PD: vfmsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPDZv213rrkz, X86_INS_VFMSUB213PD: vfmsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPDZv231rm, X86_INS_VFMSUB231PD: vfmsub231pd	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPDZv231rmb, X86_INS_VFMSUB231PD: vfmsub231pd	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPDZv231rmbk, X86_INS_VFMSUB231PD: vfmsub231pd	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPDZv231rmbkz, X86_INS_VFMSUB231PD: vfmsub231pd	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPDZv231rmk, X86_INS_VFMSUB231PD: vfmsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPDZv231rmkz, X86_INS_VFMSUB231PD: vfmsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPDZv231rr, X86_INS_VFMSUB231PD: vfmsub231pd	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPDZv231rrk, X86_INS_VFMSUB231PD: vfmsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPDZv231rrkz, X86_INS_VFMSUB231PD: vfmsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPDr132m, X86_INS_VFMSUB132PD: vfmsub132pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPDr132mY, X86_INS_VFMSUB132PD: vfmsub132pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPDr132r, X86_INS_VFMSUB132PD: vfmsub132pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPDr132rY, X86_INS_VFMSUB132PD: vfmsub132pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPDr213m, X86_INS_VFMSUB213PD: vfmsub213pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPDr213mY, X86_INS_VFMSUB213PD: vfmsub213pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPDr213r, X86_INS_VFMSUB213PD: vfmsub213pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPDr213rY, X86_INS_VFMSUB213PD: vfmsub213pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPDr231m, X86_INS_VFMSUB231PD: vfmsub231pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPDr231mY, X86_INS_VFMSUB231PD: vfmsub231pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPDr231r, X86_INS_VFMSUB231PD: vfmsub231pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPDr231rY, X86_INS_VFMSUB231PD: vfmsub231pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPS4mr, X86_INS_VFMSUBPS: vfmsubps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPS4mrY, X86_INS_VFMSUBPS: vfmsubps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPS4rm, X86_INS_VFMSUBPS: vfmsubps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPS4rmY, X86_INS_VFMSUBPS: vfmsubps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPS4rr, X86_INS_VFMSUBPS: vfmsubps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPS4rrY, X86_INS_VFMSUBPS: vfmsubps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPS4rrY_REV, X86_INS_VFMSUBPS: vfmsubps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPS4rr_REV, X86_INS_VFMSUBPS: vfmsubps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPSZ128v213rm, X86_INS_VFMSUB213PS: vfmsub213ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ128v213rmb, X86_INS_VFMSUB213PS: vfmsub213ps	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ128v213rmbk, X86_INS_VFMSUB213PS: vfmsub213ps	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ128v213rmbkz, X86_INS_VFMSUB213PS: vfmsub213ps	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ128v213rmk, X86_INS_VFMSUB213PS: vfmsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ128v213rmkz, X86_INS_VFMSUB213PS: vfmsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ128v213rr, X86_INS_VFMSUB213PS: vfmsub213ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ128v213rrk, X86_INS_VFMSUB213PS: vfmsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ128v213rrkz, X86_INS_VFMSUB213PS: vfmsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ128v231rm, X86_INS_VFMSUB231PS: vfmsub231ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ128v231rmb, X86_INS_VFMSUB231PS: vfmsub231ps	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ128v231rmbk, X86_INS_VFMSUB231PS: vfmsub231ps	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ128v231rmbkz, X86_INS_VFMSUB231PS: vfmsub231ps	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ128v231rmk, X86_INS_VFMSUB231PS: vfmsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ128v231rmkz, X86_INS_VFMSUB231PS: vfmsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ128v231rr, X86_INS_VFMSUB231PS: vfmsub231ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ128v231rrk, X86_INS_VFMSUB231PS: vfmsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ128v231rrkz, X86_INS_VFMSUB231PS: vfmsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ256v213rm, X86_INS_VFMSUB213PS: vfmsub213ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ256v213rmb, X86_INS_VFMSUB213PS: vfmsub213ps	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ256v213rmbk, X86_INS_VFMSUB213PS: vfmsub213ps	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ256v213rmbkz, X86_INS_VFMSUB213PS: vfmsub213ps	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ256v213rmk, X86_INS_VFMSUB213PS: vfmsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ256v213rmkz, X86_INS_VFMSUB213PS: vfmsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ256v213rr, X86_INS_VFMSUB213PS: vfmsub213ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ256v213rrk, X86_INS_VFMSUB213PS: vfmsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ256v213rrkz, X86_INS_VFMSUB213PS: vfmsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ256v231rm, X86_INS_VFMSUB231PS: vfmsub231ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ256v231rmb, X86_INS_VFMSUB231PS: vfmsub231ps	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ256v231rmbk, X86_INS_VFMSUB231PS: vfmsub231ps	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ256v231rmbkz, X86_INS_VFMSUB231PS: vfmsub231ps	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ256v231rmk, X86_INS_VFMSUB231PS: vfmsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ256v231rmkz, X86_INS_VFMSUB231PS: vfmsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ256v231rr, X86_INS_VFMSUB231PS: vfmsub231ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ256v231rrk, X86_INS_VFMSUB231PS: vfmsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZ256v231rrkz, X86_INS_VFMSUB231PS: vfmsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFMSUBPSZv213rm, X86_INS_VFMSUB213PS: vfmsub213ps	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPSZv213rmb, X86_INS_VFMSUB213PS: vfmsub213ps	{${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPSZv213rmbk, X86_INS_VFMSUB213PS: vfmsub213ps	{${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPSZv213rmbkz, X86_INS_VFMSUB213PS: vfmsub213ps	{${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPSZv213rmk, X86_INS_VFMSUB213PS: vfmsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPSZv213rmkz, X86_INS_VFMSUB213PS: vfmsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPSZv213rr, X86_INS_VFMSUB213PS: vfmsub213ps	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPSZv213rrb, X86_INS_VFMSUB213PS: vfmsub213ps	$dst , $src2, $src3, $rc */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPSZv213rrbk, X86_INS_VFMSUB213PS: vfmsub213ps	{$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPSZv213rrbkz, X86_INS_VFMSUB213PS: vfmsub213ps	{$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPSZv213rrk, X86_INS_VFMSUB213PS: vfmsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPSZv213rrkz, X86_INS_VFMSUB213PS: vfmsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPSZv231rm, X86_INS_VFMSUB231PS: vfmsub231ps	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPSZv231rmb, X86_INS_VFMSUB231PS: vfmsub231ps	{${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPSZv231rmbk, X86_INS_VFMSUB231PS: vfmsub231ps	{${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPSZv231rmbkz, X86_INS_VFMSUB231PS: vfmsub231ps	{${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPSZv231rmk, X86_INS_VFMSUB231PS: vfmsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPSZv231rmkz, X86_INS_VFMSUB231PS: vfmsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPSZv231rr, X86_INS_VFMSUB231PS: vfmsub231ps	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPSZv231rrk, X86_INS_VFMSUB231PS: vfmsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPSZv231rrkz, X86_INS_VFMSUB231PS: vfmsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFMSUBPSr132m, X86_INS_VFMSUB132PS: vfmsub132ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPSr132mY, X86_INS_VFMSUB132PS: vfmsub132ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPSr132r, X86_INS_VFMSUB132PS: vfmsub132ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPSr132rY, X86_INS_VFMSUB132PS: vfmsub132ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPSr213m, X86_INS_VFMSUB213PS: vfmsub213ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPSr213mY, X86_INS_VFMSUB213PS: vfmsub213ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPSr213r, X86_INS_VFMSUB213PS: vfmsub213ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPSr213rY, X86_INS_VFMSUB213PS: vfmsub213ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPSr231m, X86_INS_VFMSUB231PS: vfmsub231ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPSr231mY, X86_INS_VFMSUB231PS: vfmsub231ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPSr231r, X86_INS_VFMSUB231PS: vfmsub231ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBPSr231rY, X86_INS_VFMSUB231PS: vfmsub231ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSD4mr, X86_INS_VFMSUBSD: vfmsubsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSD4mr_Int, X86_INS_VFMSUBSD: vfmsubsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSD4rm, X86_INS_VFMSUBSD: vfmsubsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSD4rm_Int, X86_INS_VFMSUBSD: vfmsubsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSD4rr, X86_INS_VFMSUBSD: vfmsubsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSD4rr_Int, X86_INS_VFMSUBSD: vfmsubsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSD4rr_REV, X86_INS_VFMSUBSD: vfmsubsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSDZm, X86_INS_VFMSUB213SD: vfmsub213sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSDZr, X86_INS_VFMSUB213SD: vfmsub213sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSDr132m, X86_INS_VFMSUB132SD: vfmsub132sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSDr132r, X86_INS_VFMSUB132SD: vfmsub132sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSDr213m, X86_INS_VFMSUB213SD: vfmsub213sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSDr213r, X86_INS_VFMSUB213SD: vfmsub213sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSDr231m, X86_INS_VFMSUB231SD: vfmsub231sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSDr231r, X86_INS_VFMSUB231SD: vfmsub231sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSS4mr, X86_INS_VFMSUBSS: vfmsubss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSS4mr_Int, X86_INS_VFMSUBSS: vfmsubss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSS4rm, X86_INS_VFMSUBSS: vfmsubss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSS4rm_Int, X86_INS_VFMSUBSS: vfmsubss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSS4rr, X86_INS_VFMSUBSS: vfmsubss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSS4rr_Int, X86_INS_VFMSUBSS: vfmsubss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSS4rr_REV, X86_INS_VFMSUBSS: vfmsubss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSSZm, X86_INS_VFMSUB213SS: vfmsub213ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSSZr, X86_INS_VFMSUB213SS: vfmsub213ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSSr132m, X86_INS_VFMSUB132SS: vfmsub132ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSSr132r, X86_INS_VFMSUB132SS: vfmsub132ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSSr213m, X86_INS_VFMSUB213SS: vfmsub213ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSSr213r, X86_INS_VFMSUB213SS: vfmsub213ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSSr231m, X86_INS_VFMSUB231SS: vfmsub231ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFMSUBSSr231r, X86_INS_VFMSUB231SS: vfmsub231ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADD132PDZ128m, X86_INS_VFNMADD132PD: vfnmadd132pd	$dst, $src3, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADD132PDZ128mb, X86_INS_VFNMADD132PD: vfnmadd132pd	{${src2}{1to2}, $src3, $dst|$dst, $src3, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADD132PDZ256m, X86_INS_VFNMADD132PD: vfnmadd132pd	$dst, $src3, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADD132PDZ256mb, X86_INS_VFNMADD132PD: vfnmadd132pd	{${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADD132PDZm, X86_INS_VFNMADD132PD: vfnmadd132pd	$dst, $src3, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADD132PDZmb, X86_INS_VFNMADD132PD: vfnmadd132pd	{${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADD132PSZ128m, X86_INS_VFNMADD132PS: vfnmadd132ps	$dst, $src3, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADD132PSZ128mb, X86_INS_VFNMADD132PS: vfnmadd132ps	{${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADD132PSZ256m, X86_INS_VFNMADD132PS: vfnmadd132ps	$dst, $src3, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADD132PSZ256mb, X86_INS_VFNMADD132PS: vfnmadd132ps	{${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADD132PSZm, X86_INS_VFNMADD132PS: vfnmadd132ps	$dst, $src3, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADD132PSZmb, X86_INS_VFNMADD132PS: vfnmadd132ps	{${src2}{1to16}, $src3, $dst|$dst, $src3, ${src2}{1to16}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPD4mr, X86_INS_VFNMADDPD: vfnmaddpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPD4mrY, X86_INS_VFNMADDPD: vfnmaddpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPD4rm, X86_INS_VFNMADDPD: vfnmaddpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPD4rmY, X86_INS_VFNMADDPD: vfnmaddpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPD4rr, X86_INS_VFNMADDPD: vfnmaddpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPD4rrY, X86_INS_VFNMADDPD: vfnmaddpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPD4rrY_REV, X86_INS_VFNMADDPD: vfnmaddpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPD4rr_REV, X86_INS_VFNMADDPD: vfnmaddpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPDZ128v213rm, X86_INS_VFNMADD213PD: vfnmadd213pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ128v213rmb, X86_INS_VFNMADD213PD: vfnmadd213pd	{${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ128v213rmbk, X86_INS_VFNMADD213PD: vfnmadd213pd	{${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ128v213rmbkz, X86_INS_VFNMADD213PD: vfnmadd213pd	{${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ128v213rmk, X86_INS_VFNMADD213PD: vfnmadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ128v213rmkz, X86_INS_VFNMADD213PD: vfnmadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ128v213rr, X86_INS_VFNMADD213PD: vfnmadd213pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ128v213rrk, X86_INS_VFNMADD213PD: vfnmadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ128v213rrkz, X86_INS_VFNMADD213PD: vfnmadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ128v231rm, X86_INS_VFNMADD231PD: vfnmadd231pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ128v231rmb, X86_INS_VFNMADD231PD: vfnmadd231pd	{${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ128v231rmbk, X86_INS_VFNMADD231PD: vfnmadd231pd	{${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ128v231rmbkz, X86_INS_VFNMADD231PD: vfnmadd231pd	{${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ128v231rmk, X86_INS_VFNMADD231PD: vfnmadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ128v231rmkz, X86_INS_VFNMADD231PD: vfnmadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ128v231rr, X86_INS_VFNMADD231PD: vfnmadd231pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ128v231rrk, X86_INS_VFNMADD231PD: vfnmadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ128v231rrkz, X86_INS_VFNMADD231PD: vfnmadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ256v213rm, X86_INS_VFNMADD213PD: vfnmadd213pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ256v213rmb, X86_INS_VFNMADD213PD: vfnmadd213pd	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ256v213rmbk, X86_INS_VFNMADD213PD: vfnmadd213pd	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ256v213rmbkz, X86_INS_VFNMADD213PD: vfnmadd213pd	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ256v213rmk, X86_INS_VFNMADD213PD: vfnmadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ256v213rmkz, X86_INS_VFNMADD213PD: vfnmadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ256v213rr, X86_INS_VFNMADD213PD: vfnmadd213pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ256v213rrk, X86_INS_VFNMADD213PD: vfnmadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ256v213rrkz, X86_INS_VFNMADD213PD: vfnmadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ256v231rm, X86_INS_VFNMADD231PD: vfnmadd231pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ256v231rmb, X86_INS_VFNMADD231PD: vfnmadd231pd	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ256v231rmbk, X86_INS_VFNMADD231PD: vfnmadd231pd	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ256v231rmbkz, X86_INS_VFNMADD231PD: vfnmadd231pd	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ256v231rmk, X86_INS_VFNMADD231PD: vfnmadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ256v231rmkz, X86_INS_VFNMADD231PD: vfnmadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ256v231rr, X86_INS_VFNMADD231PD: vfnmadd231pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ256v231rrk, X86_INS_VFNMADD231PD: vfnmadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZ256v231rrkz, X86_INS_VFNMADD231PD: vfnmadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPDZv213rm, X86_INS_VFNMADD213PD: vfnmadd213pd	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPDZv213rmb, X86_INS_VFNMADD213PD: vfnmadd213pd	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPDZv213rmbk, X86_INS_VFNMADD213PD: vfnmadd213pd	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPDZv213rmbkz, X86_INS_VFNMADD213PD: vfnmadd213pd	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPDZv213rmk, X86_INS_VFNMADD213PD: vfnmadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPDZv213rmkz, X86_INS_VFNMADD213PD: vfnmadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPDZv213rr, X86_INS_VFNMADD213PD: vfnmadd213pd	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPDZv213rrb, X86_INS_VFNMADD213PD: vfnmadd213pd	$dst , $src2, $src3, $rc */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPDZv213rrbk, X86_INS_VFNMADD213PD: vfnmadd213pd	{$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPDZv213rrbkz, X86_INS_VFNMADD213PD: vfnmadd213pd	{$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPDZv213rrk, X86_INS_VFNMADD213PD: vfnmadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPDZv213rrkz, X86_INS_VFNMADD213PD: vfnmadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPDZv231rm, X86_INS_VFNMADD231PD: vfnmadd231pd	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPDZv231rmb, X86_INS_VFNMADD231PD: vfnmadd231pd	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPDZv231rmbk, X86_INS_VFNMADD231PD: vfnmadd231pd	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPDZv231rmbkz, X86_INS_VFNMADD231PD: vfnmadd231pd	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPDZv231rmk, X86_INS_VFNMADD231PD: vfnmadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPDZv231rmkz, X86_INS_VFNMADD231PD: vfnmadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPDZv231rr, X86_INS_VFNMADD231PD: vfnmadd231pd	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPDZv231rrk, X86_INS_VFNMADD231PD: vfnmadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPDZv231rrkz, X86_INS_VFNMADD231PD: vfnmadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPDr132m, X86_INS_VFNMADD132PD: vfnmadd132pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPDr132mY, X86_INS_VFNMADD132PD: vfnmadd132pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPDr132r, X86_INS_VFNMADD132PD: vfnmadd132pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPDr132rY, X86_INS_VFNMADD132PD: vfnmadd132pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPDr213m, X86_INS_VFNMADD213PD: vfnmadd213pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPDr213mY, X86_INS_VFNMADD213PD: vfnmadd213pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPDr213r, X86_INS_VFNMADD213PD: vfnmadd213pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPDr213rY, X86_INS_VFNMADD213PD: vfnmadd213pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPDr231m, X86_INS_VFNMADD231PD: vfnmadd231pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPDr231mY, X86_INS_VFNMADD231PD: vfnmadd231pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPDr231r, X86_INS_VFNMADD231PD: vfnmadd231pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPDr231rY, X86_INS_VFNMADD231PD: vfnmadd231pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPS4mr, X86_INS_VFNMADDPS: vfnmaddps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPS4mrY, X86_INS_VFNMADDPS: vfnmaddps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPS4rm, X86_INS_VFNMADDPS: vfnmaddps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPS4rmY, X86_INS_VFNMADDPS: vfnmaddps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPS4rr, X86_INS_VFNMADDPS: vfnmaddps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPS4rrY, X86_INS_VFNMADDPS: vfnmaddps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPS4rrY_REV, X86_INS_VFNMADDPS: vfnmaddps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPS4rr_REV, X86_INS_VFNMADDPS: vfnmaddps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPSZ128v213rm, X86_INS_VFNMADD213PS: vfnmadd213ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ128v213rmb, X86_INS_VFNMADD213PS: vfnmadd213ps	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ128v213rmbk, X86_INS_VFNMADD213PS: vfnmadd213ps	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ128v213rmbkz, X86_INS_VFNMADD213PS: vfnmadd213ps	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ128v213rmk, X86_INS_VFNMADD213PS: vfnmadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ128v213rmkz, X86_INS_VFNMADD213PS: vfnmadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ128v213rr, X86_INS_VFNMADD213PS: vfnmadd213ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ128v213rrk, X86_INS_VFNMADD213PS: vfnmadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ128v213rrkz, X86_INS_VFNMADD213PS: vfnmadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ128v231rm, X86_INS_VFNMADD231PS: vfnmadd231ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ128v231rmb, X86_INS_VFNMADD231PS: vfnmadd231ps	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ128v231rmbk, X86_INS_VFNMADD231PS: vfnmadd231ps	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ128v231rmbkz, X86_INS_VFNMADD231PS: vfnmadd231ps	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ128v231rmk, X86_INS_VFNMADD231PS: vfnmadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ128v231rmkz, X86_INS_VFNMADD231PS: vfnmadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ128v231rr, X86_INS_VFNMADD231PS: vfnmadd231ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ128v231rrk, X86_INS_VFNMADD231PS: vfnmadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ128v231rrkz, X86_INS_VFNMADD231PS: vfnmadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ256v213rm, X86_INS_VFNMADD213PS: vfnmadd213ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ256v213rmb, X86_INS_VFNMADD213PS: vfnmadd213ps	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ256v213rmbk, X86_INS_VFNMADD213PS: vfnmadd213ps	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ256v213rmbkz, X86_INS_VFNMADD213PS: vfnmadd213ps	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ256v213rmk, X86_INS_VFNMADD213PS: vfnmadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ256v213rmkz, X86_INS_VFNMADD213PS: vfnmadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ256v213rr, X86_INS_VFNMADD213PS: vfnmadd213ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ256v213rrk, X86_INS_VFNMADD213PS: vfnmadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ256v213rrkz, X86_INS_VFNMADD213PS: vfnmadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ256v231rm, X86_INS_VFNMADD231PS: vfnmadd231ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ256v231rmb, X86_INS_VFNMADD231PS: vfnmadd231ps	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ256v231rmbk, X86_INS_VFNMADD231PS: vfnmadd231ps	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ256v231rmbkz, X86_INS_VFNMADD231PS: vfnmadd231ps	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ256v231rmk, X86_INS_VFNMADD231PS: vfnmadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ256v231rmkz, X86_INS_VFNMADD231PS: vfnmadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ256v231rr, X86_INS_VFNMADD231PS: vfnmadd231ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ256v231rrk, X86_INS_VFNMADD231PS: vfnmadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZ256v231rrkz, X86_INS_VFNMADD231PS: vfnmadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMADDPSZv213rm, X86_INS_VFNMADD213PS: vfnmadd213ps	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPSZv213rmb, X86_INS_VFNMADD213PS: vfnmadd213ps	{${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPSZv213rmbk, X86_INS_VFNMADD213PS: vfnmadd213ps	{${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPSZv213rmbkz, X86_INS_VFNMADD213PS: vfnmadd213ps	{${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPSZv213rmk, X86_INS_VFNMADD213PS: vfnmadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPSZv213rmkz, X86_INS_VFNMADD213PS: vfnmadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPSZv213rr, X86_INS_VFNMADD213PS: vfnmadd213ps	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPSZv213rrb, X86_INS_VFNMADD213PS: vfnmadd213ps	$dst , $src2, $src3, $rc */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPSZv213rrbk, X86_INS_VFNMADD213PS: vfnmadd213ps	{$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPSZv213rrbkz, X86_INS_VFNMADD213PS: vfnmadd213ps	{$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPSZv213rrk, X86_INS_VFNMADD213PS: vfnmadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPSZv213rrkz, X86_INS_VFNMADD213PS: vfnmadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPSZv231rm, X86_INS_VFNMADD231PS: vfnmadd231ps	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPSZv231rmb, X86_INS_VFNMADD231PS: vfnmadd231ps	{${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPSZv231rmbk, X86_INS_VFNMADD231PS: vfnmadd231ps	{${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPSZv231rmbkz, X86_INS_VFNMADD231PS: vfnmadd231ps	{${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPSZv231rmk, X86_INS_VFNMADD231PS: vfnmadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPSZv231rmkz, X86_INS_VFNMADD231PS: vfnmadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPSZv231rr, X86_INS_VFNMADD231PS: vfnmadd231ps	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPSZv231rrk, X86_INS_VFNMADD231PS: vfnmadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPSZv231rrkz, X86_INS_VFNMADD231PS: vfnmadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMADDPSr132m, X86_INS_VFNMADD132PS: vfnmadd132ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPSr132mY, X86_INS_VFNMADD132PS: vfnmadd132ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPSr132r, X86_INS_VFNMADD132PS: vfnmadd132ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPSr132rY, X86_INS_VFNMADD132PS: vfnmadd132ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPSr213m, X86_INS_VFNMADD213PS: vfnmadd213ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPSr213mY, X86_INS_VFNMADD213PS: vfnmadd213ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPSr213r, X86_INS_VFNMADD213PS: vfnmadd213ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPSr213rY, X86_INS_VFNMADD213PS: vfnmadd213ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPSr231m, X86_INS_VFNMADD231PS: vfnmadd231ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPSr231mY, X86_INS_VFNMADD231PS: vfnmadd231ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPSr231r, X86_INS_VFNMADD231PS: vfnmadd231ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDPSr231rY, X86_INS_VFNMADD231PS: vfnmadd231ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSD4mr, X86_INS_VFNMADDSD: vfnmaddsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSD4mr_Int, X86_INS_VFNMADDSD: vfnmaddsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSD4rm, X86_INS_VFNMADDSD: vfnmaddsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSD4rm_Int, X86_INS_VFNMADDSD: vfnmaddsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSD4rr, X86_INS_VFNMADDSD: vfnmaddsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSD4rr_Int, X86_INS_VFNMADDSD: vfnmaddsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSD4rr_REV, X86_INS_VFNMADDSD: vfnmaddsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSDZm, X86_INS_VFNMADD213SD: vfnmadd213sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSDZr, X86_INS_VFNMADD213SD: vfnmadd213sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSDr132m, X86_INS_VFNMADD132SD: vfnmadd132sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSDr132r, X86_INS_VFNMADD132SD: vfnmadd132sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSDr213m, X86_INS_VFNMADD213SD: vfnmadd213sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSDr213r, X86_INS_VFNMADD213SD: vfnmadd213sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSDr231m, X86_INS_VFNMADD231SD: vfnmadd231sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSDr231r, X86_INS_VFNMADD231SD: vfnmadd231sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSS4mr, X86_INS_VFNMADDSS: vfnmaddss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSS4mr_Int, X86_INS_VFNMADDSS: vfnmaddss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSS4rm, X86_INS_VFNMADDSS: vfnmaddss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSS4rm_Int, X86_INS_VFNMADDSS: vfnmaddss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSS4rr, X86_INS_VFNMADDSS: vfnmaddss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSS4rr_Int, X86_INS_VFNMADDSS: vfnmaddss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSS4rr_REV, X86_INS_VFNMADDSS: vfnmaddss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSSZm, X86_INS_VFNMADD213SS: vfnmadd213ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSSZr, X86_INS_VFNMADD213SS: vfnmadd213ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSSr132m, X86_INS_VFNMADD132SS: vfnmadd132ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSSr132r, X86_INS_VFNMADD132SS: vfnmadd132ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSSr213m, X86_INS_VFNMADD213SS: vfnmadd213ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSSr213r, X86_INS_VFNMADD213SS: vfnmadd213ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSSr231m, X86_INS_VFNMADD231SS: vfnmadd231ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMADDSSr231r, X86_INS_VFNMADD231SS: vfnmadd231ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUB132PDZ128m, X86_INS_VFNMSUB132PD: vfnmsub132pd	$dst, $src3, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUB132PDZ128mb, X86_INS_VFNMSUB132PD: vfnmsub132pd	{${src2}{1to2}, $src3, $dst|$dst, $src3, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUB132PDZ256m, X86_INS_VFNMSUB132PD: vfnmsub132pd	$dst, $src3, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUB132PDZ256mb, X86_INS_VFNMSUB132PD: vfnmsub132pd	{${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUB132PDZm, X86_INS_VFNMSUB132PD: vfnmsub132pd	$dst, $src3, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUB132PDZmb, X86_INS_VFNMSUB132PD: vfnmsub132pd	{${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUB132PSZ128m, X86_INS_VFNMSUB132PS: vfnmsub132ps	$dst, $src3, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUB132PSZ128mb, X86_INS_VFNMSUB132PS: vfnmsub132ps	{${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUB132PSZ256m, X86_INS_VFNMSUB132PS: vfnmsub132ps	$dst, $src3, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUB132PSZ256mb, X86_INS_VFNMSUB132PS: vfnmsub132ps	{${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUB132PSZm, X86_INS_VFNMSUB132PS: vfnmsub132ps	$dst, $src3, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUB132PSZmb, X86_INS_VFNMSUB132PS: vfnmsub132ps	{${src2}{1to16}, $src3, $dst|$dst, $src3, ${src2}{1to16}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPD4mr, X86_INS_VFNMSUBPD: vfnmsubpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPD4mrY, X86_INS_VFNMSUBPD: vfnmsubpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPD4rm, X86_INS_VFNMSUBPD: vfnmsubpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPD4rmY, X86_INS_VFNMSUBPD: vfnmsubpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPD4rr, X86_INS_VFNMSUBPD: vfnmsubpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPD4rrY, X86_INS_VFNMSUBPD: vfnmsubpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPD4rrY_REV, X86_INS_VFNMSUBPD: vfnmsubpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPD4rr_REV, X86_INS_VFNMSUBPD: vfnmsubpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPDZ128v213rm, X86_INS_VFNMSUB213PD: vfnmsub213pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ128v213rmb, X86_INS_VFNMSUB213PD: vfnmsub213pd	{${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ128v213rmbk, X86_INS_VFNMSUB213PD: vfnmsub213pd	{${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ128v213rmbkz, X86_INS_VFNMSUB213PD: vfnmsub213pd	{${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ128v213rmk, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ128v213rmkz, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ128v213rr, X86_INS_VFNMSUB213PD: vfnmsub213pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ128v213rrk, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ128v213rrkz, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ128v231rm, X86_INS_VFNMSUB231PD: vfnmsub231pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ128v231rmb, X86_INS_VFNMSUB231PD: vfnmsub231pd	{${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ128v231rmbk, X86_INS_VFNMSUB231PD: vfnmsub231pd	{${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ128v231rmbkz, X86_INS_VFNMSUB231PD: vfnmsub231pd	{${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ128v231rmk, X86_INS_VFNMSUB231PD: vfnmsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ128v231rmkz, X86_INS_VFNMSUB231PD: vfnmsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ128v231rr, X86_INS_VFNMSUB231PD: vfnmsub231pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ128v231rrk, X86_INS_VFNMSUB231PD: vfnmsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ128v231rrkz, X86_INS_VFNMSUB231PD: vfnmsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ256v213rm, X86_INS_VFNMSUB213PD: vfnmsub213pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ256v213rmb, X86_INS_VFNMSUB213PD: vfnmsub213pd	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ256v213rmbk, X86_INS_VFNMSUB213PD: vfnmsub213pd	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ256v213rmbkz, X86_INS_VFNMSUB213PD: vfnmsub213pd	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ256v213rmk, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ256v213rmkz, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ256v213rr, X86_INS_VFNMSUB213PD: vfnmsub213pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ256v213rrk, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ256v213rrkz, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ256v231rm, X86_INS_VFNMSUB231PD: vfnmsub231pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ256v231rmb, X86_INS_VFNMSUB231PD: vfnmsub231pd	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ256v231rmbk, X86_INS_VFNMSUB231PD: vfnmsub231pd	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ256v231rmbkz, X86_INS_VFNMSUB231PD: vfnmsub231pd	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ256v231rmk, X86_INS_VFNMSUB231PD: vfnmsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ256v231rmkz, X86_INS_VFNMSUB231PD: vfnmsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ256v231rr, X86_INS_VFNMSUB231PD: vfnmsub231pd	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ256v231rrk, X86_INS_VFNMSUB231PD: vfnmsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZ256v231rrkz, X86_INS_VFNMSUB231PD: vfnmsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPDZv213rm, X86_INS_VFNMSUB213PD: vfnmsub213pd	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPDZv213rmb, X86_INS_VFNMSUB213PD: vfnmsub213pd	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPDZv213rmbk, X86_INS_VFNMSUB213PD: vfnmsub213pd	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPDZv213rmbkz, X86_INS_VFNMSUB213PD: vfnmsub213pd	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPDZv213rmk, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPDZv213rmkz, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPDZv213rr, X86_INS_VFNMSUB213PD: vfnmsub213pd	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPDZv213rrb, X86_INS_VFNMSUB213PD: vfnmsub213pd	$dst , $src2, $src3, $rc */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPDZv213rrbk, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPDZv213rrbkz, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPDZv213rrk, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPDZv213rrkz, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPDZv231rm, X86_INS_VFNMSUB231PD: vfnmsub231pd	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPDZv231rmb, X86_INS_VFNMSUB231PD: vfnmsub231pd	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPDZv231rmbk, X86_INS_VFNMSUB231PD: vfnmsub231pd	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPDZv231rmbkz, X86_INS_VFNMSUB231PD: vfnmsub231pd	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPDZv231rmk, X86_INS_VFNMSUB231PD: vfnmsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPDZv231rmkz, X86_INS_VFNMSUB231PD: vfnmsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPDZv231rr, X86_INS_VFNMSUB231PD: vfnmsub231pd	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPDZv231rrk, X86_INS_VFNMSUB231PD: vfnmsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPDZv231rrkz, X86_INS_VFNMSUB231PD: vfnmsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPDr132m, X86_INS_VFNMSUB132PD: vfnmsub132pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPDr132mY, X86_INS_VFNMSUB132PD: vfnmsub132pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPDr132r, X86_INS_VFNMSUB132PD: vfnmsub132pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPDr132rY, X86_INS_VFNMSUB132PD: vfnmsub132pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPDr213m, X86_INS_VFNMSUB213PD: vfnmsub213pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPDr213mY, X86_INS_VFNMSUB213PD: vfnmsub213pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPDr213r, X86_INS_VFNMSUB213PD: vfnmsub213pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPDr213rY, X86_INS_VFNMSUB213PD: vfnmsub213pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPDr231m, X86_INS_VFNMSUB231PD: vfnmsub231pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPDr231mY, X86_INS_VFNMSUB231PD: vfnmsub231pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPDr231r, X86_INS_VFNMSUB231PD: vfnmsub231pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPDr231rY, X86_INS_VFNMSUB231PD: vfnmsub231pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPS4mr, X86_INS_VFNMSUBPS: vfnmsubps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPS4mrY, X86_INS_VFNMSUBPS: vfnmsubps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPS4rm, X86_INS_VFNMSUBPS: vfnmsubps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPS4rmY, X86_INS_VFNMSUBPS: vfnmsubps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPS4rr, X86_INS_VFNMSUBPS: vfnmsubps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPS4rrY, X86_INS_VFNMSUBPS: vfnmsubps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPS4rrY_REV, X86_INS_VFNMSUBPS: vfnmsubps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPS4rr_REV, X86_INS_VFNMSUBPS: vfnmsubps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPSZ128v213rm, X86_INS_VFNMSUB213PS: vfnmsub213ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ128v213rmb, X86_INS_VFNMSUB213PS: vfnmsub213ps	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ128v213rmbk, X86_INS_VFNMSUB213PS: vfnmsub213ps	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ128v213rmbkz, X86_INS_VFNMSUB213PS: vfnmsub213ps	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ128v213rmk, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ128v213rmkz, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ128v213rr, X86_INS_VFNMSUB213PS: vfnmsub213ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ128v213rrk, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ128v213rrkz, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ128v231rm, X86_INS_VFNMSUB231PS: vfnmsub231ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ128v231rmb, X86_INS_VFNMSUB231PS: vfnmsub231ps	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ128v231rmbk, X86_INS_VFNMSUB231PS: vfnmsub231ps	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ128v231rmbkz, X86_INS_VFNMSUB231PS: vfnmsub231ps	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ128v231rmk, X86_INS_VFNMSUB231PS: vfnmsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ128v231rmkz, X86_INS_VFNMSUB231PS: vfnmsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ128v231rr, X86_INS_VFNMSUB231PS: vfnmsub231ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ128v231rrk, X86_INS_VFNMSUB231PS: vfnmsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ128v231rrkz, X86_INS_VFNMSUB231PS: vfnmsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ256v213rm, X86_INS_VFNMSUB213PS: vfnmsub213ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ256v213rmb, X86_INS_VFNMSUB213PS: vfnmsub213ps	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ256v213rmbk, X86_INS_VFNMSUB213PS: vfnmsub213ps	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ256v213rmbkz, X86_INS_VFNMSUB213PS: vfnmsub213ps	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ256v213rmk, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ256v213rmkz, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ256v213rr, X86_INS_VFNMSUB213PS: vfnmsub213ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ256v213rrk, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ256v213rrkz, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ256v231rm, X86_INS_VFNMSUB231PS: vfnmsub231ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ256v231rmb, X86_INS_VFNMSUB231PS: vfnmsub231ps	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ256v231rmbk, X86_INS_VFNMSUB231PS: vfnmsub231ps	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ256v231rmbkz, X86_INS_VFNMSUB231PS: vfnmsub231ps	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ256v231rmk, X86_INS_VFNMSUB231PS: vfnmsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ256v231rmkz, X86_INS_VFNMSUB231PS: vfnmsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ256v231rr, X86_INS_VFNMSUB231PS: vfnmsub231ps	$dst , $src2, $src3 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ256v231rrk, X86_INS_VFNMSUB231PS: vfnmsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZ256v231rrkz, X86_INS_VFNMSUB231PS: vfnmsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VFNMSUBPSZv213rm, X86_INS_VFNMSUB213PS: vfnmsub213ps	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPSZv213rmb, X86_INS_VFNMSUB213PS: vfnmsub213ps	{${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPSZv213rmbk, X86_INS_VFNMSUB213PS: vfnmsub213ps	{${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPSZv213rmbkz, X86_INS_VFNMSUB213PS: vfnmsub213ps	{${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPSZv213rmk, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPSZv213rmkz, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPSZv213rr, X86_INS_VFNMSUB213PS: vfnmsub213ps	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPSZv213rrb, X86_INS_VFNMSUB213PS: vfnmsub213ps	$dst , $src2, $src3, $rc */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPSZv213rrbk, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPSZv213rrbkz, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPSZv213rrk, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPSZv213rrkz, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPSZv231rm, X86_INS_VFNMSUB231PS: vfnmsub231ps	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPSZv231rmb, X86_INS_VFNMSUB231PS: vfnmsub231ps	{${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPSZv231rmbk, X86_INS_VFNMSUB231PS: vfnmsub231ps	{${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPSZv231rmbkz, X86_INS_VFNMSUB231PS: vfnmsub231ps	{${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPSZv231rmk, X86_INS_VFNMSUB231PS: vfnmsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPSZv231rmkz, X86_INS_VFNMSUB231PS: vfnmsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPSZv231rr, X86_INS_VFNMSUB231PS: vfnmsub231ps	$dst , $src2, $src3 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPSZv231rrk, X86_INS_VFNMSUB231PS: vfnmsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPSZv231rrkz, X86_INS_VFNMSUB231PS: vfnmsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VFNMSUBPSr132m, X86_INS_VFNMSUB132PS: vfnmsub132ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPSr132mY, X86_INS_VFNMSUB132PS: vfnmsub132ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPSr132r, X86_INS_VFNMSUB132PS: vfnmsub132ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPSr132rY, X86_INS_VFNMSUB132PS: vfnmsub132ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPSr213m, X86_INS_VFNMSUB213PS: vfnmsub213ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPSr213mY, X86_INS_VFNMSUB213PS: vfnmsub213ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPSr213r, X86_INS_VFNMSUB213PS: vfnmsub213ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPSr213rY, X86_INS_VFNMSUB213PS: vfnmsub213ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPSr231m, X86_INS_VFNMSUB231PS: vfnmsub231ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPSr231mY, X86_INS_VFNMSUB231PS: vfnmsub231ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPSr231r, X86_INS_VFNMSUB231PS: vfnmsub231ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBPSr231rY, X86_INS_VFNMSUB231PS: vfnmsub231ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSD4mr, X86_INS_VFNMSUBSD: vfnmsubsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSD4mr_Int, X86_INS_VFNMSUBSD: vfnmsubsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSD4rm, X86_INS_VFNMSUBSD: vfnmsubsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSD4rm_Int, X86_INS_VFNMSUBSD: vfnmsubsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSD4rr, X86_INS_VFNMSUBSD: vfnmsubsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSD4rr_Int, X86_INS_VFNMSUBSD: vfnmsubsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSD4rr_REV, X86_INS_VFNMSUBSD: vfnmsubsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSDZm, X86_INS_VFNMSUB213SD: vfnmsub213sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSDZr, X86_INS_VFNMSUB213SD: vfnmsub213sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSDr132m, X86_INS_VFNMSUB132SD: vfnmsub132sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSDr132r, X86_INS_VFNMSUB132SD: vfnmsub132sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSDr213m, X86_INS_VFNMSUB213SD: vfnmsub213sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSDr213r, X86_INS_VFNMSUB213SD: vfnmsub213sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSDr231m, X86_INS_VFNMSUB231SD: vfnmsub231sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSDr231r, X86_INS_VFNMSUB231SD: vfnmsub231sd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSS4mr, X86_INS_VFNMSUBSS: vfnmsubss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSS4mr_Int, X86_INS_VFNMSUBSS: vfnmsubss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSS4rm, X86_INS_VFNMSUBSS: vfnmsubss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSS4rm_Int, X86_INS_VFNMSUBSS: vfnmsubss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSS4rr, X86_INS_VFNMSUBSS: vfnmsubss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSS4rr_Int, X86_INS_VFNMSUBSS: vfnmsubss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSS4rr_REV, X86_INS_VFNMSUBSS: vfnmsubss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSSZm, X86_INS_VFNMSUB213SS: vfnmsub213ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSSZr, X86_INS_VFNMSUB213SS: vfnmsub213ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSSr132m, X86_INS_VFNMSUB132SS: vfnmsub132ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSSr132r, X86_INS_VFNMSUB132SS: vfnmsub132ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSSr213m, X86_INS_VFNMSUB213SS: vfnmsub213ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSSr213r, X86_INS_VFNMSUB213SS: vfnmsub213ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSSr231m, X86_INS_VFNMSUB231SS: vfnmsub231ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFNMSUBSSr231r, X86_INS_VFNMSUB231SS: vfnmsub231ss	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFRCZPDrm, X86_INS_VFRCZPD: vfrczpd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFRCZPDrmY, X86_INS_VFRCZPD: vfrczpd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFRCZPDrr, X86_INS_VFRCZPD: vfrczpd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFRCZPDrrY, X86_INS_VFRCZPD: vfrczpd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFRCZPSrm, X86_INS_VFRCZPS: vfrczps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFRCZPSrmY, X86_INS_VFRCZPS: vfrczps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFRCZPSrr, X86_INS_VFRCZPS: vfrczps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFRCZPSrrY, X86_INS_VFRCZPS: vfrczps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFRCZSDrm, X86_INS_VFRCZSD: vfrczsd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFRCZSDrr, X86_INS_VFRCZSD: vfrczsd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFRCZSSrm, X86_INS_VFRCZSS: vfrczss	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFRCZSSrr, X86_INS_VFRCZSS: vfrczss	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFsANDNPDrm, X86_INS_VANDNPD: vandnpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFsANDNPDrr, X86_INS_VANDNPD: vandnpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFsANDNPSrm, X86_INS_VANDNPS: vandnps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFsANDNPSrr, X86_INS_VANDNPS: vandnps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFsANDPDrm, X86_INS_VANDPD: vandpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFsANDPDrr, X86_INS_VANDPD: vandpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFsANDPSrm, X86_INS_VANDPS: vandps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFsANDPSrr, X86_INS_VANDPS: vandps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFsORPDrm, X86_INS_VORPD: vorpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFsORPDrr, X86_INS_VORPD: vorpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFsORPSrm, X86_INS_VORPS: vorps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFsORPSrr, X86_INS_VORPS: vorps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFsXORPDrm, X86_INS_VXORPD: vxorpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFsXORPDrr, X86_INS_VXORPD: vxorpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFsXORPSrm, X86_INS_VXORPS: vxorps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFsXORPSrr, X86_INS_VXORPS: vxorps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFvANDNPDrm, X86_INS_VANDNPD: vandnpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFvANDNPDrr, X86_INS_VANDNPD: vandnpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFvANDNPSrm, X86_INS_VANDNPS: vandnps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFvANDNPSrr, X86_INS_VANDNPS: vandnps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFvANDPDrm, X86_INS_VANDPD: vandpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFvANDPDrr, X86_INS_VANDPD: vandpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFvANDPSrm, X86_INS_VANDPS: vandps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFvANDPSrr, X86_INS_VANDPS: vandps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFvORPDrm, X86_INS_VORPD: vorpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFvORPDrr, X86_INS_VORPD: vorpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFvORPSrm, X86_INS_VORPS: vorps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFvORPSrr, X86_INS_VORPS: vorps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFvXORPDrm, X86_INS_VXORPD: vxorpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFvXORPDrr, X86_INS_VXORPD: vxorpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFvXORPSrm, X86_INS_VXORPS: vxorps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VFvXORPSrr, X86_INS_VXORPS: vxorps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VGATHERDPDYrm, X86_INS_VGATHERDPD: vgatherdpd	$dst, $src2, $mask */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VGATHERDPDZrm, X86_INS_VGATHERDPD: vgatherdpd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VGATHERDPDrm, X86_INS_VGATHERDPD: vgatherdpd	$dst, $src2, $mask */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VGATHERDPSYrm, X86_INS_VGATHERDPS: vgatherdps	$dst, $src2, $mask */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VGATHERDPSZrm, X86_INS_VGATHERDPS: vgatherdps	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VGATHERDPSrm, X86_INS_VGATHERDPS: vgatherdps	$dst, $src2, $mask */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VGATHERPF0DPDm, X86_INS_VGATHERPF0DPD: vgatherpf0dpd	{$src {${mask}}|{${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VGATHERPF0DPSm, X86_INS_VGATHERPF0DPS: vgatherpf0dps	{$src {${mask}}|{${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VGATHERPF0QPDm, X86_INS_VGATHERPF0QPD: vgatherpf0qpd	{$src {${mask}}|{${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VGATHERPF0QPSm, X86_INS_VGATHERPF0QPS: vgatherpf0qps	{$src {${mask}}|{${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VGATHERPF1DPDm, X86_INS_VGATHERPF1DPD: vgatherpf1dpd	{$src {${mask}}|{${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VGATHERPF1DPSm, X86_INS_VGATHERPF1DPS: vgatherpf1dps	{$src {${mask}}|{${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VGATHERPF1QPDm, X86_INS_VGATHERPF1QPD: vgatherpf1qpd	{$src {${mask}}|{${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VGATHERPF1QPSm, X86_INS_VGATHERPF1QPS: vgatherpf1qps	{$src {${mask}}|{${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VGATHERQPDYrm, X86_INS_VGATHERQPD: vgatherqpd	$dst, $src2, $mask */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VGATHERQPDZrm, X86_INS_VGATHERQPD: vgatherqpd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VGATHERQPDrm, X86_INS_VGATHERQPD: vgatherqpd	$dst, $src2, $mask */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VGATHERQPSYrm, X86_INS_VGATHERQPS: vgatherqps	$dst, $src2, $mask */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VGATHERQPSZrm, X86_INS_VGATHERQPS: vgatherqps	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VGATHERQPSrm, X86_INS_VGATHERQPS: vgatherqps	$dst, $src2, $mask */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VHADDPDYrm, X86_INS_VHADDPD: vhaddpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VHADDPDYrr, X86_INS_VHADDPD: vhaddpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VHADDPDrm, X86_INS_VHADDPD: vhaddpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VHADDPDrr, X86_INS_VHADDPD: vhaddpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VHADDPSYrm, X86_INS_VHADDPS: vhaddps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VHADDPSYrr, X86_INS_VHADDPS: vhaddps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VHADDPSrm, X86_INS_VHADDPS: vhaddps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VHADDPSrr, X86_INS_VHADDPS: vhaddps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VHSUBPDYrm, X86_INS_VHSUBPD: vhsubpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VHSUBPDYrr, X86_INS_VHSUBPD: vhsubpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VHSUBPDrm, X86_INS_VHSUBPD: vhsubpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VHSUBPDrr, X86_INS_VHSUBPD: vhsubpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VHSUBPSYrm, X86_INS_VHSUBPS: vhsubps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VHSUBPSYrr, X86_INS_VHSUBPS: vhsubps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VHSUBPSrm, X86_INS_VHSUBPS: vhsubps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VHSUBPSrr, X86_INS_VHSUBPS: vhsubps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VINSERTF128rm, X86_INS_VINSERTF128: vinsertf128	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VINSERTF128rr, X86_INS_VINSERTF128: vinsertf128	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VINSERTF32x4rm, X86_INS_VINSERTF32X4: vinsertf32x4	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VINSERTF32x4rr, X86_INS_VINSERTF32X4: vinsertf32x4	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VINSERTF32x8rm, X86_INS_VINSERTF32X8: vinsertf32x8	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VINSERTF32x8rr, X86_INS_VINSERTF32X8: vinsertf32x8	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VINSERTF64x2rm, X86_INS_VINSERTF64X2: vinsertf64x2	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VINSERTF64x2rr, X86_INS_VINSERTF64X2: vinsertf64x2	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VINSERTF64x4rm, X86_INS_VINSERTF64X4: vinsertf64x4	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VINSERTF64x4rr, X86_INS_VINSERTF64X4: vinsertf64x4	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VINSERTI128rm, X86_INS_VINSERTI128: vinserti128	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VINSERTI128rr, X86_INS_VINSERTI128: vinserti128	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VINSERTI32x4rm, X86_INS_VINSERTI32X4: vinserti32x4	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VINSERTI32x4rr, X86_INS_VINSERTI32X4: vinserti32x4	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VINSERTI32x8rm, X86_INS_VINSERTI32X8: vinserti32x8	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VINSERTI32x8rr, X86_INS_VINSERTI32X8: vinserti32x8	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VINSERTI64x2rm, X86_INS_VINSERTI64X2: vinserti64x2	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VINSERTI64x2rr, X86_INS_VINSERTI64X2: vinserti64x2	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VINSERTI64x4rm, X86_INS_VINSERTI64X4: vinserti64x4	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VINSERTI64x4rr, X86_INS_VINSERTI64X4: vinserti64x4	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VINSERTPSrm, X86_INS_VINSERTPS: vinsertps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VINSERTPSrr, X86_INS_VINSERTPS: vinsertps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VINSERTPSzrm, X86_INS_VINSERTPS: vinsertps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VINSERTPSzrr, X86_INS_VINSERTPS: vinsertps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VLDDQUYrm, X86_INS_VLDDQU: vlddqu	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VLDDQUrm, X86_INS_VLDDQU: vlddqu	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VLDMXCSR, X86_INS_VLDMXCSR: vldmxcsr	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMASKMOVDQU, X86_INS_VMASKMOVDQU: vmaskmovdqu	$src, $mask */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMASKMOVDQU64, X86_INS_VMASKMOVDQU: vmaskmovdqu	$src, $mask */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMASKMOVPDYmr, X86_INS_VMASKMOVPD: vmaskmovpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMASKMOVPDYrm, X86_INS_VMASKMOVPD: vmaskmovpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMASKMOVPDmr, X86_INS_VMASKMOVPD: vmaskmovpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMASKMOVPDrm, X86_INS_VMASKMOVPD: vmaskmovpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMASKMOVPSYmr, X86_INS_VMASKMOVPS: vmaskmovps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMASKMOVPSYrm, X86_INS_VMASKMOVPS: vmaskmovps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMASKMOVPSmr, X86_INS_VMASKMOVPS: vmaskmovps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMASKMOVPSrm, X86_INS_VMASKMOVPS: vmaskmovps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXCPDYrm, X86_INS_VMAXPD: vmaxpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXCPDYrr, X86_INS_VMAXPD: vmaxpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXCPDrm, X86_INS_VMAXPD: vmaxpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXCPDrr, X86_INS_VMAXPD: vmaxpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXCPSYrm, X86_INS_VMAXPS: vmaxps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXCPSYrr, X86_INS_VMAXPS: vmaxps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXCPSrm, X86_INS_VMAXPS: vmaxps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXCPSrr, X86_INS_VMAXPS: vmaxps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXCSDrm, X86_INS_VMAXSD: vmaxsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXCSDrr, X86_INS_VMAXSD: vmaxsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXCSSrm, X86_INS_VMAXSS: vmaxss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXCSSrr, X86_INS_VMAXSS: vmaxss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXPDYrm, X86_INS_VMAXPD: vmaxpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXPDYrr, X86_INS_VMAXPD: vmaxpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXPDZ128rm, X86_INS_VMAXPD: vmaxpd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPDZ128rmb, X86_INS_VMAXPD: vmaxpd	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPDZ128rmbk, X86_INS_VMAXPD: vmaxpd	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPDZ128rmbkz, X86_INS_VMAXPD: vmaxpd	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPDZ128rmk, X86_INS_VMAXPD: vmaxpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPDZ128rmkz, X86_INS_VMAXPD: vmaxpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPDZ128rr, X86_INS_VMAXPD: vmaxpd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPDZ128rrk, X86_INS_VMAXPD: vmaxpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPDZ128rrkz, X86_INS_VMAXPD: vmaxpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPDZ256rm, X86_INS_VMAXPD: vmaxpd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPDZ256rmb, X86_INS_VMAXPD: vmaxpd	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPDZ256rmbk, X86_INS_VMAXPD: vmaxpd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPDZ256rmbkz, X86_INS_VMAXPD: vmaxpd	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPDZ256rmk, X86_INS_VMAXPD: vmaxpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPDZ256rmkz, X86_INS_VMAXPD: vmaxpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPDZ256rr, X86_INS_VMAXPD: vmaxpd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPDZ256rrk, X86_INS_VMAXPD: vmaxpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPDZ256rrkz, X86_INS_VMAXPD: vmaxpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPDZrm, X86_INS_VMAXPD: vmaxpd	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXPDZrmb, X86_INS_VMAXPD: vmaxpd	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXPDZrmbk, X86_INS_VMAXPD: vmaxpd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMAXPDZrmbkz, X86_INS_VMAXPD: vmaxpd	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMAXPDZrmk, X86_INS_VMAXPD: vmaxpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMAXPDZrmkz, X86_INS_VMAXPD: vmaxpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMAXPDZrr, X86_INS_VMAXPD: vmaxpd	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXPDZrrk, X86_INS_VMAXPD: vmaxpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMAXPDZrrkz, X86_INS_VMAXPD: vmaxpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMAXPDrm, X86_INS_VMAXPD: vmaxpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXPDrr, X86_INS_VMAXPD: vmaxpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXPSYrm, X86_INS_VMAXPS: vmaxps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXPSYrr, X86_INS_VMAXPS: vmaxps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXPSZ128rm, X86_INS_VMAXPS: vmaxps	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPSZ128rmb, X86_INS_VMAXPS: vmaxps	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPSZ128rmbk, X86_INS_VMAXPS: vmaxps	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPSZ128rmbkz, X86_INS_VMAXPS: vmaxps	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPSZ128rmk, X86_INS_VMAXPS: vmaxps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPSZ128rmkz, X86_INS_VMAXPS: vmaxps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPSZ128rr, X86_INS_VMAXPS: vmaxps	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPSZ128rrk, X86_INS_VMAXPS: vmaxps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPSZ128rrkz, X86_INS_VMAXPS: vmaxps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPSZ256rm, X86_INS_VMAXPS: vmaxps	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPSZ256rmb, X86_INS_VMAXPS: vmaxps	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPSZ256rmbk, X86_INS_VMAXPS: vmaxps	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPSZ256rmbkz, X86_INS_VMAXPS: vmaxps	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPSZ256rmk, X86_INS_VMAXPS: vmaxps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPSZ256rmkz, X86_INS_VMAXPS: vmaxps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPSZ256rr, X86_INS_VMAXPS: vmaxps	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPSZ256rrk, X86_INS_VMAXPS: vmaxps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPSZ256rrkz, X86_INS_VMAXPS: vmaxps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXPSZrm, X86_INS_VMAXPS: vmaxps	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXPSZrmb, X86_INS_VMAXPS: vmaxps	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXPSZrmbk, X86_INS_VMAXPS: vmaxps	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMAXPSZrmbkz, X86_INS_VMAXPS: vmaxps	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMAXPSZrmk, X86_INS_VMAXPS: vmaxps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMAXPSZrmkz, X86_INS_VMAXPS: vmaxps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMAXPSZrr, X86_INS_VMAXPS: vmaxps	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXPSZrrk, X86_INS_VMAXPS: vmaxps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMAXPSZrrkz, X86_INS_VMAXPS: vmaxps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMAXPSrm, X86_INS_VMAXPS: vmaxps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXPSrr, X86_INS_VMAXPS: vmaxps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXSDZrm, X86_INS_VMAXSD: vmaxsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXSDZrm_Int, X86_INS_VMAXSD: vmaxsd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXSDZrm_Intk, X86_INS_VMAXSD: vmaxsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXSDZrm_Intkz, X86_INS_VMAXSD: vmaxsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXSDZrr, X86_INS_VMAXSD: vmaxsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXSDZrr_Int, X86_INS_VMAXSD: vmaxsd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXSDZrr_Intk, X86_INS_VMAXSD: vmaxsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXSDZrr_Intkz, X86_INS_VMAXSD: vmaxsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXSDZrrb, X86_INS_VMAXSD: vmaxsd	{$src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXSDZrrbk, X86_INS_VMAXSD: vmaxsd	{$src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXSDZrrbkz, X86_INS_VMAXSD: vmaxsd	{$src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXSDrm, X86_INS_VMAXSD: vmaxsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXSDrm_Int, X86_INS_VMAXSD: vmaxsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXSDrr, X86_INS_VMAXSD: vmaxsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXSDrr_Int, X86_INS_VMAXSD: vmaxsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXSSZrm, X86_INS_VMAXSS: vmaxss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXSSZrm_Int, X86_INS_VMAXSS: vmaxss	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXSSZrm_Intk, X86_INS_VMAXSS: vmaxss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXSSZrm_Intkz, X86_INS_VMAXSS: vmaxss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXSSZrr, X86_INS_VMAXSS: vmaxss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXSSZrr_Int, X86_INS_VMAXSS: vmaxss	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXSSZrr_Intk, X86_INS_VMAXSS: vmaxss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXSSZrr_Intkz, X86_INS_VMAXSS: vmaxss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXSSZrrb, X86_INS_VMAXSS: vmaxss	{$src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXSSZrrbk, X86_INS_VMAXSS: vmaxss	{$src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXSSZrrbkz, X86_INS_VMAXSS: vmaxss	{$src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMAXSSrm, X86_INS_VMAXSS: vmaxss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXSSrm_Int, X86_INS_VMAXSS: vmaxss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXSSrr, X86_INS_VMAXSS: vmaxss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMAXSSrr_Int, X86_INS_VMAXSS: vmaxss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMCALL, X86_INS_VMCALL: vmcall */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMCLEARm, X86_INS_VMCLEAR: vmclear	$vmcs */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMFUNC, X86_INS_VMFUNC: vmfunc */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINCPDYrm, X86_INS_VMINPD: vminpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINCPDYrr, X86_INS_VMINPD: vminpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINCPDrm, X86_INS_VMINPD: vminpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINCPDrr, X86_INS_VMINPD: vminpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINCPSYrm, X86_INS_VMINPS: vminps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINCPSYrr, X86_INS_VMINPS: vminps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINCPSrm, X86_INS_VMINPS: vminps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINCPSrr, X86_INS_VMINPS: vminps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINCSDrm, X86_INS_VMINSD: vminsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINCSDrr, X86_INS_VMINSD: vminsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINCSSrm, X86_INS_VMINSS: vminss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINCSSrr, X86_INS_VMINSS: vminss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINPDYrm, X86_INS_VMINPD: vminpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINPDYrr, X86_INS_VMINPD: vminpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINPDZ128rm, X86_INS_VMINPD: vminpd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPDZ128rmb, X86_INS_VMINPD: vminpd	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPDZ128rmbk, X86_INS_VMINPD: vminpd	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPDZ128rmbkz, X86_INS_VMINPD: vminpd	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPDZ128rmk, X86_INS_VMINPD: vminpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPDZ128rmkz, X86_INS_VMINPD: vminpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPDZ128rr, X86_INS_VMINPD: vminpd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPDZ128rrk, X86_INS_VMINPD: vminpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPDZ128rrkz, X86_INS_VMINPD: vminpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPDZ256rm, X86_INS_VMINPD: vminpd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPDZ256rmb, X86_INS_VMINPD: vminpd	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPDZ256rmbk, X86_INS_VMINPD: vminpd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPDZ256rmbkz, X86_INS_VMINPD: vminpd	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPDZ256rmk, X86_INS_VMINPD: vminpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPDZ256rmkz, X86_INS_VMINPD: vminpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPDZ256rr, X86_INS_VMINPD: vminpd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPDZ256rrk, X86_INS_VMINPD: vminpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPDZ256rrkz, X86_INS_VMINPD: vminpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPDZrm, X86_INS_VMINPD: vminpd	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINPDZrmb, X86_INS_VMINPD: vminpd	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINPDZrmbk, X86_INS_VMINPD: vminpd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMINPDZrmbkz, X86_INS_VMINPD: vminpd	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMINPDZrmk, X86_INS_VMINPD: vminpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMINPDZrmkz, X86_INS_VMINPD: vminpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMINPDZrr, X86_INS_VMINPD: vminpd	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINPDZrrk, X86_INS_VMINPD: vminpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMINPDZrrkz, X86_INS_VMINPD: vminpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMINPDrm, X86_INS_VMINPD: vminpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINPDrr, X86_INS_VMINPD: vminpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINPSYrm, X86_INS_VMINPS: vminps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINPSYrr, X86_INS_VMINPS: vminps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINPSZ128rm, X86_INS_VMINPS: vminps	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPSZ128rmb, X86_INS_VMINPS: vminps	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPSZ128rmbk, X86_INS_VMINPS: vminps	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPSZ128rmbkz, X86_INS_VMINPS: vminps	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPSZ128rmk, X86_INS_VMINPS: vminps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPSZ128rmkz, X86_INS_VMINPS: vminps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPSZ128rr, X86_INS_VMINPS: vminps	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPSZ128rrk, X86_INS_VMINPS: vminps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPSZ128rrkz, X86_INS_VMINPS: vminps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPSZ256rm, X86_INS_VMINPS: vminps	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPSZ256rmb, X86_INS_VMINPS: vminps	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPSZ256rmbk, X86_INS_VMINPS: vminps	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPSZ256rmbkz, X86_INS_VMINPS: vminps	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPSZ256rmk, X86_INS_VMINPS: vminps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPSZ256rmkz, X86_INS_VMINPS: vminps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPSZ256rr, X86_INS_VMINPS: vminps	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPSZ256rrk, X86_INS_VMINPS: vminps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPSZ256rrkz, X86_INS_VMINPS: vminps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINPSZrm, X86_INS_VMINPS: vminps	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINPSZrmb, X86_INS_VMINPS: vminps	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINPSZrmbk, X86_INS_VMINPS: vminps	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMINPSZrmbkz, X86_INS_VMINPS: vminps	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMINPSZrmk, X86_INS_VMINPS: vminps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMINPSZrmkz, X86_INS_VMINPS: vminps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMINPSZrr, X86_INS_VMINPS: vminps	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINPSZrrk, X86_INS_VMINPS: vminps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMINPSZrrkz, X86_INS_VMINPS: vminps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMINPSrm, X86_INS_VMINPS: vminps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINPSrr, X86_INS_VMINPS: vminps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINSDZrm, X86_INS_VMINSD: vminsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINSDZrm_Int, X86_INS_VMINSD: vminsd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINSDZrm_Intk, X86_INS_VMINSD: vminsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINSDZrm_Intkz, X86_INS_VMINSD: vminsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINSDZrr, X86_INS_VMINSD: vminsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINSDZrr_Int, X86_INS_VMINSD: vminsd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINSDZrr_Intk, X86_INS_VMINSD: vminsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINSDZrr_Intkz, X86_INS_VMINSD: vminsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINSDZrrb, X86_INS_VMINSD: vminsd	{$src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINSDZrrbk, X86_INS_VMINSD: vminsd	{$src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINSDZrrbkz, X86_INS_VMINSD: vminsd	{$src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINSDrm, X86_INS_VMINSD: vminsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINSDrm_Int, X86_INS_VMINSD: vminsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINSDrr, X86_INS_VMINSD: vminsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINSDrr_Int, X86_INS_VMINSD: vminsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINSSZrm, X86_INS_VMINSS: vminss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINSSZrm_Int, X86_INS_VMINSS: vminss	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINSSZrm_Intk, X86_INS_VMINSS: vminss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINSSZrm_Intkz, X86_INS_VMINSS: vminss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINSSZrr, X86_INS_VMINSS: vminss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINSSZrr_Int, X86_INS_VMINSS: vminss	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINSSZrr_Intk, X86_INS_VMINSS: vminss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINSSZrr_Intkz, X86_INS_VMINSS: vminss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINSSZrrb, X86_INS_VMINSS: vminss	{$src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINSSZrrbk, X86_INS_VMINSS: vminss	{$src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINSSZrrbkz, X86_INS_VMINSS: vminss	{$src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMINSSrm, X86_INS_VMINSS: vminss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINSSrm_Int, X86_INS_VMINSS: vminss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINSSrr, X86_INS_VMINSS: vminss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMINSSrr_Int, X86_INS_VMINSS: vminss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMLAUNCH, X86_INS_VMLAUNCH: vmlaunch */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMLOAD32, X86_INS_VMLOAD: vmload	eax */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMLOAD64, X86_INS_VMLOAD: vmload	rax */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMMCALL, X86_INS_VMMCALL: vmmcall */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOV64toPQIZrr, X86_INS_VMOVQ: vmovq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOV64toPQIrm, X86_INS_VMOVQ: vmovq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VMOV64toPQIrr, X86_INS_VMOVQ: vmovq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOV64toSDZrr, X86_INS_VMOVQ: vmovq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOV64toSDrm, X86_INS_VMOVQ: vmovq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOV64toSDrr, X86_INS_VMOVQ: vmovq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPDYmr, X86_INS_VMOVAPD: vmovapd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPDYrm, X86_INS_VMOVAPD: vmovapd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPDYrr, X86_INS_VMOVAPD: vmovapd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPDYrr_REV, X86_INS_VMOVAPD: vmovapd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPDZ128mr, X86_INS_VMOVAPD: vmovapd	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDZ128mrk, X86_INS_VMOVAPD: vmovapd	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDZ128rm, X86_INS_VMOVAPD: vmovapd	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDZ128rmk, X86_INS_VMOVAPD: vmovapd	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDZ128rmkz, X86_INS_VMOVAPD: vmovapd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDZ128rr, X86_INS_VMOVAPD: vmovapd	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDZ128rr_alt, X86_INS_VMOVAPD: vmovapd	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDZ128rrk, X86_INS_VMOVAPD: vmovapd	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDZ128rrk_alt, X86_INS_VMOVAPD: vmovapd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDZ128rrkz, X86_INS_VMOVAPD: vmovapd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDZ128rrkz_alt, X86_INS_VMOVAPD: vmovapd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDZ256mr, X86_INS_VMOVAPD: vmovapd	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDZ256mrk, X86_INS_VMOVAPD: vmovapd	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDZ256rm, X86_INS_VMOVAPD: vmovapd	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDZ256rmk, X86_INS_VMOVAPD: vmovapd	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDZ256rmkz, X86_INS_VMOVAPD: vmovapd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDZ256rr, X86_INS_VMOVAPD: vmovapd	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDZ256rr_alt, X86_INS_VMOVAPD: vmovapd	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDZ256rrk, X86_INS_VMOVAPD: vmovapd	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDZ256rrk_alt, X86_INS_VMOVAPD: vmovapd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDZ256rrkz, X86_INS_VMOVAPD: vmovapd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDZ256rrkz_alt, X86_INS_VMOVAPD: vmovapd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDZmr, X86_INS_VMOVAPD: vmovapd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPDZmrk, X86_INS_VMOVAPD: vmovapd	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDZrm, X86_INS_VMOVAPD: vmovapd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPDZrmk, X86_INS_VMOVAPD: vmovapd	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPDZrmkz, X86_INS_VMOVAPD: vmovapd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDZrr, X86_INS_VMOVAPD: vmovapd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPDZrr_alt, X86_INS_VMOVAPD: vmovapd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPDZrrk, X86_INS_VMOVAPD: vmovapd	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPDZrrk_alt, X86_INS_VMOVAPD: vmovapd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDZrrkz, X86_INS_VMOVAPD: vmovapd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDZrrkz_alt, X86_INS_VMOVAPD: vmovapd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPDmr, X86_INS_VMOVAPD: vmovapd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPDrm, X86_INS_VMOVAPD: vmovapd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPDrr, X86_INS_VMOVAPD: vmovapd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPDrr_REV, X86_INS_VMOVAPD: vmovapd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPSYmr, X86_INS_VMOVAPS: vmovaps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPSYrm, X86_INS_VMOVAPS: vmovaps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPSYrr, X86_INS_VMOVAPS: vmovaps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPSYrr_REV, X86_INS_VMOVAPS: vmovaps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPSZ128mr, X86_INS_VMOVAPS: vmovaps	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSZ128mrk, X86_INS_VMOVAPS: vmovaps	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSZ128rm, X86_INS_VMOVAPS: vmovaps	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSZ128rmk, X86_INS_VMOVAPS: vmovaps	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSZ128rmkz, X86_INS_VMOVAPS: vmovaps	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSZ128rr, X86_INS_VMOVAPS: vmovaps	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSZ128rr_alt, X86_INS_VMOVAPS: vmovaps	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSZ128rrk, X86_INS_VMOVAPS: vmovaps	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSZ128rrk_alt, X86_INS_VMOVAPS: vmovaps	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSZ128rrkz, X86_INS_VMOVAPS: vmovaps	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSZ128rrkz_alt, X86_INS_VMOVAPS: vmovaps	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSZ256mr, X86_INS_VMOVAPS: vmovaps	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSZ256mrk, X86_INS_VMOVAPS: vmovaps	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSZ256rm, X86_INS_VMOVAPS: vmovaps	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSZ256rmk, X86_INS_VMOVAPS: vmovaps	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSZ256rmkz, X86_INS_VMOVAPS: vmovaps	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSZ256rr, X86_INS_VMOVAPS: vmovaps	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSZ256rr_alt, X86_INS_VMOVAPS: vmovaps	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSZ256rrk, X86_INS_VMOVAPS: vmovaps	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSZ256rrk_alt, X86_INS_VMOVAPS: vmovaps	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSZ256rrkz, X86_INS_VMOVAPS: vmovaps	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSZ256rrkz_alt, X86_INS_VMOVAPS: vmovaps	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSZmr, X86_INS_VMOVAPS: vmovaps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPSZmrk, X86_INS_VMOVAPS: vmovaps	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSZrm, X86_INS_VMOVAPS: vmovaps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPSZrmk, X86_INS_VMOVAPS: vmovaps	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPSZrmkz, X86_INS_VMOVAPS: vmovaps	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSZrr, X86_INS_VMOVAPS: vmovaps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPSZrr_alt, X86_INS_VMOVAPS: vmovaps	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPSZrrk, X86_INS_VMOVAPS: vmovaps	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPSZrrk_alt, X86_INS_VMOVAPS: vmovaps	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSZrrkz, X86_INS_VMOVAPS: vmovaps	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSZrrkz_alt, X86_INS_VMOVAPS: vmovaps	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVAPSmr, X86_INS_VMOVAPS: vmovaps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPSrm, X86_INS_VMOVAPS: vmovaps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPSrr, X86_INS_VMOVAPS: vmovaps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVAPSrr_REV, X86_INS_VMOVAPS: vmovaps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDDUPYrm, X86_INS_VMOVDDUP: vmovddup	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDDUPYrr, X86_INS_VMOVDDUP: vmovddup	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDDUPZrm, X86_INS_VMOVDDUP: vmovddup	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDDUPZrr, X86_INS_VMOVDDUP: vmovddup	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDDUPrm, X86_INS_VMOVDDUP: vmovddup	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDDUPrr, X86_INS_VMOVDDUP: vmovddup	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDI2PDIZrm, X86_INS_VMOVD: vmovd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDI2PDIZrr, X86_INS_VMOVD: vmovd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDI2PDIrm, X86_INS_VMOVD: vmovd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDI2PDIrr, X86_INS_VMOVD: vmovd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDI2SSZrm, X86_INS_VMOVD: vmovd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDI2SSZrr, X86_INS_VMOVD: vmovd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDI2SSrm, X86_INS_VMOVD: vmovd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDI2SSrr, X86_INS_VMOVD: vmovd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQA32Z128mr, X86_INS_VMOVDQA32: vmovdqa32	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Z128mrk, X86_INS_VMOVDQA32: vmovdqa32	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Z128rm, X86_INS_VMOVDQA32: vmovdqa32	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Z128rmk, X86_INS_VMOVDQA32: vmovdqa32	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Z128rmkz, X86_INS_VMOVDQA32: vmovdqa32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Z128rr, X86_INS_VMOVDQA32: vmovdqa32	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Z128rr_alt, X86_INS_VMOVDQA32: vmovdqa32	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Z128rrk, X86_INS_VMOVDQA32: vmovdqa32	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Z128rrk_alt, X86_INS_VMOVDQA32: vmovdqa32	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Z128rrkz, X86_INS_VMOVDQA32: vmovdqa32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Z128rrkz_alt, X86_INS_VMOVDQA32: vmovdqa32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Z256mr, X86_INS_VMOVDQA32: vmovdqa32	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Z256mrk, X86_INS_VMOVDQA32: vmovdqa32	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Z256rm, X86_INS_VMOVDQA32: vmovdqa32	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Z256rmk, X86_INS_VMOVDQA32: vmovdqa32	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Z256rmkz, X86_INS_VMOVDQA32: vmovdqa32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Z256rr, X86_INS_VMOVDQA32: vmovdqa32	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Z256rr_alt, X86_INS_VMOVDQA32: vmovdqa32	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Z256rrk, X86_INS_VMOVDQA32: vmovdqa32	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Z256rrk_alt, X86_INS_VMOVDQA32: vmovdqa32	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Z256rrkz, X86_INS_VMOVDQA32: vmovdqa32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Z256rrkz_alt, X86_INS_VMOVDQA32: vmovdqa32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Zmr, X86_INS_VMOVDQA32: vmovdqa32	$dst, $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQA32Zmrk, X86_INS_VMOVDQA32: vmovdqa32	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Zrm, X86_INS_VMOVDQA32: vmovdqa32	$dst, $src */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VMOVDQA32Zrmk, X86_INS_VMOVDQA32: vmovdqa32	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Zrmkz, X86_INS_VMOVDQA32: vmovdqa32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Zrr, X86_INS_VMOVDQA32: vmovdqa32	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQA32Zrr_alt, X86_INS_VMOVDQA32: vmovdqa32	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQA32Zrrk, X86_INS_VMOVDQA32: vmovdqa32	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Zrrk_alt, X86_INS_VMOVDQA32: vmovdqa32	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Zrrkz, X86_INS_VMOVDQA32: vmovdqa32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA32Zrrkz_alt, X86_INS_VMOVDQA32: vmovdqa32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Z128mr, X86_INS_VMOVDQA64: vmovdqa64	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Z128mrk, X86_INS_VMOVDQA64: vmovdqa64	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Z128rm, X86_INS_VMOVDQA64: vmovdqa64	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Z128rmk, X86_INS_VMOVDQA64: vmovdqa64	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Z128rmkz, X86_INS_VMOVDQA64: vmovdqa64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Z128rr, X86_INS_VMOVDQA64: vmovdqa64	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Z128rr_alt, X86_INS_VMOVDQA64: vmovdqa64	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Z128rrk, X86_INS_VMOVDQA64: vmovdqa64	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Z128rrk_alt, X86_INS_VMOVDQA64: vmovdqa64	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Z128rrkz, X86_INS_VMOVDQA64: vmovdqa64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Z128rrkz_alt, X86_INS_VMOVDQA64: vmovdqa64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Z256mr, X86_INS_VMOVDQA64: vmovdqa64	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Z256mrk, X86_INS_VMOVDQA64: vmovdqa64	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Z256rm, X86_INS_VMOVDQA64: vmovdqa64	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Z256rmk, X86_INS_VMOVDQA64: vmovdqa64	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Z256rmkz, X86_INS_VMOVDQA64: vmovdqa64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Z256rr, X86_INS_VMOVDQA64: vmovdqa64	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Z256rr_alt, X86_INS_VMOVDQA64: vmovdqa64	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Z256rrk, X86_INS_VMOVDQA64: vmovdqa64	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Z256rrk_alt, X86_INS_VMOVDQA64: vmovdqa64	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Z256rrkz, X86_INS_VMOVDQA64: vmovdqa64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Z256rrkz_alt, X86_INS_VMOVDQA64: vmovdqa64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Zmr, X86_INS_VMOVDQA64: vmovdqa64	$dst, $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQA64Zmrk, X86_INS_VMOVDQA64: vmovdqa64	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Zrm, X86_INS_VMOVDQA64: vmovdqa64	$dst, $src */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VMOVDQA64Zrmk, X86_INS_VMOVDQA64: vmovdqa64	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Zrmkz, X86_INS_VMOVDQA64: vmovdqa64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Zrr, X86_INS_VMOVDQA64: vmovdqa64	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQA64Zrr_alt, X86_INS_VMOVDQA64: vmovdqa64	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQA64Zrrk, X86_INS_VMOVDQA64: vmovdqa64	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Zrrk_alt, X86_INS_VMOVDQA64: vmovdqa64	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Zrrkz, X86_INS_VMOVDQA64: vmovdqa64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQA64Zrrkz_alt, X86_INS_VMOVDQA64: vmovdqa64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQAYmr, X86_INS_VMOVDQA: vmovdqa	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQAYrm, X86_INS_VMOVDQA: vmovdqa	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQAYrr, X86_INS_VMOVDQA: vmovdqa	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQAYrr_REV, X86_INS_VMOVDQA: vmovdqa	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQAmr, X86_INS_VMOVDQA: vmovdqa	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQArm, X86_INS_VMOVDQA: vmovdqa	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQArr, X86_INS_VMOVDQA: vmovdqa	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQArr_REV, X86_INS_VMOVDQA: vmovdqa	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQU16Z128mr, X86_INS_VMOVDQU16: vmovdqu16	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Z128mrk, X86_INS_VMOVDQU16: vmovdqu16	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Z128rm, X86_INS_VMOVDQU16: vmovdqu16	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Z128rmk, X86_INS_VMOVDQU16: vmovdqu16	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Z128rmkz, X86_INS_VMOVDQU16: vmovdqu16	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Z128rr, X86_INS_VMOVDQU16: vmovdqu16	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Z128rr_alt, X86_INS_VMOVDQU16: vmovdqu16	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Z128rrk, X86_INS_VMOVDQU16: vmovdqu16	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Z128rrk_alt, X86_INS_VMOVDQU16: vmovdqu16	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Z128rrkz, X86_INS_VMOVDQU16: vmovdqu16	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Z128rrkz_alt, X86_INS_VMOVDQU16: vmovdqu16	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Z256mr, X86_INS_VMOVDQU16: vmovdqu16	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Z256mrk, X86_INS_VMOVDQU16: vmovdqu16	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Z256rm, X86_INS_VMOVDQU16: vmovdqu16	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Z256rmk, X86_INS_VMOVDQU16: vmovdqu16	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Z256rmkz, X86_INS_VMOVDQU16: vmovdqu16	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Z256rr, X86_INS_VMOVDQU16: vmovdqu16	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Z256rr_alt, X86_INS_VMOVDQU16: vmovdqu16	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Z256rrk, X86_INS_VMOVDQU16: vmovdqu16	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Z256rrk_alt, X86_INS_VMOVDQU16: vmovdqu16	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Z256rrkz, X86_INS_VMOVDQU16: vmovdqu16	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Z256rrkz_alt, X86_INS_VMOVDQU16: vmovdqu16	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Zmr, X86_INS_VMOVDQU16: vmovdqu16	$dst, $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQU16Zmrk, X86_INS_VMOVDQU16: vmovdqu16	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Zrm, X86_INS_VMOVDQU16: vmovdqu16	$dst, $src */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VMOVDQU16Zrmk, X86_INS_VMOVDQU16: vmovdqu16	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Zrmkz, X86_INS_VMOVDQU16: vmovdqu16	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Zrr, X86_INS_VMOVDQU16: vmovdqu16	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQU16Zrr_alt, X86_INS_VMOVDQU16: vmovdqu16	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQU16Zrrk, X86_INS_VMOVDQU16: vmovdqu16	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Zrrk_alt, X86_INS_VMOVDQU16: vmovdqu16	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Zrrkz, X86_INS_VMOVDQU16: vmovdqu16	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU16Zrrkz_alt, X86_INS_VMOVDQU16: vmovdqu16	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Z128mr, X86_INS_VMOVDQU32: vmovdqu32	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Z128mrk, X86_INS_VMOVDQU32: vmovdqu32	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Z128rm, X86_INS_VMOVDQU32: vmovdqu32	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Z128rmk, X86_INS_VMOVDQU32: vmovdqu32	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Z128rmkz, X86_INS_VMOVDQU32: vmovdqu32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Z128rr, X86_INS_VMOVDQU32: vmovdqu32	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Z128rr_alt, X86_INS_VMOVDQU32: vmovdqu32	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Z128rrk, X86_INS_VMOVDQU32: vmovdqu32	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Z128rrk_alt, X86_INS_VMOVDQU32: vmovdqu32	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Z128rrkz, X86_INS_VMOVDQU32: vmovdqu32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Z128rrkz_alt, X86_INS_VMOVDQU32: vmovdqu32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Z256mr, X86_INS_VMOVDQU32: vmovdqu32	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Z256mrk, X86_INS_VMOVDQU32: vmovdqu32	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Z256rm, X86_INS_VMOVDQU32: vmovdqu32	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Z256rmk, X86_INS_VMOVDQU32: vmovdqu32	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Z256rmkz, X86_INS_VMOVDQU32: vmovdqu32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Z256rr, X86_INS_VMOVDQU32: vmovdqu32	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Z256rr_alt, X86_INS_VMOVDQU32: vmovdqu32	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Z256rrk, X86_INS_VMOVDQU32: vmovdqu32	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Z256rrk_alt, X86_INS_VMOVDQU32: vmovdqu32	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Z256rrkz, X86_INS_VMOVDQU32: vmovdqu32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Z256rrkz_alt, X86_INS_VMOVDQU32: vmovdqu32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Zmr, X86_INS_VMOVDQU32: vmovdqu32	$dst, $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQU32Zmrk, X86_INS_VMOVDQU32: vmovdqu32	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Zrm, X86_INS_VMOVDQU32: vmovdqu32	$dst, $src */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VMOVDQU32Zrmk, X86_INS_VMOVDQU32: vmovdqu32	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Zrmkz, X86_INS_VMOVDQU32: vmovdqu32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Zrr, X86_INS_VMOVDQU32: vmovdqu32	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQU32Zrr_alt, X86_INS_VMOVDQU32: vmovdqu32	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQU32Zrrk, X86_INS_VMOVDQU32: vmovdqu32	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Zrrk_alt, X86_INS_VMOVDQU32: vmovdqu32	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Zrrkz, X86_INS_VMOVDQU32: vmovdqu32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU32Zrrkz_alt, X86_INS_VMOVDQU32: vmovdqu32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Z128mr, X86_INS_VMOVDQU64: vmovdqu64	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Z128mrk, X86_INS_VMOVDQU64: vmovdqu64	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Z128rm, X86_INS_VMOVDQU64: vmovdqu64	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Z128rmk, X86_INS_VMOVDQU64: vmovdqu64	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Z128rmkz, X86_INS_VMOVDQU64: vmovdqu64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Z128rr, X86_INS_VMOVDQU64: vmovdqu64	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Z128rr_alt, X86_INS_VMOVDQU64: vmovdqu64	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Z128rrk, X86_INS_VMOVDQU64: vmovdqu64	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Z128rrk_alt, X86_INS_VMOVDQU64: vmovdqu64	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Z128rrkz, X86_INS_VMOVDQU64: vmovdqu64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Z128rrkz_alt, X86_INS_VMOVDQU64: vmovdqu64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Z256mr, X86_INS_VMOVDQU64: vmovdqu64	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Z256mrk, X86_INS_VMOVDQU64: vmovdqu64	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Z256rm, X86_INS_VMOVDQU64: vmovdqu64	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Z256rmk, X86_INS_VMOVDQU64: vmovdqu64	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Z256rmkz, X86_INS_VMOVDQU64: vmovdqu64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Z256rr, X86_INS_VMOVDQU64: vmovdqu64	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Z256rr_alt, X86_INS_VMOVDQU64: vmovdqu64	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Z256rrk, X86_INS_VMOVDQU64: vmovdqu64	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Z256rrk_alt, X86_INS_VMOVDQU64: vmovdqu64	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Z256rrkz, X86_INS_VMOVDQU64: vmovdqu64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Z256rrkz_alt, X86_INS_VMOVDQU64: vmovdqu64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Zmr, X86_INS_VMOVDQU64: vmovdqu64	$dst, $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQU64Zmrk, X86_INS_VMOVDQU64: vmovdqu64	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Zrm, X86_INS_VMOVDQU64: vmovdqu64	$dst, $src */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VMOVDQU64Zrmk, X86_INS_VMOVDQU64: vmovdqu64	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Zrmkz, X86_INS_VMOVDQU64: vmovdqu64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Zrr, X86_INS_VMOVDQU64: vmovdqu64	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQU64Zrr_alt, X86_INS_VMOVDQU64: vmovdqu64	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQU64Zrrk, X86_INS_VMOVDQU64: vmovdqu64	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Zrrk_alt, X86_INS_VMOVDQU64: vmovdqu64	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Zrrkz, X86_INS_VMOVDQU64: vmovdqu64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU64Zrrkz_alt, X86_INS_VMOVDQU64: vmovdqu64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Z128mr, X86_INS_VMOVDQU8: vmovdqu8	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Z128mrk, X86_INS_VMOVDQU8: vmovdqu8	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Z128rm, X86_INS_VMOVDQU8: vmovdqu8	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Z128rmk, X86_INS_VMOVDQU8: vmovdqu8	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Z128rmkz, X86_INS_VMOVDQU8: vmovdqu8	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Z128rr, X86_INS_VMOVDQU8: vmovdqu8	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Z128rr_alt, X86_INS_VMOVDQU8: vmovdqu8	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Z128rrk, X86_INS_VMOVDQU8: vmovdqu8	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Z128rrk_alt, X86_INS_VMOVDQU8: vmovdqu8	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Z128rrkz, X86_INS_VMOVDQU8: vmovdqu8	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Z128rrkz_alt, X86_INS_VMOVDQU8: vmovdqu8	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Z256mr, X86_INS_VMOVDQU8: vmovdqu8	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Z256mrk, X86_INS_VMOVDQU8: vmovdqu8	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Z256rm, X86_INS_VMOVDQU8: vmovdqu8	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Z256rmk, X86_INS_VMOVDQU8: vmovdqu8	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Z256rmkz, X86_INS_VMOVDQU8: vmovdqu8	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Z256rr, X86_INS_VMOVDQU8: vmovdqu8	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Z256rr_alt, X86_INS_VMOVDQU8: vmovdqu8	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Z256rrk, X86_INS_VMOVDQU8: vmovdqu8	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Z256rrk_alt, X86_INS_VMOVDQU8: vmovdqu8	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Z256rrkz, X86_INS_VMOVDQU8: vmovdqu8	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Z256rrkz_alt, X86_INS_VMOVDQU8: vmovdqu8	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Zmr, X86_INS_VMOVDQU8: vmovdqu8	$dst, $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQU8Zmrk, X86_INS_VMOVDQU8: vmovdqu8	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Zrm, X86_INS_VMOVDQU8: vmovdqu8	$dst, $src */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VMOVDQU8Zrmk, X86_INS_VMOVDQU8: vmovdqu8	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Zrmkz, X86_INS_VMOVDQU8: vmovdqu8	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Zrr, X86_INS_VMOVDQU8: vmovdqu8	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQU8Zrr_alt, X86_INS_VMOVDQU8: vmovdqu8	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQU8Zrrk, X86_INS_VMOVDQU8: vmovdqu8	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Zrrk_alt, X86_INS_VMOVDQU8: vmovdqu8	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Zrrkz, X86_INS_VMOVDQU8: vmovdqu8	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQU8Zrrkz_alt, X86_INS_VMOVDQU8: vmovdqu8	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVDQUYmr, X86_INS_VMOVDQU: vmovdqu	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQUYrm, X86_INS_VMOVDQU: vmovdqu	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQUYrr, X86_INS_VMOVDQU: vmovdqu	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQUYrr_REV, X86_INS_VMOVDQU: vmovdqu	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQUmr, X86_INS_VMOVDQU: vmovdqu	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQUrm, X86_INS_VMOVDQU: vmovdqu	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQUrr, X86_INS_VMOVDQU: vmovdqu	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVDQUrr_REV, X86_INS_VMOVDQU: vmovdqu	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVHLPSZrr, X86_INS_VMOVHLPS: vmovhlps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVHLPSrr, X86_INS_VMOVHLPS: vmovhlps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVHPDmr, X86_INS_VMOVHPD: vmovhpd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVHPDrm, X86_INS_VMOVHPD: vmovhpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVHPSmr, X86_INS_VMOVHPS: vmovhps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVHPSrm, X86_INS_VMOVHPS: vmovhps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVLHPSZrr, X86_INS_VMOVLHPS: vmovlhps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVLHPSrr, X86_INS_VMOVLHPS: vmovlhps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVLPDmr, X86_INS_VMOVLPD: vmovlpd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVLPDrm, X86_INS_VMOVLPD: vmovlpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVLPSmr, X86_INS_VMOVLPS: vmovlps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVLPSrm, X86_INS_VMOVLPS: vmovlps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVMSKPDYrr, X86_INS_VMOVMSKPD: vmovmskpd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVMSKPDrr, X86_INS_VMOVMSKPD: vmovmskpd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVMSKPSYrr, X86_INS_VMOVMSKPS: vmovmskps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVMSKPSrr, X86_INS_VMOVMSKPS: vmovmskps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVNTDQAYrm, X86_INS_VMOVNTDQA: vmovntdqa	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVNTDQAZ128rm, X86_INS_VMOVNTDQA: vmovntdqa	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVNTDQAZ256rm, X86_INS_VMOVNTDQA: vmovntdqa	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVNTDQAZrm, X86_INS_VMOVNTDQA: vmovntdqa	$dst, $src */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VMOVNTDQArm, X86_INS_VMOVNTDQA: vmovntdqa	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVNTDQYmr, X86_INS_VMOVNTDQ: vmovntdq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVNTDQZ128mr, X86_INS_VMOVNTDQ: vmovntdq	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVNTDQZ256mr, X86_INS_VMOVNTDQ: vmovntdq	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVNTDQZmr, X86_INS_VMOVNTDQ: vmovntdq	$dst, $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVNTDQmr, X86_INS_VMOVNTDQ: vmovntdq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVNTPDYmr, X86_INS_VMOVNTPD: vmovntpd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVNTPDZ128mr, X86_INS_VMOVNTPD: vmovntpd	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVNTPDZ256mr, X86_INS_VMOVNTPD: vmovntpd	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVNTPDZmr, X86_INS_VMOVNTPD: vmovntpd	$dst, $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVNTPDmr, X86_INS_VMOVNTPD: vmovntpd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVNTPSYmr, X86_INS_VMOVNTPS: vmovntps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVNTPSZ128mr, X86_INS_VMOVNTPS: vmovntps	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVNTPSZ256mr, X86_INS_VMOVNTPS: vmovntps	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVNTPSZmr, X86_INS_VMOVNTPS: vmovntps	$dst, $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVNTPSmr, X86_INS_VMOVNTPS: vmovntps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVPDI2DIZmr, X86_INS_VMOVD: vmovd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVPDI2DIZrr, X86_INS_VMOVD: vmovd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVPDI2DImr, X86_INS_VMOVD: vmovd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVPDI2DIrr, X86_INS_VMOVD: vmovd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVPQI2QImr, X86_INS_VMOVQ: vmovq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVPQI2QIrr, X86_INS_VMOVQ: vmovq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVPQIto64Zmr, X86_INS_VMOVQ: vmovq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVPQIto64Zrr, X86_INS_VMOVQ: vmovq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVPQIto64rm, X86_INS_VMOVQ: vmovq	$dst, $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVPQIto64rr, X86_INS_VMOVQ: vmovq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVQI2PQIZrm, X86_INS_VMOVQ: vmovq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVQI2PQIrm, X86_INS_VMOVQ: vmovq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSDZmr, X86_INS_VMOVSD: vmovsd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSDZmrk, X86_INS_VMOVSD: vmovsd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVSDZrm, X86_INS_VMOVSD: vmovsd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSDZrr, X86_INS_VMOVSD: vmovsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSDZrr_REV, X86_INS_VMOVSD: vmovsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSDZrrk, X86_INS_VMOVSD: vmovsd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSDmr, X86_INS_VMOVSD: vmovsd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSDrm, X86_INS_VMOVSD: vmovsd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSDrr, X86_INS_VMOVSD: vmovsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSDrr_REV, X86_INS_VMOVSD: vmovsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSDto64Zmr, X86_INS_VMOVQ: vmovq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSDto64Zrr, X86_INS_VMOVQ: vmovq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSDto64mr, X86_INS_VMOVQ: vmovq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSDto64rr, X86_INS_VMOVQ: vmovq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSHDUPYrm, X86_INS_VMOVSHDUP: vmovshdup	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSHDUPYrr, X86_INS_VMOVSHDUP: vmovshdup	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSHDUPZrm, X86_INS_VMOVSHDUP: vmovshdup	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSHDUPZrr, X86_INS_VMOVSHDUP: vmovshdup	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSHDUPrm, X86_INS_VMOVSHDUP: vmovshdup	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSHDUPrr, X86_INS_VMOVSHDUP: vmovshdup	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSLDUPYrm, X86_INS_VMOVSLDUP: vmovsldup	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSLDUPYrr, X86_INS_VMOVSLDUP: vmovsldup	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSLDUPZrm, X86_INS_VMOVSLDUP: vmovsldup	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSLDUPZrr, X86_INS_VMOVSLDUP: vmovsldup	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSLDUPrm, X86_INS_VMOVSLDUP: vmovsldup	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSLDUPrr, X86_INS_VMOVSLDUP: vmovsldup	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSS2DIZmr, X86_INS_VMOVD: vmovd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSS2DIZrr, X86_INS_VMOVD: vmovd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSS2DImr, X86_INS_VMOVD: vmovd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSS2DIrr, X86_INS_VMOVD: vmovd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSSZmr, X86_INS_VMOVSS: vmovss	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSSZmrk, X86_INS_VMOVSS: vmovss	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVSSZrm, X86_INS_VMOVSS: vmovss	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSSZrr, X86_INS_VMOVSS: vmovss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSSZrr_REV, X86_INS_VMOVSS: vmovss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSSZrrk, X86_INS_VMOVSS: vmovss	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSSmr, X86_INS_VMOVSS: vmovss	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSSrm, X86_INS_VMOVSS: vmovss	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSSrr, X86_INS_VMOVSS: vmovss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVSSrr_REV, X86_INS_VMOVSS: vmovss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPDYmr, X86_INS_VMOVUPD: vmovupd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPDYrm, X86_INS_VMOVUPD: vmovupd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPDYrr, X86_INS_VMOVUPD: vmovupd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPDYrr_REV, X86_INS_VMOVUPD: vmovupd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPDZ128mr, X86_INS_VMOVUPD: vmovupd	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDZ128mrk, X86_INS_VMOVUPD: vmovupd	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDZ128rm, X86_INS_VMOVUPD: vmovupd	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDZ128rmk, X86_INS_VMOVUPD: vmovupd	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDZ128rmkz, X86_INS_VMOVUPD: vmovupd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDZ128rr, X86_INS_VMOVUPD: vmovupd	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDZ128rr_alt, X86_INS_VMOVUPD: vmovupd	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDZ128rrk, X86_INS_VMOVUPD: vmovupd	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDZ128rrk_alt, X86_INS_VMOVUPD: vmovupd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDZ128rrkz, X86_INS_VMOVUPD: vmovupd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDZ128rrkz_alt, X86_INS_VMOVUPD: vmovupd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDZ256mr, X86_INS_VMOVUPD: vmovupd	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDZ256mrk, X86_INS_VMOVUPD: vmovupd	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDZ256rm, X86_INS_VMOVUPD: vmovupd	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDZ256rmk, X86_INS_VMOVUPD: vmovupd	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDZ256rmkz, X86_INS_VMOVUPD: vmovupd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDZ256rr, X86_INS_VMOVUPD: vmovupd	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDZ256rr_alt, X86_INS_VMOVUPD: vmovupd	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDZ256rrk, X86_INS_VMOVUPD: vmovupd	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDZ256rrk_alt, X86_INS_VMOVUPD: vmovupd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDZ256rrkz, X86_INS_VMOVUPD: vmovupd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDZ256rrkz_alt, X86_INS_VMOVUPD: vmovupd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDZmr, X86_INS_VMOVUPD: vmovupd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPDZmrk, X86_INS_VMOVUPD: vmovupd	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDZrm, X86_INS_VMOVUPD: vmovupd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPDZrmk, X86_INS_VMOVUPD: vmovupd	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPDZrmkz, X86_INS_VMOVUPD: vmovupd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDZrr, X86_INS_VMOVUPD: vmovupd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPDZrr_alt, X86_INS_VMOVUPD: vmovupd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPDZrrk, X86_INS_VMOVUPD: vmovupd	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPDZrrk_alt, X86_INS_VMOVUPD: vmovupd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDZrrkz, X86_INS_VMOVUPD: vmovupd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDZrrkz_alt, X86_INS_VMOVUPD: vmovupd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPDmr, X86_INS_VMOVUPD: vmovupd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPDrm, X86_INS_VMOVUPD: vmovupd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPDrr, X86_INS_VMOVUPD: vmovupd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPDrr_REV, X86_INS_VMOVUPD: vmovupd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPSYmr, X86_INS_VMOVUPS: vmovups	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPSYrm, X86_INS_VMOVUPS: vmovups	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPSYrr, X86_INS_VMOVUPS: vmovups	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPSYrr_REV, X86_INS_VMOVUPS: vmovups	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPSZ128mr, X86_INS_VMOVUPS: vmovups	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSZ128mrk, X86_INS_VMOVUPS: vmovups	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSZ128rm, X86_INS_VMOVUPS: vmovups	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSZ128rmk, X86_INS_VMOVUPS: vmovups	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSZ128rmkz, X86_INS_VMOVUPS: vmovups	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSZ128rr, X86_INS_VMOVUPS: vmovups	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSZ128rr_alt, X86_INS_VMOVUPS: vmovups	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSZ128rrk, X86_INS_VMOVUPS: vmovups	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSZ128rrk_alt, X86_INS_VMOVUPS: vmovups	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSZ128rrkz, X86_INS_VMOVUPS: vmovups	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSZ128rrkz_alt, X86_INS_VMOVUPS: vmovups	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSZ256mr, X86_INS_VMOVUPS: vmovups	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSZ256mrk, X86_INS_VMOVUPS: vmovups	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSZ256rm, X86_INS_VMOVUPS: vmovups	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSZ256rmk, X86_INS_VMOVUPS: vmovups	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSZ256rmkz, X86_INS_VMOVUPS: vmovups	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSZ256rr, X86_INS_VMOVUPS: vmovups	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSZ256rr_alt, X86_INS_VMOVUPS: vmovups	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSZ256rrk, X86_INS_VMOVUPS: vmovups	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSZ256rrk_alt, X86_INS_VMOVUPS: vmovups	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSZ256rrkz, X86_INS_VMOVUPS: vmovups	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSZ256rrkz_alt, X86_INS_VMOVUPS: vmovups	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSZmr, X86_INS_VMOVUPS: vmovups	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPSZmrk, X86_INS_VMOVUPS: vmovups	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSZrm, X86_INS_VMOVUPS: vmovups	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPSZrmk, X86_INS_VMOVUPS: vmovups	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPSZrmkz, X86_INS_VMOVUPS: vmovups	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSZrr, X86_INS_VMOVUPS: vmovups	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPSZrr_alt, X86_INS_VMOVUPS: vmovups	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPSZrrk, X86_INS_VMOVUPS: vmovups	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPSZrrk_alt, X86_INS_VMOVUPS: vmovups	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSZrrkz, X86_INS_VMOVUPS: vmovups	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSZrrkz_alt, X86_INS_VMOVUPS: vmovups	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMOVUPSmr, X86_INS_VMOVUPS: vmovups	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPSrm, X86_INS_VMOVUPS: vmovups	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPSrr, X86_INS_VMOVUPS: vmovups	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVUPSrr_REV, X86_INS_VMOVUPS: vmovups	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVZPQILo2PQIZrm, X86_INS_VMOVQ: vmovq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVZPQILo2PQIZrr, X86_INS_VMOVQ: vmovq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVZPQILo2PQIrm, X86_INS_VMOVQ: vmovq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVZPQILo2PQIrr, X86_INS_VMOVQ: vmovq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVZQI2PQIrm, X86_INS_VMOVQ: vmovq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMOVZQI2PQIrr, X86_INS_VMOVQ: vmovq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMPSADBWYrmi, X86_INS_VMPSADBW: vmpsadbw	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMPSADBWYrri, X86_INS_VMPSADBW: vmpsadbw	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMPSADBWrmi, X86_INS_VMPSADBW: vmpsadbw	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMPSADBWrri, X86_INS_VMPSADBW: vmpsadbw	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMPTRLDm, X86_INS_VMPTRLD: vmptrld	$vmcs */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMPTRSTm, X86_INS_VMPTRST: vmptrst	$vmcs */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMREAD32rm, X86_INS_VMREAD: vmread{l}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMREAD32rr, X86_INS_VMREAD: vmread{l}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMREAD64rm, X86_INS_VMREAD: vmread{q}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMREAD64rr, X86_INS_VMREAD: vmread{q}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMRESUME, X86_INS_VMRESUME: vmresume */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMRUN32, X86_INS_VMRUN: vmrun	eax */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMRUN64, X86_INS_VMRUN: vmrun	rax */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMSAVE32, X86_INS_VMSAVE: vmsave	eax */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMSAVE64, X86_INS_VMSAVE: vmsave	rax */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMULPDYrm, X86_INS_VMULPD: vmulpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMULPDYrr, X86_INS_VMULPD: vmulpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMULPDZ128rm, X86_INS_VMULPD: vmulpd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPDZ128rmb, X86_INS_VMULPD: vmulpd	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPDZ128rmbk, X86_INS_VMULPD: vmulpd	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPDZ128rmbkz, X86_INS_VMULPD: vmulpd	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPDZ128rmk, X86_INS_VMULPD: vmulpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPDZ128rmkz, X86_INS_VMULPD: vmulpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPDZ128rr, X86_INS_VMULPD: vmulpd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPDZ128rrk, X86_INS_VMULPD: vmulpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPDZ128rrkz, X86_INS_VMULPD: vmulpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPDZ256rm, X86_INS_VMULPD: vmulpd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPDZ256rmb, X86_INS_VMULPD: vmulpd	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPDZ256rmbk, X86_INS_VMULPD: vmulpd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPDZ256rmbkz, X86_INS_VMULPD: vmulpd	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPDZ256rmk, X86_INS_VMULPD: vmulpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPDZ256rmkz, X86_INS_VMULPD: vmulpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPDZ256rr, X86_INS_VMULPD: vmulpd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPDZ256rrk, X86_INS_VMULPD: vmulpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPDZ256rrkz, X86_INS_VMULPD: vmulpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPDZrb, X86_INS_VMULPD: vmulpd	$dst , $src1, $src2, $rc */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMULPDZrbk, X86_INS_VMULPD: vmulpd	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMULPDZrbkz, X86_INS_VMULPD: vmulpd	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMULPDZrm, X86_INS_VMULPD: vmulpd	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMULPDZrmb, X86_INS_VMULPD: vmulpd	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMULPDZrmbk, X86_INS_VMULPD: vmulpd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMULPDZrmbkz, X86_INS_VMULPD: vmulpd	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMULPDZrmk, X86_INS_VMULPD: vmulpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMULPDZrmkz, X86_INS_VMULPD: vmulpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMULPDZrr, X86_INS_VMULPD: vmulpd	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMULPDZrrk, X86_INS_VMULPD: vmulpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMULPDZrrkz, X86_INS_VMULPD: vmulpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMULPDrm, X86_INS_VMULPD: vmulpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMULPDrr, X86_INS_VMULPD: vmulpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMULPSYrm, X86_INS_VMULPS: vmulps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMULPSYrr, X86_INS_VMULPS: vmulps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMULPSZ128rm, X86_INS_VMULPS: vmulps	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPSZ128rmb, X86_INS_VMULPS: vmulps	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPSZ128rmbk, X86_INS_VMULPS: vmulps	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPSZ128rmbkz, X86_INS_VMULPS: vmulps	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPSZ128rmk, X86_INS_VMULPS: vmulps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPSZ128rmkz, X86_INS_VMULPS: vmulps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPSZ128rr, X86_INS_VMULPS: vmulps	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPSZ128rrk, X86_INS_VMULPS: vmulps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPSZ128rrkz, X86_INS_VMULPS: vmulps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPSZ256rm, X86_INS_VMULPS: vmulps	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPSZ256rmb, X86_INS_VMULPS: vmulps	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPSZ256rmbk, X86_INS_VMULPS: vmulps	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPSZ256rmbkz, X86_INS_VMULPS: vmulps	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPSZ256rmk, X86_INS_VMULPS: vmulps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPSZ256rmkz, X86_INS_VMULPS: vmulps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPSZ256rr, X86_INS_VMULPS: vmulps	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPSZ256rrk, X86_INS_VMULPS: vmulps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPSZ256rrkz, X86_INS_VMULPS: vmulps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULPSZrb, X86_INS_VMULPS: vmulps	$dst , $src1, $src2, $rc */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMULPSZrbk, X86_INS_VMULPS: vmulps	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMULPSZrbkz, X86_INS_VMULPS: vmulps	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMULPSZrm, X86_INS_VMULPS: vmulps	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMULPSZrmb, X86_INS_VMULPS: vmulps	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMULPSZrmbk, X86_INS_VMULPS: vmulps	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMULPSZrmbkz, X86_INS_VMULPS: vmulps	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMULPSZrmk, X86_INS_VMULPS: vmulps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMULPSZrmkz, X86_INS_VMULPS: vmulps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMULPSZrr, X86_INS_VMULPS: vmulps	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMULPSZrrk, X86_INS_VMULPS: vmulps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMULPSZrrkz, X86_INS_VMULPS: vmulps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VMULPSrm, X86_INS_VMULPS: vmulps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMULPSrr, X86_INS_VMULPS: vmulps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMULSDZrm, X86_INS_VMULSD: vmulsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMULSDZrm_Int, X86_INS_VMULSD: vmulsd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULSDZrm_Intk, X86_INS_VMULSD: vmulsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULSDZrm_Intkz, X86_INS_VMULSD: vmulsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULSDZrr, X86_INS_VMULSD: vmulsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMULSDZrr_Int, X86_INS_VMULSD: vmulsd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULSDZrr_Intk, X86_INS_VMULSD: vmulsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULSDZrr_Intkz, X86_INS_VMULSD: vmulsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULSDZrrb, X86_INS_VMULSD: vmulsd	$dst , $src1, $src2, $rc */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULSDZrrbk, X86_INS_VMULSD: vmulsd	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULSDZrrbkz, X86_INS_VMULSD: vmulsd	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULSDrm, X86_INS_VMULSD: vmulsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMULSDrm_Int, X86_INS_VMULSD: vmulsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMULSDrr, X86_INS_VMULSD: vmulsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMULSDrr_Int, X86_INS_VMULSD: vmulsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMULSSZrm, X86_INS_VMULSS: vmulss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMULSSZrm_Int, X86_INS_VMULSS: vmulss	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULSSZrm_Intk, X86_INS_VMULSS: vmulss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULSSZrm_Intkz, X86_INS_VMULSS: vmulss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULSSZrr, X86_INS_VMULSS: vmulss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMULSSZrr_Int, X86_INS_VMULSS: vmulss	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULSSZrr_Intk, X86_INS_VMULSS: vmulss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULSSZrr_Intkz, X86_INS_VMULSS: vmulss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULSSZrrb, X86_INS_VMULSS: vmulss	$dst , $src1, $src2, $rc */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULSSZrrbk, X86_INS_VMULSS: vmulss	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULSSZrrbkz, X86_INS_VMULSS: vmulss	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMULSSrm, X86_INS_VMULSS: vmulss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMULSSrm_Int, X86_INS_VMULSS: vmulss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMULSSrr, X86_INS_VMULSS: vmulss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMULSSrr_Int, X86_INS_VMULSS: vmulss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMWRITE32rm, X86_INS_VMWRITE: vmwrite{l}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMWRITE32rr, X86_INS_VMWRITE: vmwrite{l}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMWRITE64rm, X86_INS_VMWRITE: vmwrite{q}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMWRITE64rr, X86_INS_VMWRITE: vmwrite{q}	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VMXOFF, X86_INS_VMXOFF: vmxoff */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VMXON, X86_INS_VMXON: vmxon	$vmxon */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VORPDYrm, X86_INS_VORPD: vorpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VORPDYrr, X86_INS_VORPD: vorpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VORPDrm, X86_INS_VORPD: vorpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VORPDrr, X86_INS_VORPD: vorpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VORPSYrm, X86_INS_VORPS: vorps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VORPSYrr, X86_INS_VORPS: vorps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VORPSrm, X86_INS_VORPS: vorps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VORPSrr, X86_INS_VORPS: vorps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPABSBrm128, X86_INS_VPABSB: vpabsb	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPABSBrm256, X86_INS_VPABSB: vpabsb	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPABSBrr128, X86_INS_VPABSB: vpabsb	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPABSBrr256, X86_INS_VPABSB: vpabsb	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPABSDZrm, X86_INS_VPABSD: vpabsd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPABSDZrmb, X86_INS_VPABSD: vpabsd	{${src}{1to16}, $dst|$dst, ${src}{1to16}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPABSDZrmbk, X86_INS_VPABSD: vpabsd	{${src}{1to16}, $dst {${mask}}|$dst {${mask}}, ${src}{1to16}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPABSDZrmbkz, X86_INS_VPABSD: vpabsd	{${src}{1to16}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to16}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPABSDZrmk, X86_INS_VPABSD: vpabsd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPABSDZrmkz, X86_INS_VPABSD: vpabsd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPABSDZrr, X86_INS_VPABSD: vpabsd	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPABSDZrrk, X86_INS_VPABSD: vpabsd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPABSDZrrkz, X86_INS_VPABSD: vpabsd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPABSDrm128, X86_INS_VPABSD: vpabsd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPABSDrm256, X86_INS_VPABSD: vpabsd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPABSDrr128, X86_INS_VPABSD: vpabsd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPABSDrr256, X86_INS_VPABSD: vpabsd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPABSQZrm, X86_INS_VPABSQ: vpabsq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPABSQZrmb, X86_INS_VPABSQ: vpabsq	{${src}{1to8}, $dst|$dst, ${src}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPABSQZrmbk, X86_INS_VPABSQ: vpabsq	{${src}{1to8}, $dst {${mask}}|$dst {${mask}}, ${src}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPABSQZrmbkz, X86_INS_VPABSQ: vpabsq	{${src}{1to8}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPABSQZrmk, X86_INS_VPABSQ: vpabsq	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPABSQZrmkz, X86_INS_VPABSQ: vpabsq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPABSQZrr, X86_INS_VPABSQ: vpabsq	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPABSQZrrk, X86_INS_VPABSQ: vpabsq	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPABSQZrrkz, X86_INS_VPABSQ: vpabsq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPABSWrm128, X86_INS_VPABSW: vpabsw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPABSWrm256, X86_INS_VPABSW: vpabsw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPABSWrr128, X86_INS_VPABSW: vpabsw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPABSWrr256, X86_INS_VPABSW: vpabsw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPACKSSDWYrm, X86_INS_VPACKSSDW: vpackssdw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPACKSSDWYrr, X86_INS_VPACKSSDW: vpackssdw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPACKSSDWrm, X86_INS_VPACKSSDW: vpackssdw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPACKSSDWrr, X86_INS_VPACKSSDW: vpackssdw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPACKSSWBYrm, X86_INS_VPACKSSWB: vpacksswb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPACKSSWBYrr, X86_INS_VPACKSSWB: vpacksswb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPACKSSWBrm, X86_INS_VPACKSSWB: vpacksswb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPACKSSWBrr, X86_INS_VPACKSSWB: vpacksswb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPACKUSDWYrm, X86_INS_VPACKUSDW: vpackusdw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPACKUSDWYrr, X86_INS_VPACKUSDW: vpackusdw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPACKUSDWrm, X86_INS_VPACKUSDW: vpackusdw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPACKUSDWrr, X86_INS_VPACKUSDW: vpackusdw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPACKUSWBYrm, X86_INS_VPACKUSWB: vpackuswb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPACKUSWBYrr, X86_INS_VPACKUSWB: vpackuswb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPACKUSWBrm, X86_INS_VPACKUSWB: vpackuswb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPACKUSWBrr, X86_INS_VPACKUSWB: vpackuswb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDBYrm, X86_INS_VPADDB: vpaddb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDBYrr, X86_INS_VPADDB: vpaddb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDBZ128rm, X86_INS_VPADDB: vpaddb	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDBZ128rmk, X86_INS_VPADDB: vpaddb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDBZ128rmkz, X86_INS_VPADDB: vpaddb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDBZ128rr, X86_INS_VPADDB: vpaddb	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDBZ128rrk, X86_INS_VPADDB: vpaddb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDBZ128rrkz, X86_INS_VPADDB: vpaddb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDBZ256rm, X86_INS_VPADDB: vpaddb	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDBZ256rmk, X86_INS_VPADDB: vpaddb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDBZ256rmkz, X86_INS_VPADDB: vpaddb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDBZ256rr, X86_INS_VPADDB: vpaddb	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDBZ256rrk, X86_INS_VPADDB: vpaddb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDBZ256rrkz, X86_INS_VPADDB: vpaddb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDBZrm, X86_INS_VPADDB: vpaddb	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPADDBZrmk, X86_INS_VPADDB: vpaddb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPADDBZrmkz, X86_INS_VPADDB: vpaddb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPADDBZrr, X86_INS_VPADDB: vpaddb	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDBZrrk, X86_INS_VPADDB: vpaddb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPADDBZrrkz, X86_INS_VPADDB: vpaddb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPADDBrm, X86_INS_VPADDB: vpaddb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDBrr, X86_INS_VPADDB: vpaddb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDDYrm, X86_INS_VPADDD: vpaddd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDDYrr, X86_INS_VPADDD: vpaddd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDDZ128rm, X86_INS_VPADDD: vpaddd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDDZ128rmb, X86_INS_VPADDD: vpaddd	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDDZ128rmbk, X86_INS_VPADDD: vpaddd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDDZ128rmbkz, X86_INS_VPADDD: vpaddd	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDDZ128rmk, X86_INS_VPADDD: vpaddd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDDZ128rmkz, X86_INS_VPADDD: vpaddd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDDZ128rr, X86_INS_VPADDD: vpaddd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDDZ128rrk, X86_INS_VPADDD: vpaddd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDDZ128rrkz, X86_INS_VPADDD: vpaddd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDDZ256rm, X86_INS_VPADDD: vpaddd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDDZ256rmb, X86_INS_VPADDD: vpaddd	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDDZ256rmbk, X86_INS_VPADDD: vpaddd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDDZ256rmbkz, X86_INS_VPADDD: vpaddd	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDDZ256rmk, X86_INS_VPADDD: vpaddd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDDZ256rmkz, X86_INS_VPADDD: vpaddd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDDZ256rr, X86_INS_VPADDD: vpaddd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDDZ256rrk, X86_INS_VPADDD: vpaddd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDDZ256rrkz, X86_INS_VPADDD: vpaddd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDDZrm, X86_INS_VPADDD: vpaddd	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDDZrmb, X86_INS_VPADDD: vpaddd	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDDZrmbk, X86_INS_VPADDD: vpaddd	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPADDDZrmbkz, X86_INS_VPADDD: vpaddd	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPADDDZrmk, X86_INS_VPADDD: vpaddd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPADDDZrmkz, X86_INS_VPADDD: vpaddd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPADDDZrr, X86_INS_VPADDD: vpaddd	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDDZrrk, X86_INS_VPADDD: vpaddd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPADDDZrrkz, X86_INS_VPADDD: vpaddd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPADDDrm, X86_INS_VPADDD: vpaddd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDDrr, X86_INS_VPADDD: vpaddd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDQYrm, X86_INS_VPADDQ: vpaddq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDQYrr, X86_INS_VPADDQ: vpaddq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDQZ128rm, X86_INS_VPADDQ: vpaddq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDQZ128rmb, X86_INS_VPADDQ: vpaddq	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDQZ128rmbk, X86_INS_VPADDQ: vpaddq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDQZ128rmbkz, X86_INS_VPADDQ: vpaddq	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDQZ128rmk, X86_INS_VPADDQ: vpaddq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDQZ128rmkz, X86_INS_VPADDQ: vpaddq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDQZ128rr, X86_INS_VPADDQ: vpaddq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDQZ128rrk, X86_INS_VPADDQ: vpaddq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDQZ128rrkz, X86_INS_VPADDQ: vpaddq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDQZ256rm, X86_INS_VPADDQ: vpaddq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDQZ256rmb, X86_INS_VPADDQ: vpaddq	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDQZ256rmbk, X86_INS_VPADDQ: vpaddq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDQZ256rmbkz, X86_INS_VPADDQ: vpaddq	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDQZ256rmk, X86_INS_VPADDQ: vpaddq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDQZ256rmkz, X86_INS_VPADDQ: vpaddq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDQZ256rr, X86_INS_VPADDQ: vpaddq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDQZ256rrk, X86_INS_VPADDQ: vpaddq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDQZ256rrkz, X86_INS_VPADDQ: vpaddq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDQZrm, X86_INS_VPADDQ: vpaddq	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDQZrmb, X86_INS_VPADDQ: vpaddq	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDQZrmbk, X86_INS_VPADDQ: vpaddq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPADDQZrmbkz, X86_INS_VPADDQ: vpaddq	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPADDQZrmk, X86_INS_VPADDQ: vpaddq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPADDQZrmkz, X86_INS_VPADDQ: vpaddq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPADDQZrr, X86_INS_VPADDQ: vpaddq	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDQZrrk, X86_INS_VPADDQ: vpaddq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPADDQZrrkz, X86_INS_VPADDQ: vpaddq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPADDQrm, X86_INS_VPADDQ: vpaddq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDQrr, X86_INS_VPADDQ: vpaddq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDSBYrm, X86_INS_VPADDSB: vpaddsb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDSBYrr, X86_INS_VPADDSB: vpaddsb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDSBrm, X86_INS_VPADDSB: vpaddsb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDSBrr, X86_INS_VPADDSB: vpaddsb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDSWYrm, X86_INS_VPADDSW: vpaddsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDSWYrr, X86_INS_VPADDSW: vpaddsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDSWrm, X86_INS_VPADDSW: vpaddsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDSWrr, X86_INS_VPADDSW: vpaddsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDUSBYrm, X86_INS_VPADDUSB: vpaddusb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDUSBYrr, X86_INS_VPADDUSB: vpaddusb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDUSBrm, X86_INS_VPADDUSB: vpaddusb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDUSBrr, X86_INS_VPADDUSB: vpaddusb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDUSWYrm, X86_INS_VPADDUSW: vpaddusw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDUSWYrr, X86_INS_VPADDUSW: vpaddusw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDUSWrm, X86_INS_VPADDUSW: vpaddusw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDUSWrr, X86_INS_VPADDUSW: vpaddusw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDWYrm, X86_INS_VPADDW: vpaddw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDWYrr, X86_INS_VPADDW: vpaddw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDWZ128rm, X86_INS_VPADDW: vpaddw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDWZ128rmk, X86_INS_VPADDW: vpaddw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDWZ128rmkz, X86_INS_VPADDW: vpaddw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDWZ128rr, X86_INS_VPADDW: vpaddw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDWZ128rrk, X86_INS_VPADDW: vpaddw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDWZ128rrkz, X86_INS_VPADDW: vpaddw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDWZ256rm, X86_INS_VPADDW: vpaddw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDWZ256rmk, X86_INS_VPADDW: vpaddw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDWZ256rmkz, X86_INS_VPADDW: vpaddw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDWZ256rr, X86_INS_VPADDW: vpaddw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDWZ256rrk, X86_INS_VPADDW: vpaddw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDWZ256rrkz, X86_INS_VPADDW: vpaddw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPADDWZrm, X86_INS_VPADDW: vpaddw	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPADDWZrmk, X86_INS_VPADDW: vpaddw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPADDWZrmkz, X86_INS_VPADDW: vpaddw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPADDWZrr, X86_INS_VPADDW: vpaddw	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDWZrrk, X86_INS_VPADDW: vpaddw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPADDWZrrkz, X86_INS_VPADDW: vpaddw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPADDWrm, X86_INS_VPADDW: vpaddw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPADDWrr, X86_INS_VPADDW: vpaddw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPALIGNR128rm, X86_INS_VPALIGNR: vpalignr	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPALIGNR128rr, X86_INS_VPALIGNR: vpalignr	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPALIGNR256rm, X86_INS_VPALIGNR: vpalignr	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPALIGNR256rr, X86_INS_VPALIGNR: vpalignr	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPANDDZ128rm, X86_INS_VPANDD: vpandd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDDZ128rmb, X86_INS_VPANDD: vpandd	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDDZ128rmbk, X86_INS_VPANDD: vpandd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDDZ128rmbkz, X86_INS_VPANDD: vpandd	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDDZ128rmk, X86_INS_VPANDD: vpandd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDDZ128rmkz, X86_INS_VPANDD: vpandd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDDZ128rr, X86_INS_VPANDD: vpandd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDDZ128rrk, X86_INS_VPANDD: vpandd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDDZ128rrkz, X86_INS_VPANDD: vpandd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDDZ256rm, X86_INS_VPANDD: vpandd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDDZ256rmb, X86_INS_VPANDD: vpandd	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDDZ256rmbk, X86_INS_VPANDD: vpandd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDDZ256rmbkz, X86_INS_VPANDD: vpandd	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDDZ256rmk, X86_INS_VPANDD: vpandd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDDZ256rmkz, X86_INS_VPANDD: vpandd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDDZ256rr, X86_INS_VPANDD: vpandd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDDZ256rrk, X86_INS_VPANDD: vpandd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDDZ256rrkz, X86_INS_VPANDD: vpandd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDDZrm, X86_INS_VPANDD: vpandd	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPANDDZrmb, X86_INS_VPANDD: vpandd	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPANDDZrmbk, X86_INS_VPANDD: vpandd	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPANDDZrmbkz, X86_INS_VPANDD: vpandd	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPANDDZrmk, X86_INS_VPANDD: vpandd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPANDDZrmkz, X86_INS_VPANDD: vpandd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPANDDZrr, X86_INS_VPANDD: vpandd	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPANDDZrrk, X86_INS_VPANDD: vpandd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPANDDZrrkz, X86_INS_VPANDD: vpandd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPANDNDZ128rm, X86_INS_VPANDND: vpandnd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNDZ128rmb, X86_INS_VPANDND: vpandnd	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNDZ128rmbk, X86_INS_VPANDND: vpandnd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNDZ128rmbkz, X86_INS_VPANDND: vpandnd	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNDZ128rmk, X86_INS_VPANDND: vpandnd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNDZ128rmkz, X86_INS_VPANDND: vpandnd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNDZ128rr, X86_INS_VPANDND: vpandnd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNDZ128rrk, X86_INS_VPANDND: vpandnd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNDZ128rrkz, X86_INS_VPANDND: vpandnd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNDZ256rm, X86_INS_VPANDND: vpandnd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNDZ256rmb, X86_INS_VPANDND: vpandnd	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNDZ256rmbk, X86_INS_VPANDND: vpandnd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNDZ256rmbkz, X86_INS_VPANDND: vpandnd	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNDZ256rmk, X86_INS_VPANDND: vpandnd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNDZ256rmkz, X86_INS_VPANDND: vpandnd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNDZ256rr, X86_INS_VPANDND: vpandnd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNDZ256rrk, X86_INS_VPANDND: vpandnd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNDZ256rrkz, X86_INS_VPANDND: vpandnd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNDZrm, X86_INS_VPANDND: vpandnd	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPANDNDZrmb, X86_INS_VPANDND: vpandnd	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPANDNDZrmbk, X86_INS_VPANDND: vpandnd	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPANDNDZrmbkz, X86_INS_VPANDND: vpandnd	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPANDNDZrmk, X86_INS_VPANDND: vpandnd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPANDNDZrmkz, X86_INS_VPANDND: vpandnd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPANDNDZrr, X86_INS_VPANDND: vpandnd	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPANDNDZrrk, X86_INS_VPANDND: vpandnd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPANDNDZrrkz, X86_INS_VPANDND: vpandnd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPANDNQZ128rm, X86_INS_VPANDNQ: vpandnq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNQZ128rmb, X86_INS_VPANDNQ: vpandnq	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNQZ128rmbk, X86_INS_VPANDNQ: vpandnq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNQZ128rmbkz, X86_INS_VPANDNQ: vpandnq	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNQZ128rmk, X86_INS_VPANDNQ: vpandnq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNQZ128rmkz, X86_INS_VPANDNQ: vpandnq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNQZ128rr, X86_INS_VPANDNQ: vpandnq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNQZ128rrk, X86_INS_VPANDNQ: vpandnq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNQZ128rrkz, X86_INS_VPANDNQ: vpandnq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNQZ256rm, X86_INS_VPANDNQ: vpandnq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNQZ256rmb, X86_INS_VPANDNQ: vpandnq	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNQZ256rmbk, X86_INS_VPANDNQ: vpandnq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNQZ256rmbkz, X86_INS_VPANDNQ: vpandnq	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNQZ256rmk, X86_INS_VPANDNQ: vpandnq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNQZ256rmkz, X86_INS_VPANDNQ: vpandnq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNQZ256rr, X86_INS_VPANDNQ: vpandnq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNQZ256rrk, X86_INS_VPANDNQ: vpandnq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNQZ256rrkz, X86_INS_VPANDNQ: vpandnq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDNQZrm, X86_INS_VPANDNQ: vpandnq	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPANDNQZrmb, X86_INS_VPANDNQ: vpandnq	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPANDNQZrmbk, X86_INS_VPANDNQ: vpandnq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPANDNQZrmbkz, X86_INS_VPANDNQ: vpandnq	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPANDNQZrmk, X86_INS_VPANDNQ: vpandnq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPANDNQZrmkz, X86_INS_VPANDNQ: vpandnq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPANDNQZrr, X86_INS_VPANDNQ: vpandnq	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPANDNQZrrk, X86_INS_VPANDNQ: vpandnq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPANDNQZrrkz, X86_INS_VPANDNQ: vpandnq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPANDNYrm, X86_INS_VPANDN: vpandn	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPANDNYrr, X86_INS_VPANDN: vpandn	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPANDNrm, X86_INS_VPANDN: vpandn	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPANDNrr, X86_INS_VPANDN: vpandn	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPANDQZ128rm, X86_INS_VPANDQ: vpandq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDQZ128rmb, X86_INS_VPANDQ: vpandq	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDQZ128rmbk, X86_INS_VPANDQ: vpandq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDQZ128rmbkz, X86_INS_VPANDQ: vpandq	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDQZ128rmk, X86_INS_VPANDQ: vpandq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDQZ128rmkz, X86_INS_VPANDQ: vpandq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDQZ128rr, X86_INS_VPANDQ: vpandq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDQZ128rrk, X86_INS_VPANDQ: vpandq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDQZ128rrkz, X86_INS_VPANDQ: vpandq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDQZ256rm, X86_INS_VPANDQ: vpandq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDQZ256rmb, X86_INS_VPANDQ: vpandq	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDQZ256rmbk, X86_INS_VPANDQ: vpandq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDQZ256rmbkz, X86_INS_VPANDQ: vpandq	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDQZ256rmk, X86_INS_VPANDQ: vpandq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDQZ256rmkz, X86_INS_VPANDQ: vpandq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDQZ256rr, X86_INS_VPANDQ: vpandq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDQZ256rrk, X86_INS_VPANDQ: vpandq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDQZ256rrkz, X86_INS_VPANDQ: vpandq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPANDQZrm, X86_INS_VPANDQ: vpandq	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPANDQZrmb, X86_INS_VPANDQ: vpandq	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPANDQZrmbk, X86_INS_VPANDQ: vpandq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPANDQZrmbkz, X86_INS_VPANDQ: vpandq	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPANDQZrmk, X86_INS_VPANDQ: vpandq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPANDQZrmkz, X86_INS_VPANDQ: vpandq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPANDQZrr, X86_INS_VPANDQ: vpandq	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPANDQZrrk, X86_INS_VPANDQ: vpandq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPANDQZrrkz, X86_INS_VPANDQ: vpandq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPANDYrm, X86_INS_VPAND: vpand	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPANDYrr, X86_INS_VPAND: vpand	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPANDrm, X86_INS_VPAND: vpand	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPANDrr, X86_INS_VPAND: vpand	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPAVGBYrm, X86_INS_VPAVGB: vpavgb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPAVGBYrr, X86_INS_VPAVGB: vpavgb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPAVGBrm, X86_INS_VPAVGB: vpavgb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPAVGBrr, X86_INS_VPAVGB: vpavgb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPAVGWYrm, X86_INS_VPAVGW: vpavgw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPAVGWYrr, X86_INS_VPAVGW: vpavgw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPAVGWrm, X86_INS_VPAVGW: vpavgw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPAVGWrr, X86_INS_VPAVGW: vpavgw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBLENDDYrmi, X86_INS_VPBLENDD: vpblendd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBLENDDYrri, X86_INS_VPBLENDD: vpblendd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBLENDDrmi, X86_INS_VPBLENDD: vpblendd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBLENDDrri, X86_INS_VPBLENDD: vpblendd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBLENDMBZ128rm, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMBZ128rmk, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMBZ128rmkz, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMBZ128rr, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMBZ128rrk, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMBZ128rrkz, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMBZ256rm, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMBZ256rmk, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMBZ256rmkz, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMBZ256rr, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMBZ256rrk, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMBZ256rrkz, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMBZrm, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_NOREG, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPBLENDMBZrmk, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPBLENDMBZrmkz, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPBLENDMBZrr, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPBLENDMBZrrk, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPBLENDMBZrrkz, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPBLENDMDZ128rm, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMDZ128rmb, X86_INS_VPBLENDMD: vpblendmd	{${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMDZ128rmbk, X86_INS_VPBLENDMD: vpblendmd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMDZ128rmk, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMDZ128rmkz, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMDZ128rr, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMDZ128rrk, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMDZ128rrkz, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMDZ256rm, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMDZ256rmb, X86_INS_VPBLENDMD: vpblendmd	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMDZ256rmbk, X86_INS_VPBLENDMD: vpblendmd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMDZ256rmk, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMDZ256rmkz, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMDZ256rr, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMDZ256rrk, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMDZ256rrkz, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMDZrm, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBLENDMDZrmb, X86_INS_VPBLENDMD: vpblendmd	{${src2}{1to16}, $src1, $dst|$dst, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPBLENDMDZrmbk, X86_INS_VPBLENDMD: vpblendmd	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPBLENDMDZrmk, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPBLENDMDZrmkz, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPBLENDMDZrr, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBLENDMDZrrk, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPBLENDMDZrrkz, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPBLENDMQZ128rm, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMQZ128rmb, X86_INS_VPBLENDMQ: vpblendmq	{${src2}{1to2}, $src1, $dst|$dst, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMQZ128rmbk, X86_INS_VPBLENDMQ: vpblendmq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMQZ128rmk, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMQZ128rmkz, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMQZ128rr, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMQZ128rrk, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMQZ128rrkz, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMQZ256rm, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMQZ256rmb, X86_INS_VPBLENDMQ: vpblendmq	{${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMQZ256rmbk, X86_INS_VPBLENDMQ: vpblendmq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMQZ256rmk, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMQZ256rmkz, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMQZ256rr, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMQZ256rrk, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMQZ256rrkz, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMQZrm, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBLENDMQZrmb, X86_INS_VPBLENDMQ: vpblendmq	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPBLENDMQZrmbk, X86_INS_VPBLENDMQ: vpblendmq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPBLENDMQZrmk, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPBLENDMQZrmkz, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPBLENDMQZrr, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBLENDMQZrrk, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPBLENDMQZrrkz, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPBLENDMWZ128rm, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMWZ128rmk, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMWZ128rmkz, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMWZ128rr, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMWZ128rrk, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMWZ128rrkz, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMWZ256rm, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMWZ256rmk, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMWZ256rmkz, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMWZ256rr, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMWZ256rrk, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMWZ256rrkz, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBLENDMWZrm, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_NOREG, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPBLENDMWZrmk, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPBLENDMWZrmkz, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPBLENDMWZrr, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPBLENDMWZrrk, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPBLENDMWZrrkz, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPBLENDVBYrm, X86_INS_VPBLENDVB: vpblendvb	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBLENDVBYrr, X86_INS_VPBLENDVB: vpblendvb	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBLENDVBrm, X86_INS_VPBLENDVB: vpblendvb	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBLENDVBrr, X86_INS_VPBLENDVB: vpblendvb	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBLENDWYrmi, X86_INS_VPBLENDW: vpblendw	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBLENDWYrri, X86_INS_VPBLENDW: vpblendw	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBLENDWrmi, X86_INS_VPBLENDW: vpblendw	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBLENDWrri, X86_INS_VPBLENDW: vpblendw	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTBYrm, X86_INS_VPBROADCASTB: vpbroadcastb	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTBYrr, X86_INS_VPBROADCASTB: vpbroadcastb	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTBrZ128r, X86_INS_VPBROADCASTB: vpbroadcastb	$dst , $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTBrZ128rk, X86_INS_VPBROADCASTB: vpbroadcastb	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBROADCASTBrZ128rkz, X86_INS_VPBROADCASTB: vpbroadcastb	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBROADCASTBrZ256r, X86_INS_VPBROADCASTB: vpbroadcastb	$dst , $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTBrZ256rk, X86_INS_VPBROADCASTB: vpbroadcastb	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBROADCASTBrZ256rkz, X86_INS_VPBROADCASTB: vpbroadcastb	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBROADCASTBrZr, X86_INS_VPBROADCASTB: vpbroadcastb	$dst , $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTBrZrk, X86_INS_VPBROADCASTB: vpbroadcastb	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBROADCASTBrZrkz, X86_INS_VPBROADCASTB: vpbroadcastb	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBROADCASTBrm, X86_INS_VPBROADCASTB: vpbroadcastb	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTBrr, X86_INS_VPBROADCASTB: vpbroadcastb	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTDYrm, X86_INS_VPBROADCASTD: vpbroadcastd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTDYrr, X86_INS_VPBROADCASTD: vpbroadcastd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTDZkrm, X86_INS_VPBROADCASTD: vpbroadcastd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTDZkrr, X86_INS_VPBROADCASTD: vpbroadcastd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTDZrm, X86_INS_VPBROADCASTD: vpbroadcastd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTDZrr, X86_INS_VPBROADCASTD: vpbroadcastd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTDrZ128r, X86_INS_VPBROADCASTD: vpbroadcastd	$dst , $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTDrZ128rk, X86_INS_VPBROADCASTD: vpbroadcastd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBROADCASTDrZ128rkz, X86_INS_VPBROADCASTD: vpbroadcastd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBROADCASTDrZ256r, X86_INS_VPBROADCASTD: vpbroadcastd	$dst , $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTDrZ256rk, X86_INS_VPBROADCASTD: vpbroadcastd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBROADCASTDrZ256rkz, X86_INS_VPBROADCASTD: vpbroadcastd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBROADCASTDrZr, X86_INS_VPBROADCASTD: vpbroadcastd	$dst , $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTDrZrk, X86_INS_VPBROADCASTD: vpbroadcastd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBROADCASTDrZrkz, X86_INS_VPBROADCASTD: vpbroadcastd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBROADCASTDrm, X86_INS_VPBROADCASTD: vpbroadcastd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTDrr, X86_INS_VPBROADCASTD: vpbroadcastd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTMB2QZ128rr, X86_INS_VPBROADCASTMB2Q: vpbroadcastmb2q	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTMB2QZ256rr, X86_INS_VPBROADCASTMB2Q: vpbroadcastmb2q	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTMB2QZrr, X86_INS_VPBROADCASTMB2Q: vpbroadcastmb2q	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTMW2DZ128rr, X86_INS_VPBROADCASTMW2D: vpbroadcastmw2d	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTMW2DZ256rr, X86_INS_VPBROADCASTMW2D: vpbroadcastmw2d	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTMW2DZrr, X86_INS_VPBROADCASTMW2D: vpbroadcastmw2d	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTQYrm, X86_INS_VPBROADCASTQ: vpbroadcastq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTQYrr, X86_INS_VPBROADCASTQ: vpbroadcastq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTQZkrm, X86_INS_VPBROADCASTQ: vpbroadcastq	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTQZkrr, X86_INS_VPBROADCASTQ: vpbroadcastq	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTQZrm, X86_INS_VPBROADCASTQ: vpbroadcastq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTQZrr, X86_INS_VPBROADCASTQ: vpbroadcastq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTQrZ128r, X86_INS_VPBROADCASTQ: vpbroadcastq	$dst , $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTQrZ128rk, X86_INS_VPBROADCASTQ: vpbroadcastq	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBROADCASTQrZ128rkz, X86_INS_VPBROADCASTQ: vpbroadcastq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBROADCASTQrZ256r, X86_INS_VPBROADCASTQ: vpbroadcastq	$dst , $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTQrZ256rk, X86_INS_VPBROADCASTQ: vpbroadcastq	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBROADCASTQrZ256rkz, X86_INS_VPBROADCASTQ: vpbroadcastq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBROADCASTQrZr, X86_INS_VPBROADCASTQ: vpbroadcastq	$dst , $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTQrZrk, X86_INS_VPBROADCASTQ: vpbroadcastq	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBROADCASTQrZrkz, X86_INS_VPBROADCASTQ: vpbroadcastq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBROADCASTQrm, X86_INS_VPBROADCASTQ: vpbroadcastq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTQrr, X86_INS_VPBROADCASTQ: vpbroadcastq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTWYrm, X86_INS_VPBROADCASTW: vpbroadcastw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTWYrr, X86_INS_VPBROADCASTW: vpbroadcastw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTWrZ128r, X86_INS_VPBROADCASTW: vpbroadcastw	$dst , $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTWrZ128rk, X86_INS_VPBROADCASTW: vpbroadcastw	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBROADCASTWrZ128rkz, X86_INS_VPBROADCASTW: vpbroadcastw	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBROADCASTWrZ256r, X86_INS_VPBROADCASTW: vpbroadcastw	$dst , $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTWrZ256rk, X86_INS_VPBROADCASTW: vpbroadcastw	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBROADCASTWrZ256rkz, X86_INS_VPBROADCASTW: vpbroadcastw	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBROADCASTWrZr, X86_INS_VPBROADCASTW: vpbroadcastw	$dst , $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTWrZrk, X86_INS_VPBROADCASTW: vpbroadcastw	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBROADCASTWrZrkz, X86_INS_VPBROADCASTW: vpbroadcastw	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPBROADCASTWrm, X86_INS_VPBROADCASTW: vpbroadcastw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPBROADCASTWrr, X86_INS_VPBROADCASTW: vpbroadcastw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCLMULQDQrm, X86_INS_VPCLMULQDQ: vpclmulqdq	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCLMULQDQrr, X86_INS_VPCLMULQDQ: vpclmulqdq	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMOVmr, X86_INS_VPCMOV: vpcmov	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMOVmrY, X86_INS_VPCMOV: vpcmov	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMOVrm, X86_INS_VPCMOV: vpcmov	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMOVrmY, X86_INS_VPCMOV: vpcmov	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMOVrr, X86_INS_VPCMOV: vpcmov	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMOVrrY, X86_INS_VPCMOV: vpcmov	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPBZ128rmi, X86_INS_VPCMPB: vpcmp${cc}b	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPBZ128rmi_alt, X86_INS_VPCMPB: vpcmpb	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPBZ128rmik, X86_INS_VPCMPB: vpcmp${cc}b	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPBZ128rmik_alt, X86_INS_VPCMPB: vpcmpb	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPBZ128rri, X86_INS_VPCMPB: vpcmp${cc}b	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPBZ128rri_alt, X86_INS_VPCMPB: vpcmpb	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPBZ128rrik, X86_INS_VPCMPB: vpcmp${cc}b	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPBZ128rrik_alt, X86_INS_VPCMPB: vpcmpb	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPBZ256rmi, X86_INS_VPCMPB: vpcmp${cc}b	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPBZ256rmi_alt, X86_INS_VPCMPB: vpcmpb	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPBZ256rmik, X86_INS_VPCMPB: vpcmp${cc}b	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPBZ256rmik_alt, X86_INS_VPCMPB: vpcmpb	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPBZ256rri, X86_INS_VPCMPB: vpcmp${cc}b	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPBZ256rri_alt, X86_INS_VPCMPB: vpcmpb	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPBZ256rrik, X86_INS_VPCMPB: vpcmp${cc}b	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPBZ256rrik_alt, X86_INS_VPCMPB: vpcmpb	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPBZrmi, X86_INS_VPCMPB: vpcmp${cc}b	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPBZrmi_alt, X86_INS_VPCMPB: vpcmpb	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPBZrmik, X86_INS_VPCMPB: vpcmp${cc}b	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPBZrmik_alt, X86_INS_VPCMPB: vpcmpb	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPBZrri, X86_INS_VPCMPB: vpcmp${cc}b	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPBZrri_alt, X86_INS_VPCMPB: vpcmpb	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPBZrrik, X86_INS_VPCMPB: vpcmp${cc}b	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPBZrrik_alt, X86_INS_VPCMPB: vpcmpb	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPDZ128rmi, X86_INS_VPCMPD: vpcmp${cc}d	$dst, $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPDZ128rmi_alt, X86_INS_VPCMPD: vpcmpd	$dst, $src1, $src2, $cc */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPDZ128rmib, X86_INS_VPCMPD: vpcmp${cc}d	{${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPDZ128rmib_alt, X86_INS_VPCMPD: vpcmpd	{$cc, ${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPDZ128rmibk, X86_INS_VPCMPD: vpcmp${cc}d	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPDZ128rmibk_alt, X86_INS_VPCMPD: vpcmpd	{$cc, ${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPDZ128rmik, X86_INS_VPCMPD: vpcmp${cc}d	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPDZ128rmik_alt, X86_INS_VPCMPD: vpcmpd	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPDZ128rri, X86_INS_VPCMPD: vpcmp${cc}d	$dst, $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPDZ128rri_alt, X86_INS_VPCMPD: vpcmpd	$dst, $src1, $src2, $cc */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPDZ128rrik, X86_INS_VPCMPD: vpcmp${cc}d	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPDZ128rrik_alt, X86_INS_VPCMPD: vpcmpd	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPDZ256rmi, X86_INS_VPCMPD: vpcmp${cc}d	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPDZ256rmi_alt, X86_INS_VPCMPD: vpcmpd	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPDZ256rmib, X86_INS_VPCMPD: vpcmp${cc}d	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPDZ256rmib_alt, X86_INS_VPCMPD: vpcmpd	{$cc, ${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPDZ256rmibk, X86_INS_VPCMPD: vpcmp${cc}d	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPDZ256rmibk_alt, X86_INS_VPCMPD: vpcmpd	{$cc, ${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPDZ256rmik, X86_INS_VPCMPD: vpcmp${cc}d	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPDZ256rmik_alt, X86_INS_VPCMPD: vpcmpd	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPDZ256rri, X86_INS_VPCMPD: vpcmp${cc}d	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPDZ256rri_alt, X86_INS_VPCMPD: vpcmpd	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPDZ256rrik, X86_INS_VPCMPD: vpcmp${cc}d	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPDZ256rrik_alt, X86_INS_VPCMPD: vpcmpd	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPDZrmi, X86_INS_VPCMPD: vpcmp${cc}d	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPDZrmi_alt, X86_INS_VPCMPD: vpcmpd	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPDZrmib, X86_INS_VPCMPD: vpcmp${cc}d	{${src2}{1to16}, $src1, $dst|$dst, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPDZrmib_alt, X86_INS_VPCMPD: vpcmpd	{$cc, ${src2}{1to16}, $src1, $dst|$dst, $src1, ${src2}{1to16}, $cc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPDZrmibk, X86_INS_VPCMPD: vpcmp${cc}d	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPDZrmibk_alt, X86_INS_VPCMPD: vpcmpd	{$cc, ${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}, $cc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPDZrmik, X86_INS_VPCMPD: vpcmp${cc}d	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPDZrmik_alt, X86_INS_VPCMPD: vpcmpd	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPDZrri, X86_INS_VPCMPD: vpcmp${cc}d	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPDZrri_alt, X86_INS_VPCMPD: vpcmpd	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPDZrrik, X86_INS_VPCMPD: vpcmp${cc}d	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPDZrrik_alt, X86_INS_VPCMPD: vpcmpd	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPEQBYrm, X86_INS_VPCMPEQB: vpcmpeqb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPEQBYrr, X86_INS_VPCMPEQB: vpcmpeqb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPEQBZ128rm, X86_INS_VPCMPEQB: vpcmpeqb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPEQBZ128rmk, X86_INS_VPCMPEQB: vpcmpeqb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQBZ128rr, X86_INS_VPCMPEQB: vpcmpeqb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPEQBZ128rrk, X86_INS_VPCMPEQB: vpcmpeqb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQBZ256rm, X86_INS_VPCMPEQB: vpcmpeqb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPEQBZ256rmk, X86_INS_VPCMPEQB: vpcmpeqb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQBZ256rr, X86_INS_VPCMPEQB: vpcmpeqb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPEQBZ256rrk, X86_INS_VPCMPEQB: vpcmpeqb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQBZrm, X86_INS_VPCMPEQB: vpcmpeqb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPEQBZrmk, X86_INS_VPCMPEQB: vpcmpeqb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPEQBZrr, X86_INS_VPCMPEQB: vpcmpeqb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPEQBZrrk, X86_INS_VPCMPEQB: vpcmpeqb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPEQBrm, X86_INS_VPCMPEQB: vpcmpeqb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPEQBrr, X86_INS_VPCMPEQB: vpcmpeqb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPEQDYrm, X86_INS_VPCMPEQD: vpcmpeqd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPEQDYrr, X86_INS_VPCMPEQD: vpcmpeqd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPEQDZ128rm, X86_INS_VPCMPEQD: vpcmpeqd	$dst, $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQDZ128rmb, X86_INS_VPCMPEQD: vpcmpeqd	{${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQDZ128rmbk, X86_INS_VPCMPEQD: vpcmpeqd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQDZ128rmk, X86_INS_VPCMPEQD: vpcmpeqd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQDZ128rr, X86_INS_VPCMPEQD: vpcmpeqd	$dst, $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQDZ128rrk, X86_INS_VPCMPEQD: vpcmpeqd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQDZ256rm, X86_INS_VPCMPEQD: vpcmpeqd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPEQDZ256rmb, X86_INS_VPCMPEQD: vpcmpeqd	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQDZ256rmbk, X86_INS_VPCMPEQD: vpcmpeqd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQDZ256rmk, X86_INS_VPCMPEQD: vpcmpeqd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQDZ256rr, X86_INS_VPCMPEQD: vpcmpeqd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPEQDZ256rrk, X86_INS_VPCMPEQD: vpcmpeqd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQDZrm, X86_INS_VPCMPEQD: vpcmpeqd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPEQDZrmb, X86_INS_VPCMPEQD: vpcmpeqd	{${src2}{1to16}, $src1, $dst|$dst, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPEQDZrmbk, X86_INS_VPCMPEQD: vpcmpeqd	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPEQDZrmk, X86_INS_VPCMPEQD: vpcmpeqd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPEQDZrr, X86_INS_VPCMPEQD: vpcmpeqd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPEQDZrrk, X86_INS_VPCMPEQD: vpcmpeqd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPEQDrm, X86_INS_VPCMPEQD: vpcmpeqd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPEQDrr, X86_INS_VPCMPEQD: vpcmpeqd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPEQQYrm, X86_INS_VPCMPEQQ: vpcmpeqq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPEQQYrr, X86_INS_VPCMPEQQ: vpcmpeqq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPEQQZ128rm, X86_INS_VPCMPEQQ: vpcmpeqq	$dst, $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQQZ128rmb, X86_INS_VPCMPEQQ: vpcmpeqq	{${src2}{1to2}, $src1, $dst|$dst, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQQZ128rmbk, X86_INS_VPCMPEQQ: vpcmpeqq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQQZ128rmk, X86_INS_VPCMPEQQ: vpcmpeqq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQQZ128rr, X86_INS_VPCMPEQQ: vpcmpeqq	$dst, $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQQZ128rrk, X86_INS_VPCMPEQQ: vpcmpeqq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQQZ256rm, X86_INS_VPCMPEQQ: vpcmpeqq	$dst, $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQQZ256rmb, X86_INS_VPCMPEQQ: vpcmpeqq	{${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQQZ256rmbk, X86_INS_VPCMPEQQ: vpcmpeqq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQQZ256rmk, X86_INS_VPCMPEQQ: vpcmpeqq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQQZ256rr, X86_INS_VPCMPEQQ: vpcmpeqq	$dst, $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQQZ256rrk, X86_INS_VPCMPEQQ: vpcmpeqq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQQZrm, X86_INS_VPCMPEQQ: vpcmpeqq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPEQQZrmb, X86_INS_VPCMPEQQ: vpcmpeqq	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPEQQZrmbk, X86_INS_VPCMPEQQ: vpcmpeqq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPEQQZrmk, X86_INS_VPCMPEQQ: vpcmpeqq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPEQQZrr, X86_INS_VPCMPEQQ: vpcmpeqq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPEQQZrrk, X86_INS_VPCMPEQQ: vpcmpeqq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPEQQrm, X86_INS_VPCMPEQQ: vpcmpeqq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPEQQrr, X86_INS_VPCMPEQQ: vpcmpeqq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPEQWYrm, X86_INS_VPCMPEQW: vpcmpeqw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPEQWYrr, X86_INS_VPCMPEQW: vpcmpeqw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPEQWZ128rm, X86_INS_VPCMPEQW: vpcmpeqw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPEQWZ128rmk, X86_INS_VPCMPEQW: vpcmpeqw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQWZ128rr, X86_INS_VPCMPEQW: vpcmpeqw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPEQWZ128rrk, X86_INS_VPCMPEQW: vpcmpeqw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQWZ256rm, X86_INS_VPCMPEQW: vpcmpeqw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPEQWZ256rmk, X86_INS_VPCMPEQW: vpcmpeqw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQWZ256rr, X86_INS_VPCMPEQW: vpcmpeqw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPEQWZ256rrk, X86_INS_VPCMPEQW: vpcmpeqw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPEQWZrm, X86_INS_VPCMPEQW: vpcmpeqw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPEQWZrmk, X86_INS_VPCMPEQW: vpcmpeqw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPEQWZrr, X86_INS_VPCMPEQW: vpcmpeqw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPEQWZrrk, X86_INS_VPCMPEQW: vpcmpeqw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPEQWrm, X86_INS_VPCMPEQW: vpcmpeqw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPEQWrr, X86_INS_VPCMPEQW: vpcmpeqw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPESTRIrm, X86_INS_VPCMPESTRI: vpcmpestri	$src1, $src3, $src5 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPESTRIrr, X86_INS_VPCMPESTRI: vpcmpestri	$src1, $src3, $src5 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPESTRM128rm, X86_INS_VPCMPESTRM: vpcmpestrm	$src1, $src3, $src5 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPESTRM128rr, X86_INS_VPCMPESTRM: vpcmpestrm	$src1, $src3, $src5 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPGTBYrm, X86_INS_VPCMPGTB: vpcmpgtb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPGTBYrr, X86_INS_VPCMPGTB: vpcmpgtb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPGTBZ128rm, X86_INS_VPCMPGTB: vpcmpgtb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPGTBZ128rmk, X86_INS_VPCMPGTB: vpcmpgtb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTBZ128rr, X86_INS_VPCMPGTB: vpcmpgtb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPGTBZ128rrk, X86_INS_VPCMPGTB: vpcmpgtb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTBZ256rm, X86_INS_VPCMPGTB: vpcmpgtb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPGTBZ256rmk, X86_INS_VPCMPGTB: vpcmpgtb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTBZ256rr, X86_INS_VPCMPGTB: vpcmpgtb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPGTBZ256rrk, X86_INS_VPCMPGTB: vpcmpgtb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTBZrm, X86_INS_VPCMPGTB: vpcmpgtb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPGTBZrmk, X86_INS_VPCMPGTB: vpcmpgtb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPGTBZrr, X86_INS_VPCMPGTB: vpcmpgtb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPGTBZrrk, X86_INS_VPCMPGTB: vpcmpgtb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPGTBrm, X86_INS_VPCMPGTB: vpcmpgtb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPGTBrr, X86_INS_VPCMPGTB: vpcmpgtb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPGTDYrm, X86_INS_VPCMPGTD: vpcmpgtd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPGTDYrr, X86_INS_VPCMPGTD: vpcmpgtd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPGTDZ128rm, X86_INS_VPCMPGTD: vpcmpgtd	$dst, $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTDZ128rmb, X86_INS_VPCMPGTD: vpcmpgtd	{${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTDZ128rmbk, X86_INS_VPCMPGTD: vpcmpgtd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTDZ128rmk, X86_INS_VPCMPGTD: vpcmpgtd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTDZ128rr, X86_INS_VPCMPGTD: vpcmpgtd	$dst, $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTDZ128rrk, X86_INS_VPCMPGTD: vpcmpgtd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTDZ256rm, X86_INS_VPCMPGTD: vpcmpgtd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPGTDZ256rmb, X86_INS_VPCMPGTD: vpcmpgtd	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTDZ256rmbk, X86_INS_VPCMPGTD: vpcmpgtd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTDZ256rmk, X86_INS_VPCMPGTD: vpcmpgtd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTDZ256rr, X86_INS_VPCMPGTD: vpcmpgtd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPGTDZ256rrk, X86_INS_VPCMPGTD: vpcmpgtd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTDZrm, X86_INS_VPCMPGTD: vpcmpgtd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPGTDZrmb, X86_INS_VPCMPGTD: vpcmpgtd	{${src2}{1to16}, $src1, $dst|$dst, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPGTDZrmbk, X86_INS_VPCMPGTD: vpcmpgtd	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPGTDZrmk, X86_INS_VPCMPGTD: vpcmpgtd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPGTDZrr, X86_INS_VPCMPGTD: vpcmpgtd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPGTDZrrk, X86_INS_VPCMPGTD: vpcmpgtd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPGTDrm, X86_INS_VPCMPGTD: vpcmpgtd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPGTDrr, X86_INS_VPCMPGTD: vpcmpgtd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPGTQYrm, X86_INS_VPCMPGTQ: vpcmpgtq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPGTQYrr, X86_INS_VPCMPGTQ: vpcmpgtq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPGTQZ128rm, X86_INS_VPCMPGTQ: vpcmpgtq	$dst, $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTQZ128rmb, X86_INS_VPCMPGTQ: vpcmpgtq	{${src2}{1to2}, $src1, $dst|$dst, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTQZ128rmbk, X86_INS_VPCMPGTQ: vpcmpgtq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTQZ128rmk, X86_INS_VPCMPGTQ: vpcmpgtq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTQZ128rr, X86_INS_VPCMPGTQ: vpcmpgtq	$dst, $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTQZ128rrk, X86_INS_VPCMPGTQ: vpcmpgtq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTQZ256rm, X86_INS_VPCMPGTQ: vpcmpgtq	$dst, $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTQZ256rmb, X86_INS_VPCMPGTQ: vpcmpgtq	{${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTQZ256rmbk, X86_INS_VPCMPGTQ: vpcmpgtq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTQZ256rmk, X86_INS_VPCMPGTQ: vpcmpgtq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTQZ256rr, X86_INS_VPCMPGTQ: vpcmpgtq	$dst, $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTQZ256rrk, X86_INS_VPCMPGTQ: vpcmpgtq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTQZrm, X86_INS_VPCMPGTQ: vpcmpgtq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPGTQZrmb, X86_INS_VPCMPGTQ: vpcmpgtq	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPGTQZrmbk, X86_INS_VPCMPGTQ: vpcmpgtq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPGTQZrmk, X86_INS_VPCMPGTQ: vpcmpgtq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPGTQZrr, X86_INS_VPCMPGTQ: vpcmpgtq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPGTQZrrk, X86_INS_VPCMPGTQ: vpcmpgtq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPGTQrm, X86_INS_VPCMPGTQ: vpcmpgtq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPGTQrr, X86_INS_VPCMPGTQ: vpcmpgtq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPGTWYrm, X86_INS_VPCMPGTW: vpcmpgtw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPGTWYrr, X86_INS_VPCMPGTW: vpcmpgtw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPGTWZ128rm, X86_INS_VPCMPGTW: vpcmpgtw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPGTWZ128rmk, X86_INS_VPCMPGTW: vpcmpgtw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTWZ128rr, X86_INS_VPCMPGTW: vpcmpgtw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPGTWZ128rrk, X86_INS_VPCMPGTW: vpcmpgtw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTWZ256rm, X86_INS_VPCMPGTW: vpcmpgtw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPGTWZ256rmk, X86_INS_VPCMPGTW: vpcmpgtw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTWZ256rr, X86_INS_VPCMPGTW: vpcmpgtw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPGTWZ256rrk, X86_INS_VPCMPGTW: vpcmpgtw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPGTWZrm, X86_INS_VPCMPGTW: vpcmpgtw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPGTWZrmk, X86_INS_VPCMPGTW: vpcmpgtw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPGTWZrr, X86_INS_VPCMPGTW: vpcmpgtw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPGTWZrrk, X86_INS_VPCMPGTW: vpcmpgtw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPGTWrm, X86_INS_VPCMPGTW: vpcmpgtw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPGTWrr, X86_INS_VPCMPGTW: vpcmpgtw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPISTRIrm, X86_INS_VPCMPISTRI: vpcmpistri	$src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPISTRIrr, X86_INS_VPCMPISTRI: vpcmpistri	$src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPISTRM128rm, X86_INS_VPCMPISTRM: vpcmpistrm	$src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPISTRM128rr, X86_INS_VPCMPISTRM: vpcmpistrm	$src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPQZ128rmi, X86_INS_VPCMPQ: vpcmp${cc}q	$dst, $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPQZ128rmi_alt, X86_INS_VPCMPQ: vpcmpq	$dst, $src1, $src2, $cc */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPQZ128rmib, X86_INS_VPCMPQ: vpcmp${cc}q	{${src2}{1to2}, $src1, $dst|$dst, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPQZ128rmib_alt, X86_INS_VPCMPQ: vpcmpq	{$cc, ${src2}{1to2}, $src1, $dst|$dst, $src1, ${src2}{1to2}, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPQZ128rmibk, X86_INS_VPCMPQ: vpcmp${cc}q	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPQZ128rmibk_alt, X86_INS_VPCMPQ: vpcmpq	{$cc, ${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPQZ128rmik, X86_INS_VPCMPQ: vpcmp${cc}q	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPQZ128rmik_alt, X86_INS_VPCMPQ: vpcmpq	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPQZ128rri, X86_INS_VPCMPQ: vpcmp${cc}q	$dst, $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPQZ128rri_alt, X86_INS_VPCMPQ: vpcmpq	$dst, $src1, $src2, $cc */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPQZ128rrik, X86_INS_VPCMPQ: vpcmp${cc}q	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPQZ128rrik_alt, X86_INS_VPCMPQ: vpcmpq	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPQZ256rmi, X86_INS_VPCMPQ: vpcmp${cc}q	$dst, $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPQZ256rmi_alt, X86_INS_VPCMPQ: vpcmpq	$dst, $src1, $src2, $cc */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPQZ256rmib, X86_INS_VPCMPQ: vpcmp${cc}q	{${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPQZ256rmib_alt, X86_INS_VPCMPQ: vpcmpq	{$cc, ${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPQZ256rmibk, X86_INS_VPCMPQ: vpcmp${cc}q	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPQZ256rmibk_alt, X86_INS_VPCMPQ: vpcmpq	{$cc, ${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPQZ256rmik, X86_INS_VPCMPQ: vpcmp${cc}q	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPQZ256rmik_alt, X86_INS_VPCMPQ: vpcmpq	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPQZ256rri, X86_INS_VPCMPQ: vpcmp${cc}q	$dst, $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPQZ256rri_alt, X86_INS_VPCMPQ: vpcmpq	$dst, $src1, $src2, $cc */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPQZ256rrik, X86_INS_VPCMPQ: vpcmp${cc}q	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPQZ256rrik_alt, X86_INS_VPCMPQ: vpcmpq	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPQZrmi, X86_INS_VPCMPQ: vpcmp${cc}q	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPQZrmi_alt, X86_INS_VPCMPQ: vpcmpq	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPQZrmib, X86_INS_VPCMPQ: vpcmp${cc}q	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPQZrmib_alt, X86_INS_VPCMPQ: vpcmpq	{$cc, ${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}, $cc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPQZrmibk, X86_INS_VPCMPQ: vpcmp${cc}q	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPQZrmibk_alt, X86_INS_VPCMPQ: vpcmpq	{$cc, ${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}, $cc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPQZrmik, X86_INS_VPCMPQ: vpcmp${cc}q	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPQZrmik_alt, X86_INS_VPCMPQ: vpcmpq	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPQZrri, X86_INS_VPCMPQ: vpcmp${cc}q	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPQZrri_alt, X86_INS_VPCMPQ: vpcmpq	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPQZrrik, X86_INS_VPCMPQ: vpcmp${cc}q	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPQZrrik_alt, X86_INS_VPCMPQ: vpcmpq	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPUBZ128rmi, X86_INS_VPCMPUB: vpcmp${cc}ub	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPUBZ128rmi_alt, X86_INS_VPCMPUB: vpcmpub	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPUBZ128rmik, X86_INS_VPCMPUB: vpcmp${cc}ub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUBZ128rmik_alt, X86_INS_VPCMPUB: vpcmpub	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUBZ128rri, X86_INS_VPCMPUB: vpcmp${cc}ub	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPUBZ128rri_alt, X86_INS_VPCMPUB: vpcmpub	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPUBZ128rrik, X86_INS_VPCMPUB: vpcmp${cc}ub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUBZ128rrik_alt, X86_INS_VPCMPUB: vpcmpub	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUBZ256rmi, X86_INS_VPCMPUB: vpcmp${cc}ub	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPUBZ256rmi_alt, X86_INS_VPCMPUB: vpcmpub	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPUBZ256rmik, X86_INS_VPCMPUB: vpcmp${cc}ub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUBZ256rmik_alt, X86_INS_VPCMPUB: vpcmpub	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUBZ256rri, X86_INS_VPCMPUB: vpcmp${cc}ub	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPUBZ256rri_alt, X86_INS_VPCMPUB: vpcmpub	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPUBZ256rrik, X86_INS_VPCMPUB: vpcmp${cc}ub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUBZ256rrik_alt, X86_INS_VPCMPUB: vpcmpub	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUBZrmi, X86_INS_VPCMPUB: vpcmp${cc}ub	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPUBZrmi_alt, X86_INS_VPCMPUB: vpcmpub	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPUBZrmik, X86_INS_VPCMPUB: vpcmp${cc}ub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPUBZrmik_alt, X86_INS_VPCMPUB: vpcmpub	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPUBZrri, X86_INS_VPCMPUB: vpcmp${cc}ub	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPUBZrri_alt, X86_INS_VPCMPUB: vpcmpub	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPUBZrrik, X86_INS_VPCMPUB: vpcmp${cc}ub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPUBZrrik_alt, X86_INS_VPCMPUB: vpcmpub	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPUDZ128rmi, X86_INS_VPCMPUD: vpcmp${cc}ud	$dst, $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUDZ128rmi_alt, X86_INS_VPCMPUD: vpcmpud	$dst, $src1, $src2, $cc */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUDZ128rmib, X86_INS_VPCMPUD: vpcmp${cc}ud	{${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUDZ128rmib_alt, X86_INS_VPCMPUD: vpcmpud	{$cc, ${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUDZ128rmibk, X86_INS_VPCMPUD: vpcmp${cc}ud	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUDZ128rmibk_alt, X86_INS_VPCMPUD: vpcmpud	{$cc, ${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUDZ128rmik, X86_INS_VPCMPUD: vpcmp${cc}ud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUDZ128rmik_alt, X86_INS_VPCMPUD: vpcmpud	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUDZ128rri, X86_INS_VPCMPUD: vpcmp${cc}ud	$dst, $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUDZ128rri_alt, X86_INS_VPCMPUD: vpcmpud	$dst, $src1, $src2, $cc */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUDZ128rrik, X86_INS_VPCMPUD: vpcmp${cc}ud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUDZ128rrik_alt, X86_INS_VPCMPUD: vpcmpud	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUDZ256rmi, X86_INS_VPCMPUD: vpcmp${cc}ud	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPUDZ256rmi_alt, X86_INS_VPCMPUD: vpcmpud	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPUDZ256rmib, X86_INS_VPCMPUD: vpcmp${cc}ud	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUDZ256rmib_alt, X86_INS_VPCMPUD: vpcmpud	{$cc, ${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUDZ256rmibk, X86_INS_VPCMPUD: vpcmp${cc}ud	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUDZ256rmibk_alt, X86_INS_VPCMPUD: vpcmpud	{$cc, ${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUDZ256rmik, X86_INS_VPCMPUD: vpcmp${cc}ud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUDZ256rmik_alt, X86_INS_VPCMPUD: vpcmpud	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUDZ256rri, X86_INS_VPCMPUD: vpcmp${cc}ud	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPUDZ256rri_alt, X86_INS_VPCMPUD: vpcmpud	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPUDZ256rrik, X86_INS_VPCMPUD: vpcmp${cc}ud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUDZ256rrik_alt, X86_INS_VPCMPUD: vpcmpud	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUDZrmi, X86_INS_VPCMPUD: vpcmp${cc}ud	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPUDZrmi_alt, X86_INS_VPCMPUD: vpcmpud	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPUDZrmib, X86_INS_VPCMPUD: vpcmp${cc}ud	{${src2}{1to16}, $src1, $dst|$dst, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPUDZrmib_alt, X86_INS_VPCMPUD: vpcmpud	{$cc, ${src2}{1to16}, $src1, $dst|$dst, $src1, ${src2}{1to16}, $cc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPUDZrmibk, X86_INS_VPCMPUD: vpcmp${cc}ud	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPUDZrmibk_alt, X86_INS_VPCMPUD: vpcmpud	{$cc, ${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}, $cc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPUDZrmik, X86_INS_VPCMPUD: vpcmp${cc}ud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPUDZrmik_alt, X86_INS_VPCMPUD: vpcmpud	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPUDZrri, X86_INS_VPCMPUD: vpcmp${cc}ud	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPUDZrri_alt, X86_INS_VPCMPUD: vpcmpud	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPUDZrrik, X86_INS_VPCMPUD: vpcmp${cc}ud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPUDZrrik_alt, X86_INS_VPCMPUD: vpcmpud	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPUQZ128rmi, X86_INS_VPCMPUQ: vpcmp${cc}uq	$dst, $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUQZ128rmi_alt, X86_INS_VPCMPUQ: vpcmpuq	$dst, $src1, $src2, $cc */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUQZ128rmib, X86_INS_VPCMPUQ: vpcmp${cc}uq	{${src2}{1to2}, $src1, $dst|$dst, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUQZ128rmib_alt, X86_INS_VPCMPUQ: vpcmpuq	{$cc, ${src2}{1to2}, $src1, $dst|$dst, $src1, ${src2}{1to2}, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUQZ128rmibk, X86_INS_VPCMPUQ: vpcmp${cc}uq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUQZ128rmibk_alt, X86_INS_VPCMPUQ: vpcmpuq	{$cc, ${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUQZ128rmik, X86_INS_VPCMPUQ: vpcmp${cc}uq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUQZ128rmik_alt, X86_INS_VPCMPUQ: vpcmpuq	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUQZ128rri, X86_INS_VPCMPUQ: vpcmp${cc}uq	$dst, $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUQZ128rri_alt, X86_INS_VPCMPUQ: vpcmpuq	$dst, $src1, $src2, $cc */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUQZ128rrik, X86_INS_VPCMPUQ: vpcmp${cc}uq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUQZ128rrik_alt, X86_INS_VPCMPUQ: vpcmpuq	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUQZ256rmi, X86_INS_VPCMPUQ: vpcmp${cc}uq	$dst, $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUQZ256rmi_alt, X86_INS_VPCMPUQ: vpcmpuq	$dst, $src1, $src2, $cc */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUQZ256rmib, X86_INS_VPCMPUQ: vpcmp${cc}uq	{${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUQZ256rmib_alt, X86_INS_VPCMPUQ: vpcmpuq	{$cc, ${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUQZ256rmibk, X86_INS_VPCMPUQ: vpcmp${cc}uq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUQZ256rmibk_alt, X86_INS_VPCMPUQ: vpcmpuq	{$cc, ${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUQZ256rmik, X86_INS_VPCMPUQ: vpcmp${cc}uq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUQZ256rmik_alt, X86_INS_VPCMPUQ: vpcmpuq	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUQZ256rri, X86_INS_VPCMPUQ: vpcmp${cc}uq	$dst, $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUQZ256rri_alt, X86_INS_VPCMPUQ: vpcmpuq	$dst, $src1, $src2, $cc */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUQZ256rrik, X86_INS_VPCMPUQ: vpcmp${cc}uq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUQZ256rrik_alt, X86_INS_VPCMPUQ: vpcmpuq	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUQZrmi, X86_INS_VPCMPUQ: vpcmp${cc}uq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPUQZrmi_alt, X86_INS_VPCMPUQ: vpcmpuq	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPUQZrmib, X86_INS_VPCMPUQ: vpcmp${cc}uq	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPUQZrmib_alt, X86_INS_VPCMPUQ: vpcmpuq	{$cc, ${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}, $cc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPUQZrmibk, X86_INS_VPCMPUQ: vpcmp${cc}uq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPUQZrmibk_alt, X86_INS_VPCMPUQ: vpcmpuq	{$cc, ${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}, $cc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPUQZrmik, X86_INS_VPCMPUQ: vpcmp${cc}uq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPUQZrmik_alt, X86_INS_VPCMPUQ: vpcmpuq	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPUQZrri, X86_INS_VPCMPUQ: vpcmp${cc}uq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPUQZrri_alt, X86_INS_VPCMPUQ: vpcmpuq	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPUQZrrik, X86_INS_VPCMPUQ: vpcmp${cc}uq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPUQZrrik_alt, X86_INS_VPCMPUQ: vpcmpuq	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPUWZ128rmi, X86_INS_VPCMPUW: vpcmp${cc}uw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPUWZ128rmi_alt, X86_INS_VPCMPUW: vpcmpuw	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPUWZ128rmik, X86_INS_VPCMPUW: vpcmp${cc}uw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUWZ128rmik_alt, X86_INS_VPCMPUW: vpcmpuw	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUWZ128rri, X86_INS_VPCMPUW: vpcmp${cc}uw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPUWZ128rri_alt, X86_INS_VPCMPUW: vpcmpuw	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPUWZ128rrik, X86_INS_VPCMPUW: vpcmp${cc}uw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUWZ128rrik_alt, X86_INS_VPCMPUW: vpcmpuw	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUWZ256rmi, X86_INS_VPCMPUW: vpcmp${cc}uw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPUWZ256rmi_alt, X86_INS_VPCMPUW: vpcmpuw	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPUWZ256rmik, X86_INS_VPCMPUW: vpcmp${cc}uw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUWZ256rmik_alt, X86_INS_VPCMPUW: vpcmpuw	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUWZ256rri, X86_INS_VPCMPUW: vpcmp${cc}uw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPUWZ256rri_alt, X86_INS_VPCMPUW: vpcmpuw	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPUWZ256rrik, X86_INS_VPCMPUW: vpcmp${cc}uw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUWZ256rrik_alt, X86_INS_VPCMPUW: vpcmpuw	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPUWZrmi, X86_INS_VPCMPUW: vpcmp${cc}uw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPUWZrmi_alt, X86_INS_VPCMPUW: vpcmpuw	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPUWZrmik, X86_INS_VPCMPUW: vpcmp${cc}uw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPUWZrmik_alt, X86_INS_VPCMPUW: vpcmpuw	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPUWZrri, X86_INS_VPCMPUW: vpcmp${cc}uw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPUWZrri_alt, X86_INS_VPCMPUW: vpcmpuw	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPUWZrrik, X86_INS_VPCMPUW: vpcmp${cc}uw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPUWZrrik_alt, X86_INS_VPCMPUW: vpcmpuw	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPWZ128rmi, X86_INS_VPCMPW: vpcmp${cc}w	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPWZ128rmi_alt, X86_INS_VPCMPW: vpcmpw	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPWZ128rmik, X86_INS_VPCMPW: vpcmp${cc}w	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPWZ128rmik_alt, X86_INS_VPCMPW: vpcmpw	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPWZ128rri, X86_INS_VPCMPW: vpcmp${cc}w	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPWZ128rri_alt, X86_INS_VPCMPW: vpcmpw	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPWZ128rrik, X86_INS_VPCMPW: vpcmp${cc}w	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPWZ128rrik_alt, X86_INS_VPCMPW: vpcmpw	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPWZ256rmi, X86_INS_VPCMPW: vpcmp${cc}w	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPWZ256rmi_alt, X86_INS_VPCMPW: vpcmpw	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPWZ256rmik, X86_INS_VPCMPW: vpcmp${cc}w	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPWZ256rmik_alt, X86_INS_VPCMPW: vpcmpw	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPWZ256rri, X86_INS_VPCMPW: vpcmp${cc}w	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPWZ256rri_alt, X86_INS_VPCMPW: vpcmpw	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, 0 }
-	},
-	{	/* X86_VPCMPWZ256rrik, X86_INS_VPCMPW: vpcmp${cc}w	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPWZ256rrik_alt, X86_INS_VPCMPW: vpcmpw	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCMPWZrmi, X86_INS_VPCMPW: vpcmp${cc}w	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPWZrmi_alt, X86_INS_VPCMPW: vpcmpw	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPWZrmik, X86_INS_VPCMPW: vpcmp${cc}w	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPWZrmik_alt, X86_INS_VPCMPW: vpcmpw	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPWZrri, X86_INS_VPCMPW: vpcmp${cc}w	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPWZrri_alt, X86_INS_VPCMPW: vpcmpw	$dst, $src1, $src2, $cc */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCMPWZrrik, X86_INS_VPCMPW: vpcmp${cc}w	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCMPWZrrik_alt, X86_INS_VPCMPW: vpcmpw	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPCOMBmi, X86_INS_VPCOMB: vpcom${cc}b	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMBmi_alt, X86_INS_VPCOMB: vpcomb	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMBri, X86_INS_VPCOMB: vpcom${cc}b	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMBri_alt, X86_INS_VPCOMB: vpcomb	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMDmi, X86_INS_VPCOMD: vpcom${cc}d	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMDmi_alt, X86_INS_VPCOMD: vpcomd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMDri, X86_INS_VPCOMD: vpcom${cc}d	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMDri_alt, X86_INS_VPCOMD: vpcomd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMPRESSDZ128mrk, X86_INS_VPCOMPRESSD: vpcompressd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCOMPRESSDZ128rrk, X86_INS_VPCOMPRESSD: vpcompressd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCOMPRESSDZ128rrkz, X86_INS_VPCOMPRESSD: vpcompressd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCOMPRESSDZ256mrk, X86_INS_VPCOMPRESSD: vpcompressd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCOMPRESSDZ256rrk, X86_INS_VPCOMPRESSD: vpcompressd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCOMPRESSDZ256rrkz, X86_INS_VPCOMPRESSD: vpcompressd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCOMPRESSDZmrk, X86_INS_VPCOMPRESSD: vpcompressd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCOMPRESSDZrrk, X86_INS_VPCOMPRESSD: vpcompressd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCOMPRESSDZrrkz, X86_INS_VPCOMPRESSD: vpcompressd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCOMPRESSQZ128mrk, X86_INS_VPCOMPRESSQ: vpcompressq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCOMPRESSQZ128rrk, X86_INS_VPCOMPRESSQ: vpcompressq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCOMPRESSQZ128rrkz, X86_INS_VPCOMPRESSQ: vpcompressq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCOMPRESSQZ256mrk, X86_INS_VPCOMPRESSQ: vpcompressq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCOMPRESSQZ256rrk, X86_INS_VPCOMPRESSQ: vpcompressq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCOMPRESSQZ256rrkz, X86_INS_VPCOMPRESSQ: vpcompressq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCOMPRESSQZmrk, X86_INS_VPCOMPRESSQ: vpcompressq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCOMPRESSQZrrk, X86_INS_VPCOMPRESSQ: vpcompressq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCOMPRESSQZrrkz, X86_INS_VPCOMPRESSQ: vpcompressq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPCOMQmi, X86_INS_VPCOMQ: vpcom${cc}q	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMQmi_alt, X86_INS_VPCOMQ: vpcomq	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMQri, X86_INS_VPCOMQ: vpcom${cc}q	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMQri_alt, X86_INS_VPCOMQ: vpcomq	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMUBmi, X86_INS_VPCOMUB: vpcom${cc}ub	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMUBmi_alt, X86_INS_VPCOMUB: vpcomub	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMUBri, X86_INS_VPCOMUB: vpcom${cc}ub	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMUBri_alt, X86_INS_VPCOMUB: vpcomub	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMUDmi, X86_INS_VPCOMUD: vpcom${cc}ud	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMUDmi_alt, X86_INS_VPCOMUD: vpcomud	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMUDri, X86_INS_VPCOMUD: vpcom${cc}ud	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMUDri_alt, X86_INS_VPCOMUD: vpcomud	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMUQmi, X86_INS_VPCOMUQ: vpcom${cc}uq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMUQmi_alt, X86_INS_VPCOMUQ: vpcomuq	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMUQri, X86_INS_VPCOMUQ: vpcom${cc}uq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMUQri_alt, X86_INS_VPCOMUQ: vpcomuq	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMUWmi, X86_INS_VPCOMUW: vpcom${cc}uw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMUWmi_alt, X86_INS_VPCOMUW: vpcomuw	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMUWri, X86_INS_VPCOMUW: vpcom${cc}uw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMUWri_alt, X86_INS_VPCOMUW: vpcomuw	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMWmi, X86_INS_VPCOMW: vpcom${cc}w	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMWmi_alt, X86_INS_VPCOMW: vpcomw	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMWri, X86_INS_VPCOMW: vpcom${cc}w	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCOMWri_alt, X86_INS_VPCOMW: vpcomw	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCONFLICTDrm, X86_INS_VPCONFLICTD: vpconflictd	{$src, ${dst}|${dst}, $src} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCONFLICTDrmb, X86_INS_VPCONFLICTD: vpconflictd	{${src}{1to16}, ${dst}|${dst}, ${src}{1to16}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCONFLICTDrmbk, X86_INS_VPCONFLICTD: vpconflictd	{${src2}{1to16}, ${dst} {${mask}}|${dst} {${mask}}, ${src2}{1to16}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCONFLICTDrmbkz, X86_INS_VPCONFLICTD: vpconflictd	{${src}{1to16}, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, ${src}{1to16}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCONFLICTDrmk, X86_INS_VPCONFLICTD: vpconflictd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCONFLICTDrmkz, X86_INS_VPCONFLICTD: vpconflictd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCONFLICTDrr, X86_INS_VPCONFLICTD: vpconflictd	{$src, ${dst} |${dst}, $src} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCONFLICTDrrk, X86_INS_VPCONFLICTD: vpconflictd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCONFLICTDrrkz, X86_INS_VPCONFLICTD: vpconflictd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCONFLICTQrm, X86_INS_VPCONFLICTQ: vpconflictq	{$src, ${dst}|${dst}, $src} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCONFLICTQrmb, X86_INS_VPCONFLICTQ: vpconflictq	{${src}{1to8}, ${dst}|${dst}, ${src}{1to8}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCONFLICTQrmbk, X86_INS_VPCONFLICTQ: vpconflictq	{${src2}{1to8}, ${dst} {${mask}}|${dst} {${mask}}, ${src2}{1to8}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCONFLICTQrmbkz, X86_INS_VPCONFLICTQ: vpconflictq	{${src}{1to8}, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, ${src}{1to8}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCONFLICTQrmk, X86_INS_VPCONFLICTQ: vpconflictq	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCONFLICTQrmkz, X86_INS_VPCONFLICTQ: vpconflictq	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCONFLICTQrr, X86_INS_VPCONFLICTQ: vpconflictq	{$src, ${dst} |${dst}, $src} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCONFLICTQrrk, X86_INS_VPCONFLICTQ: vpconflictq	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPCONFLICTQrrkz, X86_INS_VPCONFLICTQ: vpconflictq	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERM2F128rm, X86_INS_VPERM2F128: vperm2f128	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERM2F128rr, X86_INS_VPERM2F128: vperm2f128	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERM2I128rm, X86_INS_VPERM2I128: vperm2i128	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERM2I128rr, X86_INS_VPERM2I128: vperm2i128	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMDYrm, X86_INS_VPERMD: vpermd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMDYrr, X86_INS_VPERMD: vpermd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMDZrm, X86_INS_VPERMD: vpermd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMDZrr, X86_INS_VPERMD: vpermd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMI2Drm, X86_INS_VPERMI2D: vpermi2d	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMI2Drmk, X86_INS_VPERMI2D: vpermi2d	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMI2Drmkz, X86_INS_VPERMI2D: vpermi2d	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMI2Drr, X86_INS_VPERMI2D: vpermi2d	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMI2Drrk, X86_INS_VPERMI2D: vpermi2d	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMI2Drrkz, X86_INS_VPERMI2D: vpermi2d	{$src3, $src2, $dst {${mask}} {z} |$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMI2PDrm, X86_INS_VPERMI2PD: vpermi2pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMI2PDrmk, X86_INS_VPERMI2PD: vpermi2pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMI2PDrmkz, X86_INS_VPERMI2PD: vpermi2pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMI2PDrr, X86_INS_VPERMI2PD: vpermi2pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMI2PDrrk, X86_INS_VPERMI2PD: vpermi2pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMI2PDrrkz, X86_INS_VPERMI2PD: vpermi2pd	{$src3, $src2, $dst {${mask}} {z} |$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMI2PSrm, X86_INS_VPERMI2PS: vpermi2ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMI2PSrmk, X86_INS_VPERMI2PS: vpermi2ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMI2PSrmkz, X86_INS_VPERMI2PS: vpermi2ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMI2PSrr, X86_INS_VPERMI2PS: vpermi2ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMI2PSrrk, X86_INS_VPERMI2PS: vpermi2ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMI2PSrrkz, X86_INS_VPERMI2PS: vpermi2ps	{$src3, $src2, $dst {${mask}} {z} |$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMI2Qrm, X86_INS_VPERMI2Q: vpermi2q	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMI2Qrmk, X86_INS_VPERMI2Q: vpermi2q	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMI2Qrmkz, X86_INS_VPERMI2Q: vpermi2q	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMI2Qrr, X86_INS_VPERMI2Q: vpermi2q	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMI2Qrrk, X86_INS_VPERMI2Q: vpermi2q	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMI2Qrrkz, X86_INS_VPERMI2Q: vpermi2q	{$src3, $src2, $dst {${mask}} {z} |$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMIL2PDmr, X86_INS_VPERMIL2PD: vpermil2pd	$dst, $src1, $src2, $src3, $src4 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMIL2PDmrY, X86_INS_VPERMIL2PD: vpermil2pd	$dst, $src1, $src2, $src3, $src4 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMIL2PDrm, X86_INS_VPERMIL2PD: vpermil2pd	$dst, $src1, $src2, $src3, $src4 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMIL2PDrmY, X86_INS_VPERMIL2PD: vpermil2pd	$dst, $src1, $src2, $src3, $src4 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMIL2PDrr, X86_INS_VPERMIL2PD: vpermil2pd	$dst, $src1, $src2, $src3, $src4 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMIL2PDrrY, X86_INS_VPERMIL2PD: vpermil2pd	$dst, $src1, $src2, $src3, $src4 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMIL2PSmr, X86_INS_VPERMIL2PS: vpermil2ps	$dst, $src1, $src2, $src3, $src4 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMIL2PSmrY, X86_INS_VPERMIL2PS: vpermil2ps	$dst, $src1, $src2, $src3, $src4 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMIL2PSrm, X86_INS_VPERMIL2PS: vpermil2ps	$dst, $src1, $src2, $src3, $src4 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMIL2PSrmY, X86_INS_VPERMIL2PS: vpermil2ps	$dst, $src1, $src2, $src3, $src4 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMIL2PSrr, X86_INS_VPERMIL2PS: vpermil2ps	$dst, $src1, $src2, $src3, $src4 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMIL2PSrrY, X86_INS_VPERMIL2PS: vpermil2ps	$dst, $src1, $src2, $src3, $src4 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMILPDYmi, X86_INS_VPERMILPD: vpermilpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMILPDYri, X86_INS_VPERMILPD: vpermilpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMILPDYrm, X86_INS_VPERMILPD: vpermilpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMILPDYrr, X86_INS_VPERMILPD: vpermilpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMILPDZmi, X86_INS_VPERMILPD: vpermilpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMILPDZri, X86_INS_VPERMILPD: vpermilpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMILPDZrm, X86_INS_VPERMILPD: vpermilpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMILPDZrr, X86_INS_VPERMILPD: vpermilpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMILPDmi, X86_INS_VPERMILPD: vpermilpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMILPDri, X86_INS_VPERMILPD: vpermilpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMILPDrm, X86_INS_VPERMILPD: vpermilpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMILPDrr, X86_INS_VPERMILPD: vpermilpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMILPSYmi, X86_INS_VPERMILPS: vpermilps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMILPSYri, X86_INS_VPERMILPS: vpermilps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMILPSYrm, X86_INS_VPERMILPS: vpermilps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMILPSYrr, X86_INS_VPERMILPS: vpermilps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMILPSZmi, X86_INS_VPERMILPS: vpermilps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMILPSZri, X86_INS_VPERMILPS: vpermilps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMILPSZrm, X86_INS_VPERMILPS: vpermilps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMILPSZrr, X86_INS_VPERMILPS: vpermilps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMILPSmi, X86_INS_VPERMILPS: vpermilps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMILPSri, X86_INS_VPERMILPS: vpermilps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMILPSrm, X86_INS_VPERMILPS: vpermilps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMILPSrr, X86_INS_VPERMILPS: vpermilps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMPDYmi, X86_INS_VPERMPD: vpermpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMPDYri, X86_INS_VPERMPD: vpermpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMPDZmi, X86_INS_VPERMPD: vpermpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMPDZri, X86_INS_VPERMPD: vpermpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMPDZrm, X86_INS_VPERMPD: vpermpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMPDZrr, X86_INS_VPERMPD: vpermpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMPSYrm, X86_INS_VPERMPS: vpermps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMPSYrr, X86_INS_VPERMPS: vpermps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMPSZrm, X86_INS_VPERMPS: vpermps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMPSZrr, X86_INS_VPERMPS: vpermps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMQYmi, X86_INS_VPERMQ: vpermq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMQYri, X86_INS_VPERMQ: vpermq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMQZmi, X86_INS_VPERMQ: vpermq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMQZri, X86_INS_VPERMQ: vpermq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMQZrm, X86_INS_VPERMQ: vpermq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMQZrr, X86_INS_VPERMQ: vpermq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMT2Drm, X86_INS_VPERMT2D: vpermt2d	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMT2Drmk, X86_INS_VPERMT2D: vpermt2d	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMT2Drmkz, X86_INS_VPERMT2D: vpermt2d	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMT2Drr, X86_INS_VPERMT2D: vpermt2d	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMT2Drrk, X86_INS_VPERMT2D: vpermt2d	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMT2Drrkz, X86_INS_VPERMT2D: vpermt2d	{$src3, $src2, $dst {${mask}} {z} |$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMT2PDrm, X86_INS_VPERMT2PD: vpermt2pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMT2PDrmk, X86_INS_VPERMT2PD: vpermt2pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMT2PDrmkz, X86_INS_VPERMT2PD: vpermt2pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMT2PDrr, X86_INS_VPERMT2PD: vpermt2pd	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMT2PDrrk, X86_INS_VPERMT2PD: vpermt2pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMT2PDrrkz, X86_INS_VPERMT2PD: vpermt2pd	{$src3, $src2, $dst {${mask}} {z} |$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMT2PSrm, X86_INS_VPERMT2PS: vpermt2ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMT2PSrmk, X86_INS_VPERMT2PS: vpermt2ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMT2PSrmkz, X86_INS_VPERMT2PS: vpermt2ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMT2PSrr, X86_INS_VPERMT2PS: vpermt2ps	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMT2PSrrk, X86_INS_VPERMT2PS: vpermt2ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMT2PSrrkz, X86_INS_VPERMT2PS: vpermt2ps	{$src3, $src2, $dst {${mask}} {z} |$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMT2Qrm, X86_INS_VPERMT2Q: vpermt2q	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMT2Qrmk, X86_INS_VPERMT2Q: vpermt2q	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMT2Qrmkz, X86_INS_VPERMT2Q: vpermt2q	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMT2Qrr, X86_INS_VPERMT2Q: vpermt2q	$dst, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPERMT2Qrrk, X86_INS_VPERMT2Q: vpermt2q	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPERMT2Qrrkz, X86_INS_VPERMT2Q: vpermt2q	{$src3, $src2, $dst {${mask}} {z} |$dst {${mask}} {z}, $src2, $src3} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPEXPANDDZ128rmk, X86_INS_VPEXPANDD: vpexpandd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPEXPANDDZ128rmkz, X86_INS_VPEXPANDD: vpexpandd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPEXPANDDZ128rrk, X86_INS_VPEXPANDD: vpexpandd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPEXPANDDZ128rrkz, X86_INS_VPEXPANDD: vpexpandd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPEXPANDDZ256rmk, X86_INS_VPEXPANDD: vpexpandd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPEXPANDDZ256rmkz, X86_INS_VPEXPANDD: vpexpandd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPEXPANDDZ256rrk, X86_INS_VPEXPANDD: vpexpandd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPEXPANDDZ256rrkz, X86_INS_VPEXPANDD: vpexpandd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPEXPANDDZrmk, X86_INS_VPEXPANDD: vpexpandd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPEXPANDDZrmkz, X86_INS_VPEXPANDD: vpexpandd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPEXPANDDZrrk, X86_INS_VPEXPANDD: vpexpandd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPEXPANDDZrrkz, X86_INS_VPEXPANDD: vpexpandd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPEXPANDQZ128rmk, X86_INS_VPEXPANDQ: vpexpandq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPEXPANDQZ128rmkz, X86_INS_VPEXPANDQ: vpexpandq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPEXPANDQZ128rrk, X86_INS_VPEXPANDQ: vpexpandq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPEXPANDQZ128rrkz, X86_INS_VPEXPANDQ: vpexpandq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPEXPANDQZ256rmk, X86_INS_VPEXPANDQ: vpexpandq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPEXPANDQZ256rmkz, X86_INS_VPEXPANDQ: vpexpandq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPEXPANDQZ256rrk, X86_INS_VPEXPANDQ: vpexpandq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPEXPANDQZ256rrkz, X86_INS_VPEXPANDQ: vpexpandq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPEXPANDQZrmk, X86_INS_VPEXPANDQ: vpexpandq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPEXPANDQZrmkz, X86_INS_VPEXPANDQ: vpexpandq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPEXPANDQZrrk, X86_INS_VPEXPANDQ: vpexpandq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPEXPANDQZrrkz, X86_INS_VPEXPANDQ: vpexpandq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPEXTRBmr, X86_INS_VPEXTRB: vpextrb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPEXTRBrr, X86_INS_VPEXTRB: vpextrb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPEXTRDmr, X86_INS_VPEXTRD: vpextrd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPEXTRDrr, X86_INS_VPEXTRD: vpextrd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPEXTRQmr, X86_INS_VPEXTRQ: vpextrq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPEXTRQrr, X86_INS_VPEXTRQ: vpextrq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPEXTRWmr, X86_INS_VPEXTRW: vpextrw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPEXTRWri, X86_INS_VPEXTRW: vpextrw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPEXTRWrr_REV, X86_INS_VPEXTRW: vpextrw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPGATHERDDYrm, X86_INS_VPGATHERDD: vpgatherdd	$dst, $src2, $mask */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPGATHERDDZrm, X86_INS_VPGATHERDD: vpgatherdd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPGATHERDDrm, X86_INS_VPGATHERDD: vpgatherdd	$dst, $src2, $mask */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPGATHERDQYrm, X86_INS_VPGATHERDQ: vpgatherdq	$dst, $src2, $mask */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPGATHERDQZrm, X86_INS_VPGATHERDQ: vpgatherdq	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPGATHERDQrm, X86_INS_VPGATHERDQ: vpgatherdq	$dst, $src2, $mask */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPGATHERQDYrm, X86_INS_VPGATHERQD: vpgatherqd	$dst, $src2, $mask */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPGATHERQDZrm, X86_INS_VPGATHERQD: vpgatherqd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPGATHERQDrm, X86_INS_VPGATHERQD: vpgatherqd	$dst, $src2, $mask */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPGATHERQQYrm, X86_INS_VPGATHERQQ: vpgatherqq	$dst, $src2, $mask */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPGATHERQQZrm, X86_INS_VPGATHERQQ: vpgatherqq	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPGATHERQQrm, X86_INS_VPGATHERQQ: vpgatherqq	$dst, $src2, $mask */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDBDrm, X86_INS_VPHADDBD: vphaddbd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDBDrr, X86_INS_VPHADDBD: vphaddbd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDBQrm, X86_INS_VPHADDBQ: vphaddbq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDBQrr, X86_INS_VPHADDBQ: vphaddbq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDBWrm, X86_INS_VPHADDBW: vphaddbw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDBWrr, X86_INS_VPHADDBW: vphaddbw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDDQrm, X86_INS_VPHADDDQ: vphadddq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDDQrr, X86_INS_VPHADDDQ: vphadddq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDDYrm, X86_INS_VPHADDD: vphaddd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDDYrr, X86_INS_VPHADDD: vphaddd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDDrm, X86_INS_VPHADDD: vphaddd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDDrr, X86_INS_VPHADDD: vphaddd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDSWrm128, X86_INS_VPHADDSW: vphaddsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDSWrm256, X86_INS_VPHADDSW: vphaddsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDSWrr128, X86_INS_VPHADDSW: vphaddsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDSWrr256, X86_INS_VPHADDSW: vphaddsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDUBDrm, X86_INS_VPHADDUBD: vphaddubd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDUBDrr, X86_INS_VPHADDUBD: vphaddubd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDUBQrm, X86_INS_VPHADDUBQ: vphaddubq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDUBQrr, X86_INS_VPHADDUBQ: vphaddubq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDUBWrm, X86_INS_VPHADDUBW: vphaddubw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDUBWrr, X86_INS_VPHADDUBW: vphaddubw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDUDQrm, X86_INS_VPHADDUDQ: vphaddudq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDUDQrr, X86_INS_VPHADDUDQ: vphaddudq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDUWDrm, X86_INS_VPHADDUWD: vphadduwd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDUWDrr, X86_INS_VPHADDUWD: vphadduwd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDUWQrm, X86_INS_VPHADDUWQ: vphadduwq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDUWQrr, X86_INS_VPHADDUWQ: vphadduwq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDWDrm, X86_INS_VPHADDWD: vphaddwd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDWDrr, X86_INS_VPHADDWD: vphaddwd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDWQrm, X86_INS_VPHADDWQ: vphaddwq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDWQrr, X86_INS_VPHADDWQ: vphaddwq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDWYrm, X86_INS_VPHADDW: vphaddw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDWYrr, X86_INS_VPHADDW: vphaddw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDWrm, X86_INS_VPHADDW: vphaddw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHADDWrr, X86_INS_VPHADDW: vphaddw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHMINPOSUWrm128, X86_INS_VPHMINPOSUW: vphminposuw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHMINPOSUWrr128, X86_INS_VPHMINPOSUW: vphminposuw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHSUBBWrm, X86_INS_VPHSUBBW: vphsubbw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHSUBBWrr, X86_INS_VPHSUBBW: vphsubbw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHSUBDQrm, X86_INS_VPHSUBDQ: vphsubdq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHSUBDQrr, X86_INS_VPHSUBDQ: vphsubdq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHSUBDYrm, X86_INS_VPHSUBD: vphsubd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHSUBDYrr, X86_INS_VPHSUBD: vphsubd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHSUBDrm, X86_INS_VPHSUBD: vphsubd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHSUBDrr, X86_INS_VPHSUBD: vphsubd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHSUBSWrm128, X86_INS_VPHSUBSW: vphsubsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHSUBSWrm256, X86_INS_VPHSUBSW: vphsubsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHSUBSWrr128, X86_INS_VPHSUBSW: vphsubsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHSUBSWrr256, X86_INS_VPHSUBSW: vphsubsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHSUBWDrm, X86_INS_VPHSUBWD: vphsubwd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHSUBWDrr, X86_INS_VPHSUBWD: vphsubwd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHSUBWYrm, X86_INS_VPHSUBW: vphsubw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHSUBWYrr, X86_INS_VPHSUBW: vphsubw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHSUBWrm, X86_INS_VPHSUBW: vphsubw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPHSUBWrr, X86_INS_VPHSUBW: vphsubw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPINSRBrm, X86_INS_VPINSRB: vpinsrb	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPINSRBrr, X86_INS_VPINSRB: vpinsrb	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPINSRDrm, X86_INS_VPINSRD: vpinsrd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPINSRDrr, X86_INS_VPINSRD: vpinsrd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPINSRQrm, X86_INS_VPINSRQ: vpinsrq	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPINSRQrr, X86_INS_VPINSRQ: vpinsrq	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPINSRWrmi, X86_INS_VPINSRW: vpinsrw	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPINSRWrri, X86_INS_VPINSRW: vpinsrw	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPLZCNTDrm, X86_INS_VPLZCNTD: vplzcntd	{$src, ${dst}|${dst}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPLZCNTDrmb, X86_INS_VPLZCNTD: vplzcntd	{${src}{1to16}, ${dst}|${dst}, ${src}{1to16}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPLZCNTDrmbk, X86_INS_VPLZCNTD: vplzcntd	{${src2}{1to16}, ${dst} {${mask}}|${dst} {${mask}}, ${src2}{1to16}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPLZCNTDrmbkz, X86_INS_VPLZCNTD: vplzcntd	{${src}{1to16}, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, ${src}{1to16}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPLZCNTDrmk, X86_INS_VPLZCNTD: vplzcntd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPLZCNTDrmkz, X86_INS_VPLZCNTD: vplzcntd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPLZCNTDrr, X86_INS_VPLZCNTD: vplzcntd	{$src, ${dst} |${dst}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPLZCNTDrrk, X86_INS_VPLZCNTD: vplzcntd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPLZCNTDrrkz, X86_INS_VPLZCNTD: vplzcntd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPLZCNTQrm, X86_INS_VPLZCNTQ: vplzcntq	{$src, ${dst}|${dst}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPLZCNTQrmb, X86_INS_VPLZCNTQ: vplzcntq	{${src}{1to8}, ${dst}|${dst}, ${src}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPLZCNTQrmbk, X86_INS_VPLZCNTQ: vplzcntq	{${src2}{1to8}, ${dst} {${mask}}|${dst} {${mask}}, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPLZCNTQrmbkz, X86_INS_VPLZCNTQ: vplzcntq	{${src}{1to8}, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, ${src}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPLZCNTQrmk, X86_INS_VPLZCNTQ: vplzcntq	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPLZCNTQrmkz, X86_INS_VPLZCNTQ: vplzcntq	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPLZCNTQrr, X86_INS_VPLZCNTQ: vplzcntq	{$src, ${dst} |${dst}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPLZCNTQrrk, X86_INS_VPLZCNTQ: vplzcntq	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPLZCNTQrrkz, X86_INS_VPLZCNTQ: vplzcntq	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMACSDDrm, X86_INS_VPMACSDD: vpmacsdd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMACSDDrr, X86_INS_VPMACSDD: vpmacsdd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMACSDQHrm, X86_INS_VPMACSDQH: vpmacsdqh	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMACSDQHrr, X86_INS_VPMACSDQH: vpmacsdqh	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMACSDQLrm, X86_INS_VPMACSDQL: vpmacsdql	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMACSDQLrr, X86_INS_VPMACSDQL: vpmacsdql	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMACSSDDrm, X86_INS_VPMACSSDD: vpmacssdd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMACSSDDrr, X86_INS_VPMACSSDD: vpmacssdd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMACSSDQHrm, X86_INS_VPMACSSDQH: vpmacssdqh	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMACSSDQHrr, X86_INS_VPMACSSDQH: vpmacssdqh	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMACSSDQLrm, X86_INS_VPMACSSDQL: vpmacssdql	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMACSSDQLrr, X86_INS_VPMACSSDQL: vpmacssdql	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMACSSWDrm, X86_INS_VPMACSSWD: vpmacsswd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMACSSWDrr, X86_INS_VPMACSSWD: vpmacsswd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMACSSWWrm, X86_INS_VPMACSSWW: vpmacssww	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMACSSWWrr, X86_INS_VPMACSSWW: vpmacssww	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMACSWDrm, X86_INS_VPMACSWD: vpmacswd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMACSWDrr, X86_INS_VPMACSWD: vpmacswd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMACSWWrm, X86_INS_VPMACSWW: vpmacsww	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMACSWWrr, X86_INS_VPMACSWW: vpmacsww	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMADCSSWDrm, X86_INS_VPMADCSSWD: vpmadcsswd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMADCSSWDrr, X86_INS_VPMADCSSWD: vpmadcsswd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMADCSWDrm, X86_INS_VPMADCSWD: vpmadcswd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMADCSWDrr, X86_INS_VPMADCSWD: vpmadcswd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMADDUBSWrm128, X86_INS_VPMADDUBSW: vpmaddubsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMADDUBSWrm256, X86_INS_VPMADDUBSW: vpmaddubsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMADDUBSWrr128, X86_INS_VPMADDUBSW: vpmaddubsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMADDUBSWrr256, X86_INS_VPMADDUBSW: vpmaddubsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMADDWDYrm, X86_INS_VPMADDWD: vpmaddwd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMADDWDYrr, X86_INS_VPMADDWD: vpmaddwd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMADDWDrm, X86_INS_VPMADDWD: vpmaddwd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMADDWDrr, X86_INS_VPMADDWD: vpmaddwd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMASKMOVDYmr, X86_INS_VPMASKMOVD: vpmaskmovd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMASKMOVDYrm, X86_INS_VPMASKMOVD: vpmaskmovd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMASKMOVDmr, X86_INS_VPMASKMOVD: vpmaskmovd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMASKMOVDrm, X86_INS_VPMASKMOVD: vpmaskmovd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMASKMOVQYmr, X86_INS_VPMASKMOVQ: vpmaskmovq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMASKMOVQYrm, X86_INS_VPMASKMOVQ: vpmaskmovq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMASKMOVQmr, X86_INS_VPMASKMOVQ: vpmaskmovq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMASKMOVQrm, X86_INS_VPMASKMOVQ: vpmaskmovq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXSBYrm, X86_INS_VPMAXSB: vpmaxsb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXSBYrr, X86_INS_VPMAXSB: vpmaxsb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXSBZ128rm, X86_INS_VPMAXSB: vpmaxsb	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSBZ128rmk, X86_INS_VPMAXSB: vpmaxsb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSBZ128rmkz, X86_INS_VPMAXSB: vpmaxsb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSBZ128rr, X86_INS_VPMAXSB: vpmaxsb	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSBZ128rrk, X86_INS_VPMAXSB: vpmaxsb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSBZ128rrkz, X86_INS_VPMAXSB: vpmaxsb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSBZ256rm, X86_INS_VPMAXSB: vpmaxsb	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSBZ256rmk, X86_INS_VPMAXSB: vpmaxsb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSBZ256rmkz, X86_INS_VPMAXSB: vpmaxsb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSBZ256rr, X86_INS_VPMAXSB: vpmaxsb	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSBZ256rrk, X86_INS_VPMAXSB: vpmaxsb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSBZ256rrkz, X86_INS_VPMAXSB: vpmaxsb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSBZrm, X86_INS_VPMAXSB: vpmaxsb	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXSBZrmk, X86_INS_VPMAXSB: vpmaxsb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXSBZrmkz, X86_INS_VPMAXSB: vpmaxsb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXSBZrr, X86_INS_VPMAXSB: vpmaxsb	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXSBZrrk, X86_INS_VPMAXSB: vpmaxsb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXSBZrrkz, X86_INS_VPMAXSB: vpmaxsb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXSBrm, X86_INS_VPMAXSB: vpmaxsb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXSBrr, X86_INS_VPMAXSB: vpmaxsb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXSDYrm, X86_INS_VPMAXSD: vpmaxsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXSDYrr, X86_INS_VPMAXSD: vpmaxsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXSDZ128rm, X86_INS_VPMAXSD: vpmaxsd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSDZ128rmb, X86_INS_VPMAXSD: vpmaxsd	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSDZ128rmbk, X86_INS_VPMAXSD: vpmaxsd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSDZ128rmbkz, X86_INS_VPMAXSD: vpmaxsd	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSDZ128rmk, X86_INS_VPMAXSD: vpmaxsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSDZ128rmkz, X86_INS_VPMAXSD: vpmaxsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSDZ128rr, X86_INS_VPMAXSD: vpmaxsd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSDZ128rrk, X86_INS_VPMAXSD: vpmaxsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSDZ128rrkz, X86_INS_VPMAXSD: vpmaxsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSDZ256rm, X86_INS_VPMAXSD: vpmaxsd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSDZ256rmb, X86_INS_VPMAXSD: vpmaxsd	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSDZ256rmbk, X86_INS_VPMAXSD: vpmaxsd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSDZ256rmbkz, X86_INS_VPMAXSD: vpmaxsd	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSDZ256rmk, X86_INS_VPMAXSD: vpmaxsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSDZ256rmkz, X86_INS_VPMAXSD: vpmaxsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSDZ256rr, X86_INS_VPMAXSD: vpmaxsd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSDZ256rrk, X86_INS_VPMAXSD: vpmaxsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSDZ256rrkz, X86_INS_VPMAXSD: vpmaxsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSDZrm, X86_INS_VPMAXSD: vpmaxsd	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXSDZrmb, X86_INS_VPMAXSD: vpmaxsd	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXSDZrmbk, X86_INS_VPMAXSD: vpmaxsd	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXSDZrmbkz, X86_INS_VPMAXSD: vpmaxsd	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXSDZrmk, X86_INS_VPMAXSD: vpmaxsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXSDZrmkz, X86_INS_VPMAXSD: vpmaxsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXSDZrr, X86_INS_VPMAXSD: vpmaxsd	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXSDZrrk, X86_INS_VPMAXSD: vpmaxsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXSDZrrkz, X86_INS_VPMAXSD: vpmaxsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXSDrm, X86_INS_VPMAXSD: vpmaxsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXSDrr, X86_INS_VPMAXSD: vpmaxsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXSQZ128rm, X86_INS_VPMAXSQ: vpmaxsq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSQZ128rmb, X86_INS_VPMAXSQ: vpmaxsq	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSQZ128rmbk, X86_INS_VPMAXSQ: vpmaxsq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSQZ128rmbkz, X86_INS_VPMAXSQ: vpmaxsq	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSQZ128rmk, X86_INS_VPMAXSQ: vpmaxsq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSQZ128rmkz, X86_INS_VPMAXSQ: vpmaxsq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSQZ128rr, X86_INS_VPMAXSQ: vpmaxsq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSQZ128rrk, X86_INS_VPMAXSQ: vpmaxsq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSQZ128rrkz, X86_INS_VPMAXSQ: vpmaxsq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSQZ256rm, X86_INS_VPMAXSQ: vpmaxsq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSQZ256rmb, X86_INS_VPMAXSQ: vpmaxsq	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSQZ256rmbk, X86_INS_VPMAXSQ: vpmaxsq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSQZ256rmbkz, X86_INS_VPMAXSQ: vpmaxsq	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSQZ256rmk, X86_INS_VPMAXSQ: vpmaxsq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSQZ256rmkz, X86_INS_VPMAXSQ: vpmaxsq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSQZ256rr, X86_INS_VPMAXSQ: vpmaxsq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSQZ256rrk, X86_INS_VPMAXSQ: vpmaxsq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSQZ256rrkz, X86_INS_VPMAXSQ: vpmaxsq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSQZrm, X86_INS_VPMAXSQ: vpmaxsq	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXSQZrmb, X86_INS_VPMAXSQ: vpmaxsq	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXSQZrmbk, X86_INS_VPMAXSQ: vpmaxsq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXSQZrmbkz, X86_INS_VPMAXSQ: vpmaxsq	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXSQZrmk, X86_INS_VPMAXSQ: vpmaxsq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXSQZrmkz, X86_INS_VPMAXSQ: vpmaxsq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXSQZrr, X86_INS_VPMAXSQ: vpmaxsq	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXSQZrrk, X86_INS_VPMAXSQ: vpmaxsq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXSQZrrkz, X86_INS_VPMAXSQ: vpmaxsq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXSWYrm, X86_INS_VPMAXSW: vpmaxsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXSWYrr, X86_INS_VPMAXSW: vpmaxsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXSWZ128rm, X86_INS_VPMAXSW: vpmaxsw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSWZ128rmk, X86_INS_VPMAXSW: vpmaxsw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSWZ128rmkz, X86_INS_VPMAXSW: vpmaxsw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSWZ128rr, X86_INS_VPMAXSW: vpmaxsw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSWZ128rrk, X86_INS_VPMAXSW: vpmaxsw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSWZ128rrkz, X86_INS_VPMAXSW: vpmaxsw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSWZ256rm, X86_INS_VPMAXSW: vpmaxsw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSWZ256rmk, X86_INS_VPMAXSW: vpmaxsw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSWZ256rmkz, X86_INS_VPMAXSW: vpmaxsw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSWZ256rr, X86_INS_VPMAXSW: vpmaxsw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSWZ256rrk, X86_INS_VPMAXSW: vpmaxsw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSWZ256rrkz, X86_INS_VPMAXSW: vpmaxsw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXSWZrm, X86_INS_VPMAXSW: vpmaxsw	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXSWZrmk, X86_INS_VPMAXSW: vpmaxsw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXSWZrmkz, X86_INS_VPMAXSW: vpmaxsw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXSWZrr, X86_INS_VPMAXSW: vpmaxsw	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXSWZrrk, X86_INS_VPMAXSW: vpmaxsw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXSWZrrkz, X86_INS_VPMAXSW: vpmaxsw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXSWrm, X86_INS_VPMAXSW: vpmaxsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXSWrr, X86_INS_VPMAXSW: vpmaxsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXUBYrm, X86_INS_VPMAXUB: vpmaxub	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXUBYrr, X86_INS_VPMAXUB: vpmaxub	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXUBZ128rm, X86_INS_VPMAXUB: vpmaxub	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUBZ128rmk, X86_INS_VPMAXUB: vpmaxub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUBZ128rmkz, X86_INS_VPMAXUB: vpmaxub	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUBZ128rr, X86_INS_VPMAXUB: vpmaxub	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUBZ128rrk, X86_INS_VPMAXUB: vpmaxub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUBZ128rrkz, X86_INS_VPMAXUB: vpmaxub	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUBZ256rm, X86_INS_VPMAXUB: vpmaxub	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUBZ256rmk, X86_INS_VPMAXUB: vpmaxub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUBZ256rmkz, X86_INS_VPMAXUB: vpmaxub	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUBZ256rr, X86_INS_VPMAXUB: vpmaxub	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUBZ256rrk, X86_INS_VPMAXUB: vpmaxub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUBZ256rrkz, X86_INS_VPMAXUB: vpmaxub	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUBZrm, X86_INS_VPMAXUB: vpmaxub	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXUBZrmk, X86_INS_VPMAXUB: vpmaxub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXUBZrmkz, X86_INS_VPMAXUB: vpmaxub	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXUBZrr, X86_INS_VPMAXUB: vpmaxub	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXUBZrrk, X86_INS_VPMAXUB: vpmaxub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXUBZrrkz, X86_INS_VPMAXUB: vpmaxub	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXUBrm, X86_INS_VPMAXUB: vpmaxub	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXUBrr, X86_INS_VPMAXUB: vpmaxub	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXUDYrm, X86_INS_VPMAXUD: vpmaxud	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXUDYrr, X86_INS_VPMAXUD: vpmaxud	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXUDZ128rm, X86_INS_VPMAXUD: vpmaxud	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUDZ128rmb, X86_INS_VPMAXUD: vpmaxud	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUDZ128rmbk, X86_INS_VPMAXUD: vpmaxud	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUDZ128rmbkz, X86_INS_VPMAXUD: vpmaxud	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUDZ128rmk, X86_INS_VPMAXUD: vpmaxud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUDZ128rmkz, X86_INS_VPMAXUD: vpmaxud	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUDZ128rr, X86_INS_VPMAXUD: vpmaxud	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUDZ128rrk, X86_INS_VPMAXUD: vpmaxud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUDZ128rrkz, X86_INS_VPMAXUD: vpmaxud	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUDZ256rm, X86_INS_VPMAXUD: vpmaxud	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUDZ256rmb, X86_INS_VPMAXUD: vpmaxud	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUDZ256rmbk, X86_INS_VPMAXUD: vpmaxud	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUDZ256rmbkz, X86_INS_VPMAXUD: vpmaxud	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUDZ256rmk, X86_INS_VPMAXUD: vpmaxud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUDZ256rmkz, X86_INS_VPMAXUD: vpmaxud	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUDZ256rr, X86_INS_VPMAXUD: vpmaxud	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUDZ256rrk, X86_INS_VPMAXUD: vpmaxud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUDZ256rrkz, X86_INS_VPMAXUD: vpmaxud	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUDZrm, X86_INS_VPMAXUD: vpmaxud	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXUDZrmb, X86_INS_VPMAXUD: vpmaxud	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXUDZrmbk, X86_INS_VPMAXUD: vpmaxud	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXUDZrmbkz, X86_INS_VPMAXUD: vpmaxud	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXUDZrmk, X86_INS_VPMAXUD: vpmaxud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXUDZrmkz, X86_INS_VPMAXUD: vpmaxud	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXUDZrr, X86_INS_VPMAXUD: vpmaxud	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXUDZrrk, X86_INS_VPMAXUD: vpmaxud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXUDZrrkz, X86_INS_VPMAXUD: vpmaxud	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXUDrm, X86_INS_VPMAXUD: vpmaxud	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXUDrr, X86_INS_VPMAXUD: vpmaxud	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXUQZ128rm, X86_INS_VPMAXUQ: vpmaxuq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUQZ128rmb, X86_INS_VPMAXUQ: vpmaxuq	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUQZ128rmbk, X86_INS_VPMAXUQ: vpmaxuq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUQZ128rmbkz, X86_INS_VPMAXUQ: vpmaxuq	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUQZ128rmk, X86_INS_VPMAXUQ: vpmaxuq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUQZ128rmkz, X86_INS_VPMAXUQ: vpmaxuq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUQZ128rr, X86_INS_VPMAXUQ: vpmaxuq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUQZ128rrk, X86_INS_VPMAXUQ: vpmaxuq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUQZ128rrkz, X86_INS_VPMAXUQ: vpmaxuq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUQZ256rm, X86_INS_VPMAXUQ: vpmaxuq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUQZ256rmb, X86_INS_VPMAXUQ: vpmaxuq	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUQZ256rmbk, X86_INS_VPMAXUQ: vpmaxuq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUQZ256rmbkz, X86_INS_VPMAXUQ: vpmaxuq	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUQZ256rmk, X86_INS_VPMAXUQ: vpmaxuq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUQZ256rmkz, X86_INS_VPMAXUQ: vpmaxuq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUQZ256rr, X86_INS_VPMAXUQ: vpmaxuq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUQZ256rrk, X86_INS_VPMAXUQ: vpmaxuq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUQZ256rrkz, X86_INS_VPMAXUQ: vpmaxuq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUQZrm, X86_INS_VPMAXUQ: vpmaxuq	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXUQZrmb, X86_INS_VPMAXUQ: vpmaxuq	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXUQZrmbk, X86_INS_VPMAXUQ: vpmaxuq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXUQZrmbkz, X86_INS_VPMAXUQ: vpmaxuq	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXUQZrmk, X86_INS_VPMAXUQ: vpmaxuq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXUQZrmkz, X86_INS_VPMAXUQ: vpmaxuq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXUQZrr, X86_INS_VPMAXUQ: vpmaxuq	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXUQZrrk, X86_INS_VPMAXUQ: vpmaxuq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXUQZrrkz, X86_INS_VPMAXUQ: vpmaxuq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXUWYrm, X86_INS_VPMAXUW: vpmaxuw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXUWYrr, X86_INS_VPMAXUW: vpmaxuw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXUWZ128rm, X86_INS_VPMAXUW: vpmaxuw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUWZ128rmk, X86_INS_VPMAXUW: vpmaxuw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUWZ128rmkz, X86_INS_VPMAXUW: vpmaxuw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUWZ128rr, X86_INS_VPMAXUW: vpmaxuw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUWZ128rrk, X86_INS_VPMAXUW: vpmaxuw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUWZ128rrkz, X86_INS_VPMAXUW: vpmaxuw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUWZ256rm, X86_INS_VPMAXUW: vpmaxuw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUWZ256rmk, X86_INS_VPMAXUW: vpmaxuw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUWZ256rmkz, X86_INS_VPMAXUW: vpmaxuw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUWZ256rr, X86_INS_VPMAXUW: vpmaxuw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUWZ256rrk, X86_INS_VPMAXUW: vpmaxuw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUWZ256rrkz, X86_INS_VPMAXUW: vpmaxuw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMAXUWZrm, X86_INS_VPMAXUW: vpmaxuw	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXUWZrmk, X86_INS_VPMAXUW: vpmaxuw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXUWZrmkz, X86_INS_VPMAXUW: vpmaxuw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXUWZrr, X86_INS_VPMAXUW: vpmaxuw	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXUWZrrk, X86_INS_VPMAXUW: vpmaxuw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXUWZrrkz, X86_INS_VPMAXUW: vpmaxuw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMAXUWrm, X86_INS_VPMAXUW: vpmaxuw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMAXUWrr, X86_INS_VPMAXUW: vpmaxuw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINSBYrm, X86_INS_VPMINSB: vpminsb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINSBYrr, X86_INS_VPMINSB: vpminsb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINSBZ128rm, X86_INS_VPMINSB: vpminsb	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSBZ128rmk, X86_INS_VPMINSB: vpminsb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSBZ128rmkz, X86_INS_VPMINSB: vpminsb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSBZ128rr, X86_INS_VPMINSB: vpminsb	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSBZ128rrk, X86_INS_VPMINSB: vpminsb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSBZ128rrkz, X86_INS_VPMINSB: vpminsb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSBZ256rm, X86_INS_VPMINSB: vpminsb	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSBZ256rmk, X86_INS_VPMINSB: vpminsb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSBZ256rmkz, X86_INS_VPMINSB: vpminsb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSBZ256rr, X86_INS_VPMINSB: vpminsb	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSBZ256rrk, X86_INS_VPMINSB: vpminsb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSBZ256rrkz, X86_INS_VPMINSB: vpminsb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSBZrm, X86_INS_VPMINSB: vpminsb	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINSBZrmk, X86_INS_VPMINSB: vpminsb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINSBZrmkz, X86_INS_VPMINSB: vpminsb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINSBZrr, X86_INS_VPMINSB: vpminsb	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINSBZrrk, X86_INS_VPMINSB: vpminsb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINSBZrrkz, X86_INS_VPMINSB: vpminsb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINSBrm, X86_INS_VPMINSB: vpminsb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINSBrr, X86_INS_VPMINSB: vpminsb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINSDYrm, X86_INS_VPMINSD: vpminsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINSDYrr, X86_INS_VPMINSD: vpminsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINSDZ128rm, X86_INS_VPMINSD: vpminsd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSDZ128rmb, X86_INS_VPMINSD: vpminsd	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSDZ128rmbk, X86_INS_VPMINSD: vpminsd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSDZ128rmbkz, X86_INS_VPMINSD: vpminsd	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSDZ128rmk, X86_INS_VPMINSD: vpminsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSDZ128rmkz, X86_INS_VPMINSD: vpminsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSDZ128rr, X86_INS_VPMINSD: vpminsd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSDZ128rrk, X86_INS_VPMINSD: vpminsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSDZ128rrkz, X86_INS_VPMINSD: vpminsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSDZ256rm, X86_INS_VPMINSD: vpminsd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSDZ256rmb, X86_INS_VPMINSD: vpminsd	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSDZ256rmbk, X86_INS_VPMINSD: vpminsd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSDZ256rmbkz, X86_INS_VPMINSD: vpminsd	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSDZ256rmk, X86_INS_VPMINSD: vpminsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSDZ256rmkz, X86_INS_VPMINSD: vpminsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSDZ256rr, X86_INS_VPMINSD: vpminsd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSDZ256rrk, X86_INS_VPMINSD: vpminsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSDZ256rrkz, X86_INS_VPMINSD: vpminsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSDZrm, X86_INS_VPMINSD: vpminsd	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINSDZrmb, X86_INS_VPMINSD: vpminsd	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINSDZrmbk, X86_INS_VPMINSD: vpminsd	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINSDZrmbkz, X86_INS_VPMINSD: vpminsd	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINSDZrmk, X86_INS_VPMINSD: vpminsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINSDZrmkz, X86_INS_VPMINSD: vpminsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINSDZrr, X86_INS_VPMINSD: vpminsd	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINSDZrrk, X86_INS_VPMINSD: vpminsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINSDZrrkz, X86_INS_VPMINSD: vpminsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINSDrm, X86_INS_VPMINSD: vpminsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINSDrr, X86_INS_VPMINSD: vpminsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINSQZ128rm, X86_INS_VPMINSQ: vpminsq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSQZ128rmb, X86_INS_VPMINSQ: vpminsq	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSQZ128rmbk, X86_INS_VPMINSQ: vpminsq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSQZ128rmbkz, X86_INS_VPMINSQ: vpminsq	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSQZ128rmk, X86_INS_VPMINSQ: vpminsq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSQZ128rmkz, X86_INS_VPMINSQ: vpminsq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSQZ128rr, X86_INS_VPMINSQ: vpminsq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSQZ128rrk, X86_INS_VPMINSQ: vpminsq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSQZ128rrkz, X86_INS_VPMINSQ: vpminsq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSQZ256rm, X86_INS_VPMINSQ: vpminsq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSQZ256rmb, X86_INS_VPMINSQ: vpminsq	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSQZ256rmbk, X86_INS_VPMINSQ: vpminsq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSQZ256rmbkz, X86_INS_VPMINSQ: vpminsq	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSQZ256rmk, X86_INS_VPMINSQ: vpminsq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSQZ256rmkz, X86_INS_VPMINSQ: vpminsq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSQZ256rr, X86_INS_VPMINSQ: vpminsq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSQZ256rrk, X86_INS_VPMINSQ: vpminsq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSQZ256rrkz, X86_INS_VPMINSQ: vpminsq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSQZrm, X86_INS_VPMINSQ: vpminsq	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINSQZrmb, X86_INS_VPMINSQ: vpminsq	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINSQZrmbk, X86_INS_VPMINSQ: vpminsq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINSQZrmbkz, X86_INS_VPMINSQ: vpminsq	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINSQZrmk, X86_INS_VPMINSQ: vpminsq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINSQZrmkz, X86_INS_VPMINSQ: vpminsq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINSQZrr, X86_INS_VPMINSQ: vpminsq	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINSQZrrk, X86_INS_VPMINSQ: vpminsq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINSQZrrkz, X86_INS_VPMINSQ: vpminsq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINSWYrm, X86_INS_VPMINSW: vpminsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINSWYrr, X86_INS_VPMINSW: vpminsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINSWZ128rm, X86_INS_VPMINSW: vpminsw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSWZ128rmk, X86_INS_VPMINSW: vpminsw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSWZ128rmkz, X86_INS_VPMINSW: vpminsw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSWZ128rr, X86_INS_VPMINSW: vpminsw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSWZ128rrk, X86_INS_VPMINSW: vpminsw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSWZ128rrkz, X86_INS_VPMINSW: vpminsw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSWZ256rm, X86_INS_VPMINSW: vpminsw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSWZ256rmk, X86_INS_VPMINSW: vpminsw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSWZ256rmkz, X86_INS_VPMINSW: vpminsw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSWZ256rr, X86_INS_VPMINSW: vpminsw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSWZ256rrk, X86_INS_VPMINSW: vpminsw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSWZ256rrkz, X86_INS_VPMINSW: vpminsw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINSWZrm, X86_INS_VPMINSW: vpminsw	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINSWZrmk, X86_INS_VPMINSW: vpminsw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINSWZrmkz, X86_INS_VPMINSW: vpminsw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINSWZrr, X86_INS_VPMINSW: vpminsw	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINSWZrrk, X86_INS_VPMINSW: vpminsw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINSWZrrkz, X86_INS_VPMINSW: vpminsw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINSWrm, X86_INS_VPMINSW: vpminsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINSWrr, X86_INS_VPMINSW: vpminsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINUBYrm, X86_INS_VPMINUB: vpminub	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINUBYrr, X86_INS_VPMINUB: vpminub	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINUBZ128rm, X86_INS_VPMINUB: vpminub	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUBZ128rmk, X86_INS_VPMINUB: vpminub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUBZ128rmkz, X86_INS_VPMINUB: vpminub	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUBZ128rr, X86_INS_VPMINUB: vpminub	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUBZ128rrk, X86_INS_VPMINUB: vpminub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUBZ128rrkz, X86_INS_VPMINUB: vpminub	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUBZ256rm, X86_INS_VPMINUB: vpminub	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUBZ256rmk, X86_INS_VPMINUB: vpminub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUBZ256rmkz, X86_INS_VPMINUB: vpminub	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUBZ256rr, X86_INS_VPMINUB: vpminub	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUBZ256rrk, X86_INS_VPMINUB: vpminub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUBZ256rrkz, X86_INS_VPMINUB: vpminub	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUBZrm, X86_INS_VPMINUB: vpminub	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINUBZrmk, X86_INS_VPMINUB: vpminub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINUBZrmkz, X86_INS_VPMINUB: vpminub	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINUBZrr, X86_INS_VPMINUB: vpminub	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINUBZrrk, X86_INS_VPMINUB: vpminub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINUBZrrkz, X86_INS_VPMINUB: vpminub	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINUBrm, X86_INS_VPMINUB: vpminub	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINUBrr, X86_INS_VPMINUB: vpminub	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINUDYrm, X86_INS_VPMINUD: vpminud	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINUDYrr, X86_INS_VPMINUD: vpminud	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINUDZ128rm, X86_INS_VPMINUD: vpminud	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUDZ128rmb, X86_INS_VPMINUD: vpminud	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUDZ128rmbk, X86_INS_VPMINUD: vpminud	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUDZ128rmbkz, X86_INS_VPMINUD: vpminud	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUDZ128rmk, X86_INS_VPMINUD: vpminud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUDZ128rmkz, X86_INS_VPMINUD: vpminud	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUDZ128rr, X86_INS_VPMINUD: vpminud	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUDZ128rrk, X86_INS_VPMINUD: vpminud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUDZ128rrkz, X86_INS_VPMINUD: vpminud	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUDZ256rm, X86_INS_VPMINUD: vpminud	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUDZ256rmb, X86_INS_VPMINUD: vpminud	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUDZ256rmbk, X86_INS_VPMINUD: vpminud	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUDZ256rmbkz, X86_INS_VPMINUD: vpminud	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUDZ256rmk, X86_INS_VPMINUD: vpminud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUDZ256rmkz, X86_INS_VPMINUD: vpminud	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUDZ256rr, X86_INS_VPMINUD: vpminud	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUDZ256rrk, X86_INS_VPMINUD: vpminud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUDZ256rrkz, X86_INS_VPMINUD: vpminud	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUDZrm, X86_INS_VPMINUD: vpminud	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINUDZrmb, X86_INS_VPMINUD: vpminud	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINUDZrmbk, X86_INS_VPMINUD: vpminud	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINUDZrmbkz, X86_INS_VPMINUD: vpminud	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINUDZrmk, X86_INS_VPMINUD: vpminud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINUDZrmkz, X86_INS_VPMINUD: vpminud	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINUDZrr, X86_INS_VPMINUD: vpminud	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINUDZrrk, X86_INS_VPMINUD: vpminud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINUDZrrkz, X86_INS_VPMINUD: vpminud	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINUDrm, X86_INS_VPMINUD: vpminud	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINUDrr, X86_INS_VPMINUD: vpminud	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINUQZ128rm, X86_INS_VPMINUQ: vpminuq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUQZ128rmb, X86_INS_VPMINUQ: vpminuq	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUQZ128rmbk, X86_INS_VPMINUQ: vpminuq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUQZ128rmbkz, X86_INS_VPMINUQ: vpminuq	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUQZ128rmk, X86_INS_VPMINUQ: vpminuq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUQZ128rmkz, X86_INS_VPMINUQ: vpminuq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUQZ128rr, X86_INS_VPMINUQ: vpminuq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUQZ128rrk, X86_INS_VPMINUQ: vpminuq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUQZ128rrkz, X86_INS_VPMINUQ: vpminuq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUQZ256rm, X86_INS_VPMINUQ: vpminuq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUQZ256rmb, X86_INS_VPMINUQ: vpminuq	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUQZ256rmbk, X86_INS_VPMINUQ: vpminuq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUQZ256rmbkz, X86_INS_VPMINUQ: vpminuq	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUQZ256rmk, X86_INS_VPMINUQ: vpminuq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUQZ256rmkz, X86_INS_VPMINUQ: vpminuq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUQZ256rr, X86_INS_VPMINUQ: vpminuq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUQZ256rrk, X86_INS_VPMINUQ: vpminuq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUQZ256rrkz, X86_INS_VPMINUQ: vpminuq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUQZrm, X86_INS_VPMINUQ: vpminuq	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINUQZrmb, X86_INS_VPMINUQ: vpminuq	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINUQZrmbk, X86_INS_VPMINUQ: vpminuq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINUQZrmbkz, X86_INS_VPMINUQ: vpminuq	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINUQZrmk, X86_INS_VPMINUQ: vpminuq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINUQZrmkz, X86_INS_VPMINUQ: vpminuq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINUQZrr, X86_INS_VPMINUQ: vpminuq	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINUQZrrk, X86_INS_VPMINUQ: vpminuq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINUQZrrkz, X86_INS_VPMINUQ: vpminuq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINUWYrm, X86_INS_VPMINUW: vpminuw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINUWYrr, X86_INS_VPMINUW: vpminuw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINUWZ128rm, X86_INS_VPMINUW: vpminuw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUWZ128rmk, X86_INS_VPMINUW: vpminuw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUWZ128rmkz, X86_INS_VPMINUW: vpminuw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUWZ128rr, X86_INS_VPMINUW: vpminuw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUWZ128rrk, X86_INS_VPMINUW: vpminuw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUWZ128rrkz, X86_INS_VPMINUW: vpminuw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUWZ256rm, X86_INS_VPMINUW: vpminuw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUWZ256rmk, X86_INS_VPMINUW: vpminuw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUWZ256rmkz, X86_INS_VPMINUW: vpminuw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUWZ256rr, X86_INS_VPMINUW: vpminuw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUWZ256rrk, X86_INS_VPMINUW: vpminuw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUWZ256rrkz, X86_INS_VPMINUW: vpminuw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMINUWZrm, X86_INS_VPMINUW: vpminuw	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINUWZrmk, X86_INS_VPMINUW: vpminuw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINUWZrmkz, X86_INS_VPMINUW: vpminuw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINUWZrr, X86_INS_VPMINUW: vpminuw	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINUWZrrk, X86_INS_VPMINUW: vpminuw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINUWZrrkz, X86_INS_VPMINUW: vpminuw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMINUWrm, X86_INS_VPMINUW: vpminuw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMINUWrr, X86_INS_VPMINUW: vpminuw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVDBmr, X86_INS_VPMOVDB: vpmovdb	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVDBmrk, X86_INS_VPMOVDB: vpmovdb	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVDBrr, X86_INS_VPMOVDB: vpmovdb	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVDBrrk, X86_INS_VPMOVDB: vpmovdb	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVDBrrkz, X86_INS_VPMOVDB: vpmovdb	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVDWmr, X86_INS_VPMOVDW: vpmovdw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVDWmrk, X86_INS_VPMOVDW: vpmovdw	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVDWrr, X86_INS_VPMOVDW: vpmovdw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVDWrrk, X86_INS_VPMOVDW: vpmovdw	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVDWrrkz, X86_INS_VPMOVDW: vpmovdw	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVM2BZ128rr, X86_INS_VPMOVM2B: vpmovm2b	$dst, $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVM2BZ256rr, X86_INS_VPMOVM2B: vpmovm2b	$dst, $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVM2BZrr, X86_INS_VPMOVM2B: vpmovm2b	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVM2DZ128rr, X86_INS_VPMOVM2D: vpmovm2d	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVM2DZ256rr, X86_INS_VPMOVM2D: vpmovm2d	$dst, $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVM2DZrr, X86_INS_VPMOVM2D: vpmovm2d	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVM2QZ128rr, X86_INS_VPMOVM2Q: vpmovm2q	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVM2QZ256rr, X86_INS_VPMOVM2Q: vpmovm2q	$dst, $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVM2QZrr, X86_INS_VPMOVM2Q: vpmovm2q	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVM2WZ128rr, X86_INS_VPMOVM2W: vpmovm2w	$dst, $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVM2WZ256rr, X86_INS_VPMOVM2W: vpmovm2w	$dst, $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVM2WZrr, X86_INS_VPMOVM2W: vpmovm2w	$dst, $src */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVMSKBYrr, X86_INS_VPMOVMSKB: vpmovmskb	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVMSKBrr, X86_INS_VPMOVMSKB: vpmovmskb	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVQBmr, X86_INS_VPMOVQB: vpmovqb	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVQBmrk, X86_INS_VPMOVQB: vpmovqb	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVQBrr, X86_INS_VPMOVQB: vpmovqb	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVQBrrk, X86_INS_VPMOVQB: vpmovqb	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVQBrrkz, X86_INS_VPMOVQB: vpmovqb	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVQDmr, X86_INS_VPMOVQD: vpmovqd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVQDmrk, X86_INS_VPMOVQD: vpmovqd	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVQDrr, X86_INS_VPMOVQD: vpmovqd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVQDrrk, X86_INS_VPMOVQD: vpmovqd	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVQDrrkz, X86_INS_VPMOVQD: vpmovqd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVQWmr, X86_INS_VPMOVQW: vpmovqw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVQWmrk, X86_INS_VPMOVQW: vpmovqw	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVQWrr, X86_INS_VPMOVQW: vpmovqw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVQWrrk, X86_INS_VPMOVQW: vpmovqw	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVQWrrkz, X86_INS_VPMOVQW: vpmovqw	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSDBmr, X86_INS_VPMOVSDB: vpmovsdb	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSDBmrk, X86_INS_VPMOVSDB: vpmovsdb	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSDBrr, X86_INS_VPMOVSDB: vpmovsdb	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSDBrrk, X86_INS_VPMOVSDB: vpmovsdb	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSDBrrkz, X86_INS_VPMOVSDB: vpmovsdb	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSDWmr, X86_INS_VPMOVSDW: vpmovsdw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSDWmrk, X86_INS_VPMOVSDW: vpmovsdw	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSDWrr, X86_INS_VPMOVSDW: vpmovsdw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSDWrrk, X86_INS_VPMOVSDW: vpmovsdw	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSDWrrkz, X86_INS_VPMOVSDW: vpmovsdw	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSQBmr, X86_INS_VPMOVSQB: vpmovsqb	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSQBmrk, X86_INS_VPMOVSQB: vpmovsqb	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSQBrr, X86_INS_VPMOVSQB: vpmovsqb	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSQBrrk, X86_INS_VPMOVSQB: vpmovsqb	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSQBrrkz, X86_INS_VPMOVSQB: vpmovsqb	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSQDmr, X86_INS_VPMOVSQD: vpmovsqd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSQDmrk, X86_INS_VPMOVSQD: vpmovsqd	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSQDrr, X86_INS_VPMOVSQD: vpmovsqd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSQDrrk, X86_INS_VPMOVSQD: vpmovsqd	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSQDrrkz, X86_INS_VPMOVSQD: vpmovsqd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSQWmr, X86_INS_VPMOVSQW: vpmovsqw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSQWmrk, X86_INS_VPMOVSQW: vpmovsqw	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSQWrr, X86_INS_VPMOVSQW: vpmovsqw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSQWrrk, X86_INS_VPMOVSQW: vpmovsqw	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSQWrrkz, X86_INS_VPMOVSQW: vpmovsqw	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSXBDYrm, X86_INS_VPMOVSXBD: vpmovsxbd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXBDYrr, X86_INS_VPMOVSXBD: vpmovsxbd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXBDZrm, X86_INS_VPMOVSXBD: vpmovsxbd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXBDZrmk, X86_INS_VPMOVSXBD: vpmovsxbd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSXBDZrmkz, X86_INS_VPMOVSXBD: vpmovsxbd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSXBDZrr, X86_INS_VPMOVSXBD: vpmovsxbd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXBDZrrk, X86_INS_VPMOVSXBD: vpmovsxbd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSXBDZrrkz, X86_INS_VPMOVSXBD: vpmovsxbd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSXBDrm, X86_INS_VPMOVSXBD: vpmovsxbd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXBDrr, X86_INS_VPMOVSXBD: vpmovsxbd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXBQYrm, X86_INS_VPMOVSXBQ: vpmovsxbq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXBQYrr, X86_INS_VPMOVSXBQ: vpmovsxbq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXBQZrm, X86_INS_VPMOVSXBQ: vpmovsxbq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXBQZrmk, X86_INS_VPMOVSXBQ: vpmovsxbq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSXBQZrmkz, X86_INS_VPMOVSXBQ: vpmovsxbq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSXBQZrr, X86_INS_VPMOVSXBQ: vpmovsxbq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXBQZrrk, X86_INS_VPMOVSXBQ: vpmovsxbq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSXBQZrrkz, X86_INS_VPMOVSXBQ: vpmovsxbq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSXBQrm, X86_INS_VPMOVSXBQ: vpmovsxbq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXBQrr, X86_INS_VPMOVSXBQ: vpmovsxbq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXBWYrm, X86_INS_VPMOVSXBW: vpmovsxbw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXBWYrr, X86_INS_VPMOVSXBW: vpmovsxbw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXBWrm, X86_INS_VPMOVSXBW: vpmovsxbw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXBWrr, X86_INS_VPMOVSXBW: vpmovsxbw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXDQYrm, X86_INS_VPMOVSXDQ: vpmovsxdq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXDQYrr, X86_INS_VPMOVSXDQ: vpmovsxdq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXDQZrm, X86_INS_VPMOVSXDQ: vpmovsxdq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXDQZrmk, X86_INS_VPMOVSXDQ: vpmovsxdq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSXDQZrmkz, X86_INS_VPMOVSXDQ: vpmovsxdq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSXDQZrr, X86_INS_VPMOVSXDQ: vpmovsxdq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXDQZrrk, X86_INS_VPMOVSXDQ: vpmovsxdq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSXDQZrrkz, X86_INS_VPMOVSXDQ: vpmovsxdq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSXDQrm, X86_INS_VPMOVSXDQ: vpmovsxdq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXDQrr, X86_INS_VPMOVSXDQ: vpmovsxdq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXWDYrm, X86_INS_VPMOVSXWD: vpmovsxwd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXWDYrr, X86_INS_VPMOVSXWD: vpmovsxwd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXWDZrm, X86_INS_VPMOVSXWD: vpmovsxwd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXWDZrmk, X86_INS_VPMOVSXWD: vpmovsxwd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSXWDZrmkz, X86_INS_VPMOVSXWD: vpmovsxwd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSXWDZrr, X86_INS_VPMOVSXWD: vpmovsxwd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXWDZrrk, X86_INS_VPMOVSXWD: vpmovsxwd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSXWDZrrkz, X86_INS_VPMOVSXWD: vpmovsxwd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSXWDrm, X86_INS_VPMOVSXWD: vpmovsxwd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXWDrr, X86_INS_VPMOVSXWD: vpmovsxwd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXWQYrm, X86_INS_VPMOVSXWQ: vpmovsxwq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXWQYrr, X86_INS_VPMOVSXWQ: vpmovsxwq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXWQZrm, X86_INS_VPMOVSXWQ: vpmovsxwq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXWQZrmk, X86_INS_VPMOVSXWQ: vpmovsxwq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSXWQZrmkz, X86_INS_VPMOVSXWQ: vpmovsxwq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSXWQZrr, X86_INS_VPMOVSXWQ: vpmovsxwq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXWQZrrk, X86_INS_VPMOVSXWQ: vpmovsxwq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSXWQZrrkz, X86_INS_VPMOVSXWQ: vpmovsxwq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVSXWQrm, X86_INS_VPMOVSXWQ: vpmovsxwq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVSXWQrr, X86_INS_VPMOVSXWQ: vpmovsxwq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVUSDBmr, X86_INS_VPMOVUSDB: vpmovusdb	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVUSDBmrk, X86_INS_VPMOVUSDB: vpmovusdb	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVUSDBrr, X86_INS_VPMOVUSDB: vpmovusdb	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVUSDBrrk, X86_INS_VPMOVUSDB: vpmovusdb	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVUSDBrrkz, X86_INS_VPMOVUSDB: vpmovusdb	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVUSDWmr, X86_INS_VPMOVUSDW: vpmovusdw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVUSDWmrk, X86_INS_VPMOVUSDW: vpmovusdw	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVUSDWrr, X86_INS_VPMOVUSDW: vpmovusdw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVUSDWrrk, X86_INS_VPMOVUSDW: vpmovusdw	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVUSDWrrkz, X86_INS_VPMOVUSDW: vpmovusdw	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVUSQBmr, X86_INS_VPMOVUSQB: vpmovusqb	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVUSQBmrk, X86_INS_VPMOVUSQB: vpmovusqb	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVUSQBrr, X86_INS_VPMOVUSQB: vpmovusqb	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVUSQBrrk, X86_INS_VPMOVUSQB: vpmovusqb	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVUSQBrrkz, X86_INS_VPMOVUSQB: vpmovusqb	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVUSQDmr, X86_INS_VPMOVUSQD: vpmovusqd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVUSQDmrk, X86_INS_VPMOVUSQD: vpmovusqd	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVUSQDrr, X86_INS_VPMOVUSQD: vpmovusqd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVUSQDrrk, X86_INS_VPMOVUSQD: vpmovusqd	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVUSQDrrkz, X86_INS_VPMOVUSQD: vpmovusqd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVUSQWmr, X86_INS_VPMOVUSQW: vpmovusqw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVUSQWmrk, X86_INS_VPMOVUSQW: vpmovusqw	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVUSQWrr, X86_INS_VPMOVUSQW: vpmovusqw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVUSQWrrk, X86_INS_VPMOVUSQW: vpmovusqw	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVUSQWrrkz, X86_INS_VPMOVUSQW: vpmovusqw	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVZXBDYrm, X86_INS_VPMOVZXBD: vpmovzxbd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXBDYrr, X86_INS_VPMOVZXBD: vpmovzxbd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXBDZrm, X86_INS_VPMOVZXBD: vpmovzxbd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXBDZrmk, X86_INS_VPMOVZXBD: vpmovzxbd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVZXBDZrmkz, X86_INS_VPMOVZXBD: vpmovzxbd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVZXBDZrr, X86_INS_VPMOVZXBD: vpmovzxbd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXBDZrrk, X86_INS_VPMOVZXBD: vpmovzxbd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVZXBDZrrkz, X86_INS_VPMOVZXBD: vpmovzxbd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVZXBDrm, X86_INS_VPMOVZXBD: vpmovzxbd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXBDrr, X86_INS_VPMOVZXBD: vpmovzxbd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXBQYrm, X86_INS_VPMOVZXBQ: vpmovzxbq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXBQYrr, X86_INS_VPMOVZXBQ: vpmovzxbq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXBQZrm, X86_INS_VPMOVZXBQ: vpmovzxbq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXBQZrmk, X86_INS_VPMOVZXBQ: vpmovzxbq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVZXBQZrmkz, X86_INS_VPMOVZXBQ: vpmovzxbq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVZXBQZrr, X86_INS_VPMOVZXBQ: vpmovzxbq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXBQZrrk, X86_INS_VPMOVZXBQ: vpmovzxbq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVZXBQZrrkz, X86_INS_VPMOVZXBQ: vpmovzxbq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVZXBQrm, X86_INS_VPMOVZXBQ: vpmovzxbq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXBQrr, X86_INS_VPMOVZXBQ: vpmovzxbq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXBWYrm, X86_INS_VPMOVZXBW: vpmovzxbw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXBWYrr, X86_INS_VPMOVZXBW: vpmovzxbw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXBWrm, X86_INS_VPMOVZXBW: vpmovzxbw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXBWrr, X86_INS_VPMOVZXBW: vpmovzxbw	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXDQYrm, X86_INS_VPMOVZXDQ: vpmovzxdq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXDQYrr, X86_INS_VPMOVZXDQ: vpmovzxdq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXDQZrm, X86_INS_VPMOVZXDQ: vpmovzxdq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXDQZrmk, X86_INS_VPMOVZXDQ: vpmovzxdq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVZXDQZrmkz, X86_INS_VPMOVZXDQ: vpmovzxdq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVZXDQZrr, X86_INS_VPMOVZXDQ: vpmovzxdq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXDQZrrk, X86_INS_VPMOVZXDQ: vpmovzxdq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVZXDQZrrkz, X86_INS_VPMOVZXDQ: vpmovzxdq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVZXDQrm, X86_INS_VPMOVZXDQ: vpmovzxdq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXDQrr, X86_INS_VPMOVZXDQ: vpmovzxdq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXWDYrm, X86_INS_VPMOVZXWD: vpmovzxwd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXWDYrr, X86_INS_VPMOVZXWD: vpmovzxwd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXWDZrm, X86_INS_VPMOVZXWD: vpmovzxwd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXWDZrmk, X86_INS_VPMOVZXWD: vpmovzxwd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVZXWDZrmkz, X86_INS_VPMOVZXWD: vpmovzxwd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVZXWDZrr, X86_INS_VPMOVZXWD: vpmovzxwd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXWDZrrk, X86_INS_VPMOVZXWD: vpmovzxwd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVZXWDZrrkz, X86_INS_VPMOVZXWD: vpmovzxwd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVZXWDrm, X86_INS_VPMOVZXWD: vpmovzxwd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXWDrr, X86_INS_VPMOVZXWD: vpmovzxwd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXWQYrm, X86_INS_VPMOVZXWQ: vpmovzxwq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXWQYrr, X86_INS_VPMOVZXWQ: vpmovzxwq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXWQZrm, X86_INS_VPMOVZXWQ: vpmovzxwq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXWQZrmk, X86_INS_VPMOVZXWQ: vpmovzxwq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVZXWQZrmkz, X86_INS_VPMOVZXWQ: vpmovzxwq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVZXWQZrr, X86_INS_VPMOVZXWQ: vpmovzxwq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXWQZrrk, X86_INS_VPMOVZXWQ: vpmovzxwq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVZXWQZrrkz, X86_INS_VPMOVZXWQ: vpmovzxwq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMOVZXWQrm, X86_INS_VPMOVZXWQ: vpmovzxwq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMOVZXWQrr, X86_INS_VPMOVZXWQ: vpmovzxwq	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULDQYrm, X86_INS_VPMULDQ: vpmuldq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULDQYrr, X86_INS_VPMULDQ: vpmuldq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULDQZrm, X86_INS_VPMULDQ: vpmuldq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULDQZrmb, X86_INS_VPMULDQ: vpmuldq	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULDQZrmbk, X86_INS_VPMULDQ: vpmuldq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULDQZrmbkz, X86_INS_VPMULDQ: vpmuldq	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULDQZrmk, X86_INS_VPMULDQ: vpmuldq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULDQZrmkz, X86_INS_VPMULDQ: vpmuldq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULDQZrr, X86_INS_VPMULDQ: vpmuldq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULDQZrrk, X86_INS_VPMULDQ: vpmuldq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULDQZrrkz, X86_INS_VPMULDQ: vpmuldq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULDQrm, X86_INS_VPMULDQ: vpmuldq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULDQrr, X86_INS_VPMULDQ: vpmuldq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULHRSWrm128, X86_INS_VPMULHRSW: vpmulhrsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULHRSWrm256, X86_INS_VPMULHRSW: vpmulhrsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULHRSWrr128, X86_INS_VPMULHRSW: vpmulhrsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULHRSWrr256, X86_INS_VPMULHRSW: vpmulhrsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULHUWYrm, X86_INS_VPMULHUW: vpmulhuw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULHUWYrr, X86_INS_VPMULHUW: vpmulhuw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULHUWrm, X86_INS_VPMULHUW: vpmulhuw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULHUWrr, X86_INS_VPMULHUW: vpmulhuw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULHWYrm, X86_INS_VPMULHW: vpmulhw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULHWYrr, X86_INS_VPMULHW: vpmulhw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULHWrm, X86_INS_VPMULHW: vpmulhw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULHWrr, X86_INS_VPMULHW: vpmulhw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULLDYrm, X86_INS_VPMULLD: vpmulld	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULLDYrr, X86_INS_VPMULLD: vpmulld	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULLDZ128rm, X86_INS_VPMULLD: vpmulld	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLDZ128rmb, X86_INS_VPMULLD: vpmulld	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLDZ128rmbk, X86_INS_VPMULLD: vpmulld	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLDZ128rmbkz, X86_INS_VPMULLD: vpmulld	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLDZ128rmk, X86_INS_VPMULLD: vpmulld	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLDZ128rmkz, X86_INS_VPMULLD: vpmulld	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLDZ128rr, X86_INS_VPMULLD: vpmulld	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLDZ128rrk, X86_INS_VPMULLD: vpmulld	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLDZ128rrkz, X86_INS_VPMULLD: vpmulld	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLDZ256rm, X86_INS_VPMULLD: vpmulld	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLDZ256rmb, X86_INS_VPMULLD: vpmulld	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLDZ256rmbk, X86_INS_VPMULLD: vpmulld	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLDZ256rmbkz, X86_INS_VPMULLD: vpmulld	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLDZ256rmk, X86_INS_VPMULLD: vpmulld	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLDZ256rmkz, X86_INS_VPMULLD: vpmulld	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLDZ256rr, X86_INS_VPMULLD: vpmulld	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLDZ256rrk, X86_INS_VPMULLD: vpmulld	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLDZ256rrkz, X86_INS_VPMULLD: vpmulld	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLDZrm, X86_INS_VPMULLD: vpmulld	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULLDZrmb, X86_INS_VPMULLD: vpmulld	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULLDZrmbk, X86_INS_VPMULLD: vpmulld	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULLDZrmbkz, X86_INS_VPMULLD: vpmulld	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULLDZrmk, X86_INS_VPMULLD: vpmulld	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULLDZrmkz, X86_INS_VPMULLD: vpmulld	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULLDZrr, X86_INS_VPMULLD: vpmulld	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULLDZrrk, X86_INS_VPMULLD: vpmulld	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULLDZrrkz, X86_INS_VPMULLD: vpmulld	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULLDrm, X86_INS_VPMULLD: vpmulld	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULLDrr, X86_INS_VPMULLD: vpmulld	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULLQZ128rm, X86_INS_VPMULLQ: vpmullq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLQZ128rmb, X86_INS_VPMULLQ: vpmullq	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLQZ128rmbk, X86_INS_VPMULLQ: vpmullq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLQZ128rmbkz, X86_INS_VPMULLQ: vpmullq	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLQZ128rmk, X86_INS_VPMULLQ: vpmullq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLQZ128rmkz, X86_INS_VPMULLQ: vpmullq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLQZ128rr, X86_INS_VPMULLQ: vpmullq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLQZ128rrk, X86_INS_VPMULLQ: vpmullq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLQZ128rrkz, X86_INS_VPMULLQ: vpmullq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLQZ256rm, X86_INS_VPMULLQ: vpmullq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLQZ256rmb, X86_INS_VPMULLQ: vpmullq	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLQZ256rmbk, X86_INS_VPMULLQ: vpmullq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLQZ256rmbkz, X86_INS_VPMULLQ: vpmullq	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLQZ256rmk, X86_INS_VPMULLQ: vpmullq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLQZ256rmkz, X86_INS_VPMULLQ: vpmullq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLQZ256rr, X86_INS_VPMULLQ: vpmullq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLQZ256rrk, X86_INS_VPMULLQ: vpmullq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLQZ256rrkz, X86_INS_VPMULLQ: vpmullq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLQZrm, X86_INS_VPMULLQ: vpmullq	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULLQZrmb, X86_INS_VPMULLQ: vpmullq	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULLQZrmbk, X86_INS_VPMULLQ: vpmullq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULLQZrmbkz, X86_INS_VPMULLQ: vpmullq	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULLQZrmk, X86_INS_VPMULLQ: vpmullq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULLQZrmkz, X86_INS_VPMULLQ: vpmullq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULLQZrr, X86_INS_VPMULLQ: vpmullq	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULLQZrrk, X86_INS_VPMULLQ: vpmullq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULLQZrrkz, X86_INS_VPMULLQ: vpmullq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULLWYrm, X86_INS_VPMULLW: vpmullw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULLWYrr, X86_INS_VPMULLW: vpmullw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULLWZ128rm, X86_INS_VPMULLW: vpmullw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLWZ128rmk, X86_INS_VPMULLW: vpmullw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLWZ128rmkz, X86_INS_VPMULLW: vpmullw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLWZ128rr, X86_INS_VPMULLW: vpmullw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLWZ128rrk, X86_INS_VPMULLW: vpmullw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLWZ128rrkz, X86_INS_VPMULLW: vpmullw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLWZ256rm, X86_INS_VPMULLW: vpmullw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLWZ256rmk, X86_INS_VPMULLW: vpmullw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLWZ256rmkz, X86_INS_VPMULLW: vpmullw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLWZ256rr, X86_INS_VPMULLW: vpmullw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLWZ256rrk, X86_INS_VPMULLW: vpmullw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLWZ256rrkz, X86_INS_VPMULLW: vpmullw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPMULLWZrm, X86_INS_VPMULLW: vpmullw	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULLWZrmk, X86_INS_VPMULLW: vpmullw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULLWZrmkz, X86_INS_VPMULLW: vpmullw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULLWZrr, X86_INS_VPMULLW: vpmullw	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULLWZrrk, X86_INS_VPMULLW: vpmullw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULLWZrrkz, X86_INS_VPMULLW: vpmullw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULLWrm, X86_INS_VPMULLW: vpmullw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULLWrr, X86_INS_VPMULLW: vpmullw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULUDQYrm, X86_INS_VPMULUDQ: vpmuludq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULUDQYrr, X86_INS_VPMULUDQ: vpmuludq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULUDQZrm, X86_INS_VPMULUDQ: vpmuludq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULUDQZrmb, X86_INS_VPMULUDQ: vpmuludq	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULUDQZrmbk, X86_INS_VPMULUDQ: vpmuludq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULUDQZrmbkz, X86_INS_VPMULUDQ: vpmuludq	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULUDQZrmk, X86_INS_VPMULUDQ: vpmuludq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULUDQZrmkz, X86_INS_VPMULUDQ: vpmuludq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULUDQZrr, X86_INS_VPMULUDQ: vpmuludq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULUDQZrrk, X86_INS_VPMULUDQ: vpmuludq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULUDQZrrkz, X86_INS_VPMULUDQ: vpmuludq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPMULUDQrm, X86_INS_VPMULUDQ: vpmuludq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPMULUDQrr, X86_INS_VPMULUDQ: vpmuludq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPORDZ128rm, X86_INS_VPORD: vpord	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORDZ128rmb, X86_INS_VPORD: vpord	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORDZ128rmbk, X86_INS_VPORD: vpord	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORDZ128rmbkz, X86_INS_VPORD: vpord	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORDZ128rmk, X86_INS_VPORD: vpord	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORDZ128rmkz, X86_INS_VPORD: vpord	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORDZ128rr, X86_INS_VPORD: vpord	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORDZ128rrk, X86_INS_VPORD: vpord	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORDZ128rrkz, X86_INS_VPORD: vpord	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORDZ256rm, X86_INS_VPORD: vpord	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORDZ256rmb, X86_INS_VPORD: vpord	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORDZ256rmbk, X86_INS_VPORD: vpord	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORDZ256rmbkz, X86_INS_VPORD: vpord	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORDZ256rmk, X86_INS_VPORD: vpord	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORDZ256rmkz, X86_INS_VPORD: vpord	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORDZ256rr, X86_INS_VPORD: vpord	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORDZ256rrk, X86_INS_VPORD: vpord	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORDZ256rrkz, X86_INS_VPORD: vpord	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORDZrm, X86_INS_VPORD: vpord	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPORDZrmb, X86_INS_VPORD: vpord	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPORDZrmbk, X86_INS_VPORD: vpord	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPORDZrmbkz, X86_INS_VPORD: vpord	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPORDZrmk, X86_INS_VPORD: vpord	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPORDZrmkz, X86_INS_VPORD: vpord	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPORDZrr, X86_INS_VPORD: vpord	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPORDZrrk, X86_INS_VPORD: vpord	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPORDZrrkz, X86_INS_VPORD: vpord	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPORQZ128rm, X86_INS_VPORQ: vporq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORQZ128rmb, X86_INS_VPORQ: vporq	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORQZ128rmbk, X86_INS_VPORQ: vporq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORQZ128rmbkz, X86_INS_VPORQ: vporq	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORQZ128rmk, X86_INS_VPORQ: vporq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORQZ128rmkz, X86_INS_VPORQ: vporq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORQZ128rr, X86_INS_VPORQ: vporq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORQZ128rrk, X86_INS_VPORQ: vporq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORQZ128rrkz, X86_INS_VPORQ: vporq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORQZ256rm, X86_INS_VPORQ: vporq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORQZ256rmb, X86_INS_VPORQ: vporq	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORQZ256rmbk, X86_INS_VPORQ: vporq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORQZ256rmbkz, X86_INS_VPORQ: vporq	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORQZ256rmk, X86_INS_VPORQ: vporq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORQZ256rmkz, X86_INS_VPORQ: vporq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORQZ256rr, X86_INS_VPORQ: vporq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORQZ256rrk, X86_INS_VPORQ: vporq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORQZ256rrkz, X86_INS_VPORQ: vporq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPORQZrm, X86_INS_VPORQ: vporq	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPORQZrmb, X86_INS_VPORQ: vporq	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPORQZrmbk, X86_INS_VPORQ: vporq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPORQZrmbkz, X86_INS_VPORQ: vporq	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPORQZrmk, X86_INS_VPORQ: vporq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPORQZrmkz, X86_INS_VPORQ: vporq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPORQZrr, X86_INS_VPORQ: vporq	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPORQZrrk, X86_INS_VPORQ: vporq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPORQZrrkz, X86_INS_VPORQ: vporq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPORYrm, X86_INS_VPOR: vpor	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPORYrr, X86_INS_VPOR: vpor	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPORrm, X86_INS_VPOR: vpor	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPORrr, X86_INS_VPOR: vpor	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPPERMmr, X86_INS_VPPERM: vpperm	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPPERMrm, X86_INS_VPPERM: vpperm	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPPERMrr, X86_INS_VPPERM: vpperm	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPROTBmi, X86_INS_VPROTB: vprotb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPROTBmr, X86_INS_VPROTB: vprotb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPROTBri, X86_INS_VPROTB: vprotb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPROTBrm, X86_INS_VPROTB: vprotb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPROTBrr, X86_INS_VPROTB: vprotb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPROTDmi, X86_INS_VPROTD: vprotd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPROTDmr, X86_INS_VPROTD: vprotd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPROTDri, X86_INS_VPROTD: vprotd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPROTDrm, X86_INS_VPROTD: vprotd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPROTDrr, X86_INS_VPROTD: vprotd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPROTQmi, X86_INS_VPROTQ: vprotq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPROTQmr, X86_INS_VPROTQ: vprotq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPROTQri, X86_INS_VPROTQ: vprotq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPROTQrm, X86_INS_VPROTQ: vprotq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPROTQrr, X86_INS_VPROTQ: vprotq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPROTWmi, X86_INS_VPROTW: vprotw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPROTWmr, X86_INS_VPROTW: vprotw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPROTWri, X86_INS_VPROTW: vprotw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPROTWrm, X86_INS_VPROTW: vprotw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPROTWrr, X86_INS_VPROTW: vprotw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSADBWYrm, X86_INS_VPSADBW: vpsadbw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSADBWYrr, X86_INS_VPSADBW: vpsadbw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSADBWrm, X86_INS_VPSADBW: vpsadbw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSADBWrr, X86_INS_VPSADBW: vpsadbw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSCATTERDDZmr, X86_INS_VPSCATTERDD: vpscatterdd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSCATTERDQZmr, X86_INS_VPSCATTERDQ: vpscatterdq	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSCATTERQDZmr, X86_INS_VPSCATTERQD: vpscatterqd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSCATTERQQZmr, X86_INS_VPSCATTERQQ: vpscatterqq	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHABmr, X86_INS_VPSHAB: vpshab	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHABrm, X86_INS_VPSHAB: vpshab	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHABrr, X86_INS_VPSHAB: vpshab	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHADmr, X86_INS_VPSHAD: vpshad	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHADrm, X86_INS_VPSHAD: vpshad	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHADrr, X86_INS_VPSHAD: vpshad	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHAQmr, X86_INS_VPSHAQ: vpshaq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHAQrm, X86_INS_VPSHAQ: vpshaq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHAQrr, X86_INS_VPSHAQ: vpshaq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHAWmr, X86_INS_VPSHAW: vpshaw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHAWrm, X86_INS_VPSHAW: vpshaw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHAWrr, X86_INS_VPSHAW: vpshaw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHLBmr, X86_INS_VPSHLB: vpshlb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHLBrm, X86_INS_VPSHLB: vpshlb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHLBrr, X86_INS_VPSHLB: vpshlb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHLDmr, X86_INS_VPSHLD: vpshld	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHLDrm, X86_INS_VPSHLD: vpshld	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHLDrr, X86_INS_VPSHLD: vpshld	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHLQmr, X86_INS_VPSHLQ: vpshlq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHLQrm, X86_INS_VPSHLQ: vpshlq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHLQrr, X86_INS_VPSHLQ: vpshlq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHLWmr, X86_INS_VPSHLW: vpshlw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHLWrm, X86_INS_VPSHLW: vpshlw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHLWrr, X86_INS_VPSHLW: vpshlw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHUFBYrm, X86_INS_VPSHUFB: vpshufb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHUFBYrr, X86_INS_VPSHUFB: vpshufb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHUFBrm, X86_INS_VPSHUFB: vpshufb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHUFBrr, X86_INS_VPSHUFB: vpshufb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHUFDYmi, X86_INS_VPSHUFD: vpshufd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHUFDYri, X86_INS_VPSHUFD: vpshufd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHUFDZmi, X86_INS_VPSHUFD: vpshufd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHUFDZri, X86_INS_VPSHUFD: vpshufd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHUFDmi, X86_INS_VPSHUFD: vpshufd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHUFDri, X86_INS_VPSHUFD: vpshufd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHUFHWYmi, X86_INS_VPSHUFHW: vpshufhw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHUFHWYri, X86_INS_VPSHUFHW: vpshufhw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHUFHWmi, X86_INS_VPSHUFHW: vpshufhw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHUFHWri, X86_INS_VPSHUFHW: vpshufhw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHUFLWYmi, X86_INS_VPSHUFLW: vpshuflw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHUFLWYri, X86_INS_VPSHUFLW: vpshuflw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHUFLWmi, X86_INS_VPSHUFLW: vpshuflw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSHUFLWri, X86_INS_VPSHUFLW: vpshuflw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSIGNBYrm, X86_INS_VPSIGNB: vpsignb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSIGNBYrr, X86_INS_VPSIGNB: vpsignb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSIGNBrm, X86_INS_VPSIGNB: vpsignb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSIGNBrr, X86_INS_VPSIGNB: vpsignb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSIGNDYrm, X86_INS_VPSIGND: vpsignd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSIGNDYrr, X86_INS_VPSIGND: vpsignd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSIGNDrm, X86_INS_VPSIGND: vpsignd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSIGNDrr, X86_INS_VPSIGND: vpsignd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSIGNWYrm, X86_INS_VPSIGNW: vpsignw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSIGNWYrr, X86_INS_VPSIGNW: vpsignw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSIGNWrm, X86_INS_VPSIGNW: vpsignw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSIGNWrr, X86_INS_VPSIGNW: vpsignw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLDQYri, X86_INS_VPSLLDQ: vpslldq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLDQri, X86_INS_VPSLLDQ: vpslldq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLDYri, X86_INS_VPSLLD: vpslld	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLDYrm, X86_INS_VPSLLD: vpslld	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLDYrr, X86_INS_VPSLLD: vpslld	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLDZmi, X86_INS_VPSLLD: vpslld	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLDZmik, X86_INS_VPSLLD: vpslld	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLDZmikz, X86_INS_VPSLLD: vpslld	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSLLDZri, X86_INS_VPSLLD: vpslld	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLDZrik, X86_INS_VPSLLD: vpslld	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLDZrikz, X86_INS_VPSLLD: vpslld	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSLLDZrm, X86_INS_VPSLLD: vpslld	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLDZrmk, X86_INS_VPSLLD: vpslld	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLDZrmkz, X86_INS_VPSLLD: vpslld	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSLLDZrr, X86_INS_VPSLLD: vpslld	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLDZrrk, X86_INS_VPSLLD: vpslld	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLDZrrkz, X86_INS_VPSLLD: vpslld	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSLLDri, X86_INS_VPSLLD: vpslld	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLDrm, X86_INS_VPSLLD: vpslld	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLDrr, X86_INS_VPSLLD: vpslld	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLQYri, X86_INS_VPSLLQ: vpsllq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLQYrm, X86_INS_VPSLLQ: vpsllq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLQYrr, X86_INS_VPSLLQ: vpsllq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLQZmi, X86_INS_VPSLLQ: vpsllq	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLQZmik, X86_INS_VPSLLQ: vpsllq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLQZmikz, X86_INS_VPSLLQ: vpsllq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSLLQZri, X86_INS_VPSLLQ: vpsllq	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLQZrik, X86_INS_VPSLLQ: vpsllq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLQZrikz, X86_INS_VPSLLQ: vpsllq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSLLQZrm, X86_INS_VPSLLQ: vpsllq	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLQZrmk, X86_INS_VPSLLQ: vpsllq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLQZrmkz, X86_INS_VPSLLQ: vpsllq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSLLQZrr, X86_INS_VPSLLQ: vpsllq	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLQZrrk, X86_INS_VPSLLQ: vpsllq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLQZrrkz, X86_INS_VPSLLQ: vpsllq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSLLQri, X86_INS_VPSLLQ: vpsllq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLQrm, X86_INS_VPSLLQ: vpsllq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLQrr, X86_INS_VPSLLQ: vpsllq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLVDYrm, X86_INS_VPSLLVD: vpsllvd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLVDYrr, X86_INS_VPSLLVD: vpsllvd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLVDZrm, X86_INS_VPSLLVD: vpsllvd	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLVDZrmk, X86_INS_VPSLLVD: vpsllvd	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSLLVDZrmkz, X86_INS_VPSLLVD: vpsllvd	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSLLVDZrr, X86_INS_VPSLLVD: vpsllvd	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLVDZrrk, X86_INS_VPSLLVD: vpsllvd	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSLLVDZrrkz, X86_INS_VPSLLVD: vpsllvd	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSLLVDrm, X86_INS_VPSLLVD: vpsllvd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLVDrr, X86_INS_VPSLLVD: vpsllvd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLVQYrm, X86_INS_VPSLLVQ: vpsllvq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLVQYrr, X86_INS_VPSLLVQ: vpsllvq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLVQZrm, X86_INS_VPSLLVQ: vpsllvq	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLVQZrmk, X86_INS_VPSLLVQ: vpsllvq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSLLVQZrmkz, X86_INS_VPSLLVQ: vpsllvq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSLLVQZrr, X86_INS_VPSLLVQ: vpsllvq	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLVQZrrk, X86_INS_VPSLLVQ: vpsllvq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSLLVQZrrkz, X86_INS_VPSLLVQ: vpsllvq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSLLVQrm, X86_INS_VPSLLVQ: vpsllvq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLVQrr, X86_INS_VPSLLVQ: vpsllvq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLWYri, X86_INS_VPSLLW: vpsllw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLWYrm, X86_INS_VPSLLW: vpsllw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLWYrr, X86_INS_VPSLLW: vpsllw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLWri, X86_INS_VPSLLW: vpsllw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLWrm, X86_INS_VPSLLW: vpsllw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSLLWrr, X86_INS_VPSLLW: vpsllw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRADYri, X86_INS_VPSRAD: vpsrad	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRADYrm, X86_INS_VPSRAD: vpsrad	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRADYrr, X86_INS_VPSRAD: vpsrad	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRADZmi, X86_INS_VPSRAD: vpsrad	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRADZmik, X86_INS_VPSRAD: vpsrad	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRADZmikz, X86_INS_VPSRAD: vpsrad	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSRADZri, X86_INS_VPSRAD: vpsrad	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRADZrik, X86_INS_VPSRAD: vpsrad	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRADZrikz, X86_INS_VPSRAD: vpsrad	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRADZrm, X86_INS_VPSRAD: vpsrad	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRADZrmk, X86_INS_VPSRAD: vpsrad	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRADZrmkz, X86_INS_VPSRAD: vpsrad	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRADZrr, X86_INS_VPSRAD: vpsrad	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRADZrrk, X86_INS_VPSRAD: vpsrad	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRADZrrkz, X86_INS_VPSRAD: vpsrad	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRADri, X86_INS_VPSRAD: vpsrad	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRADrm, X86_INS_VPSRAD: vpsrad	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRADrr, X86_INS_VPSRAD: vpsrad	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRAQZmi, X86_INS_VPSRAQ: vpsraq	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRAQZmik, X86_INS_VPSRAQ: vpsraq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRAQZmikz, X86_INS_VPSRAQ: vpsraq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSRAQZri, X86_INS_VPSRAQ: vpsraq	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRAQZrik, X86_INS_VPSRAQ: vpsraq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRAQZrikz, X86_INS_VPSRAQ: vpsraq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRAQZrm, X86_INS_VPSRAQ: vpsraq	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRAQZrmk, X86_INS_VPSRAQ: vpsraq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRAQZrmkz, X86_INS_VPSRAQ: vpsraq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRAQZrr, X86_INS_VPSRAQ: vpsraq	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRAQZrrk, X86_INS_VPSRAQ: vpsraq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRAQZrrkz, X86_INS_VPSRAQ: vpsraq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRAVDYrm, X86_INS_VPSRAVD: vpsravd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRAVDYrr, X86_INS_VPSRAVD: vpsravd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRAVDZrm, X86_INS_VPSRAVD: vpsravd	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRAVDZrmk, X86_INS_VPSRAVD: vpsravd	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRAVDZrmkz, X86_INS_VPSRAVD: vpsravd	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRAVDZrr, X86_INS_VPSRAVD: vpsravd	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRAVDZrrk, X86_INS_VPSRAVD: vpsravd	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRAVDZrrkz, X86_INS_VPSRAVD: vpsravd	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRAVDrm, X86_INS_VPSRAVD: vpsravd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRAVDrr, X86_INS_VPSRAVD: vpsravd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRAVQZrm, X86_INS_VPSRAVQ: vpsravq	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRAVQZrmk, X86_INS_VPSRAVQ: vpsravq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRAVQZrmkz, X86_INS_VPSRAVQ: vpsravq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRAVQZrr, X86_INS_VPSRAVQ: vpsravq	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRAVQZrrk, X86_INS_VPSRAVQ: vpsravq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRAVQZrrkz, X86_INS_VPSRAVQ: vpsravq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRAWYri, X86_INS_VPSRAW: vpsraw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRAWYrm, X86_INS_VPSRAW: vpsraw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRAWYrr, X86_INS_VPSRAW: vpsraw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRAWri, X86_INS_VPSRAW: vpsraw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRAWrm, X86_INS_VPSRAW: vpsraw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRAWrr, X86_INS_VPSRAW: vpsraw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLDQYri, X86_INS_VPSRLDQ: vpsrldq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLDQri, X86_INS_VPSRLDQ: vpsrldq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLDYri, X86_INS_VPSRLD: vpsrld	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLDYrm, X86_INS_VPSRLD: vpsrld	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLDYrr, X86_INS_VPSRLD: vpsrld	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLDZmi, X86_INS_VPSRLD: vpsrld	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLDZmik, X86_INS_VPSRLD: vpsrld	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLDZmikz, X86_INS_VPSRLD: vpsrld	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSRLDZri, X86_INS_VPSRLD: vpsrld	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLDZrik, X86_INS_VPSRLD: vpsrld	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLDZrikz, X86_INS_VPSRLD: vpsrld	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRLDZrm, X86_INS_VPSRLD: vpsrld	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLDZrmk, X86_INS_VPSRLD: vpsrld	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLDZrmkz, X86_INS_VPSRLD: vpsrld	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRLDZrr, X86_INS_VPSRLD: vpsrld	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLDZrrk, X86_INS_VPSRLD: vpsrld	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLDZrrkz, X86_INS_VPSRLD: vpsrld	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRLDri, X86_INS_VPSRLD: vpsrld	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLDrm, X86_INS_VPSRLD: vpsrld	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLDrr, X86_INS_VPSRLD: vpsrld	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLQYri, X86_INS_VPSRLQ: vpsrlq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLQYrm, X86_INS_VPSRLQ: vpsrlq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLQYrr, X86_INS_VPSRLQ: vpsrlq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLQZmi, X86_INS_VPSRLQ: vpsrlq	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLQZmik, X86_INS_VPSRLQ: vpsrlq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLQZmikz, X86_INS_VPSRLQ: vpsrlq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSRLQZri, X86_INS_VPSRLQ: vpsrlq	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLQZrik, X86_INS_VPSRLQ: vpsrlq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLQZrikz, X86_INS_VPSRLQ: vpsrlq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRLQZrm, X86_INS_VPSRLQ: vpsrlq	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLQZrmk, X86_INS_VPSRLQ: vpsrlq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLQZrmkz, X86_INS_VPSRLQ: vpsrlq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRLQZrr, X86_INS_VPSRLQ: vpsrlq	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLQZrrk, X86_INS_VPSRLQ: vpsrlq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLQZrrkz, X86_INS_VPSRLQ: vpsrlq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRLQri, X86_INS_VPSRLQ: vpsrlq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLQrm, X86_INS_VPSRLQ: vpsrlq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLQrr, X86_INS_VPSRLQ: vpsrlq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLVDYrm, X86_INS_VPSRLVD: vpsrlvd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLVDYrr, X86_INS_VPSRLVD: vpsrlvd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLVDZrm, X86_INS_VPSRLVD: vpsrlvd	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLVDZrmk, X86_INS_VPSRLVD: vpsrlvd	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRLVDZrmkz, X86_INS_VPSRLVD: vpsrlvd	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRLVDZrr, X86_INS_VPSRLVD: vpsrlvd	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLVDZrrk, X86_INS_VPSRLVD: vpsrlvd	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRLVDZrrkz, X86_INS_VPSRLVD: vpsrlvd	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRLVDrm, X86_INS_VPSRLVD: vpsrlvd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLVDrr, X86_INS_VPSRLVD: vpsrlvd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLVQYrm, X86_INS_VPSRLVQ: vpsrlvq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLVQYrr, X86_INS_VPSRLVQ: vpsrlvq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLVQZrm, X86_INS_VPSRLVQ: vpsrlvq	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLVQZrmk, X86_INS_VPSRLVQ: vpsrlvq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRLVQZrmkz, X86_INS_VPSRLVQ: vpsrlvq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRLVQZrr, X86_INS_VPSRLVQ: vpsrlvq	$dst  , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLVQZrrk, X86_INS_VPSRLVQ: vpsrlvq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRLVQZrrkz, X86_INS_VPSRLVQ: vpsrlvq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSRLVQrm, X86_INS_VPSRLVQ: vpsrlvq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLVQrr, X86_INS_VPSRLVQ: vpsrlvq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLWYri, X86_INS_VPSRLW: vpsrlw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLWYrm, X86_INS_VPSRLW: vpsrlw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLWYrr, X86_INS_VPSRLW: vpsrlw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLWri, X86_INS_VPSRLW: vpsrlw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLWrm, X86_INS_VPSRLW: vpsrlw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSRLWrr, X86_INS_VPSRLW: vpsrlw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBBYrm, X86_INS_VPSUBB: vpsubb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBBYrr, X86_INS_VPSUBB: vpsubb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBBZ128rm, X86_INS_VPSUBB: vpsubb	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBBZ128rmk, X86_INS_VPSUBB: vpsubb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBBZ128rmkz, X86_INS_VPSUBB: vpsubb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBBZ128rr, X86_INS_VPSUBB: vpsubb	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBBZ128rrk, X86_INS_VPSUBB: vpsubb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBBZ128rrkz, X86_INS_VPSUBB: vpsubb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBBZ256rm, X86_INS_VPSUBB: vpsubb	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBBZ256rmk, X86_INS_VPSUBB: vpsubb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBBZ256rmkz, X86_INS_VPSUBB: vpsubb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBBZ256rr, X86_INS_VPSUBB: vpsubb	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBBZ256rrk, X86_INS_VPSUBB: vpsubb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBBZ256rrkz, X86_INS_VPSUBB: vpsubb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBBZrm, X86_INS_VPSUBB: vpsubb	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSUBBZrmk, X86_INS_VPSUBB: vpsubb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSUBBZrmkz, X86_INS_VPSUBB: vpsubb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSUBBZrr, X86_INS_VPSUBB: vpsubb	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBBZrrk, X86_INS_VPSUBB: vpsubb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSUBBZrrkz, X86_INS_VPSUBB: vpsubb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSUBBrm, X86_INS_VPSUBB: vpsubb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBBrr, X86_INS_VPSUBB: vpsubb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBDYrm, X86_INS_VPSUBD: vpsubd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBDYrr, X86_INS_VPSUBD: vpsubd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBDZ128rm, X86_INS_VPSUBD: vpsubd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBDZ128rmb, X86_INS_VPSUBD: vpsubd	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBDZ128rmbk, X86_INS_VPSUBD: vpsubd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBDZ128rmbkz, X86_INS_VPSUBD: vpsubd	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBDZ128rmk, X86_INS_VPSUBD: vpsubd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBDZ128rmkz, X86_INS_VPSUBD: vpsubd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBDZ128rr, X86_INS_VPSUBD: vpsubd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBDZ128rrk, X86_INS_VPSUBD: vpsubd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBDZ128rrkz, X86_INS_VPSUBD: vpsubd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBDZ256rm, X86_INS_VPSUBD: vpsubd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBDZ256rmb, X86_INS_VPSUBD: vpsubd	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBDZ256rmbk, X86_INS_VPSUBD: vpsubd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBDZ256rmbkz, X86_INS_VPSUBD: vpsubd	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBDZ256rmk, X86_INS_VPSUBD: vpsubd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBDZ256rmkz, X86_INS_VPSUBD: vpsubd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBDZ256rr, X86_INS_VPSUBD: vpsubd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBDZ256rrk, X86_INS_VPSUBD: vpsubd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBDZ256rrkz, X86_INS_VPSUBD: vpsubd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBDZrm, X86_INS_VPSUBD: vpsubd	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBDZrmb, X86_INS_VPSUBD: vpsubd	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBDZrmbk, X86_INS_VPSUBD: vpsubd	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSUBDZrmbkz, X86_INS_VPSUBD: vpsubd	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSUBDZrmk, X86_INS_VPSUBD: vpsubd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSUBDZrmkz, X86_INS_VPSUBD: vpsubd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSUBDZrr, X86_INS_VPSUBD: vpsubd	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBDZrrk, X86_INS_VPSUBD: vpsubd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSUBDZrrkz, X86_INS_VPSUBD: vpsubd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSUBDrm, X86_INS_VPSUBD: vpsubd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBDrr, X86_INS_VPSUBD: vpsubd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBQYrm, X86_INS_VPSUBQ: vpsubq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBQYrr, X86_INS_VPSUBQ: vpsubq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBQZ128rm, X86_INS_VPSUBQ: vpsubq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBQZ128rmb, X86_INS_VPSUBQ: vpsubq	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBQZ128rmbk, X86_INS_VPSUBQ: vpsubq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBQZ128rmbkz, X86_INS_VPSUBQ: vpsubq	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBQZ128rmk, X86_INS_VPSUBQ: vpsubq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBQZ128rmkz, X86_INS_VPSUBQ: vpsubq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBQZ128rr, X86_INS_VPSUBQ: vpsubq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBQZ128rrk, X86_INS_VPSUBQ: vpsubq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBQZ128rrkz, X86_INS_VPSUBQ: vpsubq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBQZ256rm, X86_INS_VPSUBQ: vpsubq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBQZ256rmb, X86_INS_VPSUBQ: vpsubq	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBQZ256rmbk, X86_INS_VPSUBQ: vpsubq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBQZ256rmbkz, X86_INS_VPSUBQ: vpsubq	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBQZ256rmk, X86_INS_VPSUBQ: vpsubq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBQZ256rmkz, X86_INS_VPSUBQ: vpsubq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBQZ256rr, X86_INS_VPSUBQ: vpsubq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBQZ256rrk, X86_INS_VPSUBQ: vpsubq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBQZ256rrkz, X86_INS_VPSUBQ: vpsubq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBQZrm, X86_INS_VPSUBQ: vpsubq	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBQZrmb, X86_INS_VPSUBQ: vpsubq	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBQZrmbk, X86_INS_VPSUBQ: vpsubq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSUBQZrmbkz, X86_INS_VPSUBQ: vpsubq	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSUBQZrmk, X86_INS_VPSUBQ: vpsubq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSUBQZrmkz, X86_INS_VPSUBQ: vpsubq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSUBQZrr, X86_INS_VPSUBQ: vpsubq	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBQZrrk, X86_INS_VPSUBQ: vpsubq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSUBQZrrkz, X86_INS_VPSUBQ: vpsubq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSUBQrm, X86_INS_VPSUBQ: vpsubq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBQrr, X86_INS_VPSUBQ: vpsubq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBSBYrm, X86_INS_VPSUBSB: vpsubsb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBSBYrr, X86_INS_VPSUBSB: vpsubsb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBSBrm, X86_INS_VPSUBSB: vpsubsb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBSBrr, X86_INS_VPSUBSB: vpsubsb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBSWYrm, X86_INS_VPSUBSW: vpsubsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBSWYrr, X86_INS_VPSUBSW: vpsubsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBSWrm, X86_INS_VPSUBSW: vpsubsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBSWrr, X86_INS_VPSUBSW: vpsubsw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBUSBYrm, X86_INS_VPSUBUSB: vpsubusb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBUSBYrr, X86_INS_VPSUBUSB: vpsubusb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBUSBrm, X86_INS_VPSUBUSB: vpsubusb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBUSBrr, X86_INS_VPSUBUSB: vpsubusb	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBUSWYrm, X86_INS_VPSUBUSW: vpsubusw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBUSWYrr, X86_INS_VPSUBUSW: vpsubusw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBUSWrm, X86_INS_VPSUBUSW: vpsubusw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBUSWrr, X86_INS_VPSUBUSW: vpsubusw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBWYrm, X86_INS_VPSUBW: vpsubw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBWYrr, X86_INS_VPSUBW: vpsubw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBWZ128rm, X86_INS_VPSUBW: vpsubw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBWZ128rmk, X86_INS_VPSUBW: vpsubw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBWZ128rmkz, X86_INS_VPSUBW: vpsubw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBWZ128rr, X86_INS_VPSUBW: vpsubw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBWZ128rrk, X86_INS_VPSUBW: vpsubw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBWZ128rrkz, X86_INS_VPSUBW: vpsubw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBWZ256rm, X86_INS_VPSUBW: vpsubw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBWZ256rmk, X86_INS_VPSUBW: vpsubw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBWZ256rmkz, X86_INS_VPSUBW: vpsubw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBWZ256rr, X86_INS_VPSUBW: vpsubw	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBWZ256rrk, X86_INS_VPSUBW: vpsubw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBWZ256rrkz, X86_INS_VPSUBW: vpsubw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPSUBWZrm, X86_INS_VPSUBW: vpsubw	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSUBWZrmk, X86_INS_VPSUBW: vpsubw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSUBWZrmkz, X86_INS_VPSUBW: vpsubw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSUBWZrr, X86_INS_VPSUBW: vpsubw	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBWZrrk, X86_INS_VPSUBW: vpsubw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSUBWZrrkz, X86_INS_VPSUBW: vpsubw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPSUBWrm, X86_INS_VPSUBW: vpsubw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPSUBWrr, X86_INS_VPSUBW: vpsubw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPTESTMDZrm, X86_INS_VPTESTMD: vptestmd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPTESTMDZrr, X86_INS_VPTESTMD: vptestmd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPTESTMQZrm, X86_INS_VPTESTMQ: vptestmq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPTESTMQZrr, X86_INS_VPTESTMQ: vptestmq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPTESTNMDZrm, X86_INS_VPTESTNMD: vptestnmd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPTESTNMDZrr, X86_INS_VPTESTNMD: vptestnmd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPTESTNMQZrm, X86_INS_VPTESTNMQ: vptestnmq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPTESTNMQZrr, X86_INS_VPTESTNMQ: vptestnmq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPTESTYrm, X86_INS_VPTEST: vptest	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPTESTYrr, X86_INS_VPTEST: vptest	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPTESTrm, X86_INS_VPTEST: vptest	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPTESTrr, X86_INS_VPTEST: vptest	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKHBWYrm, X86_INS_VPUNPCKHBW: vpunpckhbw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKHBWYrr, X86_INS_VPUNPCKHBW: vpunpckhbw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKHBWrm, X86_INS_VPUNPCKHBW: vpunpckhbw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKHBWrr, X86_INS_VPUNPCKHBW: vpunpckhbw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKHDQYrm, X86_INS_VPUNPCKHDQ: vpunpckhdq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKHDQYrr, X86_INS_VPUNPCKHDQ: vpunpckhdq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKHDQZrm, X86_INS_VPUNPCKHDQ: vpunpckhdq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKHDQZrr, X86_INS_VPUNPCKHDQ: vpunpckhdq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKHDQrm, X86_INS_VPUNPCKHDQ: vpunpckhdq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKHDQrr, X86_INS_VPUNPCKHDQ: vpunpckhdq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKHQDQYrm, X86_INS_VPUNPCKHQDQ: vpunpckhqdq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKHQDQYrr, X86_INS_VPUNPCKHQDQ: vpunpckhqdq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKHQDQZrm, X86_INS_VPUNPCKHQDQ: vpunpckhqdq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKHQDQZrr, X86_INS_VPUNPCKHQDQ: vpunpckhqdq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKHQDQrm, X86_INS_VPUNPCKHQDQ: vpunpckhqdq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKHQDQrr, X86_INS_VPUNPCKHQDQ: vpunpckhqdq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKHWDYrm, X86_INS_VPUNPCKHWD: vpunpckhwd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKHWDYrr, X86_INS_VPUNPCKHWD: vpunpckhwd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKHWDrm, X86_INS_VPUNPCKHWD: vpunpckhwd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKHWDrr, X86_INS_VPUNPCKHWD: vpunpckhwd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKLBWYrm, X86_INS_VPUNPCKLBW: vpunpcklbw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKLBWYrr, X86_INS_VPUNPCKLBW: vpunpcklbw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKLBWrm, X86_INS_VPUNPCKLBW: vpunpcklbw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKLBWrr, X86_INS_VPUNPCKLBW: vpunpcklbw	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKLDQYrm, X86_INS_VPUNPCKLDQ: vpunpckldq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKLDQYrr, X86_INS_VPUNPCKLDQ: vpunpckldq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKLDQZrm, X86_INS_VPUNPCKLDQ: vpunpckldq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKLDQZrr, X86_INS_VPUNPCKLDQ: vpunpckldq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKLDQrm, X86_INS_VPUNPCKLDQ: vpunpckldq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKLDQrr, X86_INS_VPUNPCKLDQ: vpunpckldq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKLQDQYrm, X86_INS_VPUNPCKLQDQ: vpunpcklqdq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKLQDQYrr, X86_INS_VPUNPCKLQDQ: vpunpcklqdq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKLQDQZrm, X86_INS_VPUNPCKLQDQ: vpunpcklqdq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKLQDQZrr, X86_INS_VPUNPCKLQDQ: vpunpcklqdq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKLQDQrm, X86_INS_VPUNPCKLQDQ: vpunpcklqdq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKLQDQrr, X86_INS_VPUNPCKLQDQ: vpunpcklqdq	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKLWDYrm, X86_INS_VPUNPCKLWD: vpunpcklwd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKLWDYrr, X86_INS_VPUNPCKLWD: vpunpcklwd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKLWDrm, X86_INS_VPUNPCKLWD: vpunpcklwd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPUNPCKLWDrr, X86_INS_VPUNPCKLWD: vpunpcklwd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPXORDZ128rm, X86_INS_VPXORD: vpxord	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORDZ128rmb, X86_INS_VPXORD: vpxord	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORDZ128rmbk, X86_INS_VPXORD: vpxord	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORDZ128rmbkz, X86_INS_VPXORD: vpxord	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORDZ128rmk, X86_INS_VPXORD: vpxord	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORDZ128rmkz, X86_INS_VPXORD: vpxord	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORDZ128rr, X86_INS_VPXORD: vpxord	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORDZ128rrk, X86_INS_VPXORD: vpxord	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORDZ128rrkz, X86_INS_VPXORD: vpxord	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORDZ256rm, X86_INS_VPXORD: vpxord	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORDZ256rmb, X86_INS_VPXORD: vpxord	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORDZ256rmbk, X86_INS_VPXORD: vpxord	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORDZ256rmbkz, X86_INS_VPXORD: vpxord	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORDZ256rmk, X86_INS_VPXORD: vpxord	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORDZ256rmkz, X86_INS_VPXORD: vpxord	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORDZ256rr, X86_INS_VPXORD: vpxord	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORDZ256rrk, X86_INS_VPXORD: vpxord	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORDZ256rrkz, X86_INS_VPXORD: vpxord	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORDZrm, X86_INS_VPXORD: vpxord	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPXORDZrmb, X86_INS_VPXORD: vpxord	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPXORDZrmbk, X86_INS_VPXORD: vpxord	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPXORDZrmbkz, X86_INS_VPXORD: vpxord	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPXORDZrmk, X86_INS_VPXORD: vpxord	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPXORDZrmkz, X86_INS_VPXORD: vpxord	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPXORDZrr, X86_INS_VPXORD: vpxord	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPXORDZrrk, X86_INS_VPXORD: vpxord	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPXORDZrrkz, X86_INS_VPXORD: vpxord	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPXORQZ128rm, X86_INS_VPXORQ: vpxorq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORQZ128rmb, X86_INS_VPXORQ: vpxorq	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORQZ128rmbk, X86_INS_VPXORQ: vpxorq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORQZ128rmbkz, X86_INS_VPXORQ: vpxorq	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORQZ128rmk, X86_INS_VPXORQ: vpxorq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORQZ128rmkz, X86_INS_VPXORQ: vpxorq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORQZ128rr, X86_INS_VPXORQ: vpxorq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORQZ128rrk, X86_INS_VPXORQ: vpxorq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORQZ128rrkz, X86_INS_VPXORQ: vpxorq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORQZ256rm, X86_INS_VPXORQ: vpxorq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORQZ256rmb, X86_INS_VPXORQ: vpxorq	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORQZ256rmbk, X86_INS_VPXORQ: vpxorq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORQZ256rmbkz, X86_INS_VPXORQ: vpxorq	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORQZ256rmk, X86_INS_VPXORQ: vpxorq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORQZ256rmkz, X86_INS_VPXORQ: vpxorq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORQZ256rr, X86_INS_VPXORQ: vpxorq	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORQZ256rrk, X86_INS_VPXORQ: vpxorq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORQZ256rrkz, X86_INS_VPXORQ: vpxorq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VPXORQZrm, X86_INS_VPXORQ: vpxorq	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPXORQZrmb, X86_INS_VPXORQ: vpxorq	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPXORQZrmbk, X86_INS_VPXORQ: vpxorq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPXORQZrmbkz, X86_INS_VPXORQ: vpxorq	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPXORQZrmk, X86_INS_VPXORQ: vpxorq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPXORQZrmkz, X86_INS_VPXORQ: vpxorq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPXORQZrr, X86_INS_VPXORQ: vpxorq	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPXORQZrrk, X86_INS_VPXORQ: vpxorq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPXORQZrrkz, X86_INS_VPXORQ: vpxorq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VPXORYrm, X86_INS_VPXOR: vpxor	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPXORYrr, X86_INS_VPXOR: vpxor	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPXORrm, X86_INS_VPXOR: vpxor	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VPXORrr, X86_INS_VPXOR: vpxor	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRCP14PDZ128m, X86_INS_VRCP14PD: vrcp14pd	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PDZ128mb, X86_INS_VRCP14PD: vrcp14pd	{${src}{1to2}, $dst |$dst , ${src}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PDZ128mbk, X86_INS_VRCP14PD: vrcp14pd	{${src}{1to2}, $dst {${mask}}|$dst {${mask}}, ${src}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PDZ128mbkz, X86_INS_VRCP14PD: vrcp14pd	{${src}{1to2}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PDZ128mk, X86_INS_VRCP14PD: vrcp14pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PDZ128mkz, X86_INS_VRCP14PD: vrcp14pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PDZ128r, X86_INS_VRCP14PD: vrcp14pd	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PDZ128rk, X86_INS_VRCP14PD: vrcp14pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PDZ128rkz, X86_INS_VRCP14PD: vrcp14pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PDZ256m, X86_INS_VRCP14PD: vrcp14pd	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PDZ256mb, X86_INS_VRCP14PD: vrcp14pd	{${src}{1to4}, $dst |$dst , ${src}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PDZ256mbk, X86_INS_VRCP14PD: vrcp14pd	{${src}{1to4}, $dst {${mask}}|$dst {${mask}}, ${src}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PDZ256mbkz, X86_INS_VRCP14PD: vrcp14pd	{${src}{1to4}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PDZ256mk, X86_INS_VRCP14PD: vrcp14pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PDZ256mkz, X86_INS_VRCP14PD: vrcp14pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PDZ256r, X86_INS_VRCP14PD: vrcp14pd	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PDZ256rk, X86_INS_VRCP14PD: vrcp14pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PDZ256rkz, X86_INS_VRCP14PD: vrcp14pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PDZm, X86_INS_VRCP14PD: vrcp14pd	$dst , $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRCP14PDZmb, X86_INS_VRCP14PD: vrcp14pd	{${src}{1to8}, $dst |$dst , ${src}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PDZmbk, X86_INS_VRCP14PD: vrcp14pd	{${src}{1to8}, $dst {${mask}}|$dst {${mask}}, ${src}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PDZmbkz, X86_INS_VRCP14PD: vrcp14pd	{${src}{1to8}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PDZmk, X86_INS_VRCP14PD: vrcp14pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PDZmkz, X86_INS_VRCP14PD: vrcp14pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PDZr, X86_INS_VRCP14PD: vrcp14pd	$dst , $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRCP14PDZrk, X86_INS_VRCP14PD: vrcp14pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PDZrkz, X86_INS_VRCP14PD: vrcp14pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PSZ128m, X86_INS_VRCP14PS: vrcp14ps	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PSZ128mb, X86_INS_VRCP14PS: vrcp14ps	{${src}{1to4}, $dst |$dst , ${src}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PSZ128mbk, X86_INS_VRCP14PS: vrcp14ps	{${src}{1to4}, $dst {${mask}}|$dst {${mask}}, ${src}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PSZ128mbkz, X86_INS_VRCP14PS: vrcp14ps	{${src}{1to4}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PSZ128mk, X86_INS_VRCP14PS: vrcp14ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PSZ128mkz, X86_INS_VRCP14PS: vrcp14ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PSZ128r, X86_INS_VRCP14PS: vrcp14ps	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PSZ128rk, X86_INS_VRCP14PS: vrcp14ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PSZ128rkz, X86_INS_VRCP14PS: vrcp14ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PSZ256m, X86_INS_VRCP14PS: vrcp14ps	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PSZ256mb, X86_INS_VRCP14PS: vrcp14ps	{${src}{1to8}, $dst |$dst , ${src}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PSZ256mbk, X86_INS_VRCP14PS: vrcp14ps	{${src}{1to8}, $dst {${mask}}|$dst {${mask}}, ${src}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PSZ256mbkz, X86_INS_VRCP14PS: vrcp14ps	{${src}{1to8}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PSZ256mk, X86_INS_VRCP14PS: vrcp14ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PSZ256mkz, X86_INS_VRCP14PS: vrcp14ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PSZ256r, X86_INS_VRCP14PS: vrcp14ps	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PSZ256rk, X86_INS_VRCP14PS: vrcp14ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PSZ256rkz, X86_INS_VRCP14PS: vrcp14ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PSZm, X86_INS_VRCP14PS: vrcp14ps	$dst , $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRCP14PSZmb, X86_INS_VRCP14PS: vrcp14ps	{${src}{1to16}, $dst |$dst , ${src}{1to16}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PSZmbk, X86_INS_VRCP14PS: vrcp14ps	{${src}{1to16}, $dst {${mask}}|$dst {${mask}}, ${src}{1to16}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PSZmbkz, X86_INS_VRCP14PS: vrcp14ps	{${src}{1to16}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to16}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PSZmk, X86_INS_VRCP14PS: vrcp14ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PSZmkz, X86_INS_VRCP14PS: vrcp14ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PSZr, X86_INS_VRCP14PS: vrcp14ps	$dst , $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRCP14PSZrk, X86_INS_VRCP14PS: vrcp14ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14PSZrkz, X86_INS_VRCP14PS: vrcp14ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP14SDrm, X86_INS_VRCP14SD: vrcp14sd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRCP14SDrr, X86_INS_VRCP14SD: vrcp14sd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRCP14SSrm, X86_INS_VRCP14SS: vrcp14ss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRCP14SSrr, X86_INS_VRCP14SS: vrcp14ss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRCP28PDm, X86_INS_VRCP28PD: vrcp28pd	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28PDmb, X86_INS_VRCP28PD: vrcp28pd	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28PDmbk, X86_INS_VRCP28PD: vrcp28pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28PDmbkz, X86_INS_VRCP28PD: vrcp28pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28PDmk, X86_INS_VRCP28PD: vrcp28pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28PDmkz, X86_INS_VRCP28PD: vrcp28pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28PDr, X86_INS_VRCP28PD: vrcp28pd	$dst , $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRCP28PDrb, X86_INS_VRCP28PD: vrcp28pd	{$src, $dst {sae}|$dst {sae}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28PDrbk, X86_INS_VRCP28PD: vrcp28pd	{$src, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28PDrbkz, X86_INS_VRCP28PD: vrcp28pd	{$src, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28PDrk, X86_INS_VRCP28PD: vrcp28pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28PDrkz, X86_INS_VRCP28PD: vrcp28pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28PSm, X86_INS_VRCP28PS: vrcp28ps	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28PSmb, X86_INS_VRCP28PS: vrcp28ps	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28PSmbk, X86_INS_VRCP28PS: vrcp28ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28PSmbkz, X86_INS_VRCP28PS: vrcp28ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28PSmk, X86_INS_VRCP28PS: vrcp28ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28PSmkz, X86_INS_VRCP28PS: vrcp28ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28PSr, X86_INS_VRCP28PS: vrcp28ps	$dst , $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRCP28PSrb, X86_INS_VRCP28PS: vrcp28ps	{$src, $dst {sae}|$dst {sae}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28PSrbk, X86_INS_VRCP28PS: vrcp28ps	{$src, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28PSrbkz, X86_INS_VRCP28PS: vrcp28ps	{$src, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28PSrk, X86_INS_VRCP28PS: vrcp28ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28PSrkz, X86_INS_VRCP28PS: vrcp28ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28SDm, X86_INS_VRCP28SD: vrcp28sd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28SDmk, X86_INS_VRCP28SD: vrcp28sd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28SDmkz, X86_INS_VRCP28SD: vrcp28sd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28SDr, X86_INS_VRCP28SD: vrcp28sd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28SDrb, X86_INS_VRCP28SD: vrcp28sd	{$src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28SDrbk, X86_INS_VRCP28SD: vrcp28sd	{$src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28SDrbkz, X86_INS_VRCP28SD: vrcp28sd	{$src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28SDrk, X86_INS_VRCP28SD: vrcp28sd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28SDrkz, X86_INS_VRCP28SD: vrcp28sd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28SSm, X86_INS_VRCP28SS: vrcp28ss	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28SSmk, X86_INS_VRCP28SS: vrcp28ss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28SSmkz, X86_INS_VRCP28SS: vrcp28ss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28SSr, X86_INS_VRCP28SS: vrcp28ss	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28SSrb, X86_INS_VRCP28SS: vrcp28ss	{$src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28SSrbk, X86_INS_VRCP28SS: vrcp28ss	{$src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28SSrbkz, X86_INS_VRCP28SS: vrcp28ss	{$src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28SSrk, X86_INS_VRCP28SS: vrcp28ss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCP28SSrkz, X86_INS_VRCP28SS: vrcp28ss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRCPPSYm, X86_INS_VRCPPS: vrcpps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRCPPSYm_Int, X86_INS_VRCPPS: vrcpps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRCPPSYr, X86_INS_VRCPPS: vrcpps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRCPPSYr_Int, X86_INS_VRCPPS: vrcpps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRCPPSm, X86_INS_VRCPPS: vrcpps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRCPPSm_Int, X86_INS_VRCPPS: vrcpps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRCPPSr, X86_INS_VRCPPS: vrcpps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRCPPSr_Int, X86_INS_VRCPPS: vrcpps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRCPSSm, X86_INS_VRCPSS: vrcpss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRCPSSm_Int, X86_INS_VRCPSS: vrcpss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRCPSSr, X86_INS_VRCPSS: vrcpss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRNDSCALEPDZm, X86_INS_VRNDSCALEPD: vrndscalepd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRNDSCALEPDZr, X86_INS_VRNDSCALEPD: vrndscalepd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRNDSCALEPSZm, X86_INS_VRNDSCALEPS: vrndscaleps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRNDSCALEPSZr, X86_INS_VRNDSCALEPS: vrndscaleps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRNDSCALESDm, X86_INS_VRNDSCALESD: vrndscalesd	$dst , $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRNDSCALESDmk, X86_INS_VRNDSCALESD: vrndscalesd	{$src3, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRNDSCALESDmkz, X86_INS_VRNDSCALESD: vrndscalesd	{$src3, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRNDSCALESDr, X86_INS_VRNDSCALESD: vrndscalesd	$dst , $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRNDSCALESDrb, X86_INS_VRNDSCALESD: vrndscalesd	{$src3, $src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRNDSCALESDrbk, X86_INS_VRNDSCALESD: vrndscalesd	{$src3, $src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRNDSCALESDrbkz, X86_INS_VRNDSCALESD: vrndscalesd	{$src3, $src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRNDSCALESDrk, X86_INS_VRNDSCALESD: vrndscalesd	{$src3, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRNDSCALESDrkz, X86_INS_VRNDSCALESD: vrndscalesd	{$src3, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRNDSCALESSm, X86_INS_VRNDSCALESS: vrndscaless	$dst , $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRNDSCALESSmk, X86_INS_VRNDSCALESS: vrndscaless	{$src3, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRNDSCALESSmkz, X86_INS_VRNDSCALESS: vrndscaless	{$src3, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRNDSCALESSr, X86_INS_VRNDSCALESS: vrndscaless	$dst , $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRNDSCALESSrb, X86_INS_VRNDSCALESS: vrndscaless	{$src3, $src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRNDSCALESSrbk, X86_INS_VRNDSCALESS: vrndscaless	{$src3, $src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRNDSCALESSrbkz, X86_INS_VRNDSCALESS: vrndscaless	{$src3, $src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRNDSCALESSrk, X86_INS_VRNDSCALESS: vrndscaless	{$src3, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRNDSCALESSrkz, X86_INS_VRNDSCALESS: vrndscaless	{$src3, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $src3} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VROUNDPDm, X86_INS_VROUNDPD: vroundpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VROUNDPDr, X86_INS_VROUNDPD: vroundpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VROUNDPSm, X86_INS_VROUNDPS: vroundps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VROUNDPSr, X86_INS_VROUNDPS: vroundps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VROUNDSDm, X86_INS_VROUNDSD: vroundsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VROUNDSDr, X86_INS_VROUNDSD: vroundsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VROUNDSDr_Int, X86_INS_VROUNDSD: vroundsd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VROUNDSSm, X86_INS_VROUNDSS: vroundss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VROUNDSSr, X86_INS_VROUNDSS: vroundss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VROUNDSSr_Int, X86_INS_VROUNDSS: vroundss	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VROUNDYPDm, X86_INS_VROUNDPD: vroundpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VROUNDYPDr, X86_INS_VROUNDPD: vroundpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VROUNDYPSm, X86_INS_VROUNDPS: vroundps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VROUNDYPSr, X86_INS_VROUNDPS: vroundps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRSQRT14PDZ128m, X86_INS_VRSQRT14PD: vrsqrt14pd	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PDZ128mb, X86_INS_VRSQRT14PD: vrsqrt14pd	{${src}{1to2}, $dst |$dst , ${src}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PDZ128mbk, X86_INS_VRSQRT14PD: vrsqrt14pd	{${src}{1to2}, $dst {${mask}}|$dst {${mask}}, ${src}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PDZ128mbkz, X86_INS_VRSQRT14PD: vrsqrt14pd	{${src}{1to2}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PDZ128mk, X86_INS_VRSQRT14PD: vrsqrt14pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PDZ128mkz, X86_INS_VRSQRT14PD: vrsqrt14pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PDZ128r, X86_INS_VRSQRT14PD: vrsqrt14pd	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PDZ128rk, X86_INS_VRSQRT14PD: vrsqrt14pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PDZ128rkz, X86_INS_VRSQRT14PD: vrsqrt14pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PDZ256m, X86_INS_VRSQRT14PD: vrsqrt14pd	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PDZ256mb, X86_INS_VRSQRT14PD: vrsqrt14pd	{${src}{1to4}, $dst |$dst , ${src}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PDZ256mbk, X86_INS_VRSQRT14PD: vrsqrt14pd	{${src}{1to4}, $dst {${mask}}|$dst {${mask}}, ${src}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PDZ256mbkz, X86_INS_VRSQRT14PD: vrsqrt14pd	{${src}{1to4}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PDZ256mk, X86_INS_VRSQRT14PD: vrsqrt14pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PDZ256mkz, X86_INS_VRSQRT14PD: vrsqrt14pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PDZ256r, X86_INS_VRSQRT14PD: vrsqrt14pd	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PDZ256rk, X86_INS_VRSQRT14PD: vrsqrt14pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PDZ256rkz, X86_INS_VRSQRT14PD: vrsqrt14pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PDZm, X86_INS_VRSQRT14PD: vrsqrt14pd	$dst , $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRSQRT14PDZmb, X86_INS_VRSQRT14PD: vrsqrt14pd	{${src}{1to8}, $dst |$dst , ${src}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PDZmbk, X86_INS_VRSQRT14PD: vrsqrt14pd	{${src}{1to8}, $dst {${mask}}|$dst {${mask}}, ${src}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PDZmbkz, X86_INS_VRSQRT14PD: vrsqrt14pd	{${src}{1to8}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PDZmk, X86_INS_VRSQRT14PD: vrsqrt14pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PDZmkz, X86_INS_VRSQRT14PD: vrsqrt14pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PDZr, X86_INS_VRSQRT14PD: vrsqrt14pd	$dst , $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRSQRT14PDZrk, X86_INS_VRSQRT14PD: vrsqrt14pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PDZrkz, X86_INS_VRSQRT14PD: vrsqrt14pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PSZ128m, X86_INS_VRSQRT14PS: vrsqrt14ps	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PSZ128mb, X86_INS_VRSQRT14PS: vrsqrt14ps	{${src}{1to4}, $dst |$dst , ${src}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PSZ128mbk, X86_INS_VRSQRT14PS: vrsqrt14ps	{${src}{1to4}, $dst {${mask}}|$dst {${mask}}, ${src}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PSZ128mbkz, X86_INS_VRSQRT14PS: vrsqrt14ps	{${src}{1to4}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PSZ128mk, X86_INS_VRSQRT14PS: vrsqrt14ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PSZ128mkz, X86_INS_VRSQRT14PS: vrsqrt14ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PSZ128r, X86_INS_VRSQRT14PS: vrsqrt14ps	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PSZ128rk, X86_INS_VRSQRT14PS: vrsqrt14ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PSZ128rkz, X86_INS_VRSQRT14PS: vrsqrt14ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PSZ256m, X86_INS_VRSQRT14PS: vrsqrt14ps	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PSZ256mb, X86_INS_VRSQRT14PS: vrsqrt14ps	{${src}{1to8}, $dst |$dst , ${src}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PSZ256mbk, X86_INS_VRSQRT14PS: vrsqrt14ps	{${src}{1to8}, $dst {${mask}}|$dst {${mask}}, ${src}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PSZ256mbkz, X86_INS_VRSQRT14PS: vrsqrt14ps	{${src}{1to8}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PSZ256mk, X86_INS_VRSQRT14PS: vrsqrt14ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PSZ256mkz, X86_INS_VRSQRT14PS: vrsqrt14ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PSZ256r, X86_INS_VRSQRT14PS: vrsqrt14ps	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PSZ256rk, X86_INS_VRSQRT14PS: vrsqrt14ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PSZ256rkz, X86_INS_VRSQRT14PS: vrsqrt14ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PSZm, X86_INS_VRSQRT14PS: vrsqrt14ps	$dst , $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRSQRT14PSZmb, X86_INS_VRSQRT14PS: vrsqrt14ps	{${src}{1to16}, $dst |$dst , ${src}{1to16}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PSZmbk, X86_INS_VRSQRT14PS: vrsqrt14ps	{${src}{1to16}, $dst {${mask}}|$dst {${mask}}, ${src}{1to16}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PSZmbkz, X86_INS_VRSQRT14PS: vrsqrt14ps	{${src}{1to16}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to16}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PSZmk, X86_INS_VRSQRT14PS: vrsqrt14ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PSZmkz, X86_INS_VRSQRT14PS: vrsqrt14ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PSZr, X86_INS_VRSQRT14PS: vrsqrt14ps	$dst , $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRSQRT14PSZrk, X86_INS_VRSQRT14PS: vrsqrt14ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14PSZrkz, X86_INS_VRSQRT14PS: vrsqrt14ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT14SDrm, X86_INS_VRSQRT14SD: vrsqrt14sd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRSQRT14SDrr, X86_INS_VRSQRT14SD: vrsqrt14sd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRSQRT14SSrm, X86_INS_VRSQRT14SS: vrsqrt14ss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRSQRT14SSrr, X86_INS_VRSQRT14SS: vrsqrt14ss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRSQRT28PDm, X86_INS_VRSQRT28PD: vrsqrt28pd	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28PDmb, X86_INS_VRSQRT28PD: vrsqrt28pd	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28PDmbk, X86_INS_VRSQRT28PD: vrsqrt28pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28PDmbkz, X86_INS_VRSQRT28PD: vrsqrt28pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28PDmk, X86_INS_VRSQRT28PD: vrsqrt28pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28PDmkz, X86_INS_VRSQRT28PD: vrsqrt28pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28PDr, X86_INS_VRSQRT28PD: vrsqrt28pd	$dst , $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRSQRT28PDrb, X86_INS_VRSQRT28PD: vrsqrt28pd	{$src, $dst {sae}|$dst {sae}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28PDrbk, X86_INS_VRSQRT28PD: vrsqrt28pd	{$src, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28PDrbkz, X86_INS_VRSQRT28PD: vrsqrt28pd	{$src, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28PDrk, X86_INS_VRSQRT28PD: vrsqrt28pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28PDrkz, X86_INS_VRSQRT28PD: vrsqrt28pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28PSm, X86_INS_VRSQRT28PS: vrsqrt28ps	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28PSmb, X86_INS_VRSQRT28PS: vrsqrt28ps	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28PSmbk, X86_INS_VRSQRT28PS: vrsqrt28ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28PSmbkz, X86_INS_VRSQRT28PS: vrsqrt28ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28PSmk, X86_INS_VRSQRT28PS: vrsqrt28ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28PSmkz, X86_INS_VRSQRT28PS: vrsqrt28ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28PSr, X86_INS_VRSQRT28PS: vrsqrt28ps	$dst , $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRSQRT28PSrb, X86_INS_VRSQRT28PS: vrsqrt28ps	{$src, $dst {sae}|$dst {sae}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28PSrbk, X86_INS_VRSQRT28PS: vrsqrt28ps	{$src, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28PSrbkz, X86_INS_VRSQRT28PS: vrsqrt28ps	{$src, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28PSrk, X86_INS_VRSQRT28PS: vrsqrt28ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28PSrkz, X86_INS_VRSQRT28PS: vrsqrt28ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28SDm, X86_INS_VRSQRT28SD: vrsqrt28sd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28SDmk, X86_INS_VRSQRT28SD: vrsqrt28sd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28SDmkz, X86_INS_VRSQRT28SD: vrsqrt28sd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28SDr, X86_INS_VRSQRT28SD: vrsqrt28sd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28SDrb, X86_INS_VRSQRT28SD: vrsqrt28sd	{$src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28SDrbk, X86_INS_VRSQRT28SD: vrsqrt28sd	{$src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28SDrbkz, X86_INS_VRSQRT28SD: vrsqrt28sd	{$src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28SDrk, X86_INS_VRSQRT28SD: vrsqrt28sd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28SDrkz, X86_INS_VRSQRT28SD: vrsqrt28sd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28SSm, X86_INS_VRSQRT28SS: vrsqrt28ss	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28SSmk, X86_INS_VRSQRT28SS: vrsqrt28ss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28SSmkz, X86_INS_VRSQRT28SS: vrsqrt28ss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28SSr, X86_INS_VRSQRT28SS: vrsqrt28ss	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28SSrb, X86_INS_VRSQRT28SS: vrsqrt28ss	{$src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28SSrbk, X86_INS_VRSQRT28SS: vrsqrt28ss	{$src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28SSrbkz, X86_INS_VRSQRT28SS: vrsqrt28ss	{$src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28SSrk, X86_INS_VRSQRT28SS: vrsqrt28ss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRT28SSrkz, X86_INS_VRSQRT28SS: vrsqrt28ss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VRSQRTPSYm, X86_INS_VRSQRTPS: vrsqrtps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRSQRTPSYm_Int, X86_INS_VRSQRTPS: vrsqrtps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRSQRTPSYr, X86_INS_VRSQRTPS: vrsqrtps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRSQRTPSYr_Int, X86_INS_VRSQRTPS: vrsqrtps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRSQRTPSm, X86_INS_VRSQRTPS: vrsqrtps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRSQRTPSm_Int, X86_INS_VRSQRTPS: vrsqrtps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRSQRTPSr, X86_INS_VRSQRTPS: vrsqrtps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRSQRTPSr_Int, X86_INS_VRSQRTPS: vrsqrtps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRSQRTSSm, X86_INS_VRSQRTSS: vrsqrtss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRSQRTSSm_Int, X86_INS_VRSQRTSS: vrsqrtss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VRSQRTSSr, X86_INS_VRSQRTSS: vrsqrtss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSCATTERDPDZmr, X86_INS_VSCATTERDPD: vscatterdpd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSCATTERDPSZmr, X86_INS_VSCATTERDPS: vscatterdps	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSCATTERPF0DPDm, X86_INS_VSCATTERPF0DPD: vscatterpf0dpd	{$src {${mask}}|{${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSCATTERPF0DPSm, X86_INS_VSCATTERPF0DPS: vscatterpf0dps	{$src {${mask}}|{${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSCATTERPF0QPDm, X86_INS_VSCATTERPF0QPD: vscatterpf0qpd	{$src {${mask}}|{${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSCATTERPF0QPSm, X86_INS_VSCATTERPF0QPS: vscatterpf0qps	{$src {${mask}}|{${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSCATTERPF1DPDm, X86_INS_VSCATTERPF1DPD: vscatterpf1dpd	{$src {${mask}}|{${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSCATTERPF1DPSm, X86_INS_VSCATTERPF1DPS: vscatterpf1dps	{$src {${mask}}|{${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSCATTERPF1QPDm, X86_INS_VSCATTERPF1QPD: vscatterpf1qpd	{$src {${mask}}|{${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSCATTERPF1QPSm, X86_INS_VSCATTERPF1QPS: vscatterpf1qps	{$src {${mask}}|{${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSCATTERQPDZmr, X86_INS_VSCATTERQPD: vscatterqpd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSCATTERQPSZmr, X86_INS_VSCATTERQPS: vscatterqps	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSHUFPDYrmi, X86_INS_VSHUFPD: vshufpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSHUFPDYrri, X86_INS_VSHUFPD: vshufpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSHUFPDZrmi, X86_INS_VSHUFPD: vshufpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSHUFPDZrri, X86_INS_VSHUFPD: vshufpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSHUFPDrmi, X86_INS_VSHUFPD: vshufpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSHUFPDrri, X86_INS_VSHUFPD: vshufpd	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSHUFPSYrmi, X86_INS_VSHUFPS: vshufps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSHUFPSYrri, X86_INS_VSHUFPS: vshufps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSHUFPSZrmi, X86_INS_VSHUFPS: vshufps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSHUFPSZrri, X86_INS_VSHUFPS: vshufps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSHUFPSrmi, X86_INS_VSHUFPS: vshufps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSHUFPSrri, X86_INS_VSHUFPS: vshufps	$dst, $src1, $src2, $src3 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSQRTPDYm, X86_INS_VSQRTPD: vsqrtpd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSQRTPDYr, X86_INS_VSQRTPD: vsqrtpd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSQRTPDZ128m, X86_INS_VSQRTPD: vsqrtpd	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPDZ128mb, X86_INS_VSQRTPD: vsqrtpd	{${src}{1to2}, $dst |$dst , ${src}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPDZ128mbk, X86_INS_VSQRTPD: vsqrtpd	{${src}{1to2}, $dst {${mask}}|$dst {${mask}}, ${src}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPDZ128mbkz, X86_INS_VSQRTPD: vsqrtpd	{${src}{1to2}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPDZ128mk, X86_INS_VSQRTPD: vsqrtpd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPDZ128mkz, X86_INS_VSQRTPD: vsqrtpd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPDZ128r, X86_INS_VSQRTPD: vsqrtpd	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPDZ128rk, X86_INS_VSQRTPD: vsqrtpd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPDZ128rkz, X86_INS_VSQRTPD: vsqrtpd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPDZ256m, X86_INS_VSQRTPD: vsqrtpd	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPDZ256mb, X86_INS_VSQRTPD: vsqrtpd	{${src}{1to4}, $dst |$dst , ${src}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPDZ256mbk, X86_INS_VSQRTPD: vsqrtpd	{${src}{1to4}, $dst {${mask}}|$dst {${mask}}, ${src}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPDZ256mbkz, X86_INS_VSQRTPD: vsqrtpd	{${src}{1to4}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPDZ256mk, X86_INS_VSQRTPD: vsqrtpd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPDZ256mkz, X86_INS_VSQRTPD: vsqrtpd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPDZ256r, X86_INS_VSQRTPD: vsqrtpd	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPDZ256rk, X86_INS_VSQRTPD: vsqrtpd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPDZ256rkz, X86_INS_VSQRTPD: vsqrtpd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPDZm, X86_INS_VSQRTPD: vsqrtpd	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPDZmb, X86_INS_VSQRTPD: vsqrtpd	{${src}{1to8}, $dst |$dst , ${src}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPDZmbk, X86_INS_VSQRTPD: vsqrtpd	{${src}{1to8}, $dst {${mask}}|$dst {${mask}}, ${src}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPDZmbkz, X86_INS_VSQRTPD: vsqrtpd	{${src}{1to8}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPDZmk, X86_INS_VSQRTPD: vsqrtpd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPDZmkz, X86_INS_VSQRTPD: vsqrtpd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPDZr, X86_INS_VSQRTPD: vsqrtpd	$dst , $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSQRTPDZrk, X86_INS_VSQRTPD: vsqrtpd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPDZrkz, X86_INS_VSQRTPD: vsqrtpd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPDm, X86_INS_VSQRTPD: vsqrtpd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSQRTPDr, X86_INS_VSQRTPD: vsqrtpd	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSQRTPSYm, X86_INS_VSQRTPS: vsqrtps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSQRTPSYr, X86_INS_VSQRTPS: vsqrtps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSQRTPSZ128m, X86_INS_VSQRTPS: vsqrtps	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPSZ128mb, X86_INS_VSQRTPS: vsqrtps	{${src}{1to4}, $dst |$dst , ${src}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPSZ128mbk, X86_INS_VSQRTPS: vsqrtps	{${src}{1to4}, $dst {${mask}}|$dst {${mask}}, ${src}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPSZ128mbkz, X86_INS_VSQRTPS: vsqrtps	{${src}{1to4}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPSZ128mk, X86_INS_VSQRTPS: vsqrtps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPSZ128mkz, X86_INS_VSQRTPS: vsqrtps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPSZ128r, X86_INS_VSQRTPS: vsqrtps	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPSZ128rk, X86_INS_VSQRTPS: vsqrtps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPSZ128rkz, X86_INS_VSQRTPS: vsqrtps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPSZ256m, X86_INS_VSQRTPS: vsqrtps	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPSZ256mb, X86_INS_VSQRTPS: vsqrtps	{${src}{1to8}, $dst |$dst , ${src}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPSZ256mbk, X86_INS_VSQRTPS: vsqrtps	{${src}{1to8}, $dst {${mask}}|$dst {${mask}}, ${src}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPSZ256mbkz, X86_INS_VSQRTPS: vsqrtps	{${src}{1to8}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPSZ256mk, X86_INS_VSQRTPS: vsqrtps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPSZ256mkz, X86_INS_VSQRTPS: vsqrtps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPSZ256r, X86_INS_VSQRTPS: vsqrtps	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPSZ256rk, X86_INS_VSQRTPS: vsqrtps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPSZ256rkz, X86_INS_VSQRTPS: vsqrtps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPSZm, X86_INS_VSQRTPS: vsqrtps	$dst , $src */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPSZmb, X86_INS_VSQRTPS: vsqrtps	{${src}{1to16}, $dst |$dst , ${src}{1to16}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPSZmbk, X86_INS_VSQRTPS: vsqrtps	{${src}{1to16}, $dst {${mask}}|$dst {${mask}}, ${src}{1to16}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPSZmbkz, X86_INS_VSQRTPS: vsqrtps	{${src}{1to16}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to16}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPSZmk, X86_INS_VSQRTPS: vsqrtps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPSZmkz, X86_INS_VSQRTPS: vsqrtps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPSZr, X86_INS_VSQRTPS: vsqrtps	$dst , $src */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSQRTPSZrk, X86_INS_VSQRTPS: vsqrtps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPSZrkz, X86_INS_VSQRTPS: vsqrtps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSQRTPSm, X86_INS_VSQRTPS: vsqrtps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSQRTPSr, X86_INS_VSQRTPS: vsqrtps	$dst, $src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSQRTSDZm, X86_INS_VSQRTSD: vsqrtsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSQRTSDZm_Int, X86_INS_VSQRTSD: vsqrtsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSQRTSDZr, X86_INS_VSQRTSD: vsqrtsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSQRTSDZr_Int, X86_INS_VSQRTSD: vsqrtsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSQRTSDm, X86_INS_VSQRTSD: vsqrtsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSQRTSDm_Int, X86_INS_VSQRTSD: vsqrtsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSQRTSDr, X86_INS_VSQRTSD: vsqrtsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSQRTSSZm, X86_INS_VSQRTSS: vsqrtss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSQRTSSZm_Int, X86_INS_VSQRTSS: vsqrtss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSQRTSSZr, X86_INS_VSQRTSS: vsqrtss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSQRTSSZr_Int, X86_INS_VSQRTSS: vsqrtss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSQRTSSm, X86_INS_VSQRTSS: vsqrtss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSQRTSSm_Int, X86_INS_VSQRTSS: vsqrtss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSQRTSSr, X86_INS_VSQRTSS: vsqrtss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSTMXCSR, X86_INS_VSTMXCSR: vstmxcsr	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSUBPDYrm, X86_INS_VSUBPD: vsubpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSUBPDYrr, X86_INS_VSUBPD: vsubpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSUBPDZ128rm, X86_INS_VSUBPD: vsubpd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPDZ128rmb, X86_INS_VSUBPD: vsubpd	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPDZ128rmbk, X86_INS_VSUBPD: vsubpd	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPDZ128rmbkz, X86_INS_VSUBPD: vsubpd	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPDZ128rmk, X86_INS_VSUBPD: vsubpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPDZ128rmkz, X86_INS_VSUBPD: vsubpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPDZ128rr, X86_INS_VSUBPD: vsubpd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPDZ128rrk, X86_INS_VSUBPD: vsubpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPDZ128rrkz, X86_INS_VSUBPD: vsubpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPDZ256rm, X86_INS_VSUBPD: vsubpd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPDZ256rmb, X86_INS_VSUBPD: vsubpd	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPDZ256rmbk, X86_INS_VSUBPD: vsubpd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPDZ256rmbkz, X86_INS_VSUBPD: vsubpd	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPDZ256rmk, X86_INS_VSUBPD: vsubpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPDZ256rmkz, X86_INS_VSUBPD: vsubpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPDZ256rr, X86_INS_VSUBPD: vsubpd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPDZ256rrk, X86_INS_VSUBPD: vsubpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPDZ256rrkz, X86_INS_VSUBPD: vsubpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPDZrb, X86_INS_VSUBPD: vsubpd	$dst , $src1, $src2, $rc */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VSUBPDZrbk, X86_INS_VSUBPD: vsubpd	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VSUBPDZrbkz, X86_INS_VSUBPD: vsubpd	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VSUBPDZrm, X86_INS_VSUBPD: vsubpd	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSUBPDZrmb, X86_INS_VSUBPD: vsubpd	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSUBPDZrmbk, X86_INS_VSUBPD: vsubpd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VSUBPDZrmbkz, X86_INS_VSUBPD: vsubpd	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VSUBPDZrmk, X86_INS_VSUBPD: vsubpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VSUBPDZrmkz, X86_INS_VSUBPD: vsubpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VSUBPDZrr, X86_INS_VSUBPD: vsubpd	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSUBPDZrrk, X86_INS_VSUBPD: vsubpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VSUBPDZrrkz, X86_INS_VSUBPD: vsubpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VSUBPDrm, X86_INS_VSUBPD: vsubpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSUBPDrr, X86_INS_VSUBPD: vsubpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSUBPSYrm, X86_INS_VSUBPS: vsubps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSUBPSYrr, X86_INS_VSUBPS: vsubps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSUBPSZ128rm, X86_INS_VSUBPS: vsubps	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPSZ128rmb, X86_INS_VSUBPS: vsubps	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPSZ128rmbk, X86_INS_VSUBPS: vsubps	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPSZ128rmbkz, X86_INS_VSUBPS: vsubps	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPSZ128rmk, X86_INS_VSUBPS: vsubps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPSZ128rmkz, X86_INS_VSUBPS: vsubps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPSZ128rr, X86_INS_VSUBPS: vsubps	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPSZ128rrk, X86_INS_VSUBPS: vsubps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPSZ128rrkz, X86_INS_VSUBPS: vsubps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPSZ256rm, X86_INS_VSUBPS: vsubps	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPSZ256rmb, X86_INS_VSUBPS: vsubps	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPSZ256rmbk, X86_INS_VSUBPS: vsubps	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPSZ256rmbkz, X86_INS_VSUBPS: vsubps	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPSZ256rmk, X86_INS_VSUBPS: vsubps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPSZ256rmkz, X86_INS_VSUBPS: vsubps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPSZ256rr, X86_INS_VSUBPS: vsubps	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPSZ256rrk, X86_INS_VSUBPS: vsubps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPSZ256rrkz, X86_INS_VSUBPS: vsubps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBPSZrb, X86_INS_VSUBPS: vsubps	$dst , $src1, $src2, $rc */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VSUBPSZrbk, X86_INS_VSUBPS: vsubps	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VSUBPSZrbkz, X86_INS_VSUBPS: vsubps	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VSUBPSZrm, X86_INS_VSUBPS: vsubps	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSUBPSZrmb, X86_INS_VSUBPS: vsubps	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSUBPSZrmbk, X86_INS_VSUBPS: vsubps	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VSUBPSZrmbkz, X86_INS_VSUBPS: vsubps	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VSUBPSZrmk, X86_INS_VSUBPS: vsubps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VSUBPSZrmkz, X86_INS_VSUBPS: vsubps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VSUBPSZrr, X86_INS_VSUBPS: vsubps	$dst , $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSUBPSZrrk, X86_INS_VSUBPS: vsubps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VSUBPSZrrkz, X86_INS_VSUBPS: vsubps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
-	},
-	{	/* X86_VSUBPSrm, X86_INS_VSUBPS: vsubps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSUBPSrr, X86_INS_VSUBPS: vsubps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSUBSDZrm, X86_INS_VSUBSD: vsubsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSUBSDZrm_Int, X86_INS_VSUBSD: vsubsd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBSDZrm_Intk, X86_INS_VSUBSD: vsubsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBSDZrm_Intkz, X86_INS_VSUBSD: vsubsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBSDZrr, X86_INS_VSUBSD: vsubsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSUBSDZrr_Int, X86_INS_VSUBSD: vsubsd	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBSDZrr_Intk, X86_INS_VSUBSD: vsubsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBSDZrr_Intkz, X86_INS_VSUBSD: vsubsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBSDZrrb, X86_INS_VSUBSD: vsubsd	$dst , $src1, $src2, $rc */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBSDZrrbk, X86_INS_VSUBSD: vsubsd	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBSDZrrbkz, X86_INS_VSUBSD: vsubsd	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBSDrm, X86_INS_VSUBSD: vsubsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSUBSDrm_Int, X86_INS_VSUBSD: vsubsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSUBSDrr, X86_INS_VSUBSD: vsubsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSUBSDrr_Int, X86_INS_VSUBSD: vsubsd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSUBSSZrm, X86_INS_VSUBSS: vsubss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSUBSSZrm_Int, X86_INS_VSUBSS: vsubss	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBSSZrm_Intk, X86_INS_VSUBSS: vsubss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBSSZrm_Intkz, X86_INS_VSUBSS: vsubss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBSSZrr, X86_INS_VSUBSS: vsubss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSUBSSZrr_Int, X86_INS_VSUBSS: vsubss	$dst , $src1, $src2 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBSSZrr_Intk, X86_INS_VSUBSS: vsubss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBSSZrr_Intkz, X86_INS_VSUBSS: vsubss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBSSZrrb, X86_INS_VSUBSS: vsubss	$dst , $src1, $src2, $rc */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBSSZrrbk, X86_INS_VSUBSS: vsubss	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBSSZrrbkz, X86_INS_VSUBSS: vsubss	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VSUBSSrm, X86_INS_VSUBSS: vsubss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSUBSSrm_Int, X86_INS_VSUBSS: vsubss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSUBSSrr, X86_INS_VSUBSS: vsubss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VSUBSSrr_Int, X86_INS_VSUBSS: vsubss	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VTESTPDYrm, X86_INS_VTESTPD: vtestpd	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VTESTPDYrr, X86_INS_VTESTPD: vtestpd	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VTESTPDrm, X86_INS_VTESTPD: vtestpd	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VTESTPDrr, X86_INS_VTESTPD: vtestpd	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VTESTPSYrm, X86_INS_VTESTPS: vtestps	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VTESTPSYrr, X86_INS_VTESTPS: vtestps	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VTESTPSrm, X86_INS_VTESTPS: vtestps	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VTESTPSrr, X86_INS_VTESTPS: vtestps	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUCOMISDZrm, X86_INS_VUCOMISD: vucomisd	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUCOMISDZrr, X86_INS_VUCOMISD: vucomisd	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUCOMISDrm, X86_INS_VUCOMISD: vucomisd	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUCOMISDrr, X86_INS_VUCOMISD: vucomisd	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUCOMISSZrm, X86_INS_VUCOMISS: vucomiss	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUCOMISSZrr, X86_INS_VUCOMISS: vucomiss	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUCOMISSrm, X86_INS_VUCOMISS: vucomiss	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUCOMISSrr, X86_INS_VUCOMISS: vucomiss	$src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUNPCKHPDYrm, X86_INS_VUNPCKHPD: vunpckhpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUNPCKHPDYrr, X86_INS_VUNPCKHPD: vunpckhpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUNPCKHPDZrm, X86_INS_VUNPCKHPD: vunpckhpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUNPCKHPDZrr, X86_INS_VUNPCKHPD: vunpckhpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUNPCKHPDrm, X86_INS_VUNPCKHPD: vunpckhpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUNPCKHPDrr, X86_INS_VUNPCKHPD: vunpckhpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUNPCKHPSYrm, X86_INS_VUNPCKHPS: vunpckhps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUNPCKHPSYrr, X86_INS_VUNPCKHPS: vunpckhps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUNPCKHPSZrm, X86_INS_VUNPCKHPS: vunpckhps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUNPCKHPSZrr, X86_INS_VUNPCKHPS: vunpckhps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUNPCKHPSrm, X86_INS_VUNPCKHPS: vunpckhps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUNPCKHPSrr, X86_INS_VUNPCKHPS: vunpckhps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUNPCKLPDYrm, X86_INS_VUNPCKLPD: vunpcklpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUNPCKLPDYrr, X86_INS_VUNPCKLPD: vunpcklpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUNPCKLPDZrm, X86_INS_VUNPCKLPD: vunpcklpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUNPCKLPDZrr, X86_INS_VUNPCKLPD: vunpcklpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUNPCKLPDrm, X86_INS_VUNPCKLPD: vunpcklpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUNPCKLPDrr, X86_INS_VUNPCKLPD: vunpcklpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUNPCKLPSYrm, X86_INS_VUNPCKLPS: vunpcklps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUNPCKLPSYrr, X86_INS_VUNPCKLPS: vunpcklps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUNPCKLPSZrm, X86_INS_VUNPCKLPS: vunpcklps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUNPCKLPSZrr, X86_INS_VUNPCKLPS: vunpcklps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUNPCKLPSrm, X86_INS_VUNPCKLPS: vunpcklps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VUNPCKLPSrr, X86_INS_VUNPCKLPS: vunpcklps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VXORPDYrm, X86_INS_VXORPD: vxorpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VXORPDYrr, X86_INS_VXORPD: vxorpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VXORPDrm, X86_INS_VXORPD: vxorpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VXORPDrr, X86_INS_VXORPD: vxorpd	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VXORPSYrm, X86_INS_VXORPS: vxorps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VXORPSYrr, X86_INS_VXORPS: vxorps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VXORPSrm, X86_INS_VXORPS: vxorps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VXORPSrr, X86_INS_VXORPS: vxorps	$dst, $src1, $src2 */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_VZEROALL, X86_INS_VZEROALL: vzeroall */
-		0,
-		{ 0 }
-	},
-	{	/* X86_VZEROUPPER, X86_INS_VZEROUPPER: vzeroupper */
-		0,
-		{ 0 }
-	},
-	{	/* X86_WAIT, X86_INS_WAIT: wait */
-		0,
-		{ 0 }
-	},
-	{	/* X86_WBINVD, X86_INS_WBINVD: wbinvd */
-		0,
-		{ 0 }
-	},
-	{	/* X86_WRFSBASE, X86_INS_WRFSBASE: wrfsbase{l}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_WRFSBASE64, X86_INS_WRFSBASE: wrfsbase{q}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_WRGSBASE, X86_INS_WRGSBASE: wrgsbase{l}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_WRGSBASE64, X86_INS_WRGSBASE: wrgsbase{q}	$src */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_WRMSR, X86_INS_WRMSR: wrmsr */
-		0,
-		{ 0 }
-	},
-	{	/* X86_XABORT, X86_INS_XABORT: xabort	$imm */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_XACQUIRE_PREFIX, X86_INS_XACQUIRE: xacquire */
-		0,
-		{ 0 }
-	},
-	{	/* X86_XADD16rm, X86_INS_XADD: xadd{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_WRITE, 0 }
-	},
-	{	/* X86_XADD16rr, X86_INS_XADD: xadd{w}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_WRITE, 0 }
-	},
-	{	/* X86_XADD32rm, X86_INS_XADD: xadd{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_WRITE, 0 }
-	},
-	{	/* X86_XADD32rr, X86_INS_XADD: xadd{l}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_WRITE, 0 }
-	},
-	{	/* X86_XADD64rm, X86_INS_XADD: xadd{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_WRITE, 0 }
-	},
-	{	/* X86_XADD64rr, X86_INS_XADD: xadd{q}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_WRITE, 0 }
-	},
-	{	/* X86_XADD8rm, X86_INS_XADD: xadd{b}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_WRITE, 0 }
-	},
-	{	/* X86_XADD8rr, X86_INS_XADD: xadd{b}	$dst, $src */
-		X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_WRITE, 0 }
-	},
-	{	/* X86_XBEGIN_2, X86_INS_XBEGIN: xbegin	$dst */
-		0,
-		{ 0 }
-	},
-	{	/* X86_XBEGIN_4, X86_INS_XBEGIN: xbegin	$dst */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_XCHG16ar, X86_INS_XCHG: xchg{w}	ax, $src */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ | CS_OP_WRITE, 0 }
-	},
-	{	/* X86_XCHG16rm, X86_INS_XCHG: xchg{w}	$ptr, $val */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ | CS_OP_WRITE, 0 }
-	},
-	{	/* X86_XCHG16rr, X86_INS_XCHG: xchg{w}	$src, $val */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ | CS_OP_WRITE, 0 }
-	},
-	{	/* X86_XCHG32ar, X86_INS_XCHG: xchg{l}	eax, $src */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ | CS_OP_WRITE, 0 }
-	},
-	{	/* X86_XCHG32ar64, X86_INS_XCHG: xchg{l}	eax, $src */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ | CS_OP_WRITE, 0 }
-	},
-	{	/* X86_XCHG32rm, X86_INS_XCHG: xchg{l}	$ptr, $val */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ | CS_OP_WRITE, 0 }
-	},
-	{	/* X86_XCHG32rr, X86_INS_XCHG: xchg{l}	$src, $val */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ | CS_OP_WRITE, 0 }
-	},
-	{	/* X86_XCHG64ar, X86_INS_XCHG: xchg{q}	rax, $src */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ | CS_OP_WRITE, 0 }
-	},
-	{	/* X86_XCHG64rm, X86_INS_XCHG: xchg{q}	$ptr, $val */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ | CS_OP_WRITE, 0 }
-	},
-	{	/* X86_XCHG64rr, X86_INS_XCHG: xchg{q}	$src, $val */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ | CS_OP_WRITE, 0 }
-	},
-	{	/* X86_XCHG8rm, X86_INS_XCHG: xchg{b}	$ptr, $val */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ | CS_OP_WRITE, 0 }
-	},
-	{	/* X86_XCHG8rr, X86_INS_XCHG: xchg{b}	$src, $val */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ | CS_OP_WRITE, 0 }
-	},
-	{	/* X86_XCH_F, X86_INS_FXCH: fxch	$op */
-		0,
-		{ CS_OP_READ, CS_OP_READ, 0 }
-	},
-	{	/* X86_XCRYPTCBC, X86_INS_XCRYPTCBC: xcryptcbc */
-		0,
-		{ 0 }
-	},
-	{	/* X86_XCRYPTCFB, X86_INS_XCRYPTCFB: xcryptcfb */
-		0,
-		{ 0 }
-	},
-	{	/* X86_XCRYPTCTR, X86_INS_XCRYPTCTR: xcryptctr */
-		0,
-		{ 0 }
-	},
-	{	/* X86_XCRYPTECB, X86_INS_XCRYPTECB: xcryptecb */
-		0,
-		{ 0 }
-	},
-	{	/* X86_XCRYPTOFB, X86_INS_XCRYPTOFB: xcryptofb */
-		0,
-		{ 0 }
-	},
-	{	/* X86_XEND, X86_INS_XEND: xend */
-		0,
-		{ 0 }
-	},
-	{	/* X86_XGETBV, X86_INS_XGETBV: xgetbv */
-		0,
-		{ 0 }
-	},
-	{	/* X86_XLAT, X86_INS_XLATB: xlatb */
-		0,
-		{ 0 }
-	},
-	{	/* X86_XOR16i16, X86_INS_XOR: xor{w}	ax, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR16mi, X86_INS_XOR: xor{w}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR16mi8, X86_INS_XOR: xor{w}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR16mr, X86_INS_XOR: xor{w}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR16ri, X86_INS_XOR: xor{w}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR16ri8, X86_INS_XOR: xor{w}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR16rm, X86_INS_XOR: xor{w}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR16rr, X86_INS_XOR: xor{w}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR16rr_REV, X86_INS_XOR: xor{w}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR32i32, X86_INS_XOR: xor{l}	eax, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR32mi, X86_INS_XOR: xor{l}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR32mi8, X86_INS_XOR: xor{l}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR32mr, X86_INS_XOR: xor{l}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR32ri, X86_INS_XOR: xor{l}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR32ri8, X86_INS_XOR: xor{l}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR32rm, X86_INS_XOR: xor{l}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR32rr, X86_INS_XOR: xor{l}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR32rr_REV, X86_INS_XOR: xor{l}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR64i32, X86_INS_XOR: xor{q}	rax, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR64mi32, X86_INS_XOR: xor{q}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR64mi8, X86_INS_XOR: xor{q}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR64mr, X86_INS_XOR: xor{q}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR64ri32, X86_INS_XOR: xor{q}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR64ri8, X86_INS_XOR: xor{q}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR64rm, X86_INS_XOR: xor{q}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR64rr, X86_INS_XOR: xor{q}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR64rr_REV, X86_INS_XOR: xor{q}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR8i8, X86_INS_XOR: xor{b}	al, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR8mi, X86_INS_XOR: xor{b}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR8mi8, X86_INS_XOR: xor{b}	$dst, $src */
-		X86_REG_EFLAGS,
-		{ 0 }
-	},
-	{	/* X86_XOR8mr, X86_INS_XOR: xor{b}	$dst, $src */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR8ri, X86_INS_XOR: xor{b}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR8ri8, X86_INS_XOR: xor{b}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR8rm, X86_INS_XOR: xor{b}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR8rr, X86_INS_XOR: xor{b}	$src1, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XOR8rr_REV, X86_INS_XOR: xor{b}	$dst, $src2 */
-		X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XORPDrm, X86_INS_XORPD: xorpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XORPDrr, X86_INS_XORPD: xorpd	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XORPSrm, X86_INS_XORPS: xorps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XORPSrr, X86_INS_XORPS: xorps	$dst, $src2 */
-		0,
-		{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
-	},
-	{	/* X86_XRELEASE_PREFIX, X86_INS_XRELEASE: xrelease */
-		0,
-		{ 0 }
-	},
-	{	/* X86_XRSTOR, X86_INS_XRSTOR: xrstor	$dst */
-		0,
-		{ CS_OP_READ, 0 }
-	},
-	{	/* X86_XRSTOR64, X86_INS_XRSTOR64: xrstor64	$dst */
-		0,
-		{ CS_OP_READ, 0 }
-	},
-	{	/* X86_XRSTORS, X86_INS_XRSTORS: xrstors	$dst */
-		0,
-		{ 0 }
-	},
-	{	/* X86_XRSTORS64, X86_INS_XRSTORS64: xrstors64	$dst */
-		0,
-		{ 0 }
-	},
-	{	/* X86_XSAVE, X86_INS_XSAVE: xsave	$dst */
-		0,
-		{ CS_OP_READ, 0 }
-	},
-	{	/* X86_XSAVE64, X86_INS_XSAVE64: xsave64	$dst */
-		0,
-		{ CS_OP_READ, 0 }
-	},
-	{	/* X86_XSAVEC, X86_INS_XSAVEC: xsavec	$dst */
-		0,
-		{ 0 }
-	},
-	{	/* X86_XSAVEC64, X86_INS_XSAVEC64: xsavec64	$dst */
-		0,
-		{ 0 }
-	},
-	{	/* X86_XSAVEOPT, X86_INS_XSAVEOPT: xsaveopt	$dst */
-		0,
-		{ CS_OP_READ, 0 }
-	},
-	{	/* X86_XSAVEOPT64, X86_INS_XSAVEOPT64: xsaveopt64	$dst */
-		0,
-		{ CS_OP_READ, 0 }
-	},
-	{	/* X86_XSAVES, X86_INS_XSAVES: xsaves	$dst */
-		0,
-		{ 0 }
-	},
-	{	/* X86_XSAVES64, X86_INS_XSAVES64: xsaves64	$dst */
-		0,
-		{ 0 }
-	},
-	{	/* X86_XSETBV, X86_INS_XSETBV: xsetbv */
-		0,
-		{ 0 }
-	},
-	{	/* X86_XSHA1, X86_INS_XSHA1: xsha1 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_XSHA256, X86_INS_XSHA256: xsha256 */
-		0,
-		{ 0 }
-	},
-	{	/* X86_XSTORE, X86_INS_XSTORE: xstore */
-		0,
-		{ 0 }
-	},
-	{	/* X86_XTEST, X86_INS_XTEST: xtest */
-		0,
-		{ 0 }
-	},
-	{	/* X86_fdisi8087_nop, X86_INS_FDISI8087_NOP: fdisi8087_nop */
-		0,
-		{ 0 }
-	},
-	{	/* X86_feni8087_nop, X86_INS_FENI8087_NOP: feni8087_nop */
-		0,
-		{ 0 }
-	},
+
+#include "X86MappingInsnOp.inc"
 };
 
 #endif
diff --git a/arch/X86/X86MappingInsnOp.inc b/arch/X86/X86MappingInsnOp.inc
new file mode 100644
index 00000000..bbee9b9c
--- /dev/null
+++ b/arch/X86/X86MappingInsnOp.inc
@@ -0,0 +1,33935 @@
+// This is auto-gen data for Capstone disassembly engine (www.capstone-engine.org)
+// By Nguyen Anh Quynh <aquynh@gmail.com>
+
+{	/* X86_AAA, X86_INS_AAA: aaa */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ 0 }
+},
+{	/* X86_AAD8i8, X86_INS_AAD: aad	$src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ 0 }
+},
+{	/* X86_AAM8i8, X86_INS_AAM: aam	$src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ 0 }
+},
+{	/* X86_AAS, X86_INS_AAS: aas */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ 0 }
+},
+{	/* X86_ABS_F, X86_INS_FABS: fabs */
+	0,
+	{ 0 }
+},
+{	/* X86_ADC16i16, X86_INS_ADC: adc{w}	ax, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ 0 }
+},
+{	/* X86_ADC16mi, X86_INS_ADC: adc{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADC16mi8, X86_INS_ADC: adc{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADC16mr, X86_INS_ADC: adc{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADC16ri, X86_INS_ADC: adc{w}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADC16ri8, X86_INS_ADC: adc{w}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADC16rm, X86_INS_ADC: adc{w}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADC16rr, X86_INS_ADC: adc{w}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADC16rr_REV, X86_INS_ADC: adc{w}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADC32i32, X86_INS_ADC: adc{l}	eax, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ 0 }
+},
+{	/* X86_ADC32mi, X86_INS_ADC: adc{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADC32mi8, X86_INS_ADC: adc{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADC32mr, X86_INS_ADC: adc{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADC32ri, X86_INS_ADC: adc{l}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADC32ri8, X86_INS_ADC: adc{l}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADC32rm, X86_INS_ADC: adc{l}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADC32rr, X86_INS_ADC: adc{l}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADC32rr_REV, X86_INS_ADC: adc{l}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADC64i32, X86_INS_ADC: adc{q}	rax, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ 0 }
+},
+{	/* X86_ADC64mi32, X86_INS_ADC: adc{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADC64mi8, X86_INS_ADC: adc{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADC64mr, X86_INS_ADC: adc{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADC64ri32, X86_INS_ADC: adc{q}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADC64ri8, X86_INS_ADC: adc{q}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADC64rm, X86_INS_ADC: adc{q}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADC64rr, X86_INS_ADC: adc{q}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADC64rr_REV, X86_INS_ADC: adc{q}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADC8i8, X86_INS_ADC: adc{b}	al, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ 0 }
+},
+{	/* X86_ADC8mi, X86_INS_ADC: adc{b}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADC8mi8, X86_INS_ADC: adc{b}	$dst, $src */
+	X86_REG_EFLAGS,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADC8mr, X86_INS_ADC: adc{b}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADC8ri, X86_INS_ADC: adc{b}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADC8ri8, X86_INS_ADC: adc{b}	$src1, $src2 */
+	X86_REG_EFLAGS,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADC8rm, X86_INS_ADC: adc{b}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADC8rr, X86_INS_ADC: adc{b}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADC8rr_REV, X86_INS_ADC: adc{b}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADCX32rm, X86_INS_ADCX: adcx{l}	$dst, $src */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADCX32rr, X86_INS_ADCX: adcx{l}	$dst, $src */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADCX64rm, X86_INS_ADCX: adcx{q}	$dst, $src */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADCX64rr, X86_INS_ADCX: adcx{q}	$dst, $src */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADD16i16, X86_INS_ADD: add{w}	ax, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ 0 }
+},
+{	/* X86_ADD16mi, X86_INS_ADD: add{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADD16mi8, X86_INS_ADD: add{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADD16mr, X86_INS_ADD: add{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADD16ri, X86_INS_ADD: add{w}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADD16ri8, X86_INS_ADD: add{w}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADD16rm, X86_INS_ADD: add{w}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADD16rr, X86_INS_ADD: add{w}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADD16rr_REV, X86_INS_ADD: add{w}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADD32i32, X86_INS_ADD: add{l}	eax, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ 0 }
+},
+{	/* X86_ADD32mi, X86_INS_ADD: add{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADD32mi8, X86_INS_ADD: add{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADD32mr, X86_INS_ADD: add{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADD32ri, X86_INS_ADD: add{l}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADD32ri8, X86_INS_ADD: add{l}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADD32rm, X86_INS_ADD: add{l}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADD32rr, X86_INS_ADD: add{l}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADD32rr_REV, X86_INS_ADD: add{l}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADD64i32, X86_INS_ADD: add{q}	rax, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ 0 }
+},
+{	/* X86_ADD64mi32, X86_INS_ADD: add{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADD64mi8, X86_INS_ADD: add{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADD64mr, X86_INS_ADD: add{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADD64ri32, X86_INS_ADD: add{q}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADD64ri8, X86_INS_ADD: add{q}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADD64rm, X86_INS_ADD: add{q}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADD64rr, X86_INS_ADD: add{q}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADD64rr_REV, X86_INS_ADD: add{q}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADD8i8, X86_INS_ADD: add{b}	al, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ 0 }
+},
+{	/* X86_ADD8mi, X86_INS_ADD: add{b}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADD8mi8, X86_INS_ADD: add{b}	$dst, $src */
+	X86_REG_EFLAGS,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADD8mr, X86_INS_ADD: add{b}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADD8ri, X86_INS_ADD: add{b}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADD8ri8, X86_INS_ADD: add{b}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADD8rm, X86_INS_ADD: add{b}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADD8rr, X86_INS_ADD: add{b}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADD8rr_REV, X86_INS_ADD: add{b}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADDPDrm, X86_INS_ADDPD: addpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADDPDrr, X86_INS_ADDPD: addpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADDPSrm, X86_INS_ADDPS: addps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADDPSrr, X86_INS_ADDPS: addps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADDSDrm, X86_INS_ADDSD: addsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADDSDrm_Int, X86_INS_ADDSD: addsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADDSDrr, X86_INS_ADDSD: addsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADDSDrr_Int, X86_INS_ADDSD: addsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADDSSrm, X86_INS_ADDSS: addss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADDSSrm_Int, X86_INS_ADDSS: addss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ADDSSrr, X86_INS_ADDSS: addss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADDSSrr_Int, X86_INS_ADDSS: addss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADDSUBPDrm, X86_INS_ADDSUBPD: addsubpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADDSUBPDrr, X86_INS_ADDSUBPD: addsubpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADDSUBPSrm, X86_INS_ADDSUBPS: addsubps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADDSUBPSrr, X86_INS_ADDSUBPS: addsubps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADD_F32m, X86_INS_FADD: fadd{s}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ADD_F64m, X86_INS_FADD: fadd{l}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ADD_FI16m, X86_INS_FIADD: fiadd{s}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ADD_FI32m, X86_INS_FIADD: fiadd{l}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ADD_FPrST0, X86_INS_FADDP: faddp	$op */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ADD_FST0r, X86_INS_FADD: fadd	$op */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ADD_FrST0, X86_INS_FADD: fadd	$op, st(0) */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ADOX32rm, X86_INS_ADOX: adox{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADOX32rr, X86_INS_ADOX: adox{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADOX64rm, X86_INS_ADOX: adox{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ADOX64rr, X86_INS_ADOX: adox{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AESDECLASTrm, X86_INS_AESDECLAST: aesdeclast	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AESDECLASTrr, X86_INS_AESDECLAST: aesdeclast	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AESDECrm, X86_INS_AESDEC: aesdec	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AESDECrr, X86_INS_AESDEC: aesdec	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AESENCLASTrm, X86_INS_AESENCLAST: aesenclast	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AESENCLASTrr, X86_INS_AESENCLAST: aesenclast	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AESENCrm, X86_INS_AESENC: aesenc	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AESENCrr, X86_INS_AESENC: aesenc	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AESIMCrm, X86_INS_AESIMC: aesimc	$dst, $src1 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AESIMCrr, X86_INS_AESIMC: aesimc	$dst, $src1 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AESKEYGENASSIST128rm, X86_INS_AESKEYGENASSIST: aeskeygenassist	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AESKEYGENASSIST128rr, X86_INS_AESKEYGENASSIST: aeskeygenassist	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AND16i16, X86_INS_AND: and{w}	ax, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ 0 }
+},
+{	/* X86_AND16mi, X86_INS_AND: and{w}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_AND16mi8, X86_INS_AND: and{w}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_AND16mr, X86_INS_AND: and{w}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AND16ri, X86_INS_AND: and{w}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_AND16ri8, X86_INS_AND: and{w}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_AND16rm, X86_INS_AND: and{w}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AND16rr, X86_INS_AND: and{w}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AND16rr_REV, X86_INS_AND: and{w}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AND32i32, X86_INS_AND: and{l}	eax, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ 0 }
+},
+{	/* X86_AND32mi, X86_INS_AND: and{l}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_AND32mi8, X86_INS_AND: and{l}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_AND32mr, X86_INS_AND: and{l}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AND32ri, X86_INS_AND: and{l}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_AND32ri8, X86_INS_AND: and{l}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_AND32rm, X86_INS_AND: and{l}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AND32rr, X86_INS_AND: and{l}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AND32rr_REV, X86_INS_AND: and{l}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AND64i32, X86_INS_AND: and{q}	rax, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ 0 }
+},
+{	/* X86_AND64mi32, X86_INS_AND: and{q}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_AND64mi8, X86_INS_AND: and{q}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_AND64mr, X86_INS_AND: and{q}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AND64ri32, X86_INS_AND: and{q}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_AND64ri8, X86_INS_AND: and{q}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_AND64rm, X86_INS_AND: and{q}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AND64rr, X86_INS_AND: and{q}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AND64rr_REV, X86_INS_AND: and{q}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AND8i8, X86_INS_AND: and{b}	al, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ 0 }
+},
+{	/* X86_AND8mi, X86_INS_AND: and{b}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_AND8mi8, X86_INS_AND: and{b}	$dst, $src */
+	X86_REG_EFLAGS,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_AND8mr, X86_INS_AND: and{b}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AND8ri, X86_INS_AND: and{b}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_AND8ri8, X86_INS_AND: and{b}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_AND8rm, X86_INS_AND: and{b}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AND8rr, X86_INS_AND: and{b}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_AND8rr_REV, X86_INS_AND: and{b}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ANDN32rm, X86_INS_ANDN: andn{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_ANDN32rr, X86_INS_ANDN: andn{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_ANDN64rm, X86_INS_ANDN: andn{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_ANDN64rr, X86_INS_ANDN: andn{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_ANDNPDrm, X86_INS_ANDNPD: andnpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ANDNPDrr, X86_INS_ANDNPD: andnpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ANDNPSrm, X86_INS_ANDNPS: andnps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ANDNPSrr, X86_INS_ANDNPS: andnps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ANDPDrm, X86_INS_ANDPD: andpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ANDPDrr, X86_INS_ANDPD: andpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ANDPSrm, X86_INS_ANDPS: andps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ANDPSrr, X86_INS_ANDPS: andps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ARPL16mr, X86_INS_ARPL: arpl	$dst, $src */
+	X86_EFLAGS_MODIFY_ZF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_ARPL16rr, X86_INS_ARPL: arpl	$dst, $src */
+	X86_EFLAGS_MODIFY_ZF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BEXTR32rm, X86_INS_BEXTR: bextr{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BEXTR32rr, X86_INS_BEXTR: bextr{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BEXTR64rm, X86_INS_BEXTR: bextr{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BEXTR64rr, X86_INS_BEXTR: bextr{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BEXTRI32mi, X86_INS_BEXTR: bextr	$dst, $src1, $cntl */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BEXTRI32ri, X86_INS_BEXTR: bextr	$dst, $src1, $cntl */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BEXTRI64mi, X86_INS_BEXTR: bextr	$dst, $src1, $cntl */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BEXTRI64ri, X86_INS_BEXTR: bextr	$dst, $src1, $cntl */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLCFILL32rm, X86_INS_BLCFILL: blcfill	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLCFILL32rr, X86_INS_BLCFILL: blcfill	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLCFILL64rm, X86_INS_BLCFILL: blcfill	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLCFILL64rr, X86_INS_BLCFILL: blcfill	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLCI32rm, X86_INS_BLCI: blci	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLCI32rr, X86_INS_BLCI: blci	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLCI64rm, X86_INS_BLCI: blci	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLCI64rr, X86_INS_BLCI: blci	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLCIC32rm, X86_INS_BLCIC: blcic	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLCIC32rr, X86_INS_BLCIC: blcic	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLCIC64rm, X86_INS_BLCIC: blcic	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLCIC64rr, X86_INS_BLCIC: blcic	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLCMSK32rm, X86_INS_BLCMSK: blcmsk	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLCMSK32rr, X86_INS_BLCMSK: blcmsk	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLCMSK64rm, X86_INS_BLCMSK: blcmsk	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLCMSK64rr, X86_INS_BLCMSK: blcmsk	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLCS32rm, X86_INS_BLCS: blcs	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLCS32rr, X86_INS_BLCS: blcs	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLCS64rm, X86_INS_BLCS: blcs	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLCS64rr, X86_INS_BLCS: blcs	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLENDPDrmi, X86_INS_BLENDPD: blendpd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLENDPDrri, X86_INS_BLENDPD: blendpd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLENDPSrmi, X86_INS_BLENDPS: blendps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLENDPSrri, X86_INS_BLENDPS: blendps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLENDVPDrm0, X86_INS_BLENDVPD: blendvpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLENDVPDrr0, X86_INS_BLENDVPD: blendvpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLENDVPSrm0, X86_INS_BLENDVPS: blendvps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLENDVPSrr0, X86_INS_BLENDVPS: blendvps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLSFILL32rm, X86_INS_BLSFILL: blsfill	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLSFILL32rr, X86_INS_BLSFILL: blsfill	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLSFILL64rm, X86_INS_BLSFILL: blsfill	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLSFILL64rr, X86_INS_BLSFILL: blsfill	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLSI32rm, X86_INS_BLSI: blsi{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLSI32rr, X86_INS_BLSI: blsi{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLSI64rm, X86_INS_BLSI: blsi{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLSI64rr, X86_INS_BLSI: blsi{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLSIC32rm, X86_INS_BLSIC: blsic	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLSIC32rr, X86_INS_BLSIC: blsic	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLSIC64rm, X86_INS_BLSIC: blsic	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLSIC64rr, X86_INS_BLSIC: blsic	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLSMSK32rm, X86_INS_BLSMSK: blsmsk{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLSMSK32rr, X86_INS_BLSMSK: blsmsk{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLSMSK64rm, X86_INS_BLSMSK: blsmsk{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLSMSK64rr, X86_INS_BLSMSK: blsmsk{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLSR32rm, X86_INS_BLSR: blsr{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLSR32rr, X86_INS_BLSR: blsr{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLSR64rm, X86_INS_BLSR: blsr{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BLSR64rr, X86_INS_BLSR: blsr{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BOUNDS16rm, X86_INS_BOUND: bound	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BOUNDS32rm, X86_INS_BOUND: bound	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BSF16rm, X86_INS_BSF: bsf{w}	$dst, $src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BSF16rr, X86_INS_BSF: bsf{w}	$dst, $src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BSF32rm, X86_INS_BSF: bsf{l}	$dst, $src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BSF32rr, X86_INS_BSF: bsf{l}	$dst, $src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BSF64rm, X86_INS_BSF: bsf{q}	$dst, $src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BSF64rr, X86_INS_BSF: bsf{q}	$dst, $src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BSR16rm, X86_INS_BSR: bsr{w}	$dst, $src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BSR16rr, X86_INS_BSR: bsr{w}	$dst, $src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BSR32rm, X86_INS_BSR: bsr{l}	$dst, $src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BSR32rr, X86_INS_BSR: bsr{l}	$dst, $src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BSR64rm, X86_INS_BSR: bsr{q}	$dst, $src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BSR64rr, X86_INS_BSR: bsr{q}	$dst, $src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_BSWAP32r, X86_INS_BSWAP: bswap{l}	$dst */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_BSWAP64r, X86_INS_BSWAP: bswap{q}	$dst */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_BT16mi8, X86_INS_BT: bt{w}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_BT16mr, X86_INS_BT: bt{w}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BT16ri8, X86_INS_BT: bt{w}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_BT16rr, X86_INS_BT: bt{w}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BT32mi8, X86_INS_BT: bt{l}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_BT32mr, X86_INS_BT: bt{l}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BT32ri8, X86_INS_BT: bt{l}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_BT32rr, X86_INS_BT: bt{l}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BT64mi8, X86_INS_BT: bt{q}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_BT64mr, X86_INS_BT: bt{q}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BT64ri8, X86_INS_BT: bt{q}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_BT64rr, X86_INS_BT: bt{q}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BTC16mi8, X86_INS_BTC: btc{w}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_BTC16mr, X86_INS_BTC: btc{w}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BTC16ri8, X86_INS_BTC: btc{w}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_BTC16rr, X86_INS_BTC: btc{w}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BTC32mi8, X86_INS_BTC: btc{l}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_BTC32mr, X86_INS_BTC: btc{l}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BTC32ri8, X86_INS_BTC: btc{l}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_BTC32rr, X86_INS_BTC: btc{l}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BTC64mi8, X86_INS_BTC: btc{q}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_BTC64mr, X86_INS_BTC: btc{q}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BTC64ri8, X86_INS_BTC: btc{q}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_BTC64rr, X86_INS_BTC: btc{q}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BTR16mi8, X86_INS_BTR: btr{w}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_BTR16mr, X86_INS_BTR: btr{w}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BTR16ri8, X86_INS_BTR: btr{w}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_BTR16rr, X86_INS_BTR: btr{w}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BTR32mi8, X86_INS_BTR: btr{l}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_BTR32mr, X86_INS_BTR: btr{l}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BTR32ri8, X86_INS_BTR: btr{l}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_BTR32rr, X86_INS_BTR: btr{l}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BTR64mi8, X86_INS_BTR: btr{q}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_BTR64mr, X86_INS_BTR: btr{q}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BTR64ri8, X86_INS_BTR: btr{q}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_BTR64rr, X86_INS_BTR: btr{q}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BTS16mi8, X86_INS_BTS: bts{w}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_BTS16mr, X86_INS_BTS: bts{w}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BTS16ri8, X86_INS_BTS: bts{w}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_BTS16rr, X86_INS_BTS: bts{w}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BTS32mi8, X86_INS_BTS: bts{l}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_BTS32mr, X86_INS_BTS: bts{l}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BTS32ri8, X86_INS_BTS: bts{l}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_BTS32rr, X86_INS_BTS: bts{l}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BTS64mi8, X86_INS_BTS: bts{q}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_BTS64mr, X86_INS_BTS: bts{q}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BTS64ri8, X86_INS_BTS: bts{q}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_BTS64rr, X86_INS_BTS: bts{q}	$src1, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BZHI32rm, X86_INS_BZHI: bzhi{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BZHI32rr, X86_INS_BZHI: bzhi{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BZHI64rm, X86_INS_BZHI: bzhi{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_BZHI64rr, X86_INS_BZHI: bzhi{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_CALL16m, X86_INS_CALL: call{w}	{*}$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_CALL16r, X86_INS_CALL: call{w}	{*}$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_CALL32m, X86_INS_CALL: call{l}	{*}$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_CALL32r, X86_INS_CALL: call{l}	{*}$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_CALL64m, X86_INS_CALL: call{q}	{*}$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_CALL64pcrel32, X86_INS_CALL: call{q}	$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_CALL64r, X86_INS_CALL: call{q}	{*}$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_CALLpcrel16, X86_INS_CALL: call{w}	$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_CALLpcrel32, X86_INS_CALL: call{l}	$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_CBW, X86_INS_CBW: cbw */
+	0,
+	{ 0 }
+},
+{	/* X86_CDQ, X86_INS_CDQ: cdq */
+	0,
+	{ 0 }
+},
+{	/* X86_CDQE, X86_INS_CDQE: cdqe */
+	0,
+	{ 0 }
+},
+{	/* X86_CHS_F, X86_INS_FCHS: fchs */
+	0,
+	{ 0 }
+},
+{	/* X86_CLAC, X86_INS_CLAC: clac */
+	0,
+	{ 0 }
+},
+{	/* X86_CLC, X86_INS_CLC: clc */
+	X86_EFLAGS_RESET_CF,
+	{ 0 }
+},
+{	/* X86_CLD, X86_INS_CLD: cld */
+	X86_EFLAGS_RESET_DF,
+	{ 0 }
+},
+{	/* X86_CLFLUSH, X86_INS_CLFLUSH: clflush	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_CLFLUSHOPT, X86_INS_CLFLUSHOPT: clflushopt	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_CLGI, X86_INS_CLGI: clgi */
+	0,
+	{ 0 }
+},
+{	/* X86_CLI, X86_INS_CLI: cli */
+	X86_EFLAGS_RESET_IF,
+	{ 0 }
+},
+{	/* X86_CLTS, X86_INS_CLTS: clts */
+	0,
+	{ 0 }
+},
+{	/* X86_CLWB, X86_INS_CLWB: clwb	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_CMC, X86_INS_CMC: cmc */
+	X86_EFLAGS_MODIFY_CF,
+	{ 0 }
+},
+{	/* X86_CMOVA16rm, X86_INS_CMOVA: cmova{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVA16rr, X86_INS_CMOVA: cmova{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVA32rm, X86_INS_CMOVA: cmova{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVA32rr, X86_INS_CMOVA: cmova{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVA64rm, X86_INS_CMOVA: cmova{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVA64rr, X86_INS_CMOVA: cmova{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVAE16rm, X86_INS_CMOVAE: cmovae{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVAE16rr, X86_INS_CMOVAE: cmovae{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVAE32rm, X86_INS_CMOVAE: cmovae{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVAE32rr, X86_INS_CMOVAE: cmovae{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVAE64rm, X86_INS_CMOVAE: cmovae{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVAE64rr, X86_INS_CMOVAE: cmovae{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVB16rm, X86_INS_CMOVB: cmovb{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVB16rr, X86_INS_CMOVB: cmovb{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVB32rm, X86_INS_CMOVB: cmovb{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVB32rr, X86_INS_CMOVB: cmovb{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVB64rm, X86_INS_CMOVB: cmovb{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVB64rr, X86_INS_CMOVB: cmovb{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVBE16rm, X86_INS_CMOVBE: cmovbe{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVBE16rr, X86_INS_CMOVBE: cmovbe{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVBE32rm, X86_INS_CMOVBE: cmovbe{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVBE32rr, X86_INS_CMOVBE: cmovbe{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVBE64rm, X86_INS_CMOVBE: cmovbe{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVBE64rr, X86_INS_CMOVBE: cmovbe{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVBE_F, X86_INS_FCMOVBE: fcmovbe	st(0), $op */
+	X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_NOREG, CS_OP_WRITE, 0 }
+},
+{	/* X86_CMOVB_F, X86_INS_FCMOVB: fcmovb	st(0), $op */
+	X86_EFLAGS_TEST_CF,
+	{ CS_OP_NOREG, CS_OP_WRITE, 0 }
+},
+{	/* X86_CMOVE16rm, X86_INS_CMOVE: cmove{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVE16rr, X86_INS_CMOVE: cmove{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVE32rm, X86_INS_CMOVE: cmove{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVE32rr, X86_INS_CMOVE: cmove{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVE64rm, X86_INS_CMOVE: cmove{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVE64rr, X86_INS_CMOVE: cmove{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVE_F, X86_INS_FCMOVE: fcmove	st(0), $op */
+	X86_EFLAGS_TEST_ZF,
+	{ CS_OP_NOREG, CS_OP_WRITE, 0 }
+},
+{	/* X86_CMOVG16rm, X86_INS_CMOVG: cmovg{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVG16rr, X86_INS_CMOVG: cmovg{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVG32rm, X86_INS_CMOVG: cmovg{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVG32rr, X86_INS_CMOVG: cmovg{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVG64rm, X86_INS_CMOVG: cmovg{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVG64rr, X86_INS_CMOVG: cmovg{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVGE16rm, X86_INS_CMOVGE: cmovge{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVGE16rr, X86_INS_CMOVGE: cmovge{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVGE32rm, X86_INS_CMOVGE: cmovge{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVGE32rr, X86_INS_CMOVGE: cmovge{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVGE64rm, X86_INS_CMOVGE: cmovge{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVGE64rr, X86_INS_CMOVGE: cmovge{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVL16rm, X86_INS_CMOVL: cmovl{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVL16rr, X86_INS_CMOVL: cmovl{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVL32rm, X86_INS_CMOVL: cmovl{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVL32rr, X86_INS_CMOVL: cmovl{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVL64rm, X86_INS_CMOVL: cmovl{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVL64rr, X86_INS_CMOVL: cmovl{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVLE16rm, X86_INS_CMOVLE: cmovle{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVLE16rr, X86_INS_CMOVLE: cmovle{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVLE32rm, X86_INS_CMOVLE: cmovle{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVLE32rr, X86_INS_CMOVLE: cmovle{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVLE64rm, X86_INS_CMOVLE: cmovle{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVLE64rr, X86_INS_CMOVLE: cmovle{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVNBE_F, X86_INS_FCMOVNBE: fcmovnbe	st(0), $op */
+	X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_NOREG, CS_OP_WRITE, 0 }
+},
+{	/* X86_CMOVNB_F, X86_INS_FCMOVNB: fcmovnb	st(0), $op */
+	X86_EFLAGS_TEST_CF,
+	{ CS_OP_NOREG, CS_OP_WRITE, 0 }
+},
+{	/* X86_CMOVNE16rm, X86_INS_CMOVNE: cmovne{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVNE16rr, X86_INS_CMOVNE: cmovne{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVNE32rm, X86_INS_CMOVNE: cmovne{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVNE32rr, X86_INS_CMOVNE: cmovne{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVNE64rm, X86_INS_CMOVNE: cmovne{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVNE64rr, X86_INS_CMOVNE: cmovne{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVNE_F, X86_INS_FCMOVNE: fcmovne	st(0), $op */
+	X86_EFLAGS_TEST_ZF,
+	{ CS_OP_NOREG, CS_OP_WRITE, 0 }
+},
+{	/* X86_CMOVNO16rm, X86_INS_CMOVNO: cmovno{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVNO16rr, X86_INS_CMOVNO: cmovno{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVNO32rm, X86_INS_CMOVNO: cmovno{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVNO32rr, X86_INS_CMOVNO: cmovno{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVNO64rm, X86_INS_CMOVNO: cmovno{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVNO64rr, X86_INS_CMOVNO: cmovno{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVNP16rm, X86_INS_CMOVNP: cmovnp{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVNP16rr, X86_INS_CMOVNP: cmovnp{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVNP32rm, X86_INS_CMOVNP: cmovnp{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVNP32rr, X86_INS_CMOVNP: cmovnp{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVNP64rm, X86_INS_CMOVNP: cmovnp{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVNP64rr, X86_INS_CMOVNP: cmovnp{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVNP_F, X86_INS_FCMOVNU: fcmovnu	st(0), $op */
+	X86_EFLAGS_TEST_PF,
+	{ CS_OP_NOREG, CS_OP_WRITE, 0 }
+},
+{	/* X86_CMOVNS16rm, X86_INS_CMOVNS: cmovns{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVNS16rr, X86_INS_CMOVNS: cmovns{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVNS32rm, X86_INS_CMOVNS: cmovns{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVNS32rr, X86_INS_CMOVNS: cmovns{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVNS64rm, X86_INS_CMOVNS: cmovns{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVNS64rr, X86_INS_CMOVNS: cmovns{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVO16rm, X86_INS_CMOVO: cmovo{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVO16rr, X86_INS_CMOVO: cmovo{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVO32rm, X86_INS_CMOVO: cmovo{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVO32rr, X86_INS_CMOVO: cmovo{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVO64rm, X86_INS_CMOVO: cmovo{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVO64rr, X86_INS_CMOVO: cmovo{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVP16rm, X86_INS_CMOVP: cmovp{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVP16rr, X86_INS_CMOVP: cmovp{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVP32rm, X86_INS_CMOVP: cmovp{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVP32rr, X86_INS_CMOVP: cmovp{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVP64rm, X86_INS_CMOVP: cmovp{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVP64rr, X86_INS_CMOVP: cmovp{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVP_F, X86_INS_FCMOVU: fcmovu	st(0), $op */
+	X86_EFLAGS_TEST_PF,
+	{ CS_OP_NOREG, CS_OP_WRITE, 0 }
+},
+{	/* X86_CMOVS16rm, X86_INS_CMOVS: cmovs{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVS16rr, X86_INS_CMOVS: cmovs{w}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVS32rm, X86_INS_CMOVS: cmovs{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVS32rr, X86_INS_CMOVS: cmovs{l}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVS64rm, X86_INS_CMOVS: cmovs{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMOVS64rr, X86_INS_CMOVS: cmovs{q}	$dst, $src2 */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_PF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMP16i16, X86_INS_CMP: cmp{w}	ax, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ 0 }
+},
+{	/* X86_CMP16mi, X86_INS_CMP: cmp{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_CMP16mi8, X86_INS_CMP: cmp{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_CMP16mr, X86_INS_CMP: cmp{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMP16ri, X86_INS_CMP: cmp{w}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_CMP16ri8, X86_INS_CMP: cmp{w}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_CMP16rm, X86_INS_CMP: cmp{w}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_CMP16rr, X86_INS_CMP: cmp{w}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_CMP16rr_REV, X86_INS_CMP: cmp{w}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_CMP32i32, X86_INS_CMP: cmp{l}	eax, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ 0 }
+},
+{	/* X86_CMP32mi, X86_INS_CMP: cmp{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_CMP32mi8, X86_INS_CMP: cmp{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_CMP32mr, X86_INS_CMP: cmp{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMP32ri, X86_INS_CMP: cmp{l}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_CMP32ri8, X86_INS_CMP: cmp{l}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_CMP32rm, X86_INS_CMP: cmp{l}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_CMP32rr, X86_INS_CMP: cmp{l}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_CMP32rr_REV, X86_INS_CMP: cmp{l}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_CMP64i32, X86_INS_CMP: cmp{q}	rax, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ 0 }
+},
+{	/* X86_CMP64mi32, X86_INS_CMP: cmp{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_CMP64mi8, X86_INS_CMP: cmp{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_CMP64mr, X86_INS_CMP: cmp{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMP64ri32, X86_INS_CMP: cmp{q}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_CMP64ri8, X86_INS_CMP: cmp{q}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_CMP64rm, X86_INS_CMP: cmp{q}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_CMP64rr, X86_INS_CMP: cmp{q}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_CMP64rr_REV, X86_INS_CMP: cmp{q}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_CMP8i8, X86_INS_CMP: cmp{b}	al, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ 0 }
+},
+{	/* X86_CMP8mi, X86_INS_CMP: cmp{b}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_CMP8mi8, X86_INS_CMP: cmp{b}	$dst, $src */
+	X86_REG_EFLAGS,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_CMP8mr, X86_INS_CMP: cmp{b}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMP8ri, X86_INS_CMP: cmp{b}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_CMP8ri8, X86_INS_CMP: cmp{b}	$src1, $src2 */
+	X86_REG_EFLAGS,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_CMP8rm, X86_INS_CMP: cmp{b}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_CMP8rr, X86_INS_CMP: cmp{b}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_CMP8rr_REV, X86_INS_CMP: cmp{b}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_CMPPDrmi, X86_INS_CMPPD: cmp${cc}pd	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMPPDrmi_alt, X86_INS_CMPPD: cmppd	$dst, $src2, $cc */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMPPDrri, X86_INS_CMPPD: cmp${cc}pd	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMPPDrri_alt, X86_INS_CMPPD: cmppd	$dst, $src2, $cc */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMPPSrmi, X86_INS_CMPPS: cmp${cc}ps	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMPPSrmi_alt, X86_INS_CMPPS: cmpps	$dst, $src2, $cc */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMPPSrri, X86_INS_CMPPS: cmp${cc}ps	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMPPSrri_alt, X86_INS_CMPPS: cmpps	$dst, $src2, $cc */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMPSB, X86_INS_CMPSB: cmpsb	$src, $dst */
+	X86_REG_EFLAGS,
+	{ 0 }
+},
+{	/* X86_CMPSDrm, X86_INS_CMPSD: cmp${cc}sd	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMPSDrm_alt, X86_INS_CMPSD: cmpsd	$dst, $src2, $cc */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMPSDrr, X86_INS_CMPSD: cmp${cc}sd	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMPSDrr_alt, X86_INS_CMPSD: cmpsd	$dst, $src2, $cc */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMPSL, X86_INS_CMPSD: cmps{l|d}	{$dst, $src|$src, $dst} */
+	X86_REG_EFLAGS,
+	{ 0 }
+},
+{	/* X86_CMPSQ, X86_INS_CMPSQ: cmpsq	$src, $dst */
+	X86_REG_EFLAGS,
+	{ 0 }
+},
+{	/* X86_CMPSSrm, X86_INS_CMPSS: cmp${cc}ss	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMPSSrm_alt, X86_INS_CMPSS: cmpss	$dst, $src2, $cc */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMPSSrr, X86_INS_CMPSS: cmp${cc}ss	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMPSSrr_alt, X86_INS_CMPSS: cmpss	$dst, $src2, $cc */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMPSW, X86_INS_CMPSW: cmpsw	$src, $dst */
+	X86_REG_EFLAGS,
+	{ 0 }
+},
+{	/* X86_CMPXCHG16B, X86_INS_CMPXCHG16B: cmpxchg16b	$dst */
+	X86_EFLAGS_MODIFY_ZF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_CMPXCHG16rm, X86_INS_CMPXCHG: cmpxchg{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_CMPXCHG16rr, X86_INS_CMPXCHG: cmpxchg{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMPXCHG32rm, X86_INS_CMPXCHG: cmpxchg{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_CMPXCHG32rr, X86_INS_CMPXCHG: cmpxchg{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMPXCHG64rm, X86_INS_CMPXCHG: cmpxchg{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_CMPXCHG64rr, X86_INS_CMPXCHG: cmpxchg{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CMPXCHG8B, X86_INS_CMPXCHG8B: cmpxchg8b	$dst */
+	X86_EFLAGS_MODIFY_ZF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_CMPXCHG8rm, X86_INS_CMPXCHG: cmpxchg{b}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_CMPXCHG8rr, X86_INS_CMPXCHG: cmpxchg{b}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_COMISDrm, X86_INS_COMISD: comisd	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_COMISDrr, X86_INS_COMISD: comisd	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_COMISSrm, X86_INS_COMISS: comiss	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_COMISSrr, X86_INS_COMISS: comiss	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_COMP_FST0r, X86_INS_FCOMP: fcomp	$op */
+	X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_COM_FIPr, X86_INS_FCOMPI: fcompi	$reg */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_COM_FIr, X86_INS_FCOMI: fcomi	$reg */
+	X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_COM_FST0r, X86_INS_FCOM: fcom	$op */
+	X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_COS_F, X86_INS_FCOS: fcos */
+	0,
+	{ 0 }
+},
+{	/* X86_CPUID, X86_INS_CPUID: cpuid */
+	0,
+	{ 0 }
+},
+{	/* X86_CQO, X86_INS_CQO: cqo */
+	0,
+	{ 0 }
+},
+{	/* X86_CRC32r32m16, X86_INS_CRC32: crc32{w}	$src1, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CRC32r32m32, X86_INS_CRC32: crc32{l}	$src1, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CRC32r32m8, X86_INS_CRC32: crc32{b}	$src1, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CRC32r32r16, X86_INS_CRC32: crc32{w}	$src1, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CRC32r32r32, X86_INS_CRC32: crc32{l}	$src1, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CRC32r32r8, X86_INS_CRC32: crc32{b}	$src1, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CRC32r64m64, X86_INS_CRC32: crc32{q}	$src1, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CRC32r64m8, X86_INS_CRC32: crc32{b}	$src1, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CRC32r64r64, X86_INS_CRC32: crc32{q}	$src1, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CRC32r64r8, X86_INS_CRC32: crc32{b}	$src1, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTDQ2PDrm, X86_INS_CVTDQ2PD: cvtdq2pd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTDQ2PDrr, X86_INS_CVTDQ2PD: cvtdq2pd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTDQ2PSrm, X86_INS_CVTDQ2PS: cvtdq2ps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTDQ2PSrr, X86_INS_CVTDQ2PS: cvtdq2ps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTPD2DQrm, X86_INS_CVTPD2DQ: cvtpd2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTPD2DQrr, X86_INS_CVTPD2DQ: cvtpd2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTPD2PSrm, X86_INS_CVTPD2PS: cvtpd2ps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTPD2PSrr, X86_INS_CVTPD2PS: cvtpd2ps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTPS2DQrm, X86_INS_CVTPS2DQ: cvtps2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTPS2DQrr, X86_INS_CVTPS2DQ: cvtps2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTPS2PDrm, X86_INS_CVTPS2PD: cvtps2pd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTPS2PDrr, X86_INS_CVTPS2PD: cvtps2pd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTSD2SI64rm, X86_INS_CVTSD2SI: cvtsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_CVTSD2SI64rr, X86_INS_CVTSD2SI: cvtsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTSD2SIrm, X86_INS_CVTSD2SI: cvtsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_CVTSD2SIrr, X86_INS_CVTSD2SI: cvtsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTSD2SSrm, X86_INS_CVTSD2SS: cvtsd2ss	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTSD2SSrr, X86_INS_CVTSD2SS: cvtsd2ss	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTSI2SD64rm, X86_INS_CVTSI2SD: cvtsi2sd{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTSI2SD64rr, X86_INS_CVTSI2SD: cvtsi2sd{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTSI2SDrm, X86_INS_CVTSI2SD: cvtsi2sd{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTSI2SDrr, X86_INS_CVTSI2SD: cvtsi2sd{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTSI2SS64rm, X86_INS_CVTSI2SS: cvtsi2ss{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTSI2SS64rr, X86_INS_CVTSI2SS: cvtsi2ss{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTSI2SSrm, X86_INS_CVTSI2SS: cvtsi2ss{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTSI2SSrr, X86_INS_CVTSI2SS: cvtsi2ss{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTSS2SDrm, X86_INS_CVTSS2SD: cvtss2sd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTSS2SDrr, X86_INS_CVTSS2SD: cvtss2sd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTSS2SI64rm, X86_INS_CVTSS2SI: cvtss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_CVTSS2SI64rr, X86_INS_CVTSS2SI: cvtss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTSS2SIrm, X86_INS_CVTSS2SI: cvtss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_CVTSS2SIrr, X86_INS_CVTSS2SI: cvtss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTTPD2DQrm, X86_INS_CVTTPD2DQ: cvttpd2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTTPD2DQrr, X86_INS_CVTTPD2DQ: cvttpd2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTTPS2DQrm, X86_INS_CVTTPS2DQ: cvttps2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTTPS2DQrr, X86_INS_CVTTPS2DQ: cvttps2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTTSD2SI64rm, X86_INS_CVTTSD2SI: cvttsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTTSD2SI64rr, X86_INS_CVTTSD2SI: cvttsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTTSD2SIrm, X86_INS_CVTTSD2SI: cvttsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTTSD2SIrr, X86_INS_CVTTSD2SI: cvttsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTTSS2SI64rm, X86_INS_CVTTSS2SI: cvttss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTTSS2SI64rr, X86_INS_CVTTSS2SI: cvttss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTTSS2SIrm, X86_INS_CVTTSS2SI: cvttss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CVTTSS2SIrr, X86_INS_CVTTSS2SI: cvttss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_CWD, X86_INS_CWD: cwd */
+	0,
+	{ 0 }
+},
+{	/* X86_CWDE, X86_INS_CWDE: cwde */
+	0,
+	{ 0 }
+},
+{	/* X86_DAA, X86_INS_DAA: daa */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ 0 }
+},
+{	/* X86_DAS, X86_INS_DAS: das */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ 0 }
+},
+{	/* X86_DATA16_PREFIX, X86_INS_DATA16: data16 */
+	0,
+	{ 0 }
+},
+{	/* X86_DEC16m, X86_INS_DEC: dec{w}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_DEC16r, X86_INS_DEC: dec{w}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_DEC16r_alt, X86_INS_DEC: dec{w}	$dst */
+	X86_REG_EFLAGS,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_DEC32m, X86_INS_DEC: dec{l}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_DEC32r, X86_INS_DEC: dec{l}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_DEC32r_alt, X86_INS_DEC: dec{l}	$dst */
+	X86_REG_EFLAGS,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_DEC64m, X86_INS_DEC: dec{q}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_DEC64r, X86_INS_DEC: dec{q}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_DEC8m, X86_INS_DEC: dec{b}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_DEC8r, X86_INS_DEC: dec{b}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_DIV16m, X86_INS_DIV: div{w}	$src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_DIV16r, X86_INS_DIV: div{w}	$src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_DIV32m, X86_INS_DIV: div{l}	$src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_DIV32r, X86_INS_DIV: div{l}	$src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_DIV64m, X86_INS_DIV: div{q}	$src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_DIV64r, X86_INS_DIV: div{q}	$src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_DIV8m, X86_INS_DIV: div{b}	$src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_DIV8r, X86_INS_DIV: div{b}	$src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_DIVPDrm, X86_INS_DIVPD: divpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_DIVPDrr, X86_INS_DIVPD: divpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_DIVPSrm, X86_INS_DIVPS: divps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_DIVPSrr, X86_INS_DIVPS: divps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_DIVR_F32m, X86_INS_FDIVR: fdivr{s}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_DIVR_F64m, X86_INS_FDIVR: fdivr{l}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_DIVR_FI16m, X86_INS_FIDIVR: fidivr{s}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_DIVR_FI32m, X86_INS_FIDIVR: fidivr{l}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_DIVR_FPrST0, X86_INS_FDIVRP: fdivrp	$op */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_DIVR_FST0r, X86_INS_FDIVR: fdivr	$op */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_DIVR_FrST0, X86_INS_FDIVR: fdiv{|r}	{%st(0), $op|$op, st(0)} */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_DIVSDrm, X86_INS_DIVSD: divsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_DIVSDrm_Int, X86_INS_DIVSD: divsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_DIVSDrr, X86_INS_DIVSD: divsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_DIVSDrr_Int, X86_INS_DIVSD: divsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_DIVSSrm, X86_INS_DIVSS: divss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_DIVSSrm_Int, X86_INS_DIVSS: divss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_DIVSSrr, X86_INS_DIVSS: divss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_DIVSSrr_Int, X86_INS_DIVSS: divss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_DIV_F32m, X86_INS_FDIV: fdiv{s}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_DIV_F64m, X86_INS_FDIV: fdiv{l}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_DIV_FI16m, X86_INS_FIDIV: fidiv{s}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_DIV_FI32m, X86_INS_FIDIV: fidiv{l}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_DIV_FPrST0, X86_INS_FDIVP: fdiv{r}p	$op */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_DIV_FST0r, X86_INS_FDIV: fdiv	$op */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_DIV_FrST0, X86_INS_FDIV: fdiv{r}	$op, st(0) */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_DPPDrmi, X86_INS_DPPD: dppd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_DPPDrri, X86_INS_DPPD: dppd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_DPPSrmi, X86_INS_DPPS: dpps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_DPPSrri, X86_INS_DPPS: dpps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ENCLS, X86_INS_ENCLS: encls */
+	0,
+	{ 0 }
+},
+{	/* X86_ENCLU, X86_INS_ENCLU: enclu */
+	0,
+	{ 0 }
+},
+{	/* X86_ENTER, X86_INS_ENTER: enter	$len, $lvl */
+	0,
+	{ 0 }
+},
+{	/* X86_EXTRACTPSmr, X86_INS_EXTRACTPS: extractps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_EXTRACTPSrr, X86_INS_EXTRACTPS: extractps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_EXTRQ, X86_INS_EXTRQ: extrq	$src, $mask */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_EXTRQI, X86_INS_EXTRQ: extrq	$src, $len, $idx */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_F2XM1, X86_INS_F2XM1: f2xm1 */
+	0,
+	{ 0 }
+},
+{	/* X86_FARCALL16i, X86_INS_LCALL: lcall{w}	$seg : $off */
+	0,
+	{ 0 }
+},
+{	/* X86_FARCALL16m, X86_INS_LCALL: lcall{w}	{*}$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_FARCALL32i, X86_INS_LCALL: lcall{l}	$seg : $off */
+	0,
+	{ 0 }
+},
+{	/* X86_FARCALL32m, X86_INS_LCALL: lcall{l}	{*}$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_FARCALL64, X86_INS_LCALL: lcall{q}	{*}$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_FARJMP16i, X86_INS_LJMP: ljmp{w}	$seg : $off */
+	0,
+	{ 0 }
+},
+{	/* X86_FARJMP16m, X86_INS_LJMP: ljmp{w}	{*}$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_FARJMP32i, X86_INS_LJMP: ljmp{l}	$seg : $off */
+	0,
+	{ 0 }
+},
+{	/* X86_FARJMP32m, X86_INS_LJMP: ljmp{l}	{*}$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_FARJMP64, X86_INS_LJMP: ljmp{q}	{*}$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_FBLDm, X86_INS_FBLD: fbld	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_FBSTPm, X86_INS_FBSTP: fbstp	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_FCOM32m, X86_INS_FCOM: fcom{s}	$src */
+	X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_FCOM64m, X86_INS_FCOM: fcom{l}	$src */
+	X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_FCOMP32m, X86_INS_FCOMP: fcomp{s}	$src */
+	X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_FCOMP64m, X86_INS_FCOMP: fcomp{l}	$src */
+	X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_FCOMPP, X86_INS_FCOMPP: fcompp */
+	X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ 0 }
+},
+{	/* X86_FDECSTP, X86_INS_FDECSTP: fdecstp */
+	0,
+	{ 0 }
+},
+{	/* X86_FEMMS, X86_INS_FEMMS: femms */
+	0,
+	{ 0 }
+},
+{	/* X86_FFREE, X86_INS_FFREE: ffree	$reg */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_FICOM16m, X86_INS_FICOM: ficom{s}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_FICOM32m, X86_INS_FICOM: ficom{l}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_FICOMP16m, X86_INS_FICOMP: ficomp{s}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_FICOMP32m, X86_INS_FICOMP: ficomp{l}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_FINCSTP, X86_INS_FINCSTP: fincstp */
+	0,
+	{ 0 }
+},
+{	/* X86_FLDCW16m, X86_INS_FLDCW: fldcw	$dst */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_FLDENVm, X86_INS_FLDENV: fldenv	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_FLDL2E, X86_INS_FLDL2E: fldl2e */
+	0,
+	{ 0 }
+},
+{	/* X86_FLDL2T, X86_INS_FLDL2T: fldl2t */
+	0,
+	{ 0 }
+},
+{	/* X86_FLDLG2, X86_INS_FLDLG2: fldlg2 */
+	0,
+	{ 0 }
+},
+{	/* X86_FLDLN2, X86_INS_FLDLN2: fldln2 */
+	0,
+	{ 0 }
+},
+{	/* X86_FLDPI, X86_INS_FLDPI: fldpi */
+	0,
+	{ 0 }
+},
+{	/* X86_FNCLEX, X86_INS_FNCLEX: fnclex */
+	0,
+	{ 0 }
+},
+{	/* X86_FNINIT, X86_INS_FNINIT: fninit */
+	0,
+	{ 0 }
+},
+{	/* X86_FNOP, X86_INS_FNOP: fnop */
+	0,
+	{ 0 }
+},
+{	/* X86_FNSTCW16m, X86_INS_FNSTCW: fnstcw	$dst */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_FNSTSW16r, X86_INS_FNSTSW: fnstsw	ax */
+	0,
+	{ 0 }
+},
+{	/* X86_FNSTSWm, X86_INS_FNSTSW: fnstsw	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_FPATAN, X86_INS_FPATAN: fpatan */
+	0,
+	{ 0 }
+},
+{	/* X86_FPREM, X86_INS_FPREM: fprem */
+	0,
+	{ 0 }
+},
+{	/* X86_FPREM1, X86_INS_FPREM1: fprem1 */
+	0,
+	{ 0 }
+},
+{	/* X86_FPTAN, X86_INS_FPTAN: fptan */
+	0,
+	{ 0 }
+},
+{	/* X86_FP_FFREEP, X86_INS_FFREEP: ffreep	$op */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_FRNDINT, X86_INS_FRNDINT: frndint */
+	0,
+	{ 0 }
+},
+{	/* X86_FRSTORm, X86_INS_FRSTOR: frstor	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_FSAVEm, X86_INS_FNSAVE: fnsave	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_FSCALE, X86_INS_FSCALE: fscale */
+	0,
+	{ 0 }
+},
+{	/* X86_FSETPM, X86_INS_FSETPM: fsetpm */
+	0,
+	{ 0 }
+},
+{	/* X86_FSINCOS, X86_INS_FSINCOS: fsincos */
+	0,
+	{ 0 }
+},
+{	/* X86_FSTENVm, X86_INS_FNSTENV: fnstenv	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_FXAM, X86_INS_FXAM: fxam */
+	0,
+	{ 0 }
+},
+{	/* X86_FXRSTOR, X86_INS_FXRSTOR: fxrstor	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_FXRSTOR64, X86_INS_FXRSTOR64: fxrstor64	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_FXSAVE, X86_INS_FXSAVE: fxsave	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_FXSAVE64, X86_INS_FXSAVE64: fxsave64	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_FXTRACT, X86_INS_FXTRACT: fxtract */
+	0,
+	{ 0 }
+},
+{	/* X86_FYL2X, X86_INS_FYL2X: fyl2x */
+	0,
+	{ 0 }
+},
+{	/* X86_FYL2XP1, X86_INS_FYL2XP1: fyl2xp1 */
+	0,
+	{ 0 }
+},
+{	/* X86_FsANDNPDrm, X86_INS_ANDNPD: andnpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FsANDNPDrr, X86_INS_ANDNPD: andnpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FsANDNPSrm, X86_INS_ANDNPS: andnps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FsANDNPSrr, X86_INS_ANDNPS: andnps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FsANDPDrm, X86_INS_ANDPD: andpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FsANDPDrr, X86_INS_ANDPD: andpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FsANDPSrm, X86_INS_ANDPS: andps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FsANDPSrr, X86_INS_ANDPS: andps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FsMOVAPDrm, X86_INS_MOVAPD: movapd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FsMOVAPSrm, X86_INS_MOVAPS: movaps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FsORPDrm, X86_INS_ORPD: orpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FsORPDrr, X86_INS_ORPD: orpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FsORPSrm, X86_INS_ORPS: orps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FsORPSrr, X86_INS_ORPS: orps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FsVMOVAPDrm, X86_INS_VMOVAPD: vmovapd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FsVMOVAPSrm, X86_INS_VMOVAPS: vmovaps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FsXORPDrm, X86_INS_XORPD: xorpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FsXORPDrr, X86_INS_XORPD: xorpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FsXORPSrm, X86_INS_XORPS: xorps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FsXORPSrr, X86_INS_XORPS: xorps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FvANDNPDrm, X86_INS_ANDNPD: andnpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FvANDNPDrr, X86_INS_ANDNPD: andnpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FvANDNPSrm, X86_INS_ANDNPS: andnps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FvANDNPSrr, X86_INS_ANDNPS: andnps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FvANDPDrm, X86_INS_ANDPD: andpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FvANDPDrr, X86_INS_ANDPD: andpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FvANDPSrm, X86_INS_ANDPS: andps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FvANDPSrr, X86_INS_ANDPS: andps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FvORPDrm, X86_INS_ORPD: orpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FvORPDrr, X86_INS_ORPD: orpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FvORPSrm, X86_INS_ORPS: orps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FvORPSrr, X86_INS_ORPS: orps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FvXORPDrm, X86_INS_XORPD: xorpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FvXORPDrr, X86_INS_XORPD: xorpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FvXORPSrm, X86_INS_XORPS: xorps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_FvXORPSrr, X86_INS_XORPS: xorps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_GETSEC, X86_INS_GETSEC: getsec */
+	0,
+	{ 0 }
+},
+{	/* X86_HADDPDrm, X86_INS_HADDPD: haddpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_HADDPDrr, X86_INS_HADDPD: haddpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_HADDPSrm, X86_INS_HADDPS: haddps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_HADDPSrr, X86_INS_HADDPS: haddps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_HLT, X86_INS_HLT: hlt */
+	0,
+	{ 0 }
+},
+{	/* X86_HSUBPDrm, X86_INS_HSUBPD: hsubpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_HSUBPDrr, X86_INS_HSUBPD: hsubpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_HSUBPSrm, X86_INS_HSUBPS: hsubps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_HSUBPSrr, X86_INS_HSUBPS: hsubps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_IDIV16m, X86_INS_IDIV: idiv{w}	$src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_IDIV16r, X86_INS_IDIV: idiv{w}	$src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_IDIV32m, X86_INS_IDIV: idiv{l}	$src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_IDIV32r, X86_INS_IDIV: idiv{l}	$src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_IDIV64m, X86_INS_IDIV: idiv{q}	$src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_IDIV64r, X86_INS_IDIV: idiv{q}	$src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_IDIV8m, X86_INS_IDIV: idiv{b}	$src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_IDIV8r, X86_INS_IDIV: idiv{b}	$src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_UNDEFINED_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ILD_F16m, X86_INS_FILD: fild{s}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ILD_F32m, X86_INS_FILD: fild{l}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ILD_F64m, X86_INS_FILD: fild{ll}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_IMUL16m, X86_INS_IMUL: imul{w}	$src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_IMUL16r, X86_INS_IMUL: imul{w}	$src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_IMUL16rm, X86_INS_IMUL: imul{w}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_IMUL16rmi, X86_INS_IMUL: imul{w}	$dst, $src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_IMUL16rmi8, X86_INS_IMUL: imul{w}	$dst, $src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_IMUL16rr, X86_INS_IMUL: imul{w}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_IMUL16rri, X86_INS_IMUL: imul{w}	$dst, $src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_IMUL16rri8, X86_INS_IMUL: imul{w}	$dst, $src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_IMUL32m, X86_INS_IMUL: imul{l}	$src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_IMUL32r, X86_INS_IMUL: imul{l}	$src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_IMUL32rm, X86_INS_IMUL: imul{l}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_IMUL32rmi, X86_INS_IMUL: imul{l}	$dst, $src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_IMUL32rmi8, X86_INS_IMUL: imul{l}	$dst, $src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_IMUL32rr, X86_INS_IMUL: imul{l}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_IMUL32rri, X86_INS_IMUL: imul{l}	$dst, $src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_IMUL32rri8, X86_INS_IMUL: imul{l}	$dst, $src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_IMUL64m, X86_INS_IMUL: imul{q}	$src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_IMUL64r, X86_INS_IMUL: imul{q}	$src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_IMUL64rm, X86_INS_IMUL: imul{q}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_IMUL64rmi32, X86_INS_IMUL: imul{q}	$dst, $src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_IMUL64rmi8, X86_INS_IMUL: imul{q}	$dst, $src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_IMUL64rr, X86_INS_IMUL: imul{q}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_IMUL64rri32, X86_INS_IMUL: imul{q}	$dst, $src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_IMUL64rri8, X86_INS_IMUL: imul{q}	$dst, $src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_IMUL8m, X86_INS_IMUL: imul{b}	$src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_IMUL8r, X86_INS_IMUL: imul{b}	$src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_IN16ri, X86_INS_IN: in{w}	ax, $port */
+	0,
+	{ 0 }
+},
+{	/* X86_IN16rr, X86_INS_IN: in{w}	ax, dx */
+	0,
+	{ 0 }
+},
+{	/* X86_IN32ri, X86_INS_IN: in{l}	eax, $port */
+	0,
+	{ 0 }
+},
+{	/* X86_IN32rr, X86_INS_IN: in{l}	eax, dx */
+	0,
+	{ 0 }
+},
+{	/* X86_IN8ri, X86_INS_IN: in{b}	al, $port */
+	0,
+	{ 0 }
+},
+{	/* X86_IN8rr, X86_INS_IN: in{b}	al, dx */
+	0,
+	{ 0 }
+},
+{	/* X86_INC16m, X86_INS_INC: inc{w}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_INC16r, X86_INS_INC: inc{w}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_INC16r_alt, X86_INS_INC: inc{w}	$dst */
+	X86_REG_EFLAGS,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_INC32m, X86_INS_INC: inc{l}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_INC32r, X86_INS_INC: inc{l}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_INC32r_alt, X86_INS_INC: inc{l}	$dst */
+	X86_REG_EFLAGS,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_INC64m, X86_INS_INC: inc{q}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_INC64r, X86_INS_INC: inc{q}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_INC8m, X86_INS_INC: inc{b}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_INC8r, X86_INS_INC: inc{b}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_INSB, X86_INS_INSB: insb	$dst, dx */
+	0,
+	{ 0 }
+},
+{	/* X86_INSERTPSrm, X86_INS_INSERTPS: insertps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_INSERTPSrr, X86_INS_INSERTPS: insertps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_INSERTQ, X86_INS_INSERTQ: insertq	$src, $mask */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_INSERTQI, X86_INS_INSERTQ: insertq	$src, $src2, $len, $idx */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_INSL, X86_INS_INSD: ins{l|d}	{%dx, $dst|$dst, dx} */
+	0,
+	{ 0 }
+},
+{	/* X86_INSW, X86_INS_INSW: insw	$dst, dx */
+	0,
+	{ 0 }
+},
+{	/* X86_INT, X86_INS_INT: int	$trap */
+	X86_EFLAGS_RESET_TF | X86_EFLAGS_RESET_NT,
+	{ 0 }
+},
+{	/* X86_INT1, X86_INS_INT1: int1 */
+	X86_EFLAGS_RESET_TF | X86_EFLAGS_RESET_NT,
+	{ 0 }
+},
+{	/* X86_INT3, X86_INS_INT3: int3 */
+	X86_EFLAGS_RESET_TF | X86_EFLAGS_RESET_NT,
+	{ 0 }
+},
+{	/* X86_INTO, X86_INS_INTO: into */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_RESET_TF | X86_EFLAGS_RESET_NT,
+	{ 0 }
+},
+{	/* X86_INVD, X86_INS_INVD: invd */
+	0,
+	{ 0 }
+},
+{	/* X86_INVEPT32, X86_INS_INVEPT: invept	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_INVEPT64, X86_INS_INVEPT: invept	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_INVLPG, X86_INS_INVLPG: invlpg	$addr */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_INVLPGA32, X86_INS_INVLPGA: invlpga	eax, ecx */
+	0,
+	{ 0 }
+},
+{	/* X86_INVLPGA64, X86_INS_INVLPGA: invlpga	rax, ecx */
+	0,
+	{ 0 }
+},
+{	/* X86_INVPCID32, X86_INS_INVPCID: invpcid	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_INVPCID64, X86_INS_INVPCID: invpcid	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_INVVPID32, X86_INS_INVVPID: invvpid	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_INVVPID64, X86_INS_INVVPID: invvpid	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_IRET16, X86_INS_IRET: iret{w} */
+	0,
+	{ 0 }
+},
+{	/* X86_IRET32, X86_INS_IRETD: iretd */
+	X86_EFLAGS_PRIOR_OF | X86_EFLAGS_PRIOR_SF | X86_EFLAGS_PRIOR_ZF | X86_EFLAGS_PRIOR_AF | X86_EFLAGS_PRIOR_PF | X86_EFLAGS_PRIOR_CF | X86_EFLAGS_PRIOR_TF | X86_EFLAGS_PRIOR_IF | X86_EFLAGS_PRIOR_DF | X86_EFLAGS_TEST_NT,
+	{ 0 }
+},
+{	/* X86_IRET64, X86_INS_IRETQ: iretq */
+	X86_EFLAGS_PRIOR_OF | X86_EFLAGS_PRIOR_SF | X86_EFLAGS_PRIOR_ZF | X86_EFLAGS_PRIOR_AF | X86_EFLAGS_PRIOR_PF | X86_EFLAGS_PRIOR_CF | X86_EFLAGS_PRIOR_TF | X86_EFLAGS_PRIOR_IF | X86_EFLAGS_PRIOR_DF | X86_EFLAGS_TEST_NT,
+	{ 0 }
+},
+{	/* X86_ISTT_FP16m, X86_INS_FISTTP: fisttp{s}	$dst */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ISTT_FP32m, X86_INS_FISTTP: fisttp{l}	$dst */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ISTT_FP64m, X86_INS_FISTTP: fisttp{ll}	$dst */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_IST_F16m, X86_INS_FIST: fist{s}	$dst */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_IST_F32m, X86_INS_FIST: fist{l}	$dst */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_IST_FP16m, X86_INS_FISTP: fistp{s}	$dst */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_IST_FP32m, X86_INS_FISTP: fistp{l}	$dst */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_IST_FP64m, X86_INS_FISTP: fistp{ll}	$dst */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_Int_CMPSDrm, X86_INS_CMPSD: cmp${cc}sd	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_CMPSDrr, X86_INS_CMPSD: cmp${cc}sd	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_CMPSSrm, X86_INS_CMPSS: cmp${cc}ss	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_CMPSSrr, X86_INS_CMPSS: cmp${cc}ss	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_COMISDrm, X86_INS_COMISD: comisd	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_COMISDrr, X86_INS_COMISD: comisd	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_COMISSrm, X86_INS_COMISS: comiss	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_COMISSrr, X86_INS_COMISS: comiss	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_CVTSD2SSrm, X86_INS_CVTSD2SS: cvtsd2ss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_Int_CVTSD2SSrr, X86_INS_CVTSD2SS: cvtsd2ss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_CVTSI2SD64rm, X86_INS_CVTSI2SD: cvtsi2sd{q}	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_CVTSI2SD64rr, X86_INS_CVTSI2SD: cvtsi2sd{q}	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_CVTSI2SDrm, X86_INS_CVTSI2SD: cvtsi2sd{l}	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_CVTSI2SDrr, X86_INS_CVTSI2SD: cvtsi2sd{l}	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_CVTSI2SS64rm, X86_INS_CVTSI2SS: cvtsi2ss{q}	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_CVTSI2SS64rr, X86_INS_CVTSI2SS: cvtsi2ss{q}	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_CVTSI2SSrm, X86_INS_CVTSI2SS: cvtsi2ss{l}	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_CVTSI2SSrr, X86_INS_CVTSI2SS: cvtsi2ss{l}	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_CVTSS2SDrm, X86_INS_CVTSS2SD: cvtss2sd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_Int_CVTSS2SDrr, X86_INS_CVTSS2SD: cvtss2sd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_CVTTSD2SI64rm, X86_INS_CVTTSD2SI: cvttsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_Int_CVTTSD2SI64rr, X86_INS_CVTTSD2SI: cvttsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_CVTTSD2SIrm, X86_INS_CVTTSD2SI: cvttsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_Int_CVTTSD2SIrr, X86_INS_CVTTSD2SI: cvttsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_CVTTSS2SI64rm, X86_INS_CVTTSS2SI: cvttss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_Int_CVTTSS2SI64rr, X86_INS_CVTTSS2SI: cvttss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_CVTTSS2SIrm, X86_INS_CVTTSS2SI: cvttss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_Int_CVTTSS2SIrr, X86_INS_CVTTSS2SI: cvttss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_UCOMISDrm, X86_INS_UCOMISD: ucomisd	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_UCOMISDrr, X86_INS_UCOMISD: ucomisd	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_UCOMISSrm, X86_INS_UCOMISS: ucomiss	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_UCOMISSrr, X86_INS_UCOMISS: ucomiss	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCMPSDrm, X86_INS_VCMPSD: vcmp${cc}sd	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCMPSDrr, X86_INS_VCMPSD: vcmp${cc}sd	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCMPSSrm, X86_INS_VCMPSS: vcmp${cc}ss	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCMPSSrr, X86_INS_VCMPSS: vcmp${cc}ss	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCOMISDZrm, X86_INS_VCOMISD: vcomisd	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCOMISDZrr, X86_INS_VCOMISD: vcomisd	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCOMISDrm, X86_INS_VCOMISD: vcomisd	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCOMISDrr, X86_INS_VCOMISD: vcomisd	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCOMISSZrm, X86_INS_VCOMISS: vcomiss	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCOMISSZrr, X86_INS_VCOMISS: vcomiss	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCOMISSrm, X86_INS_VCOMISS: vcomiss	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCOMISSrr, X86_INS_VCOMISS: vcomiss	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTSD2SSrm, X86_INS_VCVTSD2SS: vcvtsd2ss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTSD2SSrr, X86_INS_VCVTSD2SS: vcvtsd2ss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTSI2SD64Zrm, X86_INS_VCVTSI2SD: vcvtsi2sd{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTSI2SD64Zrr, X86_INS_VCVTSI2SD: vcvtsi2sd{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTSI2SD64rm, X86_INS_VCVTSI2SD: vcvtsi2sd{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTSI2SD64rr, X86_INS_VCVTSI2SD: vcvtsi2sd{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTSI2SDZrm, X86_INS_VCVTSI2SD: vcvtsi2sd{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTSI2SDZrr, X86_INS_VCVTSI2SD: vcvtsi2sd{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTSI2SDrm, X86_INS_VCVTSI2SD: vcvtsi2sd{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTSI2SDrr, X86_INS_VCVTSI2SD: vcvtsi2sd{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTSI2SS64Zrm, X86_INS_VCVTSI2SS: vcvtsi2ss{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTSI2SS64Zrr, X86_INS_VCVTSI2SS: vcvtsi2ss{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTSI2SS64rm, X86_INS_VCVTSI2SS: vcvtsi2ss{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTSI2SS64rr, X86_INS_VCVTSI2SS: vcvtsi2ss{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTSI2SSZrm, X86_INS_VCVTSI2SS: vcvtsi2ss{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTSI2SSZrr, X86_INS_VCVTSI2SS: vcvtsi2ss{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTSI2SSrm, X86_INS_VCVTSI2SS: vcvtsi2ss{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTSI2SSrr, X86_INS_VCVTSI2SS: vcvtsi2ss{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTSS2SDrm, X86_INS_VCVTSS2SD: vcvtss2sd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTSS2SDrr, X86_INS_VCVTSS2SD: vcvtss2sd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTTSD2SI64Zrm, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_Int_VCVTTSD2SI64Zrr, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTTSD2SI64rm, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_Int_VCVTTSD2SI64rr, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTTSD2SIZrm, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_Int_VCVTTSD2SIZrr, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTTSD2SIrm, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_Int_VCVTTSD2SIrr, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTTSD2USI64Zrm, X86_INS_VCVTTSD2USI: vcvttsd2usi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_Int_VCVTTSD2USI64Zrr, X86_INS_VCVTTSD2USI: vcvttsd2usi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTTSD2USIZrm, X86_INS_VCVTTSD2USI: vcvttsd2usi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_Int_VCVTTSD2USIZrr, X86_INS_VCVTTSD2USI: vcvttsd2usi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTTSS2SI64Zrm, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_Int_VCVTTSS2SI64Zrr, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTTSS2SI64rm, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_Int_VCVTTSS2SI64rr, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTTSS2SIZrm, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_Int_VCVTTSS2SIZrr, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTTSS2SIrm, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_Int_VCVTTSS2SIrr, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTTSS2USI64Zrm, X86_INS_VCVTTSS2USI: vcvttss2usi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_Int_VCVTTSS2USI64Zrr, X86_INS_VCVTTSS2USI: vcvttss2usi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTTSS2USIZrm, X86_INS_VCVTTSS2USI: vcvttss2usi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_Int_VCVTTSS2USIZrr, X86_INS_VCVTTSS2USI: vcvttss2usi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTUSI2SD64Zrm, X86_INS_VCVTUSI2SD: vcvtusi2sd{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTUSI2SD64Zrr, X86_INS_VCVTUSI2SD: vcvtusi2sd{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTUSI2SDZrm, X86_INS_VCVTUSI2SD: vcvtusi2sd{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTUSI2SDZrr, X86_INS_VCVTUSI2SD: vcvtusi2sd{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTUSI2SS64Zrm, X86_INS_VCVTUSI2SS: vcvtusi2ss{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTUSI2SS64Zrr, X86_INS_VCVTUSI2SS: vcvtusi2ss{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTUSI2SSZrm, X86_INS_VCVTUSI2SS: vcvtusi2ss{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VCVTUSI2SSZrr, X86_INS_VCVTUSI2SS: vcvtusi2ss{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VUCOMISDZrm, X86_INS_VUCOMISD: vucomisd	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VUCOMISDZrr, X86_INS_VUCOMISD: vucomisd	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VUCOMISDrm, X86_INS_VUCOMISD: vucomisd	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VUCOMISDrr, X86_INS_VUCOMISD: vucomisd	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VUCOMISSZrm, X86_INS_VUCOMISS: vucomiss	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VUCOMISSZrr, X86_INS_VUCOMISS: vucomiss	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VUCOMISSrm, X86_INS_VUCOMISS: vucomiss	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_Int_VUCOMISSrr, X86_INS_VUCOMISS: vucomiss	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_JAE_1, X86_INS_JAE: jae	$dst */
+	X86_EFLAGS_TEST_CF,
+	{ 0 }
+},
+{	/* X86_JAE_2, X86_INS_JAE: jae	$dst */
+	X86_EFLAGS_TEST_CF,
+	{ 0 }
+},
+{	/* X86_JAE_4, X86_INS_JAE: jae	$dst */
+	X86_EFLAGS_TEST_CF,
+	{ 0 }
+},
+{	/* X86_JA_1, X86_INS_JA: ja	$dst */
+	X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF,
+	{ 0 }
+},
+{	/* X86_JA_2, X86_INS_JA: ja	$dst */
+	X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF,
+	{ 0 }
+},
+{	/* X86_JA_4, X86_INS_JA: ja	$dst */
+	X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF,
+	{ 0 }
+},
+{	/* X86_JBE_1, X86_INS_JBE: jbe	$dst */
+	X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF,
+	{ 0 }
+},
+{	/* X86_JBE_2, X86_INS_JBE: jbe	$dst */
+	X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF,
+	{ 0 }
+},
+{	/* X86_JBE_4, X86_INS_JBE: jbe	$dst */
+	X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF,
+	{ 0 }
+},
+{	/* X86_JB_1, X86_INS_JB: jb	$dst */
+	X86_EFLAGS_TEST_CF,
+	{ 0 }
+},
+{	/* X86_JB_2, X86_INS_JB: jb	$dst */
+	X86_EFLAGS_TEST_CF,
+	{ 0 }
+},
+{	/* X86_JB_4, X86_INS_JB: jb	$dst */
+	X86_EFLAGS_TEST_CF,
+	{ 0 }
+},
+{	/* X86_JCXZ, X86_INS_JCXZ: jcxz	$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_JECXZ, X86_INS_JECXZ: jecxz	$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_JE_1, X86_INS_JE: je	$dst */
+	X86_EFLAGS_TEST_ZF,
+	{ 0 }
+},
+{	/* X86_JE_2, X86_INS_JE: je	$dst */
+	X86_EFLAGS_TEST_ZF,
+	{ 0 }
+},
+{	/* X86_JE_4, X86_INS_JE: je	$dst */
+	X86_EFLAGS_TEST_ZF,
+	{ 0 }
+},
+{	/* X86_JGE_1, X86_INS_JGE: jge	$dst */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF,
+	{ 0 }
+},
+{	/* X86_JGE_2, X86_INS_JGE: jge	$dst */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF,
+	{ 0 }
+},
+{	/* X86_JGE_4, X86_INS_JGE: jge	$dst */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF,
+	{ 0 }
+},
+{	/* X86_JG_1, X86_INS_JG: jg	$dst */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF,
+	{ 0 }
+},
+{	/* X86_JG_2, X86_INS_JG: jg	$dst */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF,
+	{ 0 }
+},
+{	/* X86_JG_4, X86_INS_JG: jg	$dst */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF,
+	{ 0 }
+},
+{	/* X86_JLE_1, X86_INS_JLE: jle	$dst */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF,
+	{ 0 }
+},
+{	/* X86_JLE_2, X86_INS_JLE: jle	$dst */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF,
+	{ 0 }
+},
+{	/* X86_JLE_4, X86_INS_JLE: jle	$dst */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF,
+	{ 0 }
+},
+{	/* X86_JL_1, X86_INS_JL: jl	$dst */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF,
+	{ 0 }
+},
+{	/* X86_JL_2, X86_INS_JL: jl	$dst */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF,
+	{ 0 }
+},
+{	/* X86_JL_4, X86_INS_JL: jl	$dst */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF,
+	{ 0 }
+},
+{	/* X86_JMP16m, X86_INS_JMP: jmp{w}	{*}$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_JMP16r, X86_INS_JMP: jmp{w}	{*}$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_JMP32m, X86_INS_JMP: jmp{l}	{*}$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_JMP32r, X86_INS_JMP: jmp{l}	{*}$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_JMP64m, X86_INS_JMP: jmp{q}	{*}$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_JMP64r, X86_INS_JMP: jmp{q}	{*}$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_JMP_1, X86_INS_JMP: jmp	$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_JMP_2, X86_INS_JMP: jmp	$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_JMP_4, X86_INS_JMP: jmp	$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_JNE_1, X86_INS_JNE: jne	$dst */
+	X86_EFLAGS_TEST_ZF,
+	{ 0 }
+},
+{	/* X86_JNE_2, X86_INS_JNE: jne	$dst */
+	X86_EFLAGS_TEST_ZF,
+	{ 0 }
+},
+{	/* X86_JNE_4, X86_INS_JNE: jne	$dst */
+	X86_EFLAGS_TEST_ZF,
+	{ 0 }
+},
+{	/* X86_JNO_1, X86_INS_JNO: jno	$dst */
+	X86_EFLAGS_TEST_OF,
+	{ 0 }
+},
+{	/* X86_JNO_2, X86_INS_JNO: jno	$dst */
+	X86_EFLAGS_TEST_OF,
+	{ 0 }
+},
+{	/* X86_JNO_4, X86_INS_JNO: jno	$dst */
+	X86_EFLAGS_TEST_OF,
+	{ 0 }
+},
+{	/* X86_JNP_1, X86_INS_JNP: jnp	$dst */
+	X86_EFLAGS_TEST_PF,
+	{ 0 }
+},
+{	/* X86_JNP_2, X86_INS_JNP: jnp	$dst */
+	X86_EFLAGS_TEST_PF,
+	{ 0 }
+},
+{	/* X86_JNP_4, X86_INS_JNP: jnp	$dst */
+	X86_EFLAGS_TEST_PF,
+	{ 0 }
+},
+{	/* X86_JNS_1, X86_INS_JNS: jns	$dst */
+	X86_EFLAGS_TEST_SF,
+	{ 0 }
+},
+{	/* X86_JNS_2, X86_INS_JNS: jns	$dst */
+	X86_EFLAGS_TEST_SF,
+	{ 0 }
+},
+{	/* X86_JNS_4, X86_INS_JNS: jns	$dst */
+	X86_EFLAGS_TEST_SF,
+	{ 0 }
+},
+{	/* X86_JO_1, X86_INS_JO: jo	$dst */
+	X86_EFLAGS_TEST_OF,
+	{ 0 }
+},
+{	/* X86_JO_2, X86_INS_JO: jo	$dst */
+	X86_EFLAGS_TEST_OF,
+	{ 0 }
+},
+{	/* X86_JO_4, X86_INS_JO: jo	$dst */
+	X86_EFLAGS_TEST_OF,
+	{ 0 }
+},
+{	/* X86_JP_1, X86_INS_JP: jp	$dst */
+	X86_EFLAGS_TEST_PF,
+	{ 0 }
+},
+{	/* X86_JP_2, X86_INS_JP: jp	$dst */
+	X86_EFLAGS_TEST_PF,
+	{ 0 }
+},
+{	/* X86_JP_4, X86_INS_JP: jp	$dst */
+	X86_EFLAGS_TEST_PF,
+	{ 0 }
+},
+{	/* X86_JRCXZ, X86_INS_JRCXZ: jrcxz	$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_JS_1, X86_INS_JS: js	$dst */
+	X86_EFLAGS_TEST_SF,
+	{ 0 }
+},
+{	/* X86_JS_2, X86_INS_JS: js	$dst */
+	X86_EFLAGS_TEST_SF,
+	{ 0 }
+},
+{	/* X86_JS_4, X86_INS_JS: js	$dst */
+	X86_EFLAGS_TEST_SF,
+	{ 0 }
+},
+{	/* X86_KANDBrr, X86_INS_KANDB: kandb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KANDDrr, X86_INS_KANDD: kandd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KANDNBrr, X86_INS_KANDNB: kandnb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KANDNDrr, X86_INS_KANDND: kandnd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KANDNQrr, X86_INS_KANDNQ: kandnq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KANDNWrr, X86_INS_KANDNW: kandnw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KANDQrr, X86_INS_KANDQ: kandq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KANDWrr, X86_INS_KANDW: kandw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KMOVBkk, X86_INS_KMOVB: kmovb	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KMOVBkm, X86_INS_KMOVB: kmovb	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KMOVBkr, X86_INS_KMOVB: kmovb	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KMOVBmk, X86_INS_KMOVB: kmovb	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KMOVBrk, X86_INS_KMOVB: kmovb	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KMOVDkk, X86_INS_KMOVD: kmovd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KMOVDkm, X86_INS_KMOVD: kmovd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KMOVDkr, X86_INS_KMOVD: kmovd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KMOVDmk, X86_INS_KMOVD: kmovd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KMOVDrk, X86_INS_KMOVD: kmovd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KMOVQkk, X86_INS_KMOVQ: kmovq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KMOVQkm, X86_INS_KMOVQ: kmovq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KMOVQkr, X86_INS_KMOVQ: kmovq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KMOVQmk, X86_INS_KMOVQ: kmovq	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KMOVQrk, X86_INS_KMOVQ: kmovq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KMOVWkk, X86_INS_KMOVW: kmovw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KMOVWkm, X86_INS_KMOVW: kmovw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KMOVWkr, X86_INS_KMOVW: kmovw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KMOVWmk, X86_INS_KMOVW: kmovw	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KMOVWrk, X86_INS_KMOVW: kmovw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KNOTBrr, X86_INS_KNOTB: knotb	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KNOTDrr, X86_INS_KNOTD: knotd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KNOTQrr, X86_INS_KNOTQ: knotq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KNOTWrr, X86_INS_KNOTW: knotw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KORBrr, X86_INS_KORB: korb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KORDrr, X86_INS_KORD: kord	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KORQrr, X86_INS_KORQ: korq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KORTESTBrr, X86_INS_KORTESTB: kortestb	$src1, $src2 */
+	X86_REG_EFLAGS,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KORTESTDrr, X86_INS_KORTESTD: kortestd	$src1, $src2 */
+	X86_REG_EFLAGS,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KORTESTQrr, X86_INS_KORTESTQ: kortestq	$src1, $src2 */
+	X86_REG_EFLAGS,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KORTESTWrr, X86_INS_KORTESTW: kortestw	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KORWrr, X86_INS_KORW: korw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KSHIFTLBri, X86_INS_KSHIFTLB: kshiftlb	$dst, $src, $imm */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KSHIFTLDri, X86_INS_KSHIFTLD: kshiftld	$dst, $src, $imm */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KSHIFTLQri, X86_INS_KSHIFTLQ: kshiftlq	$dst, $src, $imm */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KSHIFTLWri, X86_INS_KSHIFTLW: kshiftlw	$dst, $src, $imm */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KSHIFTRBri, X86_INS_KSHIFTRB: kshiftrb	$dst, $src, $imm */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KSHIFTRDri, X86_INS_KSHIFTRD: kshiftrd	$dst, $src, $imm */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KSHIFTRQri, X86_INS_KSHIFTRQ: kshiftrq	$dst, $src, $imm */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KSHIFTRWri, X86_INS_KSHIFTRW: kshiftrw	$dst, $src, $imm */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_KUNPCKBWrr, X86_INS_KUNPCKBW: kunpckbw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KXNORBrr, X86_INS_KXNORB: kxnorb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KXNORDrr, X86_INS_KXNORD: kxnord	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KXNORQrr, X86_INS_KXNORQ: kxnorq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KXNORWrr, X86_INS_KXNORW: kxnorw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KXORBrr, X86_INS_KXORB: kxorb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KXORDrr, X86_INS_KXORD: kxord	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KXORQrr, X86_INS_KXORQ: kxorq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_KXORWrr, X86_INS_KXORW: kxorw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_LAHF, X86_INS_LAHF: lahf */
+	0,
+	{ 0 }
+},
+{	/* X86_LAR16rm, X86_INS_LAR: lar{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_ZF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LAR16rr, X86_INS_LAR: lar{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_ZF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LAR32rm, X86_INS_LAR: lar{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_ZF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LAR32rr, X86_INS_LAR: lar{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_ZF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LAR64rm, X86_INS_LAR: lar{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_ZF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LAR64rr, X86_INS_LAR: lar{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_ZF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LCMPXCHG16, X86_INS_CMPXCHG: cmpxchg{w}	$ptr, $swap */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_LCMPXCHG16B, X86_INS_CMPXCHG16B: cmpxchg16b	$ptr */
+	X86_EFLAGS_MODIFY_ZF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LCMPXCHG32, X86_INS_CMPXCHG: cmpxchg{l}	$ptr, $swap */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_LCMPXCHG64, X86_INS_CMPXCHG: cmpxchg{q}	$ptr, $swap */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_LCMPXCHG8, X86_INS_CMPXCHG: cmpxchg{b}	$ptr, $swap */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_LCMPXCHG8B, X86_INS_CMPXCHG8B: cmpxchg8b	$ptr */
+	X86_EFLAGS_MODIFY_ZF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LDDQUrm, X86_INS_LDDQU: lddqu	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LDMXCSR, X86_INS_LDMXCSR: ldmxcsr	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LDS16rm, X86_INS_LDS: lds{w}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LDS32rm, X86_INS_LDS: lds{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LD_F0, X86_INS_FLDZ: fldz */
+	0,
+	{ 0 }
+},
+{	/* X86_LD_F1, X86_INS_FLD1: fld1 */
+	0,
+	{ 0 }
+},
+{	/* X86_LD_F32m, X86_INS_FLD: fld{s}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LD_F64m, X86_INS_FLD: fld{l}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LD_F80m, X86_INS_FLD: fld{t}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LD_Frr, X86_INS_FLD: fld	$op */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LEA16r, X86_INS_LEA: lea{w}	{$src|$dst}, {$dst|$src} */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LEA32r, X86_INS_LEA: lea{l}	{$src|$dst}, {$dst|$src} */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LEA64_32r, X86_INS_LEA: lea{l}	{$src|$dst}, {$dst|$src} */
+	0,
+	{ 0 }
+},
+{	/* X86_LEA64r, X86_INS_LEA: lea{q}	{$src|$dst}, {$dst|$src} */
+	0,
+	{ 0 }
+},
+{	/* X86_LEAVE, X86_INS_LEAVE: leave */
+	0,
+	{ 0 }
+},
+{	/* X86_LEAVE64, X86_INS_LEAVE: leave */
+	0,
+	{ 0 }
+},
+{	/* X86_LES16rm, X86_INS_LES: les{w}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LES32rm, X86_INS_LES: les{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LFENCE, X86_INS_LFENCE: lfence */
+	0,
+	{ 0 }
+},
+{	/* X86_LFS16rm, X86_INS_LFS: lfs{w}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LFS32rm, X86_INS_LFS: lfs{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LFS64rm, X86_INS_LFS: lfs{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LGDT16m, X86_INS_LGDT: lgdt{w}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LGDT32m, X86_INS_LGDT: lgdt{l}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LGDT64m, X86_INS_LGDT: lgdt{q}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LGS16rm, X86_INS_LGS: lgs{w}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LGS32rm, X86_INS_LGS: lgs{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LGS64rm, X86_INS_LGS: lgs{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LIDT16m, X86_INS_LIDT: lidt{w}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LIDT32m, X86_INS_LIDT: lidt{l}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LIDT64m, X86_INS_LIDT: lidt{q}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LLDT16m, X86_INS_LLDT: lldt{w}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LLDT16r, X86_INS_LLDT: lldt{w}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LMSW16m, X86_INS_LMSW: lmsw{w}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LMSW16r, X86_INS_LMSW: lmsw{w}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_ADD16mi, X86_INS_ADD: add{w}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_ADD16mi8, X86_INS_ADD: add{w}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_ADD16mr, X86_INS_ADD: add{w}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_ADD32mi, X86_INS_ADD: add{l}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_ADD32mi8, X86_INS_ADD: add{l}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_ADD32mr, X86_INS_ADD: add{l}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_ADD64mi32, X86_INS_ADD: add{q}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_ADD64mi8, X86_INS_ADD: add{q}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_ADD64mr, X86_INS_ADD: add{q}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_ADD8mi, X86_INS_ADD: add{b}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_ADD8mr, X86_INS_ADD: add{b}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_AND16mi, X86_INS_AND: and{w}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_AND16mi8, X86_INS_AND: and{w}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_AND16mr, X86_INS_AND: and{w}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_AND32mi, X86_INS_AND: and{l}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_AND32mi8, X86_INS_AND: and{l}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_AND32mr, X86_INS_AND: and{l}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_AND64mi32, X86_INS_AND: and{q}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_AND64mi8, X86_INS_AND: and{q}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_AND64mr, X86_INS_AND: and{q}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_AND8mi, X86_INS_AND: and{b}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_AND8mr, X86_INS_AND: and{b}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_DEC16m, X86_INS_DEC: dec{w}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_DEC32m, X86_INS_DEC: dec{l}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_DEC64m, X86_INS_DEC: dec{q}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_DEC8m, X86_INS_DEC: dec{b}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_INC16m, X86_INS_INC: inc{w}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_INC32m, X86_INS_INC: inc{l}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_INC64m, X86_INS_INC: inc{q}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_INC8m, X86_INS_INC: inc{b}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_OR16mi, X86_INS_OR: or{w}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_OR16mi8, X86_INS_OR: or{w}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_OR16mr, X86_INS_OR: or{w}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_OR32mi, X86_INS_OR: or{l}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_OR32mi8, X86_INS_OR: or{l}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_OR32mr, X86_INS_OR: or{l}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_OR64mi32, X86_INS_OR: or{q}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_OR64mi8, X86_INS_OR: or{q}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_OR64mr, X86_INS_OR: or{q}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_OR8mi, X86_INS_OR: or{b}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_OR8mr, X86_INS_OR: or{b}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_SUB16mi, X86_INS_SUB: sub{w}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_SUB16mi8, X86_INS_SUB: sub{w}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_SUB16mr, X86_INS_SUB: sub{w}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_SUB32mi, X86_INS_SUB: sub{l}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_SUB32mi8, X86_INS_SUB: sub{l}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_SUB32mr, X86_INS_SUB: sub{l}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_SUB64mi32, X86_INS_SUB: sub{q}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_SUB64mi8, X86_INS_SUB: sub{q}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_SUB64mr, X86_INS_SUB: sub{q}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_SUB8mi, X86_INS_SUB: sub{b}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_SUB8mr, X86_INS_SUB: sub{b}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_XOR16mi, X86_INS_XOR: xor{w}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_XOR16mi8, X86_INS_XOR: xor{w}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_XOR16mr, X86_INS_XOR: xor{w}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_XOR32mi, X86_INS_XOR: xor{l}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_XOR32mi8, X86_INS_XOR: xor{l}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_XOR32mr, X86_INS_XOR: xor{l}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_XOR64mi32, X86_INS_XOR: xor{q}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_XOR64mi8, X86_INS_XOR: xor{q}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_XOR64mr, X86_INS_XOR: xor{q}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_XOR8mi, X86_INS_XOR: xor{b}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LOCK_XOR8mr, X86_INS_XOR: xor{b}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_LODSB, X86_INS_LODSB: lodsb	al, $src */
+	X86_EFLAGS_TEST_DF,
+	{ 0 }
+},
+{	/* X86_LODSL, X86_INS_LODSD: lods{l|d}	{$src, %eax|eax, $src} */
+	X86_EFLAGS_TEST_DF,
+	{ 0 }
+},
+{	/* X86_LODSQ, X86_INS_LODSQ: lodsq	rax, $src */
+	X86_EFLAGS_TEST_DF,
+	{ 0 }
+},
+{	/* X86_LODSW, X86_INS_LODSW: lodsw	ax, $src */
+	X86_EFLAGS_TEST_DF,
+	{ 0 }
+},
+{	/* X86_LOOP, X86_INS_LOOP: loop	$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_LOOPE, X86_INS_LOOPE: loope	$dst */
+	X86_EFLAGS_TEST_ZF,
+	{ 0 }
+},
+{	/* X86_LOOPNE, X86_INS_LOOPNE: loopne	$dst */
+	X86_EFLAGS_TEST_ZF,
+	{ 0 }
+},
+{	/* X86_LRETIL, X86_INS_RETF: {l}retf	$amt */
+	0,
+	{ 0 }
+},
+{	/* X86_LRETIQ, X86_INS_RETFQ: {l}retfq	$amt */
+	0,
+	{ 0 }
+},
+{	/* X86_LRETIW, X86_INS_RETF: {l}retf	$amt */
+	0,
+	{ 0 }
+},
+{	/* X86_LRETL, X86_INS_RETF: {l}retf */
+	0,
+	{ 0 }
+},
+{	/* X86_LRETQ, X86_INS_RETFQ: {l}retfq */
+	0,
+	{ 0 }
+},
+{	/* X86_LRETW, X86_INS_RETF: {l}retf */
+	0,
+	{ 0 }
+},
+{	/* X86_LSL16rm, X86_INS_LSL: lsl{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_ZF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LSL16rr, X86_INS_LSL: lsl{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_ZF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LSL32rm, X86_INS_LSL: lsl{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_ZF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LSL32rr, X86_INS_LSL: lsl{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_ZF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LSL64rm, X86_INS_LSL: lsl{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_ZF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LSL64rr, X86_INS_LSL: lsl{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_ZF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LSS16rm, X86_INS_LSS: lss{w}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LSS32rm, X86_INS_LSS: lss{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LSS64rm, X86_INS_LSS: lss{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LTRm, X86_INS_LTR: ltr{w}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LTRr, X86_INS_LTR: ltr{w}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_LXADD16, X86_INS_XADD: xadd{w}	$ptr, $val */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_LXADD32, X86_INS_XADD: xadd{l}	$ptr, $val */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_LXADD64, X86_INS_XADD: xadd{q}	$ptr, $val */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_LXADD8, X86_INS_XADD: xadd{b}	$ptr, $val */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_LZCNT16rm, X86_INS_LZCNT: lzcnt{w}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LZCNT16rr, X86_INS_LZCNT: lzcnt{w}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LZCNT32rm, X86_INS_LZCNT: lzcnt{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LZCNT32rr, X86_INS_LZCNT: lzcnt{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LZCNT64rm, X86_INS_LZCNT: lzcnt{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_LZCNT64rr, X86_INS_LZCNT: lzcnt{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MASKMOVDQU, X86_INS_MASKMOVDQU: maskmovdqu	$src, $mask */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MASKMOVDQU64, X86_INS_MASKMOVDQU: maskmovdqu	$src, $mask */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MAXCPDrm, X86_INS_MAXPD: maxpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MAXCPDrr, X86_INS_MAXPD: maxpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MAXCPSrm, X86_INS_MAXPS: maxps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MAXCPSrr, X86_INS_MAXPS: maxps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MAXCSDrm, X86_INS_MAXSD: maxsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MAXCSDrr, X86_INS_MAXSD: maxsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MAXCSSrm, X86_INS_MAXSS: maxss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MAXCSSrr, X86_INS_MAXSS: maxss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MAXPDrm, X86_INS_MAXPD: maxpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MAXPDrr, X86_INS_MAXPD: maxpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MAXPSrm, X86_INS_MAXPS: maxps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MAXPSrr, X86_INS_MAXPS: maxps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MAXSDrm, X86_INS_MAXSD: maxsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MAXSDrm_Int, X86_INS_MAXSD: maxsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_MAXSDrr, X86_INS_MAXSD: maxsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MAXSDrr_Int, X86_INS_MAXSD: maxsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MAXSSrm, X86_INS_MAXSS: maxss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MAXSSrm_Int, X86_INS_MAXSS: maxss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_MAXSSrr, X86_INS_MAXSS: maxss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MAXSSrr_Int, X86_INS_MAXSS: maxss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MFENCE, X86_INS_MFENCE: mfence */
+	0,
+	{ 0 }
+},
+{	/* X86_MINCPDrm, X86_INS_MINPD: minpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MINCPDrr, X86_INS_MINPD: minpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MINCPSrm, X86_INS_MINPS: minps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MINCPSrr, X86_INS_MINPS: minps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MINCSDrm, X86_INS_MINSD: minsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MINCSDrr, X86_INS_MINSD: minsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MINCSSrm, X86_INS_MINSS: minss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MINCSSrr, X86_INS_MINSS: minss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MINPDrm, X86_INS_MINPD: minpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MINPDrr, X86_INS_MINPD: minpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MINPSrm, X86_INS_MINPS: minps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MINPSrr, X86_INS_MINPS: minps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MINSDrm, X86_INS_MINSD: minsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MINSDrm_Int, X86_INS_MINSD: minsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_MINSDrr, X86_INS_MINSD: minsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MINSDrr_Int, X86_INS_MINSD: minsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MINSSrm, X86_INS_MINSS: minss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MINSSrm_Int, X86_INS_MINSS: minss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_MINSSrr, X86_INS_MINSS: minss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MINSSrr_Int, X86_INS_MINSS: minss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_CVTPD2PIirm, X86_INS_CVTPD2PI: cvtpd2pi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_CVTPD2PIirr, X86_INS_CVTPD2PI: cvtpd2pi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_CVTPI2PDirm, X86_INS_CVTPI2PD: cvtpi2pd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_CVTPI2PDirr, X86_INS_CVTPI2PD: cvtpi2pd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_CVTPI2PSirm, X86_INS_CVTPI2PS: cvtpi2ps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_CVTPI2PSirr, X86_INS_CVTPI2PS: cvtpi2ps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_CVTPS2PIirm, X86_INS_CVTPS2PI: cvtps2pi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_CVTPS2PIirr, X86_INS_CVTPS2PI: cvtps2pi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_CVTTPD2PIirm, X86_INS_CVTTPD2PI: cvttpd2pi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_CVTTPD2PIirr, X86_INS_CVTTPD2PI: cvttpd2pi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_CVTTPS2PIirm, X86_INS_CVTTPS2PI: cvttps2pi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_CVTTPS2PIirr, X86_INS_CVTTPS2PI: cvttps2pi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_EMMS, X86_INS_EMMS: emms */
+	0,
+	{ 0 }
+},
+{	/* X86_MMX_MASKMOVQ, X86_INS_MASKMOVQ: maskmovq	$src, $mask */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_MASKMOVQ64, X86_INS_MASKMOVQ: maskmovq	$src, $mask */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_MOVD64from64rm, X86_INS_MOVD: movd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_MOVD64from64rr, X86_INS_MOVD: movd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_MOVD64grr, X86_INS_MOVD: movd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_MOVD64mr, X86_INS_MOVD: movd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_MOVD64rm, X86_INS_MOVD: movd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_MOVD64rr, X86_INS_MOVD: movd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_MOVD64to64rm, X86_INS_MOVD: movd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_MOVD64to64rr, X86_INS_MOVD: movd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_MOVDQ2Qrr, X86_INS_MOVDQ2Q: movdq2q	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_MOVFR642Qrr, X86_INS_MOVDQ2Q: movdq2q	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_MOVNTQmr, X86_INS_MOVNTQ: movntq	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_MOVQ2DQrr, X86_INS_MOVQ2DQ: movq2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_MOVQ2FR64rr, X86_INS_MOVQ2DQ: movq2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_MOVQ64mr, X86_INS_MOVQ: movq	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_MOVQ64rm, X86_INS_MOVQ: movq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_MOVQ64rr, X86_INS_MOVQ: movq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_MOVQ64rr_REV, X86_INS_MOVQ: movq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PABSBrm64, X86_INS_PABSB: pabsb	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PABSBrr64, X86_INS_PABSB: pabsb	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PABSDrm64, X86_INS_PABSD: pabsd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PABSDrr64, X86_INS_PABSD: pabsd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PABSWrm64, X86_INS_PABSW: pabsw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PABSWrr64, X86_INS_PABSW: pabsw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PACKSSDWirm, X86_INS_PACKSSDW: packssdw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PACKSSDWirr, X86_INS_PACKSSDW: packssdw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PACKSSWBirm, X86_INS_PACKSSWB: packsswb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PACKSSWBirr, X86_INS_PACKSSWB: packsswb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PACKUSWBirm, X86_INS_PACKUSWB: packuswb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PACKUSWBirr, X86_INS_PACKUSWB: packuswb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PADDBirm, X86_INS_PADDB: paddb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PADDBirr, X86_INS_PADDB: paddb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PADDDirm, X86_INS_PADDD: paddd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PADDDirr, X86_INS_PADDD: paddd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PADDQirm, X86_INS_PADDQ: paddq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PADDQirr, X86_INS_PADDQ: paddq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PADDSBirm, X86_INS_PADDSB: paddsb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PADDSBirr, X86_INS_PADDSB: paddsb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PADDSWirm, X86_INS_PADDSW: paddsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PADDSWirr, X86_INS_PADDSW: paddsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PADDUSBirm, X86_INS_PADDUSB: paddusb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PADDUSBirr, X86_INS_PADDUSB: paddusb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PADDUSWirm, X86_INS_PADDUSW: paddusw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PADDUSWirr, X86_INS_PADDUSW: paddusw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PADDWirm, X86_INS_PADDW: paddw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PADDWirr, X86_INS_PADDW: paddw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PALIGNR64irm, X86_INS_PALIGNR: palignr	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PALIGNR64irr, X86_INS_PALIGNR: palignr	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PANDNirm, X86_INS_PANDN: pandn	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PANDNirr, X86_INS_PANDN: pandn	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PANDirm, X86_INS_PAND: pand	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PANDirr, X86_INS_PAND: pand	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PAVGBirm, X86_INS_PAVGB: pavgb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PAVGBirr, X86_INS_PAVGB: pavgb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PAVGWirm, X86_INS_PAVGW: pavgw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PAVGWirr, X86_INS_PAVGW: pavgw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PCMPEQBirm, X86_INS_PCMPEQB: pcmpeqb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PCMPEQBirr, X86_INS_PCMPEQB: pcmpeqb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PCMPEQDirm, X86_INS_PCMPEQD: pcmpeqd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PCMPEQDirr, X86_INS_PCMPEQD: pcmpeqd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PCMPEQWirm, X86_INS_PCMPEQW: pcmpeqw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PCMPEQWirr, X86_INS_PCMPEQW: pcmpeqw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PCMPGTBirm, X86_INS_PCMPGTB: pcmpgtb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PCMPGTBirr, X86_INS_PCMPGTB: pcmpgtb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PCMPGTDirm, X86_INS_PCMPGTD: pcmpgtd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PCMPGTDirr, X86_INS_PCMPGTD: pcmpgtd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PCMPGTWirm, X86_INS_PCMPGTW: pcmpgtw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PCMPGTWirr, X86_INS_PCMPGTW: pcmpgtw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PEXTRWirri, X86_INS_PEXTRW: pextrw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_MMX_PHADDSWrm64, X86_INS_PHADDSW: phaddsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PHADDSWrr64, X86_INS_PHADDSW: phaddsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PHADDWrm64, X86_INS_PHADDW: phaddw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PHADDWrr64, X86_INS_PHADDW: phaddw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PHADDrm64, X86_INS_PHADDD: phaddd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PHADDrr64, X86_INS_PHADDD: phaddd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PHSUBDrm64, X86_INS_PHSUBD: phsubd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PHSUBDrr64, X86_INS_PHSUBD: phsubd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PHSUBSWrm64, X86_INS_PHSUBSW: phsubsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PHSUBSWrr64, X86_INS_PHSUBSW: phsubsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PHSUBWrm64, X86_INS_PHSUBW: phsubw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PHSUBWrr64, X86_INS_PHSUBW: phsubw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PINSRWirmi, X86_INS_PINSRW: pinsrw	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PINSRWirri, X86_INS_PINSRW: pinsrw	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_MMX_PMADDUBSWrm64, X86_INS_PMADDUBSW: pmaddubsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PMADDUBSWrr64, X86_INS_PMADDUBSW: pmaddubsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PMADDWDirm, X86_INS_PMADDWD: pmaddwd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PMADDWDirr, X86_INS_PMADDWD: pmaddwd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PMAXSWirm, X86_INS_PMAXSW: pmaxsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PMAXSWirr, X86_INS_PMAXSW: pmaxsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PMAXUBirm, X86_INS_PMAXUB: pmaxub	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PMAXUBirr, X86_INS_PMAXUB: pmaxub	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PMINSWirm, X86_INS_PMINSW: pminsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PMINSWirr, X86_INS_PMINSW: pminsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PMINUBirm, X86_INS_PMINUB: pminub	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PMINUBirr, X86_INS_PMINUB: pminub	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PMOVMSKBrr, X86_INS_PMOVMSKB: pmovmskb	$dst, $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PMULHRSWrm64, X86_INS_PMULHRSW: pmulhrsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PMULHRSWrr64, X86_INS_PMULHRSW: pmulhrsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PMULHUWirm, X86_INS_PMULHUW: pmulhuw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PMULHUWirr, X86_INS_PMULHUW: pmulhuw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PMULHWirm, X86_INS_PMULHW: pmulhw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PMULHWirr, X86_INS_PMULHW: pmulhw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PMULLWirm, X86_INS_PMULLW: pmullw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PMULLWirr, X86_INS_PMULLW: pmullw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PMULUDQirm, X86_INS_PMULUDQ: pmuludq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PMULUDQirr, X86_INS_PMULUDQ: pmuludq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PORirm, X86_INS_POR: por	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PORirr, X86_INS_POR: por	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSADBWirm, X86_INS_PSADBW: psadbw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSADBWirr, X86_INS_PSADBW: psadbw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSHUFBrm64, X86_INS_PSHUFB: pshufb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSHUFBrr64, X86_INS_PSHUFB: pshufb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSHUFWmi, X86_INS_PSHUFW: pshufw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSHUFWri, X86_INS_PSHUFW: pshufw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSIGNBrm64, X86_INS_PSIGNB: psignb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSIGNBrr64, X86_INS_PSIGNB: psignb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSIGNDrm64, X86_INS_PSIGND: psignd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSIGNDrr64, X86_INS_PSIGND: psignd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSIGNWrm64, X86_INS_PSIGNW: psignw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSIGNWrr64, X86_INS_PSIGNW: psignw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSLLDri, X86_INS_PSLLD: pslld	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_MMX_PSLLDrm, X86_INS_PSLLD: pslld	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSLLDrr, X86_INS_PSLLD: pslld	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSLLQri, X86_INS_PSLLQ: psllq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_MMX_PSLLQrm, X86_INS_PSLLQ: psllq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSLLQrr, X86_INS_PSLLQ: psllq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSLLWri, X86_INS_PSLLW: psllw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_MMX_PSLLWrm, X86_INS_PSLLW: psllw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSLLWrr, X86_INS_PSLLW: psllw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSRADri, X86_INS_PSRAD: psrad	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_MMX_PSRADrm, X86_INS_PSRAD: psrad	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSRADrr, X86_INS_PSRAD: psrad	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSRAWri, X86_INS_PSRAW: psraw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_MMX_PSRAWrm, X86_INS_PSRAW: psraw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSRAWrr, X86_INS_PSRAW: psraw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSRLDri, X86_INS_PSRLD: psrld	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_MMX_PSRLDrm, X86_INS_PSRLD: psrld	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSRLDrr, X86_INS_PSRLD: psrld	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSRLQri, X86_INS_PSRLQ: psrlq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_MMX_PSRLQrm, X86_INS_PSRLQ: psrlq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSRLQrr, X86_INS_PSRLQ: psrlq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSRLWri, X86_INS_PSRLW: psrlw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_MMX_PSRLWrm, X86_INS_PSRLW: psrlw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSRLWrr, X86_INS_PSRLW: psrlw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSUBBirm, X86_INS_PSUBB: psubb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSUBBirr, X86_INS_PSUBB: psubb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSUBDirm, X86_INS_PSUBD: psubd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSUBDirr, X86_INS_PSUBD: psubd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSUBQirm, X86_INS_PSUBQ: psubq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSUBQirr, X86_INS_PSUBQ: psubq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSUBSBirm, X86_INS_PSUBSB: psubsb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSUBSBirr, X86_INS_PSUBSB: psubsb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSUBSWirm, X86_INS_PSUBSW: psubsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSUBSWirr, X86_INS_PSUBSW: psubsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSUBUSBirm, X86_INS_PSUBUSB: psubusb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSUBUSBirr, X86_INS_PSUBUSB: psubusb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSUBUSWirm, X86_INS_PSUBUSW: psubusw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSUBUSWirr, X86_INS_PSUBUSW: psubusw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSUBWirm, X86_INS_PSUBW: psubw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PSUBWirr, X86_INS_PSUBW: psubw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PUNPCKHBWirm, X86_INS_PUNPCKHBW: punpckhbw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PUNPCKHBWirr, X86_INS_PUNPCKHBW: punpckhbw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PUNPCKHDQirm, X86_INS_PUNPCKHDQ: punpckhdq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PUNPCKHDQirr, X86_INS_PUNPCKHDQ: punpckhdq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PUNPCKHWDirm, X86_INS_PUNPCKHWD: punpckhwd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PUNPCKHWDirr, X86_INS_PUNPCKHWD: punpckhwd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PUNPCKLBWirm, X86_INS_PUNPCKLBW: punpcklbw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PUNPCKLBWirr, X86_INS_PUNPCKLBW: punpcklbw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PUNPCKLDQirm, X86_INS_PUNPCKLDQ: punpckldq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PUNPCKLDQirr, X86_INS_PUNPCKLDQ: punpckldq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PUNPCKLWDirm, X86_INS_PUNPCKLWD: punpcklwd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PUNPCKLWDirr, X86_INS_PUNPCKLWD: punpcklwd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PXORirm, X86_INS_PXOR: pxor	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MMX_PXORirr, X86_INS_PXOR: pxor	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MONITORrrr, X86_INS_MONITOR: monitor */
+	0,
+	{ 0 }
+},
+{	/* X86_MONTMUL, X86_INS_MONTMUL: montmul */
+	0,
+	{ 0 }
+},
+{	/* X86_MOV16ao16, X86_INS_MOV: mov{w}	ax, $src */
+	0,
+	{ 0 }
+},
+{	/* X86_MOV16ao32, X86_INS_MOV: mov{w}	ax, $src */
+	0,
+	{ 0 }
+},
+{	/* X86_MOV16ao64, X86_INS_MOVABS: movabs{w}	ax, $src */
+	0,
+	{ 0 }
+},
+{	/* X86_MOV16mi, X86_INS_MOV: mov{w}	$dst, $src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_MOV16mr, X86_INS_MOV: mov{w}	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOV16ms, X86_INS_MOV: mov{w}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV16o16a, X86_INS_MOV: mov{w}	$dst, ax */
+	0,
+	{ 0 }
+},
+{	/* X86_MOV16o32a, X86_INS_MOV: mov{w}	$dst, ax */
+	0,
+	{ 0 }
+},
+{	/* X86_MOV16o64a, X86_INS_MOVABS: movabs{w}	$dst, ax */
+	0,
+	{ 0 }
+},
+{	/* X86_MOV16ri, X86_INS_MOV: mov{w}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_MOV16ri_alt, X86_INS_MOV: mov{w}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_MOV16rm, X86_INS_MOV: mov{w}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV16rr, X86_INS_MOV: mov{w}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV16rr_REV, X86_INS_MOV: mov{w}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV16rs, X86_INS_MOV: mov{w}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV16sm, X86_INS_MOV: mov{w}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV16sr, X86_INS_MOV: mov{w}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV32ao16, X86_INS_MOV: mov{l}	eax, $src */
+	0,
+	{ 0 }
+},
+{	/* X86_MOV32ao32, X86_INS_MOV: mov{l}	eax, $src */
+	0,
+	{ 0 }
+},
+{	/* X86_MOV32ao64, X86_INS_MOVABS: movabs{l}	eax, $src */
+	0,
+	{ 0 }
+},
+{	/* X86_MOV32cr, X86_INS_MOV: mov{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV32dr, X86_INS_MOV: mov{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV32mi, X86_INS_MOV: mov{l}	$dst, $src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_MOV32mr, X86_INS_MOV: mov{l}	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOV32ms, X86_INS_MOV: mov{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV32o16a, X86_INS_MOV: mov{l}	$dst, eax */
+	0,
+	{ 0 }
+},
+{	/* X86_MOV32o32a, X86_INS_MOV: mov{l}	$dst, eax */
+	0,
+	{ 0 }
+},
+{	/* X86_MOV32o64a, X86_INS_MOVABS: movabs{l}	$dst, eax */
+	0,
+	{ 0 }
+},
+{	/* X86_MOV32rc, X86_INS_MOV: mov{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV32rd, X86_INS_MOV: mov{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV32ri, X86_INS_MOV: mov{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_MOV32ri_alt, X86_INS_MOV: mov{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_MOV32rm, X86_INS_MOV: mov{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV32rr, X86_INS_MOV: mov{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV32rr_REV, X86_INS_MOV: mov{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV32rs, X86_INS_MOV: mov{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV32sm, X86_INS_MOV: mov{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV32sr, X86_INS_MOV: mov{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV64ao32, X86_INS_MOV: mov{q}	rax, $src */
+	0,
+	{ 0 }
+},
+{	/* X86_MOV64ao64, X86_INS_MOVABS: movabs{q}	rax, $src */
+	0,
+	{ 0 }
+},
+{	/* X86_MOV64cr, X86_INS_MOV: mov{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV64dr, X86_INS_MOV: mov{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV64mi32, X86_INS_MOV: mov{q}	$dst, $src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_MOV64mr, X86_INS_MOV: mov{q}	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOV64ms, X86_INS_MOV: mov{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV64o32a, X86_INS_MOV: mov{q}	$dst, rax */
+	0,
+	{ 0 }
+},
+{	/* X86_MOV64o64a, X86_INS_MOVABS: movabs{q}	$dst, rax */
+	0,
+	{ 0 }
+},
+{	/* X86_MOV64rc, X86_INS_MOV: mov{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV64rd, X86_INS_MOV: mov{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV64ri, X86_INS_MOVABS: movabs{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_MOV64ri32, X86_INS_MOV: mov{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_MOV64rm, X86_INS_MOV: mov{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV64rr, X86_INS_MOV: mov{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV64rr_REV, X86_INS_MOV: mov{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV64rs, X86_INS_MOV: mov{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV64sm, X86_INS_MOV: mov{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV64sr, X86_INS_MOV: mov{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV64toPQIrm, X86_INS_MOVQ: mov{d|q}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV64toPQIrr, X86_INS_MOVQ: mov{d|q}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV64toSDrm, X86_INS_MOVQ: movq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV64toSDrr, X86_INS_MOVQ: mov{d|q}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV8ao16, X86_INS_MOV: mov{b}	al, $src */
+	0,
+	{ 0 }
+},
+{	/* X86_MOV8ao32, X86_INS_MOV: mov{b}	al, $src */
+	0,
+	{ 0 }
+},
+{	/* X86_MOV8ao64, X86_INS_MOVABS: movabs{b}	al, $src */
+	0,
+	{ 0 }
+},
+{	/* X86_MOV8mi, X86_INS_MOV: mov{b}	$dst, $src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_MOV8mr, X86_INS_MOV: mov{b}	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOV8mr_NOREX, X86_INS_MOV: mov{b}	$dst, $src */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV8o16a, X86_INS_MOV: mov{b}	$dst, al */
+	0,
+	{ 0 }
+},
+{	/* X86_MOV8o32a, X86_INS_MOV: mov{b}	$dst, al */
+	0,
+	{ 0 }
+},
+{	/* X86_MOV8o64a, X86_INS_MOVABS: movabs{b}	$dst, al */
+	0,
+	{ 0 }
+},
+{	/* X86_MOV8ri, X86_INS_MOV: mov{b}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_MOV8ri_alt, X86_INS_MOV: mov{b}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_MOV8rm, X86_INS_MOV: mov{b}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV8rm_NOREX, X86_INS_MOV: mov{b}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV8rr, X86_INS_MOV: mov{b}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV8rr_NOREX, X86_INS_MOV: mov{b}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOV8rr_REV, X86_INS_MOV: mov{b}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVAPDmr, X86_INS_MOVAPD: movapd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOVAPDrm, X86_INS_MOVAPD: movapd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVAPDrr, X86_INS_MOVAPD: movapd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVAPDrr_REV, X86_INS_MOVAPD: movapd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVAPSmr, X86_INS_MOVAPS: movaps	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOVAPSrm, X86_INS_MOVAPS: movaps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVAPSrr, X86_INS_MOVAPS: movaps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVAPSrr_REV, X86_INS_MOVAPS: movaps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVBE16mr, X86_INS_MOVBE: movbe{w}	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOVBE16rm, X86_INS_MOVBE: movbe{w}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVBE32mr, X86_INS_MOVBE: movbe{l}	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOVBE32rm, X86_INS_MOVBE: movbe{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVBE64mr, X86_INS_MOVBE: movbe{q}	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOVBE64rm, X86_INS_MOVBE: movbe{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVDDUPrm, X86_INS_MOVDDUP: movddup	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVDDUPrr, X86_INS_MOVDDUP: movddup	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVDI2PDIrm, X86_INS_MOVD: movd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVDI2PDIrr, X86_INS_MOVD: movd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVDI2SSrm, X86_INS_MOVD: movd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVDI2SSrr, X86_INS_MOVD: movd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVDQAmr, X86_INS_MOVDQA: movdqa	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOVDQArm, X86_INS_MOVDQA: movdqa	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVDQArr, X86_INS_MOVDQA: movdqa	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVDQArr_REV, X86_INS_MOVDQA: movdqa	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVDQUmr, X86_INS_MOVDQU: movdqu	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOVDQUrm, X86_INS_MOVDQU: movdqu	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVDQUrr, X86_INS_MOVDQU: movdqu	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVDQUrr_REV, X86_INS_MOVDQU: movdqu	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVHLPSrr, X86_INS_MOVHLPS: movhlps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVHPDmr, X86_INS_MOVHPD: movhpd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOVHPDrm, X86_INS_MOVHPD: movhpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVHPSmr, X86_INS_MOVHPS: movhps	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOVHPSrm, X86_INS_MOVHPS: movhps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVLHPSrr, X86_INS_MOVLHPS: movlhps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVLPDmr, X86_INS_MOVLPD: movlpd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOVLPDrm, X86_INS_MOVLPD: movlpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVLPSmr, X86_INS_MOVLPS: movlps	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOVLPSrm, X86_INS_MOVLPS: movlps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVMSKPDrr, X86_INS_MOVMSKPD: movmskpd	$dst, $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_MOVMSKPSrr, X86_INS_MOVMSKPS: movmskps	$dst, $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_MOVNTDQArm, X86_INS_MOVNTDQA: movntdqa	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVNTDQmr, X86_INS_MOVNTDQ: movntdq	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOVNTI_64mr, X86_INS_MOVNTI: movnti{q}	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOVNTImr, X86_INS_MOVNTI: movnti{l}	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOVNTPDmr, X86_INS_MOVNTPD: movntpd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOVNTPSmr, X86_INS_MOVNTPS: movntps	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOVNTSD, X86_INS_MOVNTSD: movntsd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOVNTSS, X86_INS_MOVNTSS: movntss	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOVPDI2DImr, X86_INS_MOVD: movd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOVPDI2DIrr, X86_INS_MOVD: movd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVPQI2QImr, X86_INS_MOVQ: movq	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOVPQI2QIrr, X86_INS_MOVQ: movq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVPQIto64rm, X86_INS_MOVQ: mov{d|q}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVPQIto64rr, X86_INS_MOVQ: mov{d|q}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVQI2PQIrm, X86_INS_MOVQ: movq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSB, X86_INS_MOVSB: movsb	$dst, $src */
+	X86_EFLAGS_TEST_DF,
+	{ 0 }
+},
+{	/* X86_MOVSDmr, X86_INS_MOVSD: movsd	$dst, $src */
+	X86_EFLAGS_TEST_DF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSDrm, X86_INS_MOVSD: movsd	$dst, $src */
+	X86_EFLAGS_TEST_DF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSDrr, X86_INS_MOVSD: movsd	$dst, $src2 */
+	X86_EFLAGS_TEST_DF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSDrr_REV, X86_INS_MOVSD: movsd	$dst, $src2 */
+	X86_EFLAGS_TEST_DF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSDto64mr, X86_INS_MOVQ: movq	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSDto64rr, X86_INS_MOVQ: mov{d|q}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSHDUPrm, X86_INS_MOVSHDUP: movshdup	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSHDUPrr, X86_INS_MOVSHDUP: movshdup	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSL, X86_INS_MOVSD: movs{l|d}	{$src, $dst|$dst, $src} */
+	X86_EFLAGS_TEST_DF,
+	{ 0 }
+},
+{	/* X86_MOVSLDUPrm, X86_INS_MOVSLDUP: movsldup	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSLDUPrr, X86_INS_MOVSLDUP: movsldup	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSQ, X86_INS_MOVSQ: movsq	$dst, $src */
+	X86_EFLAGS_TEST_DF,
+	{ 0 }
+},
+{	/* X86_MOVSS2DImr, X86_INS_MOVD: movd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSS2DIrr, X86_INS_MOVD: movd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSSmr, X86_INS_MOVSS: movss	$dst, $src */
+	X86_EFLAGS_TEST_DF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSSrm, X86_INS_MOVSS: movss	$dst, $src */
+	X86_EFLAGS_TEST_DF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSSrr, X86_INS_MOVSS: movss	$dst, $src2 */
+	X86_EFLAGS_TEST_DF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSSrr_REV, X86_INS_MOVSS: movss	$dst, $src2 */
+	X86_EFLAGS_TEST_DF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSW, X86_INS_MOVSW: movsw	$dst, $src */
+	X86_EFLAGS_TEST_DF,
+	{ 0 }
+},
+{	/* X86_MOVSX16rm8, X86_INS_MOVSX: movs{bw|x}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSX16rr8, X86_INS_MOVSX: movs{bw|x}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSX32_NOREXrm8, X86_INS_MOVSX: movs{bl|x}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSX32_NOREXrr8, X86_INS_MOVSX: movs{bl|x}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSX32rm16, X86_INS_MOVSX: movs{wl|x}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSX32rm8, X86_INS_MOVSX: movs{bl|x}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSX32rr16, X86_INS_MOVSX: movs{wl|x}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSX32rr8, X86_INS_MOVSX: movs{bl|x}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSX64_NOREXrr32, X86_INS_MOVSXD: movs{lq|xd}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSX64rm16, X86_INS_MOVSX: movs{wq|x}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSX64rm32, X86_INS_MOVSXD: movs{lq|xd}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSX64rm32_alt, X86_INS_MOVSXD: movs{lq|xd}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSX64rm8, X86_INS_MOVSX: movs{bq|x}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSX64rr16, X86_INS_MOVSX: movs{wq|x}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSX64rr32, X86_INS_MOVSXD: movs{lq|xd}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVSX64rr8, X86_INS_MOVSX: movs{bq|x}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVUPDmr, X86_INS_MOVUPD: movupd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOVUPDrm, X86_INS_MOVUPD: movupd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVUPDrr, X86_INS_MOVUPD: movupd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVUPDrr_REV, X86_INS_MOVUPD: movupd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVUPSmr, X86_INS_MOVUPS: movups	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_MOVUPSrm, X86_INS_MOVUPS: movups	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVUPSrr, X86_INS_MOVUPS: movups	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVUPSrr_REV, X86_INS_MOVUPS: movups	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVZPQILo2PQIrm, X86_INS_MOVQ: movq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVZPQILo2PQIrr, X86_INS_MOVQ: movq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVZQI2PQIrm, X86_INS_MOVQ: movq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVZQI2PQIrr, X86_INS_MOVQ: mov{d|q}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVZX16rm8, X86_INS_MOVZX: movz{bw|x}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVZX16rr8, X86_INS_MOVZX: movz{bw|x}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVZX32_NOREXrm8, X86_INS_MOVZX: movz{bl|x}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVZX32_NOREXrr8, X86_INS_MOVZX: movz{bl|x}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVZX32rm16, X86_INS_MOVZX: movz{wl|x}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVZX32rm8, X86_INS_MOVZX: movz{bl|x}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVZX32rr16, X86_INS_MOVZX: movz{wl|x}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVZX32rr8, X86_INS_MOVZX: movz{bl|x}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVZX64rm16_Q, X86_INS_MOVZX: movz{wq|x}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVZX64rm8_Q, X86_INS_MOVZX: movz{bq|x}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVZX64rr16_Q, X86_INS_MOVZX: movz{wq|x}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MOVZX64rr8_Q, X86_INS_MOVZX: movz{bq|x}	{$src, $dst|$dst, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MPSADBWrmi, X86_INS_MPSADBW: mpsadbw	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MPSADBWrri, X86_INS_MPSADBW: mpsadbw	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MUL16m, X86_INS_MUL: mul{w}	$src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_MUL16r, X86_INS_MUL: mul{w}	$src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_MUL32m, X86_INS_MUL: mul{l}	$src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_MUL32r, X86_INS_MUL: mul{l}	$src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_MUL64m, X86_INS_MUL: mul{q}	$src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_MUL64r, X86_INS_MUL: mul{q}	$src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_MUL8m, X86_INS_MUL: mul{b}	$src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_MUL8r, X86_INS_MUL: mul{b}	$src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_UNDEFINED_SF | X86_EFLAGS_UNDEFINED_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_UNDEFINED_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_MULPDrm, X86_INS_MULPD: mulpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MULPDrr, X86_INS_MULPD: mulpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MULPSrm, X86_INS_MULPS: mulps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MULPSrr, X86_INS_MULPS: mulps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MULSDrm, X86_INS_MULSD: mulsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MULSDrm_Int, X86_INS_MULSD: mulsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_MULSDrr, X86_INS_MULSD: mulsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MULSDrr_Int, X86_INS_MULSD: mulsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MULSSrm, X86_INS_MULSS: mulss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MULSSrm_Int, X86_INS_MULSS: mulss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_MULSSrr, X86_INS_MULSS: mulss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MULSSrr_Int, X86_INS_MULSS: mulss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MULX32rm, X86_INS_MULX: mulx{l}	$dst1, $dst2, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MULX32rr, X86_INS_MULX: mulx{l}	$dst1, $dst2, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MULX64rm, X86_INS_MULX: mulx{q}	$dst1, $dst2, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MULX64rr, X86_INS_MULX: mulx{q}	$dst1, $dst2, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_MUL_F32m, X86_INS_FMUL: fmul{s}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_MUL_F64m, X86_INS_FMUL: fmul{l}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_MUL_FI16m, X86_INS_FIMUL: fimul{s}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_MUL_FI32m, X86_INS_FIMUL: fimul{l}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_MUL_FPrST0, X86_INS_FMULP: fmulp	$op */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_MUL_FST0r, X86_INS_FMUL: fmul	$op */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_MUL_FrST0, X86_INS_FMUL: fmul	$op, st(0) */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_MWAITrr, X86_INS_MWAIT: mwait */
+	0,
+	{ 0 }
+},
+{	/* X86_NEG16m, X86_INS_NEG: neg{w}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_NEG16r, X86_INS_NEG: neg{w}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_NEG32m, X86_INS_NEG: neg{l}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_NEG32r, X86_INS_NEG: neg{l}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_NEG64m, X86_INS_NEG: neg{q}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_NEG64r, X86_INS_NEG: neg{q}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_NEG8m, X86_INS_NEG: neg{b}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_NEG8r, X86_INS_NEG: neg{b}	$dst */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_NOOP, X86_INS_NOP: nop */
+	0,
+	{ 0 }
+},
+{	/* X86_NOOP18_16m4, X86_INS_NOP: nop{w}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOP18_16m5, X86_INS_NOP: nop{w}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOP18_16m6, X86_INS_NOP: nop{w}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOP18_16m7, X86_INS_NOP: nop{w}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOP18_16r4, X86_INS_NOP: nop{w}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOP18_16r5, X86_INS_NOP: nop{w}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOP18_16r6, X86_INS_NOP: nop{w}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOP18_16r7, X86_INS_NOP: nop{w}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOP18_m4, X86_INS_NOP: nop{l}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOP18_m5, X86_INS_NOP: nop{l}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOP18_m6, X86_INS_NOP: nop{l}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOP18_m7, X86_INS_NOP: nop{l}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOP18_r4, X86_INS_NOP: nop{l}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOP18_r5, X86_INS_NOP: nop{l}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOP18_r6, X86_INS_NOP: nop{l}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOP18_r7, X86_INS_NOP: nop{l}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOP19rr, X86_INS_NOP: nop	$src, $val */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_NOOPL, X86_INS_NOP: nop{l}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOPL_19, X86_INS_NOP: nop{l}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOPL_1a, X86_INS_NOP: nop{l}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOPL_1b, X86_INS_NOP: nop{l}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOPL_1c, X86_INS_NOP: nop{l}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOPL_1d, X86_INS_NOP: nop{l}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOPL_1e, X86_INS_NOP: nop{l}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOPW, X86_INS_NOP: nop{w}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOPW_19, X86_INS_NOP: nop{w}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOPW_1a, X86_INS_NOP: nop{w}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOPW_1b, X86_INS_NOP: nop{w}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOPW_1c, X86_INS_NOP: nop{w}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOPW_1d, X86_INS_NOP: nop{w}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOOPW_1e, X86_INS_NOP: nop{w}	$zero */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_NOT16m, X86_INS_NOT: not{w}	$dst */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_NOT16r, X86_INS_NOT: not{w}	$dst */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_NOT32m, X86_INS_NOT: not{l}	$dst */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_NOT32r, X86_INS_NOT: not{l}	$dst */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_NOT64m, X86_INS_NOT: not{q}	$dst */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_NOT64r, X86_INS_NOT: not{q}	$dst */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_NOT8m, X86_INS_NOT: not{b}	$dst */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_NOT8r, X86_INS_NOT: not{b}	$dst */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_OR16i16, X86_INS_OR: or{w}	ax, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ 0 }
+},
+{	/* X86_OR16mi, X86_INS_OR: or{w}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_OR16mi8, X86_INS_OR: or{w}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_OR16mr, X86_INS_OR: or{w}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_OR16ri, X86_INS_OR: or{w}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_OR16ri8, X86_INS_OR: or{w}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_OR16rm, X86_INS_OR: or{w}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_OR16rr, X86_INS_OR: or{w}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_OR16rr_REV, X86_INS_OR: or{w}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_OR32i32, X86_INS_OR: or{l}	eax, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ 0 }
+},
+{	/* X86_OR32mi, X86_INS_OR: or{l}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_OR32mi8, X86_INS_OR: or{l}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_OR32mr, X86_INS_OR: or{l}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_OR32mrLocked, X86_INS_OR: or{l}	$dst, $zero */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_OR32ri, X86_INS_OR: or{l}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_OR32ri8, X86_INS_OR: or{l}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_OR32rm, X86_INS_OR: or{l}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_OR32rr, X86_INS_OR: or{l}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_OR32rr_REV, X86_INS_OR: or{l}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_OR64i32, X86_INS_OR: or{q}	rax, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ 0 }
+},
+{	/* X86_OR64mi32, X86_INS_OR: or{q}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_OR64mi8, X86_INS_OR: or{q}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_OR64mr, X86_INS_OR: or{q}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_OR64ri32, X86_INS_OR: or{q}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_OR64ri8, X86_INS_OR: or{q}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_OR64rm, X86_INS_OR: or{q}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_OR64rr, X86_INS_OR: or{q}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_OR64rr_REV, X86_INS_OR: or{q}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_OR8i8, X86_INS_OR: or{b}	al, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ 0 }
+},
+{	/* X86_OR8mi, X86_INS_OR: or{b}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_OR8mi8, X86_INS_OR: or{b}	$dst, $src */
+	X86_REG_EFLAGS,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_OR8mr, X86_INS_OR: or{b}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_OR8ri, X86_INS_OR: or{b}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_OR8ri8, X86_INS_OR: or{b}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_OR8rm, X86_INS_OR: or{b}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_OR8rr, X86_INS_OR: or{b}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_OR8rr_REV, X86_INS_OR: or{b}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ORPDrm, X86_INS_ORPD: orpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ORPDrr, X86_INS_ORPD: orpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ORPSrm, X86_INS_ORPS: orps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ORPSrr, X86_INS_ORPS: orps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_OUT16ir, X86_INS_OUT: out{w}	$port, ax */
+	0,
+	{ 0 }
+},
+{	/* X86_OUT16rr, X86_INS_OUT: out{w}	dx, ax */
+	0,
+	{ 0 }
+},
+{	/* X86_OUT32ir, X86_INS_OUT: out{l}	$port, eax */
+	0,
+	{ 0 }
+},
+{	/* X86_OUT32rr, X86_INS_OUT: out{l}	dx, eax */
+	0,
+	{ 0 }
+},
+{	/* X86_OUT8ir, X86_INS_OUT: out{b}	$port, al */
+	0,
+	{ 0 }
+},
+{	/* X86_OUT8rr, X86_INS_OUT: out{b}	dx, al */
+	0,
+	{ 0 }
+},
+{	/* X86_OUTSB, X86_INS_OUTSB: outsb	dx, $src */
+	X86_EFLAGS_TEST_DF,
+	{ 0 }
+},
+{	/* X86_OUTSL, X86_INS_OUTSD: outs{l|d}	{$src, %dx|dx, $src} */
+	X86_EFLAGS_TEST_DF,
+	{ 0 }
+},
+{	/* X86_OUTSW, X86_INS_OUTSW: outsw	dx, $src */
+	X86_EFLAGS_TEST_DF,
+	{ 0 }
+},
+{	/* X86_PABSBrm128, X86_INS_PABSB: pabsb	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PABSBrr128, X86_INS_PABSB: pabsb	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PABSDrm128, X86_INS_PABSD: pabsd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PABSDrr128, X86_INS_PABSD: pabsd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PABSWrm128, X86_INS_PABSW: pabsw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PABSWrr128, X86_INS_PABSW: pabsw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PACKSSDWrm, X86_INS_PACKSSDW: packssdw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PACKSSDWrr, X86_INS_PACKSSDW: packssdw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PACKSSWBrm, X86_INS_PACKSSWB: packsswb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PACKSSWBrr, X86_INS_PACKSSWB: packsswb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PACKUSDWrm, X86_INS_PACKUSDW: packusdw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PACKUSDWrr, X86_INS_PACKUSDW: packusdw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PACKUSWBrm, X86_INS_PACKUSWB: packuswb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PACKUSWBrr, X86_INS_PACKUSWB: packuswb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PADDBrm, X86_INS_PADDB: paddb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PADDBrr, X86_INS_PADDB: paddb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PADDDrm, X86_INS_PADDD: paddd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PADDDrr, X86_INS_PADDD: paddd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PADDQrm, X86_INS_PADDQ: paddq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PADDQrr, X86_INS_PADDQ: paddq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PADDSBrm, X86_INS_PADDSB: paddsb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PADDSBrr, X86_INS_PADDSB: paddsb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PADDSWrm, X86_INS_PADDSW: paddsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PADDSWrr, X86_INS_PADDSW: paddsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PADDUSBrm, X86_INS_PADDUSB: paddusb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PADDUSBrr, X86_INS_PADDUSB: paddusb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PADDUSWrm, X86_INS_PADDUSW: paddusw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PADDUSWrr, X86_INS_PADDUSW: paddusw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PADDWrm, X86_INS_PADDW: paddw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PADDWrr, X86_INS_PADDW: paddw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PALIGNR128rm, X86_INS_PALIGNR: palignr	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PALIGNR128rr, X86_INS_PALIGNR: palignr	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PANDNrm, X86_INS_PANDN: pandn	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PANDNrr, X86_INS_PANDN: pandn	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PANDrm, X86_INS_PAND: pand	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PANDrr, X86_INS_PAND: pand	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PAUSE, X86_INS_PAUSE: pause */
+	0,
+	{ 0 }
+},
+{	/* X86_PAVGBrm, X86_INS_PAVGB: pavgb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PAVGBrr, X86_INS_PAVGB: pavgb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PAVGUSBrm, X86_INS_PAVGUSB: pavgusb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PAVGUSBrr, X86_INS_PAVGUSB: pavgusb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PAVGWrm, X86_INS_PAVGW: pavgw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PAVGWrr, X86_INS_PAVGW: pavgw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PBLENDVBrm0, X86_INS_PBLENDVB: pblendvb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PBLENDVBrr0, X86_INS_PBLENDVB: pblendvb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PBLENDWrmi, X86_INS_PBLENDW: pblendw	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PBLENDWrri, X86_INS_PBLENDW: pblendw	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PCLMULQDQrm, X86_INS_PCLMULQDQ: pclmulqdq	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PCLMULQDQrr, X86_INS_PCLMULQDQ: pclmulqdq	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PCMPEQBrm, X86_INS_PCMPEQB: pcmpeqb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PCMPEQBrr, X86_INS_PCMPEQB: pcmpeqb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PCMPEQDrm, X86_INS_PCMPEQD: pcmpeqd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PCMPEQDrr, X86_INS_PCMPEQD: pcmpeqd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PCMPEQQrm, X86_INS_PCMPEQQ: pcmpeqq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PCMPEQQrr, X86_INS_PCMPEQQ: pcmpeqq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PCMPEQWrm, X86_INS_PCMPEQW: pcmpeqw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PCMPEQWrr, X86_INS_PCMPEQW: pcmpeqw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PCMPESTRIrm, X86_INS_PCMPESTRI: pcmpestri	$src1, $src3, $src5 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_PCMPESTRIrr, X86_INS_PCMPESTRI: pcmpestri	$src1, $src3, $src5 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_PCMPESTRM128rm, X86_INS_PCMPESTRM: pcmpestrm	$src1, $src3, $src5 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_PCMPESTRM128rr, X86_INS_PCMPESTRM: pcmpestrm	$src1, $src3, $src5 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_PCMPGTBrm, X86_INS_PCMPGTB: pcmpgtb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PCMPGTBrr, X86_INS_PCMPGTB: pcmpgtb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PCMPGTDrm, X86_INS_PCMPGTD: pcmpgtd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PCMPGTDrr, X86_INS_PCMPGTD: pcmpgtd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PCMPGTQrm, X86_INS_PCMPGTQ: pcmpgtq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PCMPGTQrr, X86_INS_PCMPGTQ: pcmpgtq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PCMPGTWrm, X86_INS_PCMPGTW: pcmpgtw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PCMPGTWrr, X86_INS_PCMPGTW: pcmpgtw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PCMPISTRIrm, X86_INS_PCMPISTRI: pcmpistri	$src1, $src2, $src3 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_PCMPISTRIrr, X86_INS_PCMPISTRI: pcmpistri	$src1, $src2, $src3 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_PCMPISTRM128rm, X86_INS_PCMPISTRM: pcmpistrm	$src1, $src2, $src3 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_PCMPISTRM128rr, X86_INS_PCMPISTRM: pcmpistrm	$src1, $src2, $src3 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_PCOMMIT, X86_INS_PCOMMIT: pcommit */
+	0,
+	{ 0 }
+},
+{	/* X86_PDEP32rm, X86_INS_PDEP: pdep{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_PDEP32rr, X86_INS_PDEP: pdep{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_PDEP64rm, X86_INS_PDEP: pdep{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_PDEP64rr, X86_INS_PDEP: pdep{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_PEXT32rm, X86_INS_PEXT: pext{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_PEXT32rr, X86_INS_PEXT: pext{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_PEXT64rm, X86_INS_PEXT: pext{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_PEXT64rr, X86_INS_PEXT: pext{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_PEXTRBmr, X86_INS_PEXTRB: pextrb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_PEXTRBrr, X86_INS_PEXTRB: pextrb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_PEXTRDmr, X86_INS_PEXTRD: pextrd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_PEXTRDrr, X86_INS_PEXTRD: pextrd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PEXTRQmr, X86_INS_PEXTRQ: pextrq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_PEXTRQrr, X86_INS_PEXTRQ: pextrq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PEXTRWmr, X86_INS_PEXTRW: pextrw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_PEXTRWri, X86_INS_PEXTRW: pextrw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_PEXTRWrr_REV, X86_INS_PEXTRW: pextrw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_PF2IDrm, X86_INS_PF2ID: pf2id	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PF2IDrr, X86_INS_PF2ID: pf2id	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PF2IWrm, X86_INS_PF2IW: pf2iw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PF2IWrr, X86_INS_PF2IW: pf2iw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFACCrm, X86_INS_PFACC: pfacc	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFACCrr, X86_INS_PFACC: pfacc	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFADDrm, X86_INS_PFADD: pfadd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFADDrr, X86_INS_PFADD: pfadd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFCMPEQrm, X86_INS_PFCMPEQ: pfcmpeq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFCMPEQrr, X86_INS_PFCMPEQ: pfcmpeq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFCMPGErm, X86_INS_PFCMPGE: pfcmpge	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFCMPGErr, X86_INS_PFCMPGE: pfcmpge	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFCMPGTrm, X86_INS_PFCMPGT: pfcmpgt	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFCMPGTrr, X86_INS_PFCMPGT: pfcmpgt	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFMAXrm, X86_INS_PFMAX: pfmax	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFMAXrr, X86_INS_PFMAX: pfmax	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFMINrm, X86_INS_PFMIN: pfmin	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFMINrr, X86_INS_PFMIN: pfmin	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFMULrm, X86_INS_PFMUL: pfmul	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFMULrr, X86_INS_PFMUL: pfmul	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFNACCrm, X86_INS_PFNACC: pfnacc	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFNACCrr, X86_INS_PFNACC: pfnacc	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFPNACCrm, X86_INS_PFPNACC: pfpnacc	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFPNACCrr, X86_INS_PFPNACC: pfpnacc	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFRCPIT1rm, X86_INS_PFRCPIT1: pfrcpit1	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFRCPIT1rr, X86_INS_PFRCPIT1: pfrcpit1	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFRCPIT2rm, X86_INS_PFRCPIT2: pfrcpit2	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFRCPIT2rr, X86_INS_PFRCPIT2: pfrcpit2	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFRCPrm, X86_INS_PFRCP: pfrcp	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFRCPrr, X86_INS_PFRCP: pfrcp	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFRSQIT1rm, X86_INS_PFRSQIT1: pfrsqit1	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFRSQIT1rr, X86_INS_PFRSQIT1: pfrsqit1	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFRSQRTrm, X86_INS_PFRSQRT: pfrsqrt	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFRSQRTrr, X86_INS_PFRSQRT: pfrsqrt	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFSUBRrm, X86_INS_PFSUBR: pfsubr	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFSUBRrr, X86_INS_PFSUBR: pfsubr	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFSUBrm, X86_INS_PFSUB: pfsub	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PFSUBrr, X86_INS_PFSUB: pfsub	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PHADDDrm, X86_INS_PHADDD: phaddd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PHADDDrr, X86_INS_PHADDD: phaddd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PHADDSWrm128, X86_INS_PHADDSW: phaddsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PHADDSWrr128, X86_INS_PHADDSW: phaddsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PHADDWrm, X86_INS_PHADDW: phaddw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PHADDWrr, X86_INS_PHADDW: phaddw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PHMINPOSUWrm128, X86_INS_PHMINPOSUW: phminposuw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PHMINPOSUWrr128, X86_INS_PHMINPOSUW: phminposuw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PHSUBDrm, X86_INS_PHSUBD: phsubd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PHSUBDrr, X86_INS_PHSUBD: phsubd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PHSUBSWrm128, X86_INS_PHSUBSW: phsubsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PHSUBSWrr128, X86_INS_PHSUBSW: phsubsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PHSUBWrm, X86_INS_PHSUBW: phsubw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PHSUBWrr, X86_INS_PHSUBW: phsubw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PI2FDrm, X86_INS_PI2FD: pi2fd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PI2FDrr, X86_INS_PI2FD: pi2fd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PI2FWrm, X86_INS_PI2FW: pi2fw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PI2FWrr, X86_INS_PI2FW: pi2fw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PINSRBrm, X86_INS_PINSRB: pinsrb	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PINSRBrr, X86_INS_PINSRB: pinsrb	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_PINSRDrm, X86_INS_PINSRD: pinsrd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PINSRDrr, X86_INS_PINSRD: pinsrd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PINSRQrm, X86_INS_PINSRQ: pinsrq	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PINSRQrr, X86_INS_PINSRQ: pinsrq	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PINSRWrmi, X86_INS_PINSRW: pinsrw	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PINSRWrri, X86_INS_PINSRW: pinsrw	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_PMADDUBSWrm128, X86_INS_PMADDUBSW: pmaddubsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMADDUBSWrr128, X86_INS_PMADDUBSW: pmaddubsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMADDWDrm, X86_INS_PMADDWD: pmaddwd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMADDWDrr, X86_INS_PMADDWD: pmaddwd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMAXSBrm, X86_INS_PMAXSB: pmaxsb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMAXSBrr, X86_INS_PMAXSB: pmaxsb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMAXSDrm, X86_INS_PMAXSD: pmaxsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMAXSDrr, X86_INS_PMAXSD: pmaxsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMAXSWrm, X86_INS_PMAXSW: pmaxsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMAXSWrr, X86_INS_PMAXSW: pmaxsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMAXUBrm, X86_INS_PMAXUB: pmaxub	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMAXUBrr, X86_INS_PMAXUB: pmaxub	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMAXUDrm, X86_INS_PMAXUD: pmaxud	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMAXUDrr, X86_INS_PMAXUD: pmaxud	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMAXUWrm, X86_INS_PMAXUW: pmaxuw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMAXUWrr, X86_INS_PMAXUW: pmaxuw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMINSBrm, X86_INS_PMINSB: pminsb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMINSBrr, X86_INS_PMINSB: pminsb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMINSDrm, X86_INS_PMINSD: pminsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMINSDrr, X86_INS_PMINSD: pminsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMINSWrm, X86_INS_PMINSW: pminsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMINSWrr, X86_INS_PMINSW: pminsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMINUBrm, X86_INS_PMINUB: pminub	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMINUBrr, X86_INS_PMINUB: pminub	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMINUDrm, X86_INS_PMINUD: pminud	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMINUDrr, X86_INS_PMINUD: pminud	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMINUWrm, X86_INS_PMINUW: pminuw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMINUWrr, X86_INS_PMINUW: pminuw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMOVMSKBrr, X86_INS_PMOVMSKB: pmovmskb	$dst, $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_PMOVSXBDrm, X86_INS_PMOVSXBD: pmovsxbd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMOVSXBDrr, X86_INS_PMOVSXBD: pmovsxbd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMOVSXBQrm, X86_INS_PMOVSXBQ: pmovsxbq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMOVSXBQrr, X86_INS_PMOVSXBQ: pmovsxbq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMOVSXBWrm, X86_INS_PMOVSXBW: pmovsxbw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMOVSXBWrr, X86_INS_PMOVSXBW: pmovsxbw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMOVSXDQrm, X86_INS_PMOVSXDQ: pmovsxdq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMOVSXDQrr, X86_INS_PMOVSXDQ: pmovsxdq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMOVSXWDrm, X86_INS_PMOVSXWD: pmovsxwd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMOVSXWDrr, X86_INS_PMOVSXWD: pmovsxwd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMOVSXWQrm, X86_INS_PMOVSXWQ: pmovsxwq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMOVSXWQrr, X86_INS_PMOVSXWQ: pmovsxwq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMOVZXBDrm, X86_INS_PMOVZXBD: pmovzxbd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMOVZXBDrr, X86_INS_PMOVZXBD: pmovzxbd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMOVZXBQrm, X86_INS_PMOVZXBQ: pmovzxbq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMOVZXBQrr, X86_INS_PMOVZXBQ: pmovzxbq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMOVZXBWrm, X86_INS_PMOVZXBW: pmovzxbw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMOVZXBWrr, X86_INS_PMOVZXBW: pmovzxbw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMOVZXDQrm, X86_INS_PMOVZXDQ: pmovzxdq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMOVZXDQrr, X86_INS_PMOVZXDQ: pmovzxdq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMOVZXWDrm, X86_INS_PMOVZXWD: pmovzxwd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMOVZXWDrr, X86_INS_PMOVZXWD: pmovzxwd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMOVZXWQrm, X86_INS_PMOVZXWQ: pmovzxwq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMOVZXWQrr, X86_INS_PMOVZXWQ: pmovzxwq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMULDQrm, X86_INS_PMULDQ: pmuldq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMULDQrr, X86_INS_PMULDQ: pmuldq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMULHRSWrm128, X86_INS_PMULHRSW: pmulhrsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMULHRSWrr128, X86_INS_PMULHRSW: pmulhrsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMULHRWrm, X86_INS_PMULHRW: pmulhrw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMULHRWrr, X86_INS_PMULHRW: pmulhrw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMULHUWrm, X86_INS_PMULHUW: pmulhuw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMULHUWrr, X86_INS_PMULHUW: pmulhuw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMULHWrm, X86_INS_PMULHW: pmulhw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMULHWrr, X86_INS_PMULHW: pmulhw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMULLDrm, X86_INS_PMULLD: pmulld	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMULLDrr, X86_INS_PMULLD: pmulld	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMULLWrm, X86_INS_PMULLW: pmullw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMULLWrr, X86_INS_PMULLW: pmullw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMULUDQrm, X86_INS_PMULUDQ: pmuludq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PMULUDQrr, X86_INS_PMULUDQ: pmuludq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_POP16r, X86_INS_POP: pop{w}	$reg */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_POP16rmm, X86_INS_POP: pop{w}	$dst */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_POP16rmr, X86_INS_POP: pop{w}	$reg */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_POP32r, X86_INS_POP: pop{l}	$reg */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_POP32rmm, X86_INS_POP: pop{l}	$dst */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_POP32rmr, X86_INS_POP: pop{l}	$reg */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_POP64r, X86_INS_POP: pop{q}	$reg */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_POP64rmm, X86_INS_POP: pop{q}	$dst */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_POP64rmr, X86_INS_POP: pop{q}	$reg */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_POPA16, X86_INS_POPAW: popaw */
+	0,
+	{ 0 }
+},
+{	/* X86_POPA32, X86_INS_POPAL: popal */
+	0,
+	{ 0 }
+},
+{	/* X86_POPCNT16rm, X86_INS_POPCNT: popcnt{w}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_POPCNT16rr, X86_INS_POPCNT: popcnt{w}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_POPCNT32rm, X86_INS_POPCNT: popcnt{l}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_POPCNT32rr, X86_INS_POPCNT: popcnt{l}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_POPCNT64rm, X86_INS_POPCNT: popcnt{q}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_POPCNT64rr, X86_INS_POPCNT: popcnt{q}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_RESET_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_POPDS16, X86_INS_POP: pop{w}	ds */
+	0,
+	{ 0 }
+},
+{	/* X86_POPDS32, X86_INS_POP: pop{l}	ds */
+	0,
+	{ 0 }
+},
+{	/* X86_POPES16, X86_INS_POP: pop{w}	es */
+	0,
+	{ 0 }
+},
+{	/* X86_POPES32, X86_INS_POP: pop{l}	es */
+	0,
+	{ 0 }
+},
+{	/* X86_POPF16, X86_INS_POPF: popf{w} */
+	0,
+	{ 0 }
+},
+{	/* X86_POPF32, X86_INS_POPFD: popfd */
+	X86_EFLAGS_PRIOR_OF | X86_EFLAGS_PRIOR_SF | X86_EFLAGS_PRIOR_ZF | X86_EFLAGS_PRIOR_AF | X86_EFLAGS_PRIOR_PF | X86_EFLAGS_PRIOR_CF | X86_EFLAGS_PRIOR_TF | X86_EFLAGS_PRIOR_IF | X86_EFLAGS_PRIOR_DF | X86_EFLAGS_PRIOR_NT,
+	{ 0 }
+},
+{	/* X86_POPF64, X86_INS_POPFQ: popfq */
+	X86_EFLAGS_PRIOR_OF | X86_EFLAGS_PRIOR_SF | X86_EFLAGS_PRIOR_ZF | X86_EFLAGS_PRIOR_AF | X86_EFLAGS_PRIOR_PF | X86_EFLAGS_PRIOR_CF | X86_EFLAGS_PRIOR_TF | X86_EFLAGS_PRIOR_IF | X86_EFLAGS_PRIOR_DF | X86_EFLAGS_PRIOR_NT,
+	{ 0 }
+},
+{	/* X86_POPFS16, X86_INS_POP: pop{w}	fs */
+	0,
+	{ 0 }
+},
+{	/* X86_POPFS32, X86_INS_POP: pop{l}	fs */
+	0,
+	{ 0 }
+},
+{	/* X86_POPFS64, X86_INS_POP: pop{q}	fs */
+	0,
+	{ 0 }
+},
+{	/* X86_POPGS16, X86_INS_POP: pop{w}	gs */
+	0,
+	{ 0 }
+},
+{	/* X86_POPGS32, X86_INS_POP: pop{l}	gs */
+	0,
+	{ 0 }
+},
+{	/* X86_POPGS64, X86_INS_POP: pop{q}	gs */
+	0,
+	{ 0 }
+},
+{	/* X86_POPSS16, X86_INS_POP: pop{w}	ss */
+	0,
+	{ 0 }
+},
+{	/* X86_POPSS32, X86_INS_POP: pop{l}	ss */
+	0,
+	{ 0 }
+},
+{	/* X86_PORrm, X86_INS_POR: por	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PORrr, X86_INS_POR: por	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PREFETCH, X86_INS_PREFETCH: prefetch	$addr */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_PREFETCHNTA, X86_INS_PREFETCHNTA: prefetchnta	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_PREFETCHT0, X86_INS_PREFETCHT0: prefetcht0	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_PREFETCHT1, X86_INS_PREFETCHT1: prefetcht1	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_PREFETCHT2, X86_INS_PREFETCHT2: prefetcht2	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_PREFETCHW, X86_INS_PREFETCHW: prefetchw	$addr */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_PSADBWrm, X86_INS_PSADBW: psadbw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSADBWrr, X86_INS_PSADBW: psadbw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSHUFBrm, X86_INS_PSHUFB: pshufb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSHUFBrr, X86_INS_PSHUFB: pshufb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSHUFDmi, X86_INS_PSHUFD: pshufd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSHUFDri, X86_INS_PSHUFD: pshufd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSHUFHWmi, X86_INS_PSHUFHW: pshufhw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSHUFHWri, X86_INS_PSHUFHW: pshufhw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSHUFLWmi, X86_INS_PSHUFLW: pshuflw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSHUFLWri, X86_INS_PSHUFLW: pshuflw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSIGNBrm, X86_INS_PSIGNB: psignb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSIGNBrr, X86_INS_PSIGNB: psignb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSIGNDrm, X86_INS_PSIGND: psignd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSIGNDrr, X86_INS_PSIGND: psignd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSIGNWrm, X86_INS_PSIGNW: psignw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSIGNWrr, X86_INS_PSIGNW: psignw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSLLDQri, X86_INS_PSLLDQ: pslldq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_PSLLDri, X86_INS_PSLLD: pslld	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_PSLLDrm, X86_INS_PSLLD: pslld	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSLLDrr, X86_INS_PSLLD: pslld	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSLLQri, X86_INS_PSLLQ: psllq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_PSLLQrm, X86_INS_PSLLQ: psllq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSLLQrr, X86_INS_PSLLQ: psllq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSLLWri, X86_INS_PSLLW: psllw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_PSLLWrm, X86_INS_PSLLW: psllw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSLLWrr, X86_INS_PSLLW: psllw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSRADri, X86_INS_PSRAD: psrad	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_PSRADrm, X86_INS_PSRAD: psrad	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSRADrr, X86_INS_PSRAD: psrad	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSRAWri, X86_INS_PSRAW: psraw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_PSRAWrm, X86_INS_PSRAW: psraw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSRAWrr, X86_INS_PSRAW: psraw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSRLDQri, X86_INS_PSRLDQ: psrldq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_PSRLDri, X86_INS_PSRLD: psrld	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_PSRLDrm, X86_INS_PSRLD: psrld	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSRLDrr, X86_INS_PSRLD: psrld	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSRLQri, X86_INS_PSRLQ: psrlq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_PSRLQrm, X86_INS_PSRLQ: psrlq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSRLQrr, X86_INS_PSRLQ: psrlq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSRLWri, X86_INS_PSRLW: psrlw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_PSRLWrm, X86_INS_PSRLW: psrlw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSRLWrr, X86_INS_PSRLW: psrlw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSUBBrm, X86_INS_PSUBB: psubb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSUBBrr, X86_INS_PSUBB: psubb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSUBDrm, X86_INS_PSUBD: psubd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSUBDrr, X86_INS_PSUBD: psubd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSUBQrm, X86_INS_PSUBQ: psubq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSUBQrr, X86_INS_PSUBQ: psubq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSUBSBrm, X86_INS_PSUBSB: psubsb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSUBSBrr, X86_INS_PSUBSB: psubsb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSUBSWrm, X86_INS_PSUBSW: psubsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSUBSWrr, X86_INS_PSUBSW: psubsw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSUBUSBrm, X86_INS_PSUBUSB: psubusb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSUBUSBrr, X86_INS_PSUBUSB: psubusb	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSUBUSWrm, X86_INS_PSUBUSW: psubusw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSUBUSWrr, X86_INS_PSUBUSW: psubusw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSUBWrm, X86_INS_PSUBW: psubw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSUBWrr, X86_INS_PSUBW: psubw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSWAPDrm, X86_INS_PSWAPD: pswapd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PSWAPDrr, X86_INS_PSWAPD: pswapd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PTESTrm, X86_INS_PTEST: ptest	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_PTESTrr, X86_INS_PTEST: ptest	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_PUNPCKHBWrm, X86_INS_PUNPCKHBW: punpckhbw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PUNPCKHBWrr, X86_INS_PUNPCKHBW: punpckhbw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PUNPCKHDQrm, X86_INS_PUNPCKHDQ: punpckhdq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PUNPCKHDQrr, X86_INS_PUNPCKHDQ: punpckhdq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PUNPCKHQDQrm, X86_INS_PUNPCKHQDQ: punpckhqdq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PUNPCKHQDQrr, X86_INS_PUNPCKHQDQ: punpckhqdq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PUNPCKHWDrm, X86_INS_PUNPCKHWD: punpckhwd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PUNPCKHWDrr, X86_INS_PUNPCKHWD: punpckhwd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PUNPCKLBWrm, X86_INS_PUNPCKLBW: punpcklbw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PUNPCKLBWrr, X86_INS_PUNPCKLBW: punpcklbw	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PUNPCKLDQrm, X86_INS_PUNPCKLDQ: punpckldq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PUNPCKLDQrr, X86_INS_PUNPCKLDQ: punpckldq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PUNPCKLQDQrm, X86_INS_PUNPCKLQDQ: punpcklqdq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PUNPCKLQDQrr, X86_INS_PUNPCKLQDQ: punpcklqdq	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PUNPCKLWDrm, X86_INS_PUNPCKLWD: punpcklwd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PUNPCKLWDrr, X86_INS_PUNPCKLWD: punpcklwd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PUSH16i8, X86_INS_PUSH: push{w}	$imm */
+	0,
+	{ 0 }
+},
+{	/* X86_PUSH16r, X86_INS_PUSH: push{w}	$reg */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_PUSH16rmm, X86_INS_PUSH: push{w}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_PUSH16rmr, X86_INS_PUSH: push{w}	$reg */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_PUSH32i8, X86_INS_PUSH: push{l}	$imm */
+	0,
+	{ 0 }
+},
+{	/* X86_PUSH32r, X86_INS_PUSH: push{l}	$reg */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_PUSH32rmm, X86_INS_PUSH: push{l}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_PUSH32rmr, X86_INS_PUSH: push{l}	$reg */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_PUSH64i16, X86_INS_PUSH: push{w}	$imm */
+	0,
+	{ 0 }
+},
+{	/* X86_PUSH64i32, X86_INS_PUSH: push{q}	$imm */
+	0,
+	{ 0 }
+},
+{	/* X86_PUSH64i8, X86_INS_PUSH: push{q}	$imm */
+	0,
+	{ 0 }
+},
+{	/* X86_PUSH64r, X86_INS_PUSH: push{q}	$reg */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_PUSH64rmm, X86_INS_PUSH: push{q}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_PUSH64rmr, X86_INS_PUSH: push{q}	$reg */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_PUSHA16, X86_INS_PUSHAW: pushaw */
+	0,
+	{ 0 }
+},
+{	/* X86_PUSHA32, X86_INS_PUSHAL: pushal */
+	0,
+	{ 0 }
+},
+{	/* X86_PUSHCS16, X86_INS_PUSH: push{w}	cs */
+	0,
+	{ 0 }
+},
+{	/* X86_PUSHCS32, X86_INS_PUSH: push{l}	cs */
+	0,
+	{ 0 }
+},
+{	/* X86_PUSHDS16, X86_INS_PUSH: push{w}	ds */
+	0,
+	{ 0 }
+},
+{	/* X86_PUSHDS32, X86_INS_PUSH: push{l}	ds */
+	0,
+	{ 0 }
+},
+{	/* X86_PUSHES16, X86_INS_PUSH: push{w}	es */
+	0,
+	{ 0 }
+},
+{	/* X86_PUSHES32, X86_INS_PUSH: push{l}	es */
+	0,
+	{ 0 }
+},
+{	/* X86_PUSHF16, X86_INS_PUSHF: pushf{w} */
+	0,
+	{ 0 }
+},
+{	/* X86_PUSHF32, X86_INS_PUSHFD: pushfd */
+	0,
+	{ 0 }
+},
+{	/* X86_PUSHF64, X86_INS_PUSHFQ: pushfq */
+	0,
+	{ 0 }
+},
+{	/* X86_PUSHFS16, X86_INS_PUSH: push{w}	fs */
+	0,
+	{ 0 }
+},
+{	/* X86_PUSHFS32, X86_INS_PUSH: push{l}	fs */
+	0,
+	{ 0 }
+},
+{	/* X86_PUSHFS64, X86_INS_PUSH: push{q}	fs */
+	0,
+	{ 0 }
+},
+{	/* X86_PUSHGS16, X86_INS_PUSH: push{w}	gs */
+	0,
+	{ 0 }
+},
+{	/* X86_PUSHGS32, X86_INS_PUSH: push{l}	gs */
+	0,
+	{ 0 }
+},
+{	/* X86_PUSHGS64, X86_INS_PUSH: push{q}	gs */
+	0,
+	{ 0 }
+},
+{	/* X86_PUSHSS16, X86_INS_PUSH: push{w}	ss */
+	0,
+	{ 0 }
+},
+{	/* X86_PUSHSS32, X86_INS_PUSH: push{l}	ss */
+	0,
+	{ 0 }
+},
+{	/* X86_PUSHi16, X86_INS_PUSH: push{w}	$imm */
+	0,
+	{ 0 }
+},
+{	/* X86_PUSHi32, X86_INS_PUSH: push{l}	$imm */
+	0,
+	{ 0 }
+},
+{	/* X86_PXORrm, X86_INS_PXOR: pxor	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_PXORrr, X86_INS_PXOR: pxor	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_RCL16m1, X86_INS_RCL: rcl{w}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_RCL16mCL, X86_INS_RCL: rcl{w}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_RCL16mi, X86_INS_RCL: rcl{w}	$dst, $cnt */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_RCL16r1, X86_INS_RCL: rcl{w}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RCL16rCL, X86_INS_RCL: rcl{w}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RCL16ri, X86_INS_RCL: rcl{w}	$dst, $cnt */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RCL32m1, X86_INS_RCL: rcl{l}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_RCL32mCL, X86_INS_RCL: rcl{l}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_RCL32mi, X86_INS_RCL: rcl{l}	$dst, $cnt */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_RCL32r1, X86_INS_RCL: rcl{l}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RCL32rCL, X86_INS_RCL: rcl{l}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RCL32ri, X86_INS_RCL: rcl{l}	$dst, $cnt */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RCL64m1, X86_INS_RCL: rcl{q}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_RCL64mCL, X86_INS_RCL: rcl{q}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_RCL64mi, X86_INS_RCL: rcl{q}	$dst, $cnt */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_RCL64r1, X86_INS_RCL: rcl{q}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RCL64rCL, X86_INS_RCL: rcl{q}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RCL64ri, X86_INS_RCL: rcl{q}	$dst, $cnt */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RCL8m1, X86_INS_RCL: rcl{b}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_RCL8mCL, X86_INS_RCL: rcl{b}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_RCL8mi, X86_INS_RCL: rcl{b}	$dst, $cnt */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_RCL8r1, X86_INS_RCL: rcl{b}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RCL8rCL, X86_INS_RCL: rcl{b}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RCL8ri, X86_INS_RCL: rcl{b}	$dst, $cnt */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RCPPSm, X86_INS_RCPPS: rcpps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_RCPPSm_Int, X86_INS_RCPPS: rcpps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_RCPPSr, X86_INS_RCPPS: rcpps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_RCPPSr_Int, X86_INS_RCPPS: rcpps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_RCPSSm, X86_INS_RCPSS: rcpss	$dst, $src1 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_RCPSSm_Int, X86_INS_RCPSS: rcpss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RCPSSr, X86_INS_RCPSS: rcpss	$dst, $src1 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_RCPSSr_Int, X86_INS_RCPSS: rcpss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_RCR16m1, X86_INS_RCR: rcr{w}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_RCR16mCL, X86_INS_RCR: rcr{w}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_RCR16mi, X86_INS_RCR: rcr{w}	$dst, $cnt */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_RCR16r1, X86_INS_RCR: rcr{w}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RCR16rCL, X86_INS_RCR: rcr{w}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RCR16ri, X86_INS_RCR: rcr{w}	$dst, $cnt */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RCR32m1, X86_INS_RCR: rcr{l}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_RCR32mCL, X86_INS_RCR: rcr{l}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_RCR32mi, X86_INS_RCR: rcr{l}	$dst, $cnt */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_RCR32r1, X86_INS_RCR: rcr{l}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RCR32rCL, X86_INS_RCR: rcr{l}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RCR32ri, X86_INS_RCR: rcr{l}	$dst, $cnt */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RCR64m1, X86_INS_RCR: rcr{q}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_RCR64mCL, X86_INS_RCR: rcr{q}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_RCR64mi, X86_INS_RCR: rcr{q}	$dst, $cnt */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_RCR64r1, X86_INS_RCR: rcr{q}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RCR64rCL, X86_INS_RCR: rcr{q}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RCR64ri, X86_INS_RCR: rcr{q}	$dst, $cnt */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RCR8m1, X86_INS_RCR: rcr{b}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_RCR8mCL, X86_INS_RCR: rcr{b}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_RCR8mi, X86_INS_RCR: rcr{b}	$dst, $cnt */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_RCR8r1, X86_INS_RCR: rcr{b}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RCR8rCL, X86_INS_RCR: rcr{b}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RCR8ri, X86_INS_RCR: rcr{b}	$dst, $cnt */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RDFSBASE, X86_INS_RDFSBASE: rdfsbase{l}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_RDFSBASE64, X86_INS_RDFSBASE: rdfsbase{q}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_RDGSBASE, X86_INS_RDGSBASE: rdgsbase{l}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_RDGSBASE64, X86_INS_RDGSBASE: rdgsbase{q}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_RDMSR, X86_INS_RDMSR: rdmsr */
+	0,
+	{ 0 }
+},
+{	/* X86_RDPMC, X86_INS_RDPMC: rdpmc */
+	0,
+	{ 0 }
+},
+{	/* X86_RDRAND16r, X86_INS_RDRAND: rdrand{w}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_RDRAND32r, X86_INS_RDRAND: rdrand{l}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_RDRAND64r, X86_INS_RDRAND: rdrand{q}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_RDSEED16r, X86_INS_RDSEED: rdseed{w}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_RDSEED32r, X86_INS_RDSEED: rdseed{l}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_RDSEED64r, X86_INS_RDSEED: rdseed{q}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_RDTSC, X86_INS_RDTSC: rdtsc */
+	0,
+	{ 0 }
+},
+{	/* X86_RDTSCP, X86_INS_RDTSCP: rdtscp */
+	0,
+	{ 0 }
+},
+{	/* X86_RETIL, X86_INS_RET: ret{l}	$amt */
+	0,
+	{ 0 }
+},
+{	/* X86_RETIQ, X86_INS_RET: ret{q}	$amt */
+	0,
+	{ 0 }
+},
+{	/* X86_RETIW, X86_INS_RET: ret{w}	$amt */
+	0,
+	{ 0 }
+},
+{	/* X86_RETL, X86_INS_RET: ret{l} */
+	0,
+	{ 0 }
+},
+{	/* X86_RETQ, X86_INS_RET: ret{q} */
+	0,
+	{ 0 }
+},
+{	/* X86_RETW, X86_INS_RET: ret{w} */
+	0,
+	{ 0 }
+},
+{	/* X86_ROL16m1, X86_INS_ROL: rol{w}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ROL16mCL, X86_INS_ROL: rol{w}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ROL16mi, X86_INS_ROL: rol{w}	$dst, $src1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ROL16r1, X86_INS_ROL: rol{w}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ROL16rCL, X86_INS_ROL: rol{w}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ROL16ri, X86_INS_ROL: rol{w}	$dst, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ROL32m1, X86_INS_ROL: rol{l}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ROL32mCL, X86_INS_ROL: rol{l}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ROL32mi, X86_INS_ROL: rol{l}	$dst, $src1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ROL32r1, X86_INS_ROL: rol{l}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ROL32rCL, X86_INS_ROL: rol{l}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ROL32ri, X86_INS_ROL: rol{l}	$dst, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ROL64m1, X86_INS_ROL: rol{q}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ROL64mCL, X86_INS_ROL: rol{q}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ROL64mi, X86_INS_ROL: rol{q}	$dst, $src1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ROL64r1, X86_INS_ROL: rol{q}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ROL64rCL, X86_INS_ROL: rol{q}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ROL64ri, X86_INS_ROL: rol{q}	$dst, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ROL8m1, X86_INS_ROL: rol{b}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ROL8mCL, X86_INS_ROL: rol{b}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ROL8mi, X86_INS_ROL: rol{b}	$dst, $src1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ROL8r1, X86_INS_ROL: rol{b}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ROL8rCL, X86_INS_ROL: rol{b}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ROL8ri, X86_INS_ROL: rol{b}	$dst, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ROR16m1, X86_INS_ROR: ror{w}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ROR16mCL, X86_INS_ROR: ror{w}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ROR16mi, X86_INS_ROR: ror{w}	$dst, $src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ROR16r1, X86_INS_ROR: ror{w}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ROR16rCL, X86_INS_ROR: ror{w}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ROR16ri, X86_INS_ROR: ror{w}	$dst, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ROR32m1, X86_INS_ROR: ror{l}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ROR32mCL, X86_INS_ROR: ror{l}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ROR32mi, X86_INS_ROR: ror{l}	$dst, $src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ROR32r1, X86_INS_ROR: ror{l}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ROR32rCL, X86_INS_ROR: ror{l}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ROR32ri, X86_INS_ROR: ror{l}	$dst, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ROR64m1, X86_INS_ROR: ror{q}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ROR64mCL, X86_INS_ROR: ror{q}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ROR64mi, X86_INS_ROR: ror{q}	$dst, $src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ROR64r1, X86_INS_ROR: ror{q}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ROR64rCL, X86_INS_ROR: ror{q}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ROR64ri, X86_INS_ROR: ror{q}	$dst, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ROR8m1, X86_INS_ROR: ror{b}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ROR8mCL, X86_INS_ROR: ror{b}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ROR8mi, X86_INS_ROR: ror{b}	$dst, $src */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ROR8r1, X86_INS_ROR: ror{b}	$dst, 1 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ROR8rCL, X86_INS_ROR: ror{b}	$dst, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ROR8ri, X86_INS_ROR: ror{b}	$dst, $src2 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RORX32mi, X86_INS_RORX: rorx{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_RORX32ri, X86_INS_RORX: rorx{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_RORX64mi, X86_INS_RORX: rorx{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_RORX64ri, X86_INS_RORX: rorx{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ROUNDPDm, X86_INS_ROUNDPD: roundpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ROUNDPDr, X86_INS_ROUNDPD: roundpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ROUNDPSm, X86_INS_ROUNDPS: roundps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ROUNDPSr, X86_INS_ROUNDPS: roundps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ROUNDSDm, X86_INS_ROUNDSD: roundsd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ROUNDSDr, X86_INS_ROUNDSD: roundsd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ROUNDSDr_Int, X86_INS_ROUNDSD: roundsd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ROUNDSSm, X86_INS_ROUNDSS: roundss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_ROUNDSSr, X86_INS_ROUNDSS: roundss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_ROUNDSSr_Int, X86_INS_ROUNDSS: roundss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_RSM, X86_INS_RSM: rsm */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF,
+	{ 0 }
+},
+{	/* X86_RSQRTPSm, X86_INS_RSQRTPS: rsqrtps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_RSQRTPSm_Int, X86_INS_RSQRTPS: rsqrtps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_RSQRTPSr, X86_INS_RSQRTPS: rsqrtps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_RSQRTPSr_Int, X86_INS_RSQRTPS: rsqrtps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_RSQRTSSm, X86_INS_RSQRTSS: rsqrtss	$dst, $src1 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_RSQRTSSm_Int, X86_INS_RSQRTSS: rsqrtss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_RSQRTSSr, X86_INS_RSQRTSS: rsqrtss	$dst, $src1 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_RSQRTSSr_Int, X86_INS_RSQRTSS: rsqrtss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SAHF, X86_INS_SAHF: sahf */
+	X86_EFLAGS_PRIOR_SF | X86_EFLAGS_PRIOR_ZF | X86_EFLAGS_PRIOR_AF | X86_EFLAGS_PRIOR_PF | X86_EFLAGS_PRIOR_CF,
+	{ 0 }
+},
+{	/* X86_SAL16m1, X86_INS_SAL: sal{w}	$dst, 1 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SAL16mCL, X86_INS_SAL: sal{w}	$dst, cl */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SAL16mi, X86_INS_SAL: sal{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SAL16r1, X86_INS_SAL: sal{w}	$dst, 1 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SAL16rCL, X86_INS_SAL: sal{w}	$dst, cl */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SAL16ri, X86_INS_SAL: sal{w}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SAL32m1, X86_INS_SAL: sal{l}	$dst, 1 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SAL32mCL, X86_INS_SAL: sal{l}	$dst, cl */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SAL32mi, X86_INS_SAL: sal{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SAL32r1, X86_INS_SAL: sal{l}	$dst, 1 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SAL32rCL, X86_INS_SAL: sal{l}	$dst, cl */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SAL32ri, X86_INS_SAL: sal{l}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SAL64m1, X86_INS_SAL: sal{q}	$dst, 1 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SAL64mCL, X86_INS_SAL: sal{q}	$dst, cl */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SAL64mi, X86_INS_SAL: sal{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SAL64r1, X86_INS_SAL: sal{q}	$dst, 1 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SAL64rCL, X86_INS_SAL: sal{q}	$dst, cl */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SAL64ri, X86_INS_SAL: sal{q}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SAL8m1, X86_INS_SAL: sal{b}	$dst, 1 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SAL8mCL, X86_INS_SAL: sal{b}	$dst, cl */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SAL8mi, X86_INS_SAL: sal{b}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SAL8r1, X86_INS_SAL: sal{b}	$dst, 1 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SAL8rCL, X86_INS_SAL: sal{b}	$dst, cl */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SAL8ri, X86_INS_SAL: sal{b}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SALC, X86_INS_SALC: salc */
+	0,
+	{ 0 }
+},
+{	/* X86_SAR16m1, X86_INS_SAR: sar{w}	$dst, 1 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SAR16mCL, X86_INS_SAR: sar{w}	$dst, cl */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SAR16mi, X86_INS_SAR: sar{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SAR16r1, X86_INS_SAR: sar{w}	$dst, 1 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SAR16rCL, X86_INS_SAR: sar{w}	$dst, cl */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SAR16ri, X86_INS_SAR: sar{w}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SAR32m1, X86_INS_SAR: sar{l}	$dst, 1 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SAR32mCL, X86_INS_SAR: sar{l}	$dst, cl */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SAR32mi, X86_INS_SAR: sar{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SAR32r1, X86_INS_SAR: sar{l}	$dst, 1 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SAR32rCL, X86_INS_SAR: sar{l}	$dst, cl */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SAR32ri, X86_INS_SAR: sar{l}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SAR64m1, X86_INS_SAR: sar{q}	$dst, 1 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SAR64mCL, X86_INS_SAR: sar{q}	$dst, cl */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SAR64mi, X86_INS_SAR: sar{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SAR64r1, X86_INS_SAR: sar{q}	$dst, 1 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SAR64rCL, X86_INS_SAR: sar{q}	$dst, cl */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SAR64ri, X86_INS_SAR: sar{q}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SAR8m1, X86_INS_SAR: sar{b}	$dst, 1 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SAR8mCL, X86_INS_SAR: sar{b}	$dst, cl */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SAR8mi, X86_INS_SAR: sar{b}	$dst, $src */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SAR8r1, X86_INS_SAR: sar{b}	$dst, 1 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SAR8rCL, X86_INS_SAR: sar{b}	$dst, cl */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SAR8ri, X86_INS_SAR: sar{b}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SARX32rm, X86_INS_SARX: sarx{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_SARX32rr, X86_INS_SARX: sarx{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_SARX64rm, X86_INS_SARX: sarx{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_SARX64rr, X86_INS_SARX: sarx{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_SBB16i16, X86_INS_SBB: sbb{w}	ax, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ 0 }
+},
+{	/* X86_SBB16mi, X86_INS_SBB: sbb{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SBB16mi8, X86_INS_SBB: sbb{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SBB16mr, X86_INS_SBB: sbb{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SBB16ri, X86_INS_SBB: sbb{w}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SBB16ri8, X86_INS_SBB: sbb{w}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SBB16rm, X86_INS_SBB: sbb{w}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SBB16rr, X86_INS_SBB: sbb{w}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SBB16rr_REV, X86_INS_SBB: sbb{w}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SBB32i32, X86_INS_SBB: sbb{l}	eax, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ 0 }
+},
+{	/* X86_SBB32mi, X86_INS_SBB: sbb{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SBB32mi8, X86_INS_SBB: sbb{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SBB32mr, X86_INS_SBB: sbb{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SBB32ri, X86_INS_SBB: sbb{l}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SBB32ri8, X86_INS_SBB: sbb{l}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SBB32rm, X86_INS_SBB: sbb{l}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SBB32rr, X86_INS_SBB: sbb{l}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SBB32rr_REV, X86_INS_SBB: sbb{l}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SBB64i32, X86_INS_SBB: sbb{q}	rax, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ 0 }
+},
+{	/* X86_SBB64mi32, X86_INS_SBB: sbb{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SBB64mi8, X86_INS_SBB: sbb{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SBB64mr, X86_INS_SBB: sbb{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SBB64ri32, X86_INS_SBB: sbb{q}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SBB64ri8, X86_INS_SBB: sbb{q}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SBB64rm, X86_INS_SBB: sbb{q}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SBB64rr, X86_INS_SBB: sbb{q}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SBB64rr_REV, X86_INS_SBB: sbb{q}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SBB8i8, X86_INS_SBB: sbb{b}	al, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ 0 }
+},
+{	/* X86_SBB8mi, X86_INS_SBB: sbb{b}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SBB8mi8, X86_INS_SBB: sbb{b}	$dst, $src */
+	X86_REG_EFLAGS,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SBB8mr, X86_INS_SBB: sbb{b}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SBB8ri, X86_INS_SBB: sbb{b}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SBB8ri8, X86_INS_SBB: sbb{b}	$src1, $src2 */
+	X86_REG_EFLAGS,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SBB8rm, X86_INS_SBB: sbb{b}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SBB8rr, X86_INS_SBB: sbb{b}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SBB8rr_REV, X86_INS_SBB: sbb{b}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SCASB, X86_INS_SCASB: scasb	al, $dst */
+	X86_REG_EFLAGS,
+	{ 0 }
+},
+{	/* X86_SCASL, X86_INS_SCASD: scas{l|d}	{$dst, %eax|eax, $dst} */
+	X86_REG_EFLAGS,
+	{ 0 }
+},
+{	/* X86_SCASQ, X86_INS_SCASQ: scasq	rax, $dst */
+	X86_REG_EFLAGS,
+	{ 0 }
+},
+{	/* X86_SCASW, X86_INS_SCASW: scasw	ax, $dst */
+	X86_REG_EFLAGS,
+	{ 0 }
+},
+{	/* X86_SETAEm, X86_INS_SETAE: setae	$dst */
+	X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SETAEr, X86_INS_SETAE: setae	$dst */
+	X86_EFLAGS_TEST_CF,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SETAm, X86_INS_SETA: seta	$dst */
+	X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SETAr, X86_INS_SETA: seta	$dst */
+	X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SETBEm, X86_INS_SETBE: setbe	$dst */
+	X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SETBEr, X86_INS_SETBE: setbe	$dst */
+	X86_EFLAGS_TEST_ZF | X86_EFLAGS_TEST_CF,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SETBm, X86_INS_SETB: setb	$dst */
+	X86_EFLAGS_TEST_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SETBr, X86_INS_SETB: setb	$dst */
+	X86_EFLAGS_TEST_CF,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SETEm, X86_INS_SETE: sete	$dst */
+	X86_EFLAGS_TEST_ZF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SETEr, X86_INS_SETE: sete	$dst */
+	X86_EFLAGS_TEST_ZF,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SETGEm, X86_INS_SETGE: setge	$dst */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SETGEr, X86_INS_SETGE: setge	$dst */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SETGm, X86_INS_SETG: setg	$dst */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SETGr, X86_INS_SETG: setg	$dst */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SETLEm, X86_INS_SETLE: setle	$dst */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SETLEr, X86_INS_SETLE: setle	$dst */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF | X86_EFLAGS_TEST_ZF,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SETLm, X86_INS_SETL: setl	$dst */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SETLr, X86_INS_SETL: setl	$dst */
+	X86_EFLAGS_TEST_OF | X86_EFLAGS_TEST_SF,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SETNEm, X86_INS_SETNE: setne	$dst */
+	X86_EFLAGS_TEST_ZF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SETNEr, X86_INS_SETNE: setne	$dst */
+	X86_EFLAGS_TEST_ZF,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SETNOm, X86_INS_SETNO: setno	$dst */
+	X86_EFLAGS_TEST_OF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SETNOr, X86_INS_SETNO: setno	$dst */
+	X86_EFLAGS_TEST_OF,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SETNPm, X86_INS_SETNP: setnp	$dst */
+	X86_EFLAGS_TEST_PF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SETNPr, X86_INS_SETNP: setnp	$dst */
+	X86_EFLAGS_TEST_PF,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SETNSm, X86_INS_SETNS: setns	$dst */
+	X86_EFLAGS_TEST_SF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SETNSr, X86_INS_SETNS: setns	$dst */
+	X86_EFLAGS_TEST_SF,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SETOm, X86_INS_SETO: seto	$dst */
+	X86_EFLAGS_TEST_OF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SETOr, X86_INS_SETO: seto	$dst */
+	X86_EFLAGS_TEST_OF,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SETPm, X86_INS_SETP: setp	$dst */
+	X86_EFLAGS_TEST_PF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SETPr, X86_INS_SETP: setp	$dst */
+	X86_EFLAGS_TEST_PF,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SETSm, X86_INS_SETS: sets	$dst */
+	X86_EFLAGS_TEST_SF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SETSr, X86_INS_SETS: sets	$dst */
+	X86_EFLAGS_TEST_SF,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SFENCE, X86_INS_SFENCE: sfence */
+	0,
+	{ 0 }
+},
+{	/* X86_SGDT16m, X86_INS_SGDT: sgdt{w}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SGDT32m, X86_INS_SGDT: sgdt{l}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SGDT64m, X86_INS_SGDT: sgdt{q}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SHA1MSG1rm, X86_INS_SHA1MSG1: sha1msg1	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHA1MSG1rr, X86_INS_SHA1MSG1: sha1msg1	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHA1MSG2rm, X86_INS_SHA1MSG2: sha1msg2	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHA1MSG2rr, X86_INS_SHA1MSG2: sha1msg2	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHA1NEXTErm, X86_INS_SHA1NEXTE: sha1nexte	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHA1NEXTErr, X86_INS_SHA1NEXTE: sha1nexte	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHA1RNDS4rmi, X86_INS_SHA1RNDS4: sha1rnds4	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHA1RNDS4rri, X86_INS_SHA1RNDS4: sha1rnds4	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHA256MSG1rm, X86_INS_SHA256MSG1: sha256msg1	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHA256MSG1rr, X86_INS_SHA256MSG1: sha256msg1	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHA256MSG2rm, X86_INS_SHA256MSG2: sha256msg2	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHA256MSG2rr, X86_INS_SHA256MSG2: sha256msg2	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHA256RNDS2rm, X86_INS_SHA256RNDS2: sha256rnds2	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHA256RNDS2rr, X86_INS_SHA256RNDS2: sha256rnds2	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHL16m1, X86_INS_SHL: shl{w}	$dst, 1 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SHL16mCL, X86_INS_SHL: shl{w}	$dst, cl */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SHL16mi, X86_INS_SHL: shl{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SHL16r1, X86_INS_SHL: shl{w}	$dst, 1 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SHL16rCL, X86_INS_SHL: shl{w}	$dst, cl */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SHL16ri, X86_INS_SHL: shl{w}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SHL32m1, X86_INS_SHL: shl{l}	$dst, 1 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SHL32mCL, X86_INS_SHL: shl{l}	$dst, cl */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SHL32mi, X86_INS_SHL: shl{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SHL32r1, X86_INS_SHL: shl{l}	$dst, 1 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SHL32rCL, X86_INS_SHL: shl{l}	$dst, cl */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SHL32ri, X86_INS_SHL: shl{l}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SHL64m1, X86_INS_SHL: shl{q}	$dst, 1 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SHL64mCL, X86_INS_SHL: shl{q}	$dst, cl */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SHL64mi, X86_INS_SHL: shl{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SHL64r1, X86_INS_SHL: shl{q}	$dst, 1 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SHL64rCL, X86_INS_SHL: shl{q}	$dst, cl */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SHL64ri, X86_INS_SHL: shl{q}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SHL8m1, X86_INS_SHL: shl{b}	$dst, 1 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SHL8mCL, X86_INS_SHL: shl{b}	$dst, cl */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SHL8mi, X86_INS_SHL: shl{b}	$dst, $src */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SHL8r1, X86_INS_SHL: shl{b}	$dst, 1 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SHL8rCL, X86_INS_SHL: shl{b}	$dst, cl */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SHL8ri, X86_INS_SHL: shl{b}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SHLD16mrCL, X86_INS_SHLD: shld{w}	$dst, $src2, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_SHLD16mri8, X86_INS_SHLD: shld{w}	$dst, $src2, $src3 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_SHLD16rrCL, X86_INS_SHLD: shld{w}	$dst, $src2, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHLD16rri8, X86_INS_SHLD: shld{w}	$dst, $src2, $src3 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHLD32mrCL, X86_INS_SHLD: shld{l}	$dst, $src2, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_SHLD32mri8, X86_INS_SHLD: shld{l}	$dst, $src2, $src3 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_SHLD32rrCL, X86_INS_SHLD: shld{l}	$dst, $src2, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHLD32rri8, X86_INS_SHLD: shld{l}	$dst, $src2, $src3 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHLD64mrCL, X86_INS_SHLD: shld{q}	$dst, $src2, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_SHLD64mri8, X86_INS_SHLD: shld{q}	$dst, $src2, $src3 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_SHLD64rrCL, X86_INS_SHLD: shld{q}	$dst, $src2, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHLD64rri8, X86_INS_SHLD: shld{q}	$dst, $src2, $src3 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHLX32rm, X86_INS_SHLX: shlx{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_SHLX32rr, X86_INS_SHLX: shlx{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_SHLX64rm, X86_INS_SHLX: shlx{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_SHLX64rr, X86_INS_SHLX: shlx{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_SHR16m1, X86_INS_SHR: shr{w}	$dst, 1 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SHR16mCL, X86_INS_SHR: shr{w}	$dst, cl */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SHR16mi, X86_INS_SHR: shr{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SHR16r1, X86_INS_SHR: shr{w}	$dst, 1 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SHR16rCL, X86_INS_SHR: shr{w}	$dst, cl */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SHR16ri, X86_INS_SHR: shr{w}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SHR32m1, X86_INS_SHR: shr{l}	$dst, 1 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SHR32mCL, X86_INS_SHR: shr{l}	$dst, cl */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SHR32mi, X86_INS_SHR: shr{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SHR32r1, X86_INS_SHR: shr{l}	$dst, 1 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SHR32rCL, X86_INS_SHR: shr{l}	$dst, cl */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SHR32ri, X86_INS_SHR: shr{l}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SHR64m1, X86_INS_SHR: shr{q}	$dst, 1 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SHR64mCL, X86_INS_SHR: shr{q}	$dst, cl */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SHR64mi, X86_INS_SHR: shr{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SHR64r1, X86_INS_SHR: shr{q}	$dst, 1 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SHR64rCL, X86_INS_SHR: shr{q}	$dst, cl */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SHR64ri, X86_INS_SHR: shr{q}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SHR8m1, X86_INS_SHR: shr{b}	$dst, 1 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SHR8mCL, X86_INS_SHR: shr{b}	$dst, cl */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SHR8mi, X86_INS_SHR: shr{b}	$dst, $src */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SHR8r1, X86_INS_SHR: shr{b}	$dst, 1 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SHR8rCL, X86_INS_SHR: shr{b}	$dst, cl */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SHR8ri, X86_INS_SHR: shr{b}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SHRD16mrCL, X86_INS_SHRD: shrd{w}	$dst, $src2, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_SHRD16mri8, X86_INS_SHRD: shrd{w}	$dst, $src2, $src3 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_SHRD16rrCL, X86_INS_SHRD: shrd{w}	$dst, $src2, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHRD16rri8, X86_INS_SHRD: shrd{w}	$dst, $src2, $src3 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHRD32mrCL, X86_INS_SHRD: shrd{l}	$dst, $src2, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_SHRD32mri8, X86_INS_SHRD: shrd{l}	$dst, $src2, $src3 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_SHRD32rrCL, X86_INS_SHRD: shrd{l}	$dst, $src2, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHRD32rri8, X86_INS_SHRD: shrd{l}	$dst, $src2, $src3 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHRD64mrCL, X86_INS_SHRD: shrd{q}	$dst, $src2, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_SHRD64mri8, X86_INS_SHRD: shrd{q}	$dst, $src2, $src3 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_SHRD64rrCL, X86_INS_SHRD: shrd{q}	$dst, $src2, cl */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHRD64rri8, X86_INS_SHRD: shrd{q}	$dst, $src2, $src3 */
+	X86_EFLAGS_UNDEFINED_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHRX32rm, X86_INS_SHRX: shrx{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_SHRX32rr, X86_INS_SHRX: shrx{l}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_SHRX64rm, X86_INS_SHRX: shrx{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_SHRX64rr, X86_INS_SHRX: shrx{q}	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_SHUFPDrmi, X86_INS_SHUFPD: shufpd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHUFPDrri, X86_INS_SHUFPD: shufpd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHUFPSrmi, X86_INS_SHUFPS: shufps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SHUFPSrri, X86_INS_SHUFPS: shufps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SIDT16m, X86_INS_SIDT: sidt{w}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SIDT32m, X86_INS_SIDT: sidt{l}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SIDT64m, X86_INS_SIDT: sidt{q}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SIN_F, X86_INS_FSIN: fsin */
+	0,
+	{ 0 }
+},
+{	/* X86_SKINIT, X86_INS_SKINIT: skinit	eax */
+	0,
+	{ 0 }
+},
+{	/* X86_SLDT16m, X86_INS_SLDT: sldt{w}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SLDT16r, X86_INS_SLDT: sldt{w}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SLDT32r, X86_INS_SLDT: sldt{l}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SLDT64m, X86_INS_SLDT: sldt{q}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SLDT64r, X86_INS_SLDT: sldt{q}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SMSW16m, X86_INS_SMSW: smsw{w}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SMSW16r, X86_INS_SMSW: smsw{w}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SMSW32r, X86_INS_SMSW: smsw{l}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SMSW64r, X86_INS_SMSW: smsw{q}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_SQRTPDm, X86_INS_SQRTPD: sqrtpd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SQRTPDr, X86_INS_SQRTPD: sqrtpd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SQRTPSm, X86_INS_SQRTPS: sqrtps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SQRTPSr, X86_INS_SQRTPS: sqrtps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SQRTSDm, X86_INS_SQRTSD: sqrtsd	$dst, $src1 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SQRTSDm_Int, X86_INS_SQRTSD: sqrtsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SQRTSDr, X86_INS_SQRTSD: sqrtsd	$dst, $src1 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SQRTSDr_Int, X86_INS_SQRTSD: sqrtsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SQRTSSm, X86_INS_SQRTSS: sqrtss	$dst, $src1 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SQRTSSm_Int, X86_INS_SQRTSS: sqrtss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SQRTSSr, X86_INS_SQRTSS: sqrtss	$dst, $src1 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SQRTSSr_Int, X86_INS_SQRTSS: sqrtss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SQRT_F, X86_INS_FSQRT: fsqrt */
+	0,
+	{ 0 }
+},
+{	/* X86_STAC, X86_INS_STAC: stac */
+	0,
+	{ 0 }
+},
+{	/* X86_STC, X86_INS_STC: stc */
+	X86_EFLAGS_SET_CF,
+	{ 0 }
+},
+{	/* X86_STD, X86_INS_STD: std */
+	X86_EFLAGS_SET_DF,
+	{ 0 }
+},
+{	/* X86_STGI, X86_INS_STGI: stgi */
+	0,
+	{ 0 }
+},
+{	/* X86_STI, X86_INS_STI: sti */
+	X86_EFLAGS_SET_IF,
+	{ 0 }
+},
+{	/* X86_STMXCSR, X86_INS_STMXCSR: stmxcsr	$dst */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_STOSB, X86_INS_STOSB: stosb	$dst, al */
+	0,
+	{ 0 }
+},
+{	/* X86_STOSL, X86_INS_STOSD: stos{l|d}	{%eax, $dst|$dst, eax} */
+	0,
+	{ 0 }
+},
+{	/* X86_STOSQ, X86_INS_STOSQ: stosq	$dst, rax */
+	0,
+	{ 0 }
+},
+{	/* X86_STOSW, X86_INS_STOSW: stosw	$dst, ax */
+	0,
+	{ 0 }
+},
+{	/* X86_STR16r, X86_INS_STR: str{w}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_STR32r, X86_INS_STR: str{l}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_STR64r, X86_INS_STR: str{q}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_STRm, X86_INS_STR: str{w}	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_ST_F32m, X86_INS_FST: fst{s}	$dst */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ST_F64m, X86_INS_FST: fst{l}	$dst */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ST_FCOMPST0r, X86_INS_FCOMP: fcomp	st(0), $op */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_ST_FCOMPST0r_alt, X86_INS_FCOMP: fcomp	st(0), $op */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_ST_FCOMST0r, X86_INS_FCOM: fcom	st(0), $op */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_ST_FP32m, X86_INS_FSTP: fstp{s}	$dst */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ST_FP64m, X86_INS_FSTP: fstp{l}	$dst */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ST_FP80m, X86_INS_FSTP: fstp{t}	$dst */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ST_FPNCEST0r, X86_INS_FSTPNCE: fstpnce	$op, st(0) */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_ST_FPST0r, X86_INS_FSTP: fstp	$op, st(0) */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_ST_FPST0r_alt, X86_INS_FSTP: fstp	$op, st(0) */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_ST_FPrr, X86_INS_FSTP: fstp	$op */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_ST_FXCHST0r, X86_INS_FXCH: fxch	st(0), $op */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_ST_FXCHST0r_alt, X86_INS_FXCH: fxch	st(0), $op */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_ST_Frr, X86_INS_FST: fst	$op */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SUB16i16, X86_INS_SUB: sub{w}	ax, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ 0 }
+},
+{	/* X86_SUB16mi, X86_INS_SUB: sub{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SUB16mi8, X86_INS_SUB: sub{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SUB16mr, X86_INS_SUB: sub{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SUB16ri, X86_INS_SUB: sub{w}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SUB16ri8, X86_INS_SUB: sub{w}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SUB16rm, X86_INS_SUB: sub{w}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SUB16rr, X86_INS_SUB: sub{w}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SUB16rr_REV, X86_INS_SUB: sub{w}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SUB32i32, X86_INS_SUB: sub{l}	eax, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ 0 }
+},
+{	/* X86_SUB32mi, X86_INS_SUB: sub{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SUB32mi8, X86_INS_SUB: sub{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SUB32mr, X86_INS_SUB: sub{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SUB32ri, X86_INS_SUB: sub{l}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SUB32ri8, X86_INS_SUB: sub{l}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SUB32rm, X86_INS_SUB: sub{l}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SUB32rr, X86_INS_SUB: sub{l}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SUB32rr_REV, X86_INS_SUB: sub{l}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SUB64i32, X86_INS_SUB: sub{q}	rax, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ 0 }
+},
+{	/* X86_SUB64mi32, X86_INS_SUB: sub{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SUB64mi8, X86_INS_SUB: sub{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SUB64mr, X86_INS_SUB: sub{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SUB64ri32, X86_INS_SUB: sub{q}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SUB64ri8, X86_INS_SUB: sub{q}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SUB64rm, X86_INS_SUB: sub{q}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SUB64rr, X86_INS_SUB: sub{q}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SUB64rr_REV, X86_INS_SUB: sub{q}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SUB8i8, X86_INS_SUB: sub{b}	al, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ 0 }
+},
+{	/* X86_SUB8mi, X86_INS_SUB: sub{b}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SUB8mi8, X86_INS_SUB: sub{b}	$dst, $src */
+	X86_REG_EFLAGS,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SUB8mr, X86_INS_SUB: sub{b}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SUB8ri, X86_INS_SUB: sub{b}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SUB8ri8, X86_INS_SUB: sub{b}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SUB8rm, X86_INS_SUB: sub{b}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SUB8rr, X86_INS_SUB: sub{b}	$src1, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SUB8rr_REV, X86_INS_SUB: sub{b}	$dst, $src2 */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SUBPDrm, X86_INS_SUBPD: subpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SUBPDrr, X86_INS_SUBPD: subpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SUBPSrm, X86_INS_SUBPS: subps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SUBPSrr, X86_INS_SUBPS: subps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SUBR_F32m, X86_INS_FSUBR: fsubr{s}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SUBR_F64m, X86_INS_FSUBR: fsubr{l}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SUBR_FI16m, X86_INS_FISUBR: fisubr{s}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SUBR_FI32m, X86_INS_FISUBR: fisubr{l}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SUBR_FPrST0, X86_INS_FSUBRP: fsubrp	$op */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SUBR_FST0r, X86_INS_FSUBR: fsubr	$op */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SUBR_FrST0, X86_INS_FSUBR: fsub{|r}	{%st(0), $op|$op, st(0)} */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SUBSDrm, X86_INS_SUBSD: subsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SUBSDrm_Int, X86_INS_SUBSD: subsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SUBSDrr, X86_INS_SUBSD: subsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SUBSDrr_Int, X86_INS_SUBSD: subsd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SUBSSrm, X86_INS_SUBSS: subss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SUBSSrm_Int, X86_INS_SUBSS: subss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_SUBSSrr, X86_INS_SUBSS: subss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SUBSSrr_Int, X86_INS_SUBSS: subss	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_SUB_F32m, X86_INS_FSUB: fsub{s}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SUB_F64m, X86_INS_FSUB: fsub{l}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SUB_FI16m, X86_INS_FISUB: fisub{s}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SUB_FI32m, X86_INS_FISUB: fisub{l}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SUB_FPrST0, X86_INS_FSUBP: fsub{r}p	$op */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SUB_FST0r, X86_INS_FSUB: fsub	$op */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SUB_FrST0, X86_INS_FSUB: fsub{r}	$op, st(0) */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_SWAPGS, X86_INS_SWAPGS: swapgs */
+	0,
+	{ 0 }
+},
+{	/* X86_SYSCALL, X86_INS_SYSCALL: syscall */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF,
+	{ 0 }
+},
+{	/* X86_SYSENTER, X86_INS_SYSENTER: sysenter */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF,
+	{ 0 }
+},
+{	/* X86_SYSEXIT, X86_INS_SYSEXIT: sysexit{l} */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF,
+	{ 0 }
+},
+{	/* X86_SYSEXIT64, X86_INS_SYSEXIT: sysexit{q} */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF,
+	{ 0 }
+},
+{	/* X86_SYSRET, X86_INS_SYSRET: sysret{l} */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF,
+	{ 0 }
+},
+{	/* X86_SYSRET64, X86_INS_SYSRET: sysret{q} */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF | X86_EFLAGS_MODIFY_TF | X86_EFLAGS_MODIFY_IF | X86_EFLAGS_MODIFY_DF | X86_EFLAGS_MODIFY_NT | X86_EFLAGS_MODIFY_RF,
+	{ 0 }
+},
+{	/* X86_T1MSKC32rm, X86_INS_T1MSKC: t1mskc	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_T1MSKC32rr, X86_INS_T1MSKC: t1mskc	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_T1MSKC64rm, X86_INS_T1MSKC: t1mskc	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_T1MSKC64rr, X86_INS_T1MSKC: t1mskc	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_TEST16i16, X86_INS_TEST: test{w}	ax, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ 0 }
+},
+{	/* X86_TEST16mi, X86_INS_TEST: test{w}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_TEST16mi_alt, X86_INS_TEST: test{w}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_TEST16ri, X86_INS_TEST: test{w}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_TEST16ri_alt, X86_INS_TEST: test{w}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_TEST16rm, X86_INS_TEST: test{w}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_TEST16rr, X86_INS_TEST: test{w}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_TEST32i32, X86_INS_TEST: test{l}	eax, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ 0 }
+},
+{	/* X86_TEST32mi, X86_INS_TEST: test{l}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_TEST32mi_alt, X86_INS_TEST: test{l}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_TEST32ri, X86_INS_TEST: test{l}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_TEST32ri_alt, X86_INS_TEST: test{l}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_TEST32rm, X86_INS_TEST: test{l}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_TEST32rr, X86_INS_TEST: test{l}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_TEST64i32, X86_INS_TEST: test{q}	rax, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ 0 }
+},
+{	/* X86_TEST64mi32, X86_INS_TEST: test{q}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_TEST64mi32_alt, X86_INS_TEST: test{q}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_TEST64ri32, X86_INS_TEST: test{q}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_TEST64ri32_alt, X86_INS_TEST: test{q}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_TEST64rm, X86_INS_TEST: test{q}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_TEST64rr, X86_INS_TEST: test{q}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_TEST8i8, X86_INS_TEST: test{b}	al, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ 0 }
+},
+{	/* X86_TEST8mi, X86_INS_TEST: test{b}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_TEST8mi_alt, X86_INS_TEST: test{b}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_TEST8ri, X86_INS_TEST: test{b}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_TEST8ri_alt, X86_INS_TEST: test{b}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_TEST8rm, X86_INS_TEST: test{b}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_TEST8rr, X86_INS_TEST: test{b}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_TRAP, X86_INS_UD2: ud2 */
+	0,
+	{ 0 }
+},
+{	/* X86_TST_F, X86_INS_FTST: ftst */
+	0,
+	{ 0 }
+},
+{	/* X86_TZCNT16rm, X86_INS_TZCNT: tzcnt{w}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_TZCNT16rr, X86_INS_TZCNT: tzcnt{w}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_TZCNT32rm, X86_INS_TZCNT: tzcnt{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_TZCNT32rr, X86_INS_TZCNT: tzcnt{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_TZCNT64rm, X86_INS_TZCNT: tzcnt{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_TZCNT64rr, X86_INS_TZCNT: tzcnt{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_TZMSK32rm, X86_INS_TZMSK: tzmsk	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_TZMSK32rr, X86_INS_TZMSK: tzmsk	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_TZMSK64rm, X86_INS_TZMSK: tzmsk	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_TZMSK64rr, X86_INS_TZMSK: tzmsk	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_UCOMISDrm, X86_INS_UCOMISD: ucomisd	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_UCOMISDrr, X86_INS_UCOMISD: ucomisd	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_UCOMISSrm, X86_INS_UCOMISS: ucomiss	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_UCOMISSrr, X86_INS_UCOMISS: ucomiss	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_RESET_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_RESET_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_UCOM_FIPr, X86_INS_FUCOMPI: fucompi	$reg */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_UCOM_FIr, X86_INS_FUCOMI: fucomi	$reg */
+	X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_UCOM_FPPr, X86_INS_FUCOMPP: fucompp */
+	0,
+	{ 0 }
+},
+{	/* X86_UCOM_FPr, X86_INS_FUCOMP: fucomp	$reg */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_UCOM_Fr, X86_INS_FUCOM: fucom	$reg */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_UD2B, X86_INS_UD2B: ud2b */
+	0,
+	{ 0 }
+},
+{	/* X86_UNPCKHPDrm, X86_INS_UNPCKHPD: unpckhpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_UNPCKHPDrr, X86_INS_UNPCKHPD: unpckhpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_UNPCKHPSrm, X86_INS_UNPCKHPS: unpckhps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_UNPCKHPSrr, X86_INS_UNPCKHPS: unpckhps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_UNPCKLPDrm, X86_INS_UNPCKLPD: unpcklpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_UNPCKLPDrr, X86_INS_UNPCKLPD: unpcklpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_UNPCKLPSrm, X86_INS_UNPCKLPS: unpcklps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_UNPCKLPSrr, X86_INS_UNPCKLPS: unpcklps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDYrm, X86_INS_VADDPD: vaddpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDYrr, X86_INS_VADDPD: vaddpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZ128rm, X86_INS_VADDPD: vaddpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZ128rmb, X86_INS_VADDPD: vaddpd	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZ128rmbk, X86_INS_VADDPD: vaddpd	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZ128rmbkz, X86_INS_VADDPD: vaddpd	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZ128rmk, X86_INS_VADDPD: vaddpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZ128rmkz, X86_INS_VADDPD: vaddpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZ128rr, X86_INS_VADDPD: vaddpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZ128rrk, X86_INS_VADDPD: vaddpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZ128rrkz, X86_INS_VADDPD: vaddpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZ256rm, X86_INS_VADDPD: vaddpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZ256rmb, X86_INS_VADDPD: vaddpd	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZ256rmbk, X86_INS_VADDPD: vaddpd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZ256rmbkz, X86_INS_VADDPD: vaddpd	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZ256rmk, X86_INS_VADDPD: vaddpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZ256rmkz, X86_INS_VADDPD: vaddpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZ256rr, X86_INS_VADDPD: vaddpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZ256rrk, X86_INS_VADDPD: vaddpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZ256rrkz, X86_INS_VADDPD: vaddpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZrb, X86_INS_VADDPD: vaddpd	$dst , $src1, $src2, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VADDPDZrbk, X86_INS_VADDPD: vaddpd	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZrbkz, X86_INS_VADDPD: vaddpd	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZrm, X86_INS_VADDPD: vaddpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZrmb, X86_INS_VADDPD: vaddpd	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZrmbk, X86_INS_VADDPD: vaddpd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZrmbkz, X86_INS_VADDPD: vaddpd	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZrmk, X86_INS_VADDPD: vaddpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZrmkz, X86_INS_VADDPD: vaddpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZrr, X86_INS_VADDPD: vaddpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZrrk, X86_INS_VADDPD: vaddpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDZrrkz, X86_INS_VADDPD: vaddpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDrm, X86_INS_VADDPD: vaddpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPDrr, X86_INS_VADDPD: vaddpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSYrm, X86_INS_VADDPS: vaddps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSYrr, X86_INS_VADDPS: vaddps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZ128rm, X86_INS_VADDPS: vaddps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZ128rmb, X86_INS_VADDPS: vaddps	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZ128rmbk, X86_INS_VADDPS: vaddps	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZ128rmbkz, X86_INS_VADDPS: vaddps	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZ128rmk, X86_INS_VADDPS: vaddps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZ128rmkz, X86_INS_VADDPS: vaddps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZ128rr, X86_INS_VADDPS: vaddps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZ128rrk, X86_INS_VADDPS: vaddps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZ128rrkz, X86_INS_VADDPS: vaddps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZ256rm, X86_INS_VADDPS: vaddps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZ256rmb, X86_INS_VADDPS: vaddps	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZ256rmbk, X86_INS_VADDPS: vaddps	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZ256rmbkz, X86_INS_VADDPS: vaddps	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZ256rmk, X86_INS_VADDPS: vaddps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZ256rmkz, X86_INS_VADDPS: vaddps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZ256rr, X86_INS_VADDPS: vaddps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZ256rrk, X86_INS_VADDPS: vaddps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZ256rrkz, X86_INS_VADDPS: vaddps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZrb, X86_INS_VADDPS: vaddps	$dst , $src1, $src2, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VADDPSZrbk, X86_INS_VADDPS: vaddps	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZrbkz, X86_INS_VADDPS: vaddps	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZrm, X86_INS_VADDPS: vaddps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZrmb, X86_INS_VADDPS: vaddps	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZrmbk, X86_INS_VADDPS: vaddps	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZrmbkz, X86_INS_VADDPS: vaddps	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZrmk, X86_INS_VADDPS: vaddps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZrmkz, X86_INS_VADDPS: vaddps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZrr, X86_INS_VADDPS: vaddps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZrrk, X86_INS_VADDPS: vaddps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSZrrkz, X86_INS_VADDPS: vaddps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSrm, X86_INS_VADDPS: vaddps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDPSrr, X86_INS_VADDPS: vaddps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSDZrm, X86_INS_VADDSD: vaddsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSDZrm_Int, X86_INS_VADDSD: vaddsd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSDZrm_Intk, X86_INS_VADDSD: vaddsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSDZrm_Intkz, X86_INS_VADDSD: vaddsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSDZrr, X86_INS_VADDSD: vaddsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSDZrr_Int, X86_INS_VADDSD: vaddsd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSDZrr_Intk, X86_INS_VADDSD: vaddsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSDZrr_Intkz, X86_INS_VADDSD: vaddsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSDZrrb, X86_INS_VADDSD: vaddsd	$dst , $src1, $src2, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VADDSDZrrbk, X86_INS_VADDSD: vaddsd	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSDZrrbkz, X86_INS_VADDSD: vaddsd	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSDrm, X86_INS_VADDSD: vaddsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSDrm_Int, X86_INS_VADDSD: vaddsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSDrr, X86_INS_VADDSD: vaddsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSDrr_Int, X86_INS_VADDSD: vaddsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSSZrm, X86_INS_VADDSS: vaddss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSSZrm_Int, X86_INS_VADDSS: vaddss	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSSZrm_Intk, X86_INS_VADDSS: vaddss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSSZrm_Intkz, X86_INS_VADDSS: vaddss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSSZrr, X86_INS_VADDSS: vaddss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSSZrr_Int, X86_INS_VADDSS: vaddss	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSSZrr_Intk, X86_INS_VADDSS: vaddss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSSZrr_Intkz, X86_INS_VADDSS: vaddss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSSZrrb, X86_INS_VADDSS: vaddss	$dst , $src1, $src2, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VADDSSZrrbk, X86_INS_VADDSS: vaddss	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSSZrrbkz, X86_INS_VADDSS: vaddss	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSSrm, X86_INS_VADDSS: vaddss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSSrm_Int, X86_INS_VADDSS: vaddss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSSrr, X86_INS_VADDSS: vaddss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSSrr_Int, X86_INS_VADDSS: vaddss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSUBPDYrm, X86_INS_VADDSUBPD: vaddsubpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSUBPDYrr, X86_INS_VADDSUBPD: vaddsubpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSUBPDrm, X86_INS_VADDSUBPD: vaddsubpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSUBPDrr, X86_INS_VADDSUBPD: vaddsubpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSUBPSYrm, X86_INS_VADDSUBPS: vaddsubps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSUBPSYrr, X86_INS_VADDSUBPS: vaddsubps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSUBPSrm, X86_INS_VADDSUBPS: vaddsubps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VADDSUBPSrr, X86_INS_VADDSUBPS: vaddsubps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VAESDECLASTrm, X86_INS_VAESDECLAST: vaesdeclast	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VAESDECLASTrr, X86_INS_VAESDECLAST: vaesdeclast	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VAESDECrm, X86_INS_VAESDEC: vaesdec	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VAESDECrr, X86_INS_VAESDEC: vaesdec	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VAESENCLASTrm, X86_INS_VAESENCLAST: vaesenclast	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VAESENCLASTrr, X86_INS_VAESENCLAST: vaesenclast	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VAESENCrm, X86_INS_VAESENC: vaesenc	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VAESENCrr, X86_INS_VAESENC: vaesenc	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VAESIMCrm, X86_INS_VAESIMC: vaesimc	$dst, $src1 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VAESIMCrr, X86_INS_VAESIMC: vaesimc	$dst, $src1 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VAESKEYGENASSIST128rm, X86_INS_VAESKEYGENASSIST: vaeskeygenassist	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VAESKEYGENASSIST128rr, X86_INS_VAESKEYGENASSIST: vaeskeygenassist	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VALIGNDrmi, X86_INS_VALIGND: valignd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VALIGNDrri, X86_INS_VALIGND: valignd	$dst , $src1, $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VALIGNDrrik, X86_INS_VALIGND: valignd	{$src3, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VALIGNDrrikz, X86_INS_VALIGND: valignd	{$src3, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $src3} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VALIGNQrmi, X86_INS_VALIGNQ: valignq	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VALIGNQrri, X86_INS_VALIGNQ: valignq	$dst , $src1, $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VALIGNQrrik, X86_INS_VALIGNQ: valignq	{$src3, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VALIGNQrrikz, X86_INS_VALIGNQ: valignq	{$src3, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $src3} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VANDNPDYrm, X86_INS_VANDNPD: vandnpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VANDNPDYrr, X86_INS_VANDNPD: vandnpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VANDNPDrm, X86_INS_VANDNPD: vandnpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VANDNPDrr, X86_INS_VANDNPD: vandnpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VANDNPSYrm, X86_INS_VANDNPS: vandnps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VANDNPSYrr, X86_INS_VANDNPS: vandnps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VANDNPSrm, X86_INS_VANDNPS: vandnps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VANDNPSrr, X86_INS_VANDNPS: vandnps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VANDPDYrm, X86_INS_VANDPD: vandpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VANDPDYrr, X86_INS_VANDPD: vandpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VANDPDrm, X86_INS_VANDPD: vandpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VANDPDrr, X86_INS_VANDPD: vandpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VANDPSYrm, X86_INS_VANDPS: vandps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VANDPSYrr, X86_INS_VANDPS: vandps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VANDPSrm, X86_INS_VANDPS: vandps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VANDPSrr, X86_INS_VANDPS: vandps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPDZ128rm, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPDZ128rmb, X86_INS_VBLENDMPD: vblendmpd	{${src2}{1to2}, $src1, $dst|$dst, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPDZ128rmbk, X86_INS_VBLENDMPD: vblendmpd	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPDZ128rmk, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPDZ128rmkz, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPDZ128rr, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPDZ128rrk, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPDZ128rrkz, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPDZ256rm, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPDZ256rmb, X86_INS_VBLENDMPD: vblendmpd	{${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPDZ256rmbk, X86_INS_VBLENDMPD: vblendmpd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPDZ256rmk, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPDZ256rmkz, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPDZ256rr, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPDZ256rrk, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPDZ256rrkz, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPDZrm, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPDZrmb, X86_INS_VBLENDMPD: vblendmpd	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPDZrmbk, X86_INS_VBLENDMPD: vblendmpd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPDZrmk, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPDZrmkz, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPDZrr, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPDZrrk, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPDZrrkz, X86_INS_VBLENDMPD: vblendmpd	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPSZ128rm, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPSZ128rmb, X86_INS_VBLENDMPS: vblendmps	{${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPSZ128rmbk, X86_INS_VBLENDMPS: vblendmps	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPSZ128rmk, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPSZ128rmkz, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPSZ128rr, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPSZ128rrk, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPSZ128rrkz, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPSZ256rm, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPSZ256rmb, X86_INS_VBLENDMPS: vblendmps	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPSZ256rmbk, X86_INS_VBLENDMPS: vblendmps	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPSZ256rmk, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPSZ256rmkz, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPSZ256rr, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPSZ256rrk, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPSZ256rrkz, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPSZrm, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPSZrmb, X86_INS_VBLENDMPS: vblendmps	{${src2}{1to16}, $src1, $dst|$dst, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPSZrmbk, X86_INS_VBLENDMPS: vblendmps	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPSZrmk, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPSZrmkz, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPSZrr, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPSZrrk, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDMPSZrrkz, X86_INS_VBLENDMPS: vblendmps	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDPDYrmi, X86_INS_VBLENDPD: vblendpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDPDYrri, X86_INS_VBLENDPD: vblendpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDPDrmi, X86_INS_VBLENDPD: vblendpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDPDrri, X86_INS_VBLENDPD: vblendpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDPSYrmi, X86_INS_VBLENDPS: vblendps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDPSYrri, X86_INS_VBLENDPS: vblendps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDPSrmi, X86_INS_VBLENDPS: vblendps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDPSrri, X86_INS_VBLENDPS: vblendps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDVPDYrm, X86_INS_VBLENDVPD: vblendvpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDVPDYrr, X86_INS_VBLENDVPD: vblendvpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDVPDrm, X86_INS_VBLENDVPD: vblendvpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDVPDrr, X86_INS_VBLENDVPD: vblendvpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDVPSYrm, X86_INS_VBLENDVPS: vblendvps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDVPSYrr, X86_INS_VBLENDVPS: vblendvps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDVPSrm, X86_INS_VBLENDVPS: vblendvps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBLENDVPSrr, X86_INS_VBLENDVPS: vblendvps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTF128, X86_INS_VBROADCASTF128: vbroadcastf128	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTI32X4krm, X86_INS_VBROADCASTI32X4: vbroadcasti32x4	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTI32X4rm, X86_INS_VBROADCASTI32X4: vbroadcasti32x4	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTI64X4krm, X86_INS_VBROADCASTI64X4: vbroadcasti64x4	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTI64X4rm, X86_INS_VBROADCASTI64X4: vbroadcasti64x4	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSDYrm, X86_INS_VBROADCASTSD: vbroadcastsd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSDYrr, X86_INS_VBROADCASTSD: vbroadcastsd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSDZ256m, X86_INS_VBROADCASTSD: vbroadcastsd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSDZ256mk, X86_INS_VBROADCASTSD: vbroadcastsd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSDZ256mkz, X86_INS_VBROADCASTSD: vbroadcastsd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSDZ256r, X86_INS_VBROADCASTSD: vbroadcastsd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSDZ256rk, X86_INS_VBROADCASTSD: vbroadcastsd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSDZ256rkz, X86_INS_VBROADCASTSD: vbroadcastsd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSDZm, X86_INS_VBROADCASTSD: vbroadcastsd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSDZmk, X86_INS_VBROADCASTSD: vbroadcastsd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSDZmkz, X86_INS_VBROADCASTSD: vbroadcastsd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSDZr, X86_INS_VBROADCASTSD: vbroadcastsd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSDZrk, X86_INS_VBROADCASTSD: vbroadcastsd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSDZrkz, X86_INS_VBROADCASTSD: vbroadcastsd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSSYrm, X86_INS_VBROADCASTSS: vbroadcastss	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSSYrr, X86_INS_VBROADCASTSS: vbroadcastss	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSSZ128m, X86_INS_VBROADCASTSS: vbroadcastss	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSSZ128mk, X86_INS_VBROADCASTSS: vbroadcastss	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSSZ128mkz, X86_INS_VBROADCASTSS: vbroadcastss	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSSZ128r, X86_INS_VBROADCASTSS: vbroadcastss	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSSZ128rk, X86_INS_VBROADCASTSS: vbroadcastss	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSSZ128rkz, X86_INS_VBROADCASTSS: vbroadcastss	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSSZ256m, X86_INS_VBROADCASTSS: vbroadcastss	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSSZ256mk, X86_INS_VBROADCASTSS: vbroadcastss	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSSZ256mkz, X86_INS_VBROADCASTSS: vbroadcastss	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSSZ256r, X86_INS_VBROADCASTSS: vbroadcastss	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSSZ256rk, X86_INS_VBROADCASTSS: vbroadcastss	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSSZ256rkz, X86_INS_VBROADCASTSS: vbroadcastss	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSSZm, X86_INS_VBROADCASTSS: vbroadcastss	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSSZmk, X86_INS_VBROADCASTSS: vbroadcastss	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSSZmkz, X86_INS_VBROADCASTSS: vbroadcastss	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSSZr, X86_INS_VBROADCASTSS: vbroadcastss	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSSZrk, X86_INS_VBROADCASTSS: vbroadcastss	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSSZrkz, X86_INS_VBROADCASTSS: vbroadcastss	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSSrm, X86_INS_VBROADCASTSS: vbroadcastss	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VBROADCASTSSrr, X86_INS_VBROADCASTSS: vbroadcastss	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPDYrmi, X86_INS_VCMPPD: vcmp${cc}pd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPDYrmi_alt, X86_INS_VCMPPD: vcmppd	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPDYrri, X86_INS_VCMPPD: vcmp${cc}pd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPDYrri_alt, X86_INS_VCMPPD: vcmppd	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPDZrmi, X86_INS_VCMPPD: vcmp${cc}pd	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPDZrmi_alt, X86_INS_VCMPPD: vcmppd	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPDZrri, X86_INS_VCMPPD: vcmp${cc}pd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPDZrri_alt, X86_INS_VCMPPD: vcmppd	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPDZrrib, X86_INS_VCMPPD: vcmp${cc}pd	{{sae}, $src2, $src1, $dst|$dst, $src1, $src2, {sae}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPDZrrib_alt, X86_INS_VCMPPD: vcmppd	{{sae}, $cc, $src2, $src1, $dst|$dst, $src1, $src2, $cc, {sae}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPDrmi, X86_INS_VCMPPD: vcmp${cc}pd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPDrmi_alt, X86_INS_VCMPPD: vcmppd	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPDrri, X86_INS_VCMPPD: vcmp${cc}pd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPDrri_alt, X86_INS_VCMPPD: vcmppd	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPSYrmi, X86_INS_VCMPPS: vcmp${cc}ps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPSYrmi_alt, X86_INS_VCMPPS: vcmpps	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPSYrri, X86_INS_VCMPPS: vcmp${cc}ps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPSYrri_alt, X86_INS_VCMPPS: vcmpps	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPSZrmi, X86_INS_VCMPPS: vcmp${cc}ps	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPSZrmi_alt, X86_INS_VCMPPS: vcmpps	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPSZrri, X86_INS_VCMPPS: vcmp${cc}ps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPSZrri_alt, X86_INS_VCMPPS: vcmpps	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPSZrrib, X86_INS_VCMPPS: vcmp${cc}ps	{{sae}, $src2, $src1, $dst|$dst, $src1, $src2, {sae}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPSZrrib_alt, X86_INS_VCMPPS: vcmpps	{{sae}, $cc, $src2, $src1, $dst|$dst, $src1, $src2, $cc, {sae}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPSrmi, X86_INS_VCMPPS: vcmp${cc}ps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPSrmi_alt, X86_INS_VCMPPS: vcmpps	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPSrri, X86_INS_VCMPPS: vcmp${cc}ps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPPSrri_alt, X86_INS_VCMPPS: vcmpps	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPSDZrm, X86_INS_VCMPSD: vcmp${cc}sd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPSDZrmi_alt, X86_INS_VCMPSD: vcmpsd	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VCMPSDZrr, X86_INS_VCMPSD: vcmp${cc}sd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPSDZrri_alt, X86_INS_VCMPSD: vcmpsd	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VCMPSDrm, X86_INS_VCMPSD: vcmp${cc}sd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPSDrm_alt, X86_INS_VCMPSD: vcmpsd	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPSDrr, X86_INS_VCMPSD: vcmp${cc}sd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPSDrr_alt, X86_INS_VCMPSD: vcmpsd	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPSSZrm, X86_INS_VCMPSS: vcmp${cc}ss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPSSZrmi_alt, X86_INS_VCMPSS: vcmpss	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VCMPSSZrr, X86_INS_VCMPSS: vcmp${cc}ss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPSSZrri_alt, X86_INS_VCMPSS: vcmpss	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VCMPSSrm, X86_INS_VCMPSS: vcmp${cc}ss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPSSrm_alt, X86_INS_VCMPSS: vcmpss	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPSSrr, X86_INS_VCMPSS: vcmp${cc}ss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCMPSSrr_alt, X86_INS_VCMPSS: vcmpss	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCOMISDZrm, X86_INS_VCOMISD: vcomisd	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCOMISDZrr, X86_INS_VCOMISD: vcomisd	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCOMISDrm, X86_INS_VCOMISD: vcomisd	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCOMISDrr, X86_INS_VCOMISD: vcomisd	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCOMISSZrm, X86_INS_VCOMISS: vcomiss	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCOMISSZrr, X86_INS_VCOMISS: vcomiss	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCOMISSrm, X86_INS_VCOMISS: vcomiss	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCOMISSrr, X86_INS_VCOMISS: vcomiss	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCOMPRESSPDZ128mrk, X86_INS_VCOMPRESSPD: vcompresspd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCOMPRESSPDZ128rrk, X86_INS_VCOMPRESSPD: vcompresspd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCOMPRESSPDZ128rrkz, X86_INS_VCOMPRESSPD: vcompresspd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCOMPRESSPDZ256mrk, X86_INS_VCOMPRESSPD: vcompresspd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCOMPRESSPDZ256rrk, X86_INS_VCOMPRESSPD: vcompresspd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCOMPRESSPDZ256rrkz, X86_INS_VCOMPRESSPD: vcompresspd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCOMPRESSPDZmrk, X86_INS_VCOMPRESSPD: vcompresspd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCOMPRESSPDZrrk, X86_INS_VCOMPRESSPD: vcompresspd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCOMPRESSPDZrrkz, X86_INS_VCOMPRESSPD: vcompresspd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCOMPRESSPSZ128mrk, X86_INS_VCOMPRESSPS: vcompressps	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCOMPRESSPSZ128rrk, X86_INS_VCOMPRESSPS: vcompressps	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCOMPRESSPSZ128rrkz, X86_INS_VCOMPRESSPS: vcompressps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCOMPRESSPSZ256mrk, X86_INS_VCOMPRESSPS: vcompressps	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCOMPRESSPSZ256rrk, X86_INS_VCOMPRESSPS: vcompressps	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCOMPRESSPSZ256rrkz, X86_INS_VCOMPRESSPS: vcompressps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCOMPRESSPSZmrk, X86_INS_VCOMPRESSPS: vcompressps	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCOMPRESSPSZrrk, X86_INS_VCOMPRESSPS: vcompressps	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCOMPRESSPSZrrkz, X86_INS_VCOMPRESSPS: vcompressps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTDQ2PDYrm, X86_INS_VCVTDQ2PD: vcvtdq2pd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTDQ2PDYrr, X86_INS_VCVTDQ2PD: vcvtdq2pd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTDQ2PDZrm, X86_INS_VCVTDQ2PD: vcvtdq2pd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTDQ2PDZrr, X86_INS_VCVTDQ2PD: vcvtdq2pd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTDQ2PDrm, X86_INS_VCVTDQ2PD: vcvtdq2pd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTDQ2PDrr, X86_INS_VCVTDQ2PD: vcvtdq2pd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTDQ2PSYrm, X86_INS_VCVTDQ2PS: vcvtdq2ps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTDQ2PSYrr, X86_INS_VCVTDQ2PS: vcvtdq2ps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTDQ2PSZrm, X86_INS_VCVTDQ2PS: vcvtdq2ps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTDQ2PSZrr, X86_INS_VCVTDQ2PS: vcvtdq2ps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTDQ2PSZrrb, X86_INS_VCVTDQ2PS: vcvtdq2ps	$dst, $src, $rc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTDQ2PSrm, X86_INS_VCVTDQ2PS: vcvtdq2ps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTDQ2PSrr, X86_INS_VCVTDQ2PS: vcvtdq2ps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPD2DQXrm, X86_INS_VCVTPD2DQX: vcvtpd2dqx	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPD2DQYrm, X86_INS_VCVTPD2DQ: vcvtpd2dq{y}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPD2DQYrr, X86_INS_VCVTPD2DQ: vcvtpd2dq{y}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPD2DQZrm, X86_INS_VCVTPD2DQ: vcvtpd2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPD2DQZrr, X86_INS_VCVTPD2DQ: vcvtpd2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPD2DQZrrb, X86_INS_VCVTPD2DQ: vcvtpd2dq	$dst, $src, $rc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPD2DQrr, X86_INS_VCVTPD2DQ: vcvtpd2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPD2PSXrm, X86_INS_VCVTPD2PSX: vcvtpd2psx	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPD2PSYrm, X86_INS_VCVTPD2PS: vcvtpd2ps{y}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPD2PSYrr, X86_INS_VCVTPD2PS: vcvtpd2ps{y}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPD2PSZrm, X86_INS_VCVTPD2PS: vcvtpd2ps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPD2PSZrr, X86_INS_VCVTPD2PS: vcvtpd2ps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPD2PSZrrb, X86_INS_VCVTPD2PS: vcvtpd2ps	$dst, $src, $rc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPD2PSrr, X86_INS_VCVTPD2PS: vcvtpd2ps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPD2UDQZrm, X86_INS_VCVTPD2UDQ: vcvtpd2udq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPD2UDQZrr, X86_INS_VCVTPD2UDQ: vcvtpd2udq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPD2UDQZrrb, X86_INS_VCVTPD2UDQ: vcvtpd2udq	$dst, $src, $rc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPH2PSYrm, X86_INS_VCVTPH2PS: vcvtph2ps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPH2PSYrr, X86_INS_VCVTPH2PS: vcvtph2ps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPH2PSZrm, X86_INS_VCVTPH2PS: vcvtph2ps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPH2PSZrr, X86_INS_VCVTPH2PS: vcvtph2ps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPH2PSrm, X86_INS_VCVTPH2PS: vcvtph2ps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPH2PSrr, X86_INS_VCVTPH2PS: vcvtph2ps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPS2DQYrm, X86_INS_VCVTPS2DQ: vcvtps2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPS2DQYrr, X86_INS_VCVTPS2DQ: vcvtps2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPS2DQZrm, X86_INS_VCVTPS2DQ: vcvtps2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPS2DQZrr, X86_INS_VCVTPS2DQ: vcvtps2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPS2DQZrrb, X86_INS_VCVTPS2DQ: vcvtps2dq	$dst, $src, $rc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPS2DQrm, X86_INS_VCVTPS2DQ: vcvtps2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPS2DQrr, X86_INS_VCVTPS2DQ: vcvtps2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPS2PDYrm, X86_INS_VCVTPS2PD: vcvtps2pd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPS2PDYrr, X86_INS_VCVTPS2PD: vcvtps2pd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPS2PDZrm, X86_INS_VCVTPS2PD: vcvtps2pd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPS2PDZrr, X86_INS_VCVTPS2PD: vcvtps2pd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPS2PDrm, X86_INS_VCVTPS2PD: vcvtps2pd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPS2PDrr, X86_INS_VCVTPS2PD: vcvtps2pd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPS2PHYmr, X86_INS_VCVTPS2PH: vcvtps2ph	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPS2PHYrr, X86_INS_VCVTPS2PH: vcvtps2ph	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPS2PHZmr, X86_INS_VCVTPS2PH: vcvtps2ph	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPS2PHZrr, X86_INS_VCVTPS2PH: vcvtps2ph	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPS2PHmr, X86_INS_VCVTPS2PH: vcvtps2ph	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPS2PHrr, X86_INS_VCVTPS2PH: vcvtps2ph	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPS2UDQZrm, X86_INS_VCVTPS2UDQ: vcvtps2udq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPS2UDQZrr, X86_INS_VCVTPS2UDQ: vcvtps2udq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTPS2UDQZrrb, X86_INS_VCVTPS2UDQ: vcvtps2udq	$dst, $src, $rc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSD2SI64Zrm, X86_INS_VCVTSD2SI: vcvtsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_VCVTSD2SI64Zrr, X86_INS_VCVTSD2SI: vcvtsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSD2SI64rm, X86_INS_VCVTSD2SI: vcvtsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_VCVTSD2SI64rr, X86_INS_VCVTSD2SI: vcvtsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSD2SIZrm, X86_INS_VCVTSD2SI: vcvtsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_VCVTSD2SIZrr, X86_INS_VCVTSD2SI: vcvtsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSD2SIrm, X86_INS_VCVTSD2SI: vcvtsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_VCVTSD2SIrr, X86_INS_VCVTSD2SI: vcvtsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSD2SSZrm, X86_INS_VCVTSD2SS: vcvtsd2ss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSD2SSZrr, X86_INS_VCVTSD2SS: vcvtsd2ss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSD2SSrm, X86_INS_VCVTSD2SS: vcvtsd2ss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSD2SSrr, X86_INS_VCVTSD2SS: vcvtsd2ss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSD2USI64Zrm, X86_INS_VCVTSD2USI: vcvtsd2usi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_VCVTSD2USI64Zrr, X86_INS_VCVTSD2USI: vcvtsd2usi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSD2USIZrm, X86_INS_VCVTSD2USI: vcvtsd2usi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_VCVTSD2USIZrr, X86_INS_VCVTSD2USI: vcvtsd2usi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSI2SD64rm, X86_INS_VCVTSI2SD: vcvtsi2sd{q}	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSI2SD64rr, X86_INS_VCVTSI2SD: vcvtsi2sd{q}	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSI2SDZrm, X86_INS_VCVTSI2SD: vcvtsi2sd{l}	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSI2SDZrr, X86_INS_VCVTSI2SD: vcvtsi2sd{l}	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSI2SDrm, X86_INS_VCVTSI2SD: vcvtsi2sd{l}	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSI2SDrr, X86_INS_VCVTSI2SD: vcvtsi2sd{l}	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSI2SS64rm, X86_INS_VCVTSI2SS: vcvtsi2ss{q}	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSI2SS64rr, X86_INS_VCVTSI2SS: vcvtsi2ss{q}	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSI2SSZrm, X86_INS_VCVTSI2SS: vcvtsi2ss{l}	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSI2SSZrr, X86_INS_VCVTSI2SS: vcvtsi2ss{l}	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSI2SSrm, X86_INS_VCVTSI2SS: vcvtsi2ss{l}	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSI2SSrr, X86_INS_VCVTSI2SS: vcvtsi2ss{l}	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSI642SDZrm, X86_INS_VCVTSI2SD: vcvtsi2sd{q}	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSI642SDZrr, X86_INS_VCVTSI2SD: vcvtsi2sd{q}	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSI642SSZrm, X86_INS_VCVTSI2SS: vcvtsi2ss{q}	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSI642SSZrr, X86_INS_VCVTSI2SS: vcvtsi2ss{q}	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSS2SDZrm, X86_INS_VCVTSS2SD: vcvtss2sd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSS2SDZrr, X86_INS_VCVTSS2SD: vcvtss2sd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSS2SDrm, X86_INS_VCVTSS2SD: vcvtss2sd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSS2SDrr, X86_INS_VCVTSS2SD: vcvtss2sd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSS2SI64Zrm, X86_INS_VCVTSS2SI: vcvtss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_VCVTSS2SI64Zrr, X86_INS_VCVTSS2SI: vcvtss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSS2SI64rm, X86_INS_VCVTSS2SI: vcvtss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_VCVTSS2SI64rr, X86_INS_VCVTSS2SI: vcvtss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSS2SIZrm, X86_INS_VCVTSS2SI: vcvtss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_VCVTSS2SIZrr, X86_INS_VCVTSS2SI: vcvtss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSS2SIrm, X86_INS_VCVTSS2SI: vcvtss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_VCVTSS2SIrr, X86_INS_VCVTSS2SI: vcvtss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSS2USI64Zrm, X86_INS_VCVTSS2USI: vcvtss2usi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_VCVTSS2USI64Zrr, X86_INS_VCVTSS2USI: vcvtss2usi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTSS2USIZrm, X86_INS_VCVTSS2USI: vcvtss2usi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_VCVTSS2USIZrr, X86_INS_VCVTSS2USI: vcvtss2usi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTPD2DQXrm, X86_INS_VCVTTPD2DQX: vcvttpd2dqx	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTPD2DQYrm, X86_INS_VCVTTPD2DQ: vcvttpd2dq{y}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTPD2DQYrr, X86_INS_VCVTTPD2DQ: vcvttpd2dq{y}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTPD2DQZrm, X86_INS_VCVTTPD2DQ: vcvttpd2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTPD2DQZrr, X86_INS_VCVTTPD2DQ: vcvttpd2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTPD2DQrr, X86_INS_VCVTTPD2DQ: vcvttpd2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTPD2UDQZrm, X86_INS_VCVTTPD2UDQ: vcvttpd2udq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTPD2UDQZrr, X86_INS_VCVTTPD2UDQ: vcvttpd2udq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTPS2DQYrm, X86_INS_VCVTTPS2DQ: vcvttps2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTPS2DQYrr, X86_INS_VCVTTPS2DQ: vcvttps2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTPS2DQZrm, X86_INS_VCVTTPS2DQ: vcvttps2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTPS2DQZrr, X86_INS_VCVTTPS2DQ: vcvttps2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTPS2DQrm, X86_INS_VCVTTPS2DQ: vcvttps2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTPS2DQrr, X86_INS_VCVTTPS2DQ: vcvttps2dq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTPS2UDQZrm, X86_INS_VCVTTPS2UDQ: vcvttps2udq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTPS2UDQZrr, X86_INS_VCVTTPS2UDQ: vcvttps2udq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTSD2SI64Zrm, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTSD2SI64Zrr, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTSD2SI64rm, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTSD2SI64rr, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTSD2SIZrm, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTSD2SIZrr, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTSD2SIrm, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTSD2SIrr, X86_INS_VCVTTSD2SI: vcvttsd2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTSD2USI64Zrm, X86_INS_VCVTTSD2USI: vcvttsd2usi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTSD2USI64Zrr, X86_INS_VCVTTSD2USI: vcvttsd2usi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTSD2USIZrm, X86_INS_VCVTTSD2USI: vcvttsd2usi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTSD2USIZrr, X86_INS_VCVTTSD2USI: vcvttsd2usi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTSS2SI64Zrm, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTSS2SI64Zrr, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTSS2SI64rm, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTSS2SI64rr, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTSS2SIZrm, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTSS2SIZrr, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTSS2SIrm, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTSS2SIrr, X86_INS_VCVTTSS2SI: vcvttss2si	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTSS2USI64Zrm, X86_INS_VCVTTSS2USI: vcvttss2usi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTSS2USI64Zrr, X86_INS_VCVTTSS2USI: vcvttss2usi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTSS2USIZrm, X86_INS_VCVTTSS2USI: vcvttss2usi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTTSS2USIZrr, X86_INS_VCVTTSS2USI: vcvttss2usi	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTUDQ2PDZrm, X86_INS_VCVTUDQ2PD: vcvtudq2pd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTUDQ2PDZrr, X86_INS_VCVTUDQ2PD: vcvtudq2pd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTUDQ2PSZrm, X86_INS_VCVTUDQ2PS: vcvtudq2ps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTUDQ2PSZrr, X86_INS_VCVTUDQ2PS: vcvtudq2ps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTUDQ2PSZrrb, X86_INS_VCVTUDQ2PS: vcvtudq2ps	$dst, $src, $rc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTUSI2SDZrm, X86_INS_VCVTUSI2SD: vcvtusi2sd{l}	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTUSI2SDZrr, X86_INS_VCVTUSI2SD: vcvtusi2sd{l}	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTUSI2SSZrm, X86_INS_VCVTUSI2SS: vcvtusi2ss{l}	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTUSI2SSZrr, X86_INS_VCVTUSI2SS: vcvtusi2ss{l}	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTUSI642SDZrm, X86_INS_VCVTUSI2SD: vcvtusi2sd{q}	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTUSI642SDZrr, X86_INS_VCVTUSI2SD: vcvtusi2sd{q}	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTUSI642SSZrm, X86_INS_VCVTUSI2SS: vcvtusi2ss{q}	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VCVTUSI642SSZrr, X86_INS_VCVTUSI2SS: vcvtusi2ss{q}	$dst, $src1, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDYrm, X86_INS_VDIVPD: vdivpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDYrr, X86_INS_VDIVPD: vdivpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZ128rm, X86_INS_VDIVPD: vdivpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZ128rmb, X86_INS_VDIVPD: vdivpd	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZ128rmbk, X86_INS_VDIVPD: vdivpd	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZ128rmbkz, X86_INS_VDIVPD: vdivpd	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZ128rmk, X86_INS_VDIVPD: vdivpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZ128rmkz, X86_INS_VDIVPD: vdivpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZ128rr, X86_INS_VDIVPD: vdivpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZ128rrk, X86_INS_VDIVPD: vdivpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZ128rrkz, X86_INS_VDIVPD: vdivpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZ256rm, X86_INS_VDIVPD: vdivpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZ256rmb, X86_INS_VDIVPD: vdivpd	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZ256rmbk, X86_INS_VDIVPD: vdivpd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZ256rmbkz, X86_INS_VDIVPD: vdivpd	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZ256rmk, X86_INS_VDIVPD: vdivpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZ256rmkz, X86_INS_VDIVPD: vdivpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZ256rr, X86_INS_VDIVPD: vdivpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZ256rrk, X86_INS_VDIVPD: vdivpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZ256rrkz, X86_INS_VDIVPD: vdivpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZrb, X86_INS_VDIVPD: vdivpd	$dst , $src1, $src2, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VDIVPDZrbk, X86_INS_VDIVPD: vdivpd	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZrbkz, X86_INS_VDIVPD: vdivpd	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZrm, X86_INS_VDIVPD: vdivpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZrmb, X86_INS_VDIVPD: vdivpd	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZrmbk, X86_INS_VDIVPD: vdivpd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZrmbkz, X86_INS_VDIVPD: vdivpd	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZrmk, X86_INS_VDIVPD: vdivpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZrmkz, X86_INS_VDIVPD: vdivpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZrr, X86_INS_VDIVPD: vdivpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZrrk, X86_INS_VDIVPD: vdivpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDZrrkz, X86_INS_VDIVPD: vdivpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDrm, X86_INS_VDIVPD: vdivpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPDrr, X86_INS_VDIVPD: vdivpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSYrm, X86_INS_VDIVPS: vdivps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSYrr, X86_INS_VDIVPS: vdivps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZ128rm, X86_INS_VDIVPS: vdivps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZ128rmb, X86_INS_VDIVPS: vdivps	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZ128rmbk, X86_INS_VDIVPS: vdivps	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZ128rmbkz, X86_INS_VDIVPS: vdivps	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZ128rmk, X86_INS_VDIVPS: vdivps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZ128rmkz, X86_INS_VDIVPS: vdivps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZ128rr, X86_INS_VDIVPS: vdivps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZ128rrk, X86_INS_VDIVPS: vdivps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZ128rrkz, X86_INS_VDIVPS: vdivps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZ256rm, X86_INS_VDIVPS: vdivps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZ256rmb, X86_INS_VDIVPS: vdivps	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZ256rmbk, X86_INS_VDIVPS: vdivps	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZ256rmbkz, X86_INS_VDIVPS: vdivps	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZ256rmk, X86_INS_VDIVPS: vdivps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZ256rmkz, X86_INS_VDIVPS: vdivps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZ256rr, X86_INS_VDIVPS: vdivps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZ256rrk, X86_INS_VDIVPS: vdivps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZ256rrkz, X86_INS_VDIVPS: vdivps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZrb, X86_INS_VDIVPS: vdivps	$dst , $src1, $src2, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VDIVPSZrbk, X86_INS_VDIVPS: vdivps	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZrbkz, X86_INS_VDIVPS: vdivps	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZrm, X86_INS_VDIVPS: vdivps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZrmb, X86_INS_VDIVPS: vdivps	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZrmbk, X86_INS_VDIVPS: vdivps	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZrmbkz, X86_INS_VDIVPS: vdivps	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZrmk, X86_INS_VDIVPS: vdivps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZrmkz, X86_INS_VDIVPS: vdivps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZrr, X86_INS_VDIVPS: vdivps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZrrk, X86_INS_VDIVPS: vdivps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSZrrkz, X86_INS_VDIVPS: vdivps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSrm, X86_INS_VDIVPS: vdivps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVPSrr, X86_INS_VDIVPS: vdivps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSDZrm, X86_INS_VDIVSD: vdivsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSDZrm_Int, X86_INS_VDIVSD: vdivsd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSDZrm_Intk, X86_INS_VDIVSD: vdivsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSDZrm_Intkz, X86_INS_VDIVSD: vdivsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSDZrr, X86_INS_VDIVSD: vdivsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSDZrr_Int, X86_INS_VDIVSD: vdivsd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSDZrr_Intk, X86_INS_VDIVSD: vdivsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSDZrr_Intkz, X86_INS_VDIVSD: vdivsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSDZrrb, X86_INS_VDIVSD: vdivsd	$dst , $src1, $src2, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VDIVSDZrrbk, X86_INS_VDIVSD: vdivsd	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSDZrrbkz, X86_INS_VDIVSD: vdivsd	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSDrm, X86_INS_VDIVSD: vdivsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSDrm_Int, X86_INS_VDIVSD: vdivsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSDrr, X86_INS_VDIVSD: vdivsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSDrr_Int, X86_INS_VDIVSD: vdivsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSSZrm, X86_INS_VDIVSS: vdivss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSSZrm_Int, X86_INS_VDIVSS: vdivss	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSSZrm_Intk, X86_INS_VDIVSS: vdivss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSSZrm_Intkz, X86_INS_VDIVSS: vdivss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSSZrr, X86_INS_VDIVSS: vdivss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSSZrr_Int, X86_INS_VDIVSS: vdivss	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSSZrr_Intk, X86_INS_VDIVSS: vdivss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSSZrr_Intkz, X86_INS_VDIVSS: vdivss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSSZrrb, X86_INS_VDIVSS: vdivss	$dst , $src1, $src2, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VDIVSSZrrbk, X86_INS_VDIVSS: vdivss	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSSZrrbkz, X86_INS_VDIVSS: vdivss	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSSrm, X86_INS_VDIVSS: vdivss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSSrm_Int, X86_INS_VDIVSS: vdivss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSSrr, X86_INS_VDIVSS: vdivss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDIVSSrr_Int, X86_INS_VDIVSS: vdivss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDPPDrmi, X86_INS_VDPPD: vdppd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDPPDrri, X86_INS_VDPPD: vdppd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDPPSYrmi, X86_INS_VDPPS: vdpps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDPPSYrri, X86_INS_VDPPS: vdpps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDPPSrmi, X86_INS_VDPPS: vdpps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VDPPSrri, X86_INS_VDPPS: vdpps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VERRm, X86_INS_VERR: verr	$seg */
+	X86_EFLAGS_MODIFY_ZF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_VERRr, X86_INS_VERR: verr	$seg */
+	X86_EFLAGS_MODIFY_ZF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_VERWm, X86_INS_VERW: verw	$seg */
+	X86_EFLAGS_MODIFY_ZF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_VERWr, X86_INS_VERW: verw	$seg */
+	X86_EFLAGS_MODIFY_ZF,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_VEXP2PDm, X86_INS_VEXP2PD: vexp2pd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VEXP2PDmb, X86_INS_VEXP2PD: vexp2pd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VEXP2PDmbk, X86_INS_VEXP2PD: vexp2pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXP2PDmbkz, X86_INS_VEXP2PD: vexp2pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXP2PDmk, X86_INS_VEXP2PD: vexp2pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXP2PDmkz, X86_INS_VEXP2PD: vexp2pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXP2PDr, X86_INS_VEXP2PD: vexp2pd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VEXP2PDrb, X86_INS_VEXP2PD: vexp2pd	{$src, $dst {sae}|$dst {sae}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXP2PDrbk, X86_INS_VEXP2PD: vexp2pd	{$src, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXP2PDrbkz, X86_INS_VEXP2PD: vexp2pd	{$src, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXP2PDrk, X86_INS_VEXP2PD: vexp2pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXP2PDrkz, X86_INS_VEXP2PD: vexp2pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXP2PSm, X86_INS_VEXP2PS: vexp2ps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VEXP2PSmb, X86_INS_VEXP2PS: vexp2ps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VEXP2PSmbk, X86_INS_VEXP2PS: vexp2ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXP2PSmbkz, X86_INS_VEXP2PS: vexp2ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXP2PSmk, X86_INS_VEXP2PS: vexp2ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXP2PSmkz, X86_INS_VEXP2PS: vexp2ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXP2PSr, X86_INS_VEXP2PS: vexp2ps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VEXP2PSrb, X86_INS_VEXP2PS: vexp2ps	{$src, $dst {sae}|$dst {sae}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXP2PSrbk, X86_INS_VEXP2PS: vexp2ps	{$src, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXP2PSrbkz, X86_INS_VEXP2PS: vexp2ps	{$src, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXP2PSrk, X86_INS_VEXP2PS: vexp2ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXP2PSrkz, X86_INS_VEXP2PS: vexp2ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXPANDPDZ128rmk, X86_INS_VEXPANDPD: vexpandpd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXPANDPDZ128rmkz, X86_INS_VEXPANDPD: vexpandpd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXPANDPDZ128rrk, X86_INS_VEXPANDPD: vexpandpd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXPANDPDZ128rrkz, X86_INS_VEXPANDPD: vexpandpd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXPANDPDZ256rmk, X86_INS_VEXPANDPD: vexpandpd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXPANDPDZ256rmkz, X86_INS_VEXPANDPD: vexpandpd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXPANDPDZ256rrk, X86_INS_VEXPANDPD: vexpandpd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXPANDPDZ256rrkz, X86_INS_VEXPANDPD: vexpandpd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXPANDPDZrmk, X86_INS_VEXPANDPD: vexpandpd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXPANDPDZrmkz, X86_INS_VEXPANDPD: vexpandpd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXPANDPDZrrk, X86_INS_VEXPANDPD: vexpandpd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXPANDPDZrrkz, X86_INS_VEXPANDPD: vexpandpd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXPANDPSZ128rmk, X86_INS_VEXPANDPS: vexpandps	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXPANDPSZ128rmkz, X86_INS_VEXPANDPS: vexpandps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXPANDPSZ128rrk, X86_INS_VEXPANDPS: vexpandps	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXPANDPSZ128rrkz, X86_INS_VEXPANDPS: vexpandps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXPANDPSZ256rmk, X86_INS_VEXPANDPS: vexpandps	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXPANDPSZ256rmkz, X86_INS_VEXPANDPS: vexpandps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXPANDPSZ256rrk, X86_INS_VEXPANDPS: vexpandps	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXPANDPSZ256rrkz, X86_INS_VEXPANDPS: vexpandps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXPANDPSZrmk, X86_INS_VEXPANDPS: vexpandps	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXPANDPSZrmkz, X86_INS_VEXPANDPS: vexpandps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXPANDPSZrrk, X86_INS_VEXPANDPS: vexpandps	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXPANDPSZrrkz, X86_INS_VEXPANDPS: vexpandps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXTRACTF128mr, X86_INS_VEXTRACTF128: vextractf128	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VEXTRACTF128rr, X86_INS_VEXTRACTF128: vextractf128	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXTRACTF32x4rm, X86_INS_VEXTRACTF32X4: vextractf32x4	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VEXTRACTF32x4rr, X86_INS_VEXTRACTF32X4: vextractf32x4	$dst , $src1, $idx */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VEXTRACTF32x4rrk, X86_INS_VEXTRACTF32X4: vextractf32x4	{$idx, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $idx} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXTRACTF32x4rrkz, X86_INS_VEXTRACTF32X4: vextractf32x4	{$idx, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $idx} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXTRACTF64x4rm, X86_INS_VEXTRACTF64X4: vextractf64x4	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VEXTRACTF64x4rr, X86_INS_VEXTRACTF64X4: vextractf64x4	$dst , $src1, $idx */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VEXTRACTF64x4rrk, X86_INS_VEXTRACTF64X4: vextractf64x4	{$idx, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $idx} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXTRACTF64x4rrkz, X86_INS_VEXTRACTF64X4: vextractf64x4	{$idx, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $idx} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXTRACTI128mr, X86_INS_VEXTRACTI128: vextracti128	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VEXTRACTI128rr, X86_INS_VEXTRACTI128: vextracti128	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXTRACTI32x4rm, X86_INS_VEXTRACTI32X4: vextracti32x4	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VEXTRACTI32x4rr, X86_INS_VEXTRACTI32X4: vextracti32x4	$dst , $src1, $idx */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VEXTRACTI32x4rrk, X86_INS_VEXTRACTI32X4: vextracti32x4	{$idx, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $idx} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXTRACTI32x4rrkz, X86_INS_VEXTRACTI32X4: vextracti32x4	{$idx, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $idx} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXTRACTI64x4rm, X86_INS_VEXTRACTI64X4: vextracti64x4	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VEXTRACTI64x4rr, X86_INS_VEXTRACTI64X4: vextracti64x4	$dst , $src1, $idx */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VEXTRACTI64x4rrk, X86_INS_VEXTRACTI64X4: vextracti64x4	{$idx, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $idx} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXTRACTI64x4rrkz, X86_INS_VEXTRACTI64X4: vextracti64x4	{$idx, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $idx} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VEXTRACTPSmr, X86_INS_VEXTRACTPS: vextractps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VEXTRACTPSrr, X86_INS_VEXTRACTPS: vextractps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VEXTRACTPSzmr, X86_INS_VEXTRACTPS: vextractps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VEXTRACTPSzrr, X86_INS_VEXTRACTPS: vextractps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADD132PDZ128m, X86_INS_VFMADD132PD: vfmadd132pd	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADD132PDZ128mb, X86_INS_VFMADD132PD: vfmadd132pd	{${src2}{1to2}, $src3, $dst|$dst, $src3, ${src2}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADD132PDZ256m, X86_INS_VFMADD132PD: vfmadd132pd	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADD132PDZ256mb, X86_INS_VFMADD132PD: vfmadd132pd	{${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADD132PDZm, X86_INS_VFMADD132PD: vfmadd132pd	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADD132PDZmb, X86_INS_VFMADD132PD: vfmadd132pd	{${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADD132PSZ128m, X86_INS_VFMADD132PS: vfmadd132ps	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADD132PSZ128mb, X86_INS_VFMADD132PS: vfmadd132ps	{${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADD132PSZ256m, X86_INS_VFMADD132PS: vfmadd132ps	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADD132PSZ256mb, X86_INS_VFMADD132PS: vfmadd132ps	{${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADD132PSZm, X86_INS_VFMADD132PS: vfmadd132ps	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADD132PSZmb, X86_INS_VFMADD132PS: vfmadd132ps	{${src2}{1to16}, $src3, $dst|$dst, $src3, ${src2}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPD4mr, X86_INS_VFMADDPD: vfmaddpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPD4mrY, X86_INS_VFMADDPD: vfmaddpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPD4rm, X86_INS_VFMADDPD: vfmaddpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPD4rmY, X86_INS_VFMADDPD: vfmaddpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPD4rr, X86_INS_VFMADDPD: vfmaddpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPD4rrY, X86_INS_VFMADDPD: vfmaddpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPD4rrY_REV, X86_INS_VFMADDPD: vfmaddpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPD4rr_REV, X86_INS_VFMADDPD: vfmaddpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ128v213rm, X86_INS_VFMADD213PD: vfmadd213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ128v213rmb, X86_INS_VFMADD213PD: vfmadd213pd	{${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ128v213rmbk, X86_INS_VFMADD213PD: vfmadd213pd	{${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ128v213rmbkz, X86_INS_VFMADD213PD: vfmadd213pd	{${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ128v213rmk, X86_INS_VFMADD213PD: vfmadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ128v213rmkz, X86_INS_VFMADD213PD: vfmadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ128v213rr, X86_INS_VFMADD213PD: vfmadd213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ128v213rrk, X86_INS_VFMADD213PD: vfmadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ128v213rrkz, X86_INS_VFMADD213PD: vfmadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ128v231rm, X86_INS_VFMADD231PD: vfmadd231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ128v231rmb, X86_INS_VFMADD231PD: vfmadd231pd	{${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ128v231rmbk, X86_INS_VFMADD231PD: vfmadd231pd	{${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ128v231rmbkz, X86_INS_VFMADD231PD: vfmadd231pd	{${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ128v231rmk, X86_INS_VFMADD231PD: vfmadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ128v231rmkz, X86_INS_VFMADD231PD: vfmadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ128v231rr, X86_INS_VFMADD231PD: vfmadd231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ128v231rrk, X86_INS_VFMADD231PD: vfmadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ128v231rrkz, X86_INS_VFMADD231PD: vfmadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ256v213rm, X86_INS_VFMADD213PD: vfmadd213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ256v213rmb, X86_INS_VFMADD213PD: vfmadd213pd	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ256v213rmbk, X86_INS_VFMADD213PD: vfmadd213pd	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ256v213rmbkz, X86_INS_VFMADD213PD: vfmadd213pd	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ256v213rmk, X86_INS_VFMADD213PD: vfmadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ256v213rmkz, X86_INS_VFMADD213PD: vfmadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ256v213rr, X86_INS_VFMADD213PD: vfmadd213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ256v213rrk, X86_INS_VFMADD213PD: vfmadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ256v213rrkz, X86_INS_VFMADD213PD: vfmadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ256v231rm, X86_INS_VFMADD231PD: vfmadd231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ256v231rmb, X86_INS_VFMADD231PD: vfmadd231pd	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ256v231rmbk, X86_INS_VFMADD231PD: vfmadd231pd	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ256v231rmbkz, X86_INS_VFMADD231PD: vfmadd231pd	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ256v231rmk, X86_INS_VFMADD231PD: vfmadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ256v231rmkz, X86_INS_VFMADD231PD: vfmadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ256v231rr, X86_INS_VFMADD231PD: vfmadd231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ256v231rrk, X86_INS_VFMADD231PD: vfmadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZ256v231rrkz, X86_INS_VFMADD231PD: vfmadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZv213rm, X86_INS_VFMADD213PD: vfmadd213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZv213rmb, X86_INS_VFMADD213PD: vfmadd213pd	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZv213rmbk, X86_INS_VFMADD213PD: vfmadd213pd	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZv213rmbkz, X86_INS_VFMADD213PD: vfmadd213pd	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZv213rmk, X86_INS_VFMADD213PD: vfmadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZv213rmkz, X86_INS_VFMADD213PD: vfmadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZv213rr, X86_INS_VFMADD213PD: vfmadd213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZv213rrb, X86_INS_VFMADD213PD: vfmadd213pd	$dst , $src2, $src3, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VFMADDPDZv213rrbk, X86_INS_VFMADD213PD: vfmadd213pd	{$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZv213rrbkz, X86_INS_VFMADD213PD: vfmadd213pd	{$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZv213rrk, X86_INS_VFMADD213PD: vfmadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZv213rrkz, X86_INS_VFMADD213PD: vfmadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZv231rm, X86_INS_VFMADD231PD: vfmadd231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZv231rmb, X86_INS_VFMADD231PD: vfmadd231pd	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZv231rmbk, X86_INS_VFMADD231PD: vfmadd231pd	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZv231rmbkz, X86_INS_VFMADD231PD: vfmadd231pd	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZv231rmk, X86_INS_VFMADD231PD: vfmadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZv231rmkz, X86_INS_VFMADD231PD: vfmadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZv231rr, X86_INS_VFMADD231PD: vfmadd231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZv231rrk, X86_INS_VFMADD231PD: vfmadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDZv231rrkz, X86_INS_VFMADD231PD: vfmadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDr132m, X86_INS_VFMADD132PD: vfmadd132pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDr132mY, X86_INS_VFMADD132PD: vfmadd132pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDr132r, X86_INS_VFMADD132PD: vfmadd132pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDr132rY, X86_INS_VFMADD132PD: vfmadd132pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDr213m, X86_INS_VFMADD213PD: vfmadd213pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDr213mY, X86_INS_VFMADD213PD: vfmadd213pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDr213r, X86_INS_VFMADD213PD: vfmadd213pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDr213rY, X86_INS_VFMADD213PD: vfmadd213pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDr231m, X86_INS_VFMADD231PD: vfmadd231pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDr231mY, X86_INS_VFMADD231PD: vfmadd231pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDr231r, X86_INS_VFMADD231PD: vfmadd231pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPDr231rY, X86_INS_VFMADD231PD: vfmadd231pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPS4mr, X86_INS_VFMADDPS: vfmaddps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPS4mrY, X86_INS_VFMADDPS: vfmaddps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPS4rm, X86_INS_VFMADDPS: vfmaddps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPS4rmY, X86_INS_VFMADDPS: vfmaddps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPS4rr, X86_INS_VFMADDPS: vfmaddps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPS4rrY, X86_INS_VFMADDPS: vfmaddps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPS4rrY_REV, X86_INS_VFMADDPS: vfmaddps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPS4rr_REV, X86_INS_VFMADDPS: vfmaddps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ128v213rm, X86_INS_VFMADD213PS: vfmadd213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ128v213rmb, X86_INS_VFMADD213PS: vfmadd213ps	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ128v213rmbk, X86_INS_VFMADD213PS: vfmadd213ps	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ128v213rmbkz, X86_INS_VFMADD213PS: vfmadd213ps	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ128v213rmk, X86_INS_VFMADD213PS: vfmadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ128v213rmkz, X86_INS_VFMADD213PS: vfmadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ128v213rr, X86_INS_VFMADD213PS: vfmadd213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ128v213rrk, X86_INS_VFMADD213PS: vfmadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ128v213rrkz, X86_INS_VFMADD213PS: vfmadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ128v231rm, X86_INS_VFMADD231PS: vfmadd231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ128v231rmb, X86_INS_VFMADD231PS: vfmadd231ps	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ128v231rmbk, X86_INS_VFMADD231PS: vfmadd231ps	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ128v231rmbkz, X86_INS_VFMADD231PS: vfmadd231ps	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ128v231rmk, X86_INS_VFMADD231PS: vfmadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ128v231rmkz, X86_INS_VFMADD231PS: vfmadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ128v231rr, X86_INS_VFMADD231PS: vfmadd231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ128v231rrk, X86_INS_VFMADD231PS: vfmadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ128v231rrkz, X86_INS_VFMADD231PS: vfmadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ256v213rm, X86_INS_VFMADD213PS: vfmadd213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ256v213rmb, X86_INS_VFMADD213PS: vfmadd213ps	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ256v213rmbk, X86_INS_VFMADD213PS: vfmadd213ps	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ256v213rmbkz, X86_INS_VFMADD213PS: vfmadd213ps	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ256v213rmk, X86_INS_VFMADD213PS: vfmadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ256v213rmkz, X86_INS_VFMADD213PS: vfmadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ256v213rr, X86_INS_VFMADD213PS: vfmadd213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ256v213rrk, X86_INS_VFMADD213PS: vfmadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ256v213rrkz, X86_INS_VFMADD213PS: vfmadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ256v231rm, X86_INS_VFMADD231PS: vfmadd231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ256v231rmb, X86_INS_VFMADD231PS: vfmadd231ps	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ256v231rmbk, X86_INS_VFMADD231PS: vfmadd231ps	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ256v231rmbkz, X86_INS_VFMADD231PS: vfmadd231ps	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ256v231rmk, X86_INS_VFMADD231PS: vfmadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ256v231rmkz, X86_INS_VFMADD231PS: vfmadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ256v231rr, X86_INS_VFMADD231PS: vfmadd231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ256v231rrk, X86_INS_VFMADD231PS: vfmadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZ256v231rrkz, X86_INS_VFMADD231PS: vfmadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZv213rm, X86_INS_VFMADD213PS: vfmadd213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZv213rmb, X86_INS_VFMADD213PS: vfmadd213ps	{${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZv213rmbk, X86_INS_VFMADD213PS: vfmadd213ps	{${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZv213rmbkz, X86_INS_VFMADD213PS: vfmadd213ps	{${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZv213rmk, X86_INS_VFMADD213PS: vfmadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZv213rmkz, X86_INS_VFMADD213PS: vfmadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZv213rr, X86_INS_VFMADD213PS: vfmadd213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZv213rrb, X86_INS_VFMADD213PS: vfmadd213ps	$dst , $src2, $src3, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VFMADDPSZv213rrbk, X86_INS_VFMADD213PS: vfmadd213ps	{$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZv213rrbkz, X86_INS_VFMADD213PS: vfmadd213ps	{$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZv213rrk, X86_INS_VFMADD213PS: vfmadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZv213rrkz, X86_INS_VFMADD213PS: vfmadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZv231rm, X86_INS_VFMADD231PS: vfmadd231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZv231rmb, X86_INS_VFMADD231PS: vfmadd231ps	{${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZv231rmbk, X86_INS_VFMADD231PS: vfmadd231ps	{${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZv231rmbkz, X86_INS_VFMADD231PS: vfmadd231ps	{${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZv231rmk, X86_INS_VFMADD231PS: vfmadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZv231rmkz, X86_INS_VFMADD231PS: vfmadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZv231rr, X86_INS_VFMADD231PS: vfmadd231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZv231rrk, X86_INS_VFMADD231PS: vfmadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSZv231rrkz, X86_INS_VFMADD231PS: vfmadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSr132m, X86_INS_VFMADD132PS: vfmadd132ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSr132mY, X86_INS_VFMADD132PS: vfmadd132ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSr132r, X86_INS_VFMADD132PS: vfmadd132ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSr132rY, X86_INS_VFMADD132PS: vfmadd132ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSr213m, X86_INS_VFMADD213PS: vfmadd213ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSr213mY, X86_INS_VFMADD213PS: vfmadd213ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSr213r, X86_INS_VFMADD213PS: vfmadd213ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSr213rY, X86_INS_VFMADD213PS: vfmadd213ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSr231m, X86_INS_VFMADD231PS: vfmadd231ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSr231mY, X86_INS_VFMADD231PS: vfmadd231ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSr231r, X86_INS_VFMADD231PS: vfmadd231ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDPSr231rY, X86_INS_VFMADD231PS: vfmadd231ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSD4mr, X86_INS_VFMADDSD: vfmaddsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSD4mr_Int, X86_INS_VFMADDSD: vfmaddsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSD4rm, X86_INS_VFMADDSD: vfmaddsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSD4rm_Int, X86_INS_VFMADDSD: vfmaddsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSD4rr, X86_INS_VFMADDSD: vfmaddsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSD4rr_Int, X86_INS_VFMADDSD: vfmaddsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSD4rr_REV, X86_INS_VFMADDSD: vfmaddsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSDZm, X86_INS_VFMADD213SD: vfmadd213sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSDZr, X86_INS_VFMADD213SD: vfmadd213sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSDr132m, X86_INS_VFMADD132SD: vfmadd132sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSDr132r, X86_INS_VFMADD132SD: vfmadd132sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSDr213m, X86_INS_VFMADD213SD: vfmadd213sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSDr213r, X86_INS_VFMADD213SD: vfmadd213sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSDr231m, X86_INS_VFMADD231SD: vfmadd231sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSDr231r, X86_INS_VFMADD231SD: vfmadd231sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSS4mr, X86_INS_VFMADDSS: vfmaddss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSS4mr_Int, X86_INS_VFMADDSS: vfmaddss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSS4rm, X86_INS_VFMADDSS: vfmaddss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSS4rm_Int, X86_INS_VFMADDSS: vfmaddss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSS4rr, X86_INS_VFMADDSS: vfmaddss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSS4rr_Int, X86_INS_VFMADDSS: vfmaddss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSS4rr_REV, X86_INS_VFMADDSS: vfmaddss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSSZm, X86_INS_VFMADD213SS: vfmadd213ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSSZr, X86_INS_VFMADD213SS: vfmadd213ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSSr132m, X86_INS_VFMADD132SS: vfmadd132ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSSr132r, X86_INS_VFMADD132SS: vfmadd132ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSSr213m, X86_INS_VFMADD213SS: vfmadd213ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSSr213r, X86_INS_VFMADD213SS: vfmadd213ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSSr231m, X86_INS_VFMADD231SS: vfmadd231ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSSr231r, X86_INS_VFMADD231SS: vfmadd231ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUB132PDZ128m, X86_INS_VFMADDSUB132PD: vfmaddsub132pd	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUB132PDZ128mb, X86_INS_VFMADDSUB132PD: vfmaddsub132pd	{${src2}{1to2}, $src3, $dst|$dst, $src3, ${src2}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUB132PDZ256m, X86_INS_VFMADDSUB132PD: vfmaddsub132pd	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUB132PDZ256mb, X86_INS_VFMADDSUB132PD: vfmaddsub132pd	{${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUB132PDZm, X86_INS_VFMADDSUB132PD: vfmaddsub132pd	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUB132PDZmb, X86_INS_VFMADDSUB132PD: vfmaddsub132pd	{${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUB132PSZ128m, X86_INS_VFMADDSUB132PS: vfmaddsub132ps	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUB132PSZ128mb, X86_INS_VFMADDSUB132PS: vfmaddsub132ps	{${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUB132PSZ256m, X86_INS_VFMADDSUB132PS: vfmaddsub132ps	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUB132PSZ256mb, X86_INS_VFMADDSUB132PS: vfmaddsub132ps	{${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUB132PSZm, X86_INS_VFMADDSUB132PS: vfmaddsub132ps	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUB132PSZmb, X86_INS_VFMADDSUB132PS: vfmaddsub132ps	{${src2}{1to16}, $src3, $dst|$dst, $src3, ${src2}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPD4mr, X86_INS_VFMADDSUBPD: vfmaddsubpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPD4mrY, X86_INS_VFMADDSUBPD: vfmaddsubpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPD4rm, X86_INS_VFMADDSUBPD: vfmaddsubpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPD4rmY, X86_INS_VFMADDSUBPD: vfmaddsubpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPD4rr, X86_INS_VFMADDSUBPD: vfmaddsubpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPD4rrY, X86_INS_VFMADDSUBPD: vfmaddsubpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPD4rrY_REV, X86_INS_VFMADDSUBPD: vfmaddsubpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPD4rr_REV, X86_INS_VFMADDSUBPD: vfmaddsubpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ128v213rm, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ128v213rmb, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ128v213rmbk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ128v213rmbkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ128v213rmk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ128v213rmkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ128v213rr, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ128v213rrk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ128v213rrkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ128v231rm, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ128v231rmb, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ128v231rmbk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ128v231rmbkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ128v231rmk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ128v231rmkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ128v231rr, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ128v231rrk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ128v231rrkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ256v213rm, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ256v213rmb, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ256v213rmbk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ256v213rmbkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ256v213rmk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ256v213rmkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ256v213rr, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ256v213rrk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ256v213rrkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ256v231rm, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ256v231rmb, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ256v231rmbk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ256v231rmbkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ256v231rmk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ256v231rmkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ256v231rr, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ256v231rrk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZ256v231rrkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZv213rm, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZv213rmb, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZv213rmbk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZv213rmbkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZv213rmk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZv213rmkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZv213rr, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZv213rrb, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	$dst , $src2, $src3, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VFMADDSUBPDZv213rrbk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZv213rrbkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZv213rrk, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZv213rrkz, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZv231rm, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZv231rmb, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZv231rmbk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZv231rmbkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZv231rmk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZv231rmkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZv231rr, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZv231rrk, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDZv231rrkz, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDr132m, X86_INS_VFMADDSUB132PD: vfmaddsub132pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDr132mY, X86_INS_VFMADDSUB132PD: vfmaddsub132pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDr132r, X86_INS_VFMADDSUB132PD: vfmaddsub132pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDr132rY, X86_INS_VFMADDSUB132PD: vfmaddsub132pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDr213m, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDr213mY, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDr213r, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDr213rY, X86_INS_VFMADDSUB213PD: vfmaddsub213pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDr231m, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDr231mY, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDr231r, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPDr231rY, X86_INS_VFMADDSUB231PD: vfmaddsub231pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPS4mr, X86_INS_VFMADDSUBPS: vfmaddsubps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPS4mrY, X86_INS_VFMADDSUBPS: vfmaddsubps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPS4rm, X86_INS_VFMADDSUBPS: vfmaddsubps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPS4rmY, X86_INS_VFMADDSUBPS: vfmaddsubps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPS4rr, X86_INS_VFMADDSUBPS: vfmaddsubps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPS4rrY, X86_INS_VFMADDSUBPS: vfmaddsubps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPS4rrY_REV, X86_INS_VFMADDSUBPS: vfmaddsubps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPS4rr_REV, X86_INS_VFMADDSUBPS: vfmaddsubps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ128v213rm, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ128v213rmb, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ128v213rmbk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ128v213rmbkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ128v213rmk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ128v213rmkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ128v213rr, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ128v213rrk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ128v213rrkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ128v231rm, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ128v231rmb, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ128v231rmbk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ128v231rmbkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ128v231rmk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ128v231rmkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ128v231rr, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ128v231rrk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ128v231rrkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ256v213rm, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ256v213rmb, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ256v213rmbk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ256v213rmbkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ256v213rmk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ256v213rmkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ256v213rr, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ256v213rrk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ256v213rrkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ256v231rm, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ256v231rmb, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ256v231rmbk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ256v231rmbkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ256v231rmk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ256v231rmkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ256v231rr, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ256v231rrk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZ256v231rrkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZv213rm, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZv213rmb, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZv213rmbk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZv213rmbkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZv213rmk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZv213rmkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZv213rr, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZv213rrb, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	$dst , $src2, $src3, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VFMADDSUBPSZv213rrbk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZv213rrbkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZv213rrk, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZv213rrkz, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZv231rm, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZv231rmb, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZv231rmbk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZv231rmbkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZv231rmk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZv231rmkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZv231rr, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZv231rrk, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSZv231rrkz, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSr132m, X86_INS_VFMADDSUB132PS: vfmaddsub132ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSr132mY, X86_INS_VFMADDSUB132PS: vfmaddsub132ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSr132r, X86_INS_VFMADDSUB132PS: vfmaddsub132ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSr132rY, X86_INS_VFMADDSUB132PS: vfmaddsub132ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSr213m, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSr213mY, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSr213r, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSr213rY, X86_INS_VFMADDSUB213PS: vfmaddsub213ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSr231m, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSr231mY, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSr231r, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMADDSUBPSr231rY, X86_INS_VFMADDSUB231PS: vfmaddsub231ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUB132PDZ128m, X86_INS_VFMSUB132PD: vfmsub132pd	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUB132PDZ128mb, X86_INS_VFMSUB132PD: vfmsub132pd	{${src2}{1to2}, $src3, $dst|$dst, $src3, ${src2}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUB132PDZ256m, X86_INS_VFMSUB132PD: vfmsub132pd	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUB132PDZ256mb, X86_INS_VFMSUB132PD: vfmsub132pd	{${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUB132PDZm, X86_INS_VFMSUB132PD: vfmsub132pd	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUB132PDZmb, X86_INS_VFMSUB132PD: vfmsub132pd	{${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUB132PSZ128m, X86_INS_VFMSUB132PS: vfmsub132ps	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUB132PSZ128mb, X86_INS_VFMSUB132PS: vfmsub132ps	{${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUB132PSZ256m, X86_INS_VFMSUB132PS: vfmsub132ps	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUB132PSZ256mb, X86_INS_VFMSUB132PS: vfmsub132ps	{${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUB132PSZm, X86_INS_VFMSUB132PS: vfmsub132ps	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUB132PSZmb, X86_INS_VFMSUB132PS: vfmsub132ps	{${src2}{1to16}, $src3, $dst|$dst, $src3, ${src2}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADD132PDZ128m, X86_INS_VFMSUBADD132PD: vfmsubadd132pd	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADD132PDZ128mb, X86_INS_VFMSUBADD132PD: vfmsubadd132pd	{${src2}{1to2}, $src3, $dst|$dst, $src3, ${src2}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADD132PDZ256m, X86_INS_VFMSUBADD132PD: vfmsubadd132pd	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADD132PDZ256mb, X86_INS_VFMSUBADD132PD: vfmsubadd132pd	{${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADD132PDZm, X86_INS_VFMSUBADD132PD: vfmsubadd132pd	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADD132PDZmb, X86_INS_VFMSUBADD132PD: vfmsubadd132pd	{${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADD132PSZ128m, X86_INS_VFMSUBADD132PS: vfmsubadd132ps	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADD132PSZ128mb, X86_INS_VFMSUBADD132PS: vfmsubadd132ps	{${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADD132PSZ256m, X86_INS_VFMSUBADD132PS: vfmsubadd132ps	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADD132PSZ256mb, X86_INS_VFMSUBADD132PS: vfmsubadd132ps	{${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADD132PSZm, X86_INS_VFMSUBADD132PS: vfmsubadd132ps	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADD132PSZmb, X86_INS_VFMSUBADD132PS: vfmsubadd132ps	{${src2}{1to16}, $src3, $dst|$dst, $src3, ${src2}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPD4mr, X86_INS_VFMSUBADDPD: vfmsubaddpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPD4mrY, X86_INS_VFMSUBADDPD: vfmsubaddpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPD4rm, X86_INS_VFMSUBADDPD: vfmsubaddpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPD4rmY, X86_INS_VFMSUBADDPD: vfmsubaddpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPD4rr, X86_INS_VFMSUBADDPD: vfmsubaddpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPD4rrY, X86_INS_VFMSUBADDPD: vfmsubaddpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPD4rrY_REV, X86_INS_VFMSUBADDPD: vfmsubaddpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPD4rr_REV, X86_INS_VFMSUBADDPD: vfmsubaddpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ128v213rm, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ128v213rmb, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ128v213rmbk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ128v213rmbkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ128v213rmk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ128v213rmkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ128v213rr, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ128v213rrk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ128v213rrkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ128v231rm, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ128v231rmb, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ128v231rmbk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ128v231rmbkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ128v231rmk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ128v231rmkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ128v231rr, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ128v231rrk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ128v231rrkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ256v213rm, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ256v213rmb, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ256v213rmbk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ256v213rmbkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ256v213rmk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ256v213rmkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ256v213rr, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ256v213rrk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ256v213rrkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ256v231rm, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ256v231rmb, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ256v231rmbk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ256v231rmbkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ256v231rmk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ256v231rmkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ256v231rr, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ256v231rrk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZ256v231rrkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZv213rm, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZv213rmb, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZv213rmbk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZv213rmbkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZv213rmk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZv213rmkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZv213rr, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZv213rrb, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	$dst , $src2, $src3, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VFMSUBADDPDZv213rrbk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZv213rrbkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZv213rrk, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZv213rrkz, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZv231rm, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZv231rmb, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZv231rmbk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZv231rmbkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZv231rmk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZv231rmkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZv231rr, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZv231rrk, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDZv231rrkz, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDr132m, X86_INS_VFMSUBADD132PD: vfmsubadd132pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDr132mY, X86_INS_VFMSUBADD132PD: vfmsubadd132pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDr132r, X86_INS_VFMSUBADD132PD: vfmsubadd132pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDr132rY, X86_INS_VFMSUBADD132PD: vfmsubadd132pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDr213m, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDr213mY, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDr213r, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDr213rY, X86_INS_VFMSUBADD213PD: vfmsubadd213pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDr231m, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDr231mY, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDr231r, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPDr231rY, X86_INS_VFMSUBADD231PD: vfmsubadd231pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPS4mr, X86_INS_VFMSUBADDPS: vfmsubaddps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPS4mrY, X86_INS_VFMSUBADDPS: vfmsubaddps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPS4rm, X86_INS_VFMSUBADDPS: vfmsubaddps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPS4rmY, X86_INS_VFMSUBADDPS: vfmsubaddps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPS4rr, X86_INS_VFMSUBADDPS: vfmsubaddps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPS4rrY, X86_INS_VFMSUBADDPS: vfmsubaddps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPS4rrY_REV, X86_INS_VFMSUBADDPS: vfmsubaddps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPS4rr_REV, X86_INS_VFMSUBADDPS: vfmsubaddps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ128v213rm, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ128v213rmb, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ128v213rmbk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ128v213rmbkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ128v213rmk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ128v213rmkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ128v213rr, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ128v213rrk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ128v213rrkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ128v231rm, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ128v231rmb, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ128v231rmbk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ128v231rmbkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ128v231rmk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ128v231rmkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ128v231rr, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ128v231rrk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ128v231rrkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ256v213rm, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ256v213rmb, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ256v213rmbk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ256v213rmbkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ256v213rmk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ256v213rmkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ256v213rr, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ256v213rrk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ256v213rrkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ256v231rm, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ256v231rmb, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ256v231rmbk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ256v231rmbkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ256v231rmk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ256v231rmkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ256v231rr, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ256v231rrk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZ256v231rrkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZv213rm, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZv213rmb, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZv213rmbk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZv213rmbkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZv213rmk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZv213rmkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZv213rr, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZv213rrb, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	$dst , $src2, $src3, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VFMSUBADDPSZv213rrbk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZv213rrbkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZv213rrk, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZv213rrkz, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZv231rm, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZv231rmb, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZv231rmbk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZv231rmbkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZv231rmk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZv231rmkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZv231rr, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZv231rrk, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSZv231rrkz, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSr132m, X86_INS_VFMSUBADD132PS: vfmsubadd132ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSr132mY, X86_INS_VFMSUBADD132PS: vfmsubadd132ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSr132r, X86_INS_VFMSUBADD132PS: vfmsubadd132ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSr132rY, X86_INS_VFMSUBADD132PS: vfmsubadd132ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSr213m, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSr213mY, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSr213r, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSr213rY, X86_INS_VFMSUBADD213PS: vfmsubadd213ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSr231m, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSr231mY, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSr231r, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBADDPSr231rY, X86_INS_VFMSUBADD231PS: vfmsubadd231ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPD4mr, X86_INS_VFMSUBPD: vfmsubpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPD4mrY, X86_INS_VFMSUBPD: vfmsubpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPD4rm, X86_INS_VFMSUBPD: vfmsubpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPD4rmY, X86_INS_VFMSUBPD: vfmsubpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPD4rr, X86_INS_VFMSUBPD: vfmsubpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPD4rrY, X86_INS_VFMSUBPD: vfmsubpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPD4rrY_REV, X86_INS_VFMSUBPD: vfmsubpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPD4rr_REV, X86_INS_VFMSUBPD: vfmsubpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ128v213rm, X86_INS_VFMSUB213PD: vfmsub213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ128v213rmb, X86_INS_VFMSUB213PD: vfmsub213pd	{${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ128v213rmbk, X86_INS_VFMSUB213PD: vfmsub213pd	{${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ128v213rmbkz, X86_INS_VFMSUB213PD: vfmsub213pd	{${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ128v213rmk, X86_INS_VFMSUB213PD: vfmsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ128v213rmkz, X86_INS_VFMSUB213PD: vfmsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ128v213rr, X86_INS_VFMSUB213PD: vfmsub213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ128v213rrk, X86_INS_VFMSUB213PD: vfmsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ128v213rrkz, X86_INS_VFMSUB213PD: vfmsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ128v231rm, X86_INS_VFMSUB231PD: vfmsub231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ128v231rmb, X86_INS_VFMSUB231PD: vfmsub231pd	{${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ128v231rmbk, X86_INS_VFMSUB231PD: vfmsub231pd	{${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ128v231rmbkz, X86_INS_VFMSUB231PD: vfmsub231pd	{${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ128v231rmk, X86_INS_VFMSUB231PD: vfmsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ128v231rmkz, X86_INS_VFMSUB231PD: vfmsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ128v231rr, X86_INS_VFMSUB231PD: vfmsub231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ128v231rrk, X86_INS_VFMSUB231PD: vfmsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ128v231rrkz, X86_INS_VFMSUB231PD: vfmsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ256v213rm, X86_INS_VFMSUB213PD: vfmsub213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ256v213rmb, X86_INS_VFMSUB213PD: vfmsub213pd	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ256v213rmbk, X86_INS_VFMSUB213PD: vfmsub213pd	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ256v213rmbkz, X86_INS_VFMSUB213PD: vfmsub213pd	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ256v213rmk, X86_INS_VFMSUB213PD: vfmsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ256v213rmkz, X86_INS_VFMSUB213PD: vfmsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ256v213rr, X86_INS_VFMSUB213PD: vfmsub213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ256v213rrk, X86_INS_VFMSUB213PD: vfmsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ256v213rrkz, X86_INS_VFMSUB213PD: vfmsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ256v231rm, X86_INS_VFMSUB231PD: vfmsub231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ256v231rmb, X86_INS_VFMSUB231PD: vfmsub231pd	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ256v231rmbk, X86_INS_VFMSUB231PD: vfmsub231pd	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ256v231rmbkz, X86_INS_VFMSUB231PD: vfmsub231pd	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ256v231rmk, X86_INS_VFMSUB231PD: vfmsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ256v231rmkz, X86_INS_VFMSUB231PD: vfmsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ256v231rr, X86_INS_VFMSUB231PD: vfmsub231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ256v231rrk, X86_INS_VFMSUB231PD: vfmsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZ256v231rrkz, X86_INS_VFMSUB231PD: vfmsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZv213rm, X86_INS_VFMSUB213PD: vfmsub213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZv213rmb, X86_INS_VFMSUB213PD: vfmsub213pd	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZv213rmbk, X86_INS_VFMSUB213PD: vfmsub213pd	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZv213rmbkz, X86_INS_VFMSUB213PD: vfmsub213pd	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZv213rmk, X86_INS_VFMSUB213PD: vfmsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZv213rmkz, X86_INS_VFMSUB213PD: vfmsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZv213rr, X86_INS_VFMSUB213PD: vfmsub213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZv213rrb, X86_INS_VFMSUB213PD: vfmsub213pd	$dst , $src2, $src3, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VFMSUBPDZv213rrbk, X86_INS_VFMSUB213PD: vfmsub213pd	{$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZv213rrbkz, X86_INS_VFMSUB213PD: vfmsub213pd	{$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZv213rrk, X86_INS_VFMSUB213PD: vfmsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZv213rrkz, X86_INS_VFMSUB213PD: vfmsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZv231rm, X86_INS_VFMSUB231PD: vfmsub231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZv231rmb, X86_INS_VFMSUB231PD: vfmsub231pd	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZv231rmbk, X86_INS_VFMSUB231PD: vfmsub231pd	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZv231rmbkz, X86_INS_VFMSUB231PD: vfmsub231pd	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZv231rmk, X86_INS_VFMSUB231PD: vfmsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZv231rmkz, X86_INS_VFMSUB231PD: vfmsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZv231rr, X86_INS_VFMSUB231PD: vfmsub231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZv231rrk, X86_INS_VFMSUB231PD: vfmsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDZv231rrkz, X86_INS_VFMSUB231PD: vfmsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDr132m, X86_INS_VFMSUB132PD: vfmsub132pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDr132mY, X86_INS_VFMSUB132PD: vfmsub132pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDr132r, X86_INS_VFMSUB132PD: vfmsub132pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDr132rY, X86_INS_VFMSUB132PD: vfmsub132pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDr213m, X86_INS_VFMSUB213PD: vfmsub213pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDr213mY, X86_INS_VFMSUB213PD: vfmsub213pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDr213r, X86_INS_VFMSUB213PD: vfmsub213pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDr213rY, X86_INS_VFMSUB213PD: vfmsub213pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDr231m, X86_INS_VFMSUB231PD: vfmsub231pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDr231mY, X86_INS_VFMSUB231PD: vfmsub231pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDr231r, X86_INS_VFMSUB231PD: vfmsub231pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPDr231rY, X86_INS_VFMSUB231PD: vfmsub231pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPS4mr, X86_INS_VFMSUBPS: vfmsubps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPS4mrY, X86_INS_VFMSUBPS: vfmsubps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPS4rm, X86_INS_VFMSUBPS: vfmsubps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPS4rmY, X86_INS_VFMSUBPS: vfmsubps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPS4rr, X86_INS_VFMSUBPS: vfmsubps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPS4rrY, X86_INS_VFMSUBPS: vfmsubps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPS4rrY_REV, X86_INS_VFMSUBPS: vfmsubps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPS4rr_REV, X86_INS_VFMSUBPS: vfmsubps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ128v213rm, X86_INS_VFMSUB213PS: vfmsub213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ128v213rmb, X86_INS_VFMSUB213PS: vfmsub213ps	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ128v213rmbk, X86_INS_VFMSUB213PS: vfmsub213ps	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ128v213rmbkz, X86_INS_VFMSUB213PS: vfmsub213ps	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ128v213rmk, X86_INS_VFMSUB213PS: vfmsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ128v213rmkz, X86_INS_VFMSUB213PS: vfmsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ128v213rr, X86_INS_VFMSUB213PS: vfmsub213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ128v213rrk, X86_INS_VFMSUB213PS: vfmsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ128v213rrkz, X86_INS_VFMSUB213PS: vfmsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ128v231rm, X86_INS_VFMSUB231PS: vfmsub231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ128v231rmb, X86_INS_VFMSUB231PS: vfmsub231ps	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ128v231rmbk, X86_INS_VFMSUB231PS: vfmsub231ps	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ128v231rmbkz, X86_INS_VFMSUB231PS: vfmsub231ps	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ128v231rmk, X86_INS_VFMSUB231PS: vfmsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ128v231rmkz, X86_INS_VFMSUB231PS: vfmsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ128v231rr, X86_INS_VFMSUB231PS: vfmsub231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ128v231rrk, X86_INS_VFMSUB231PS: vfmsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ128v231rrkz, X86_INS_VFMSUB231PS: vfmsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ256v213rm, X86_INS_VFMSUB213PS: vfmsub213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ256v213rmb, X86_INS_VFMSUB213PS: vfmsub213ps	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ256v213rmbk, X86_INS_VFMSUB213PS: vfmsub213ps	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ256v213rmbkz, X86_INS_VFMSUB213PS: vfmsub213ps	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ256v213rmk, X86_INS_VFMSUB213PS: vfmsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ256v213rmkz, X86_INS_VFMSUB213PS: vfmsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ256v213rr, X86_INS_VFMSUB213PS: vfmsub213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ256v213rrk, X86_INS_VFMSUB213PS: vfmsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ256v213rrkz, X86_INS_VFMSUB213PS: vfmsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ256v231rm, X86_INS_VFMSUB231PS: vfmsub231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ256v231rmb, X86_INS_VFMSUB231PS: vfmsub231ps	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ256v231rmbk, X86_INS_VFMSUB231PS: vfmsub231ps	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ256v231rmbkz, X86_INS_VFMSUB231PS: vfmsub231ps	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ256v231rmk, X86_INS_VFMSUB231PS: vfmsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ256v231rmkz, X86_INS_VFMSUB231PS: vfmsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ256v231rr, X86_INS_VFMSUB231PS: vfmsub231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ256v231rrk, X86_INS_VFMSUB231PS: vfmsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZ256v231rrkz, X86_INS_VFMSUB231PS: vfmsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZv213rm, X86_INS_VFMSUB213PS: vfmsub213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZv213rmb, X86_INS_VFMSUB213PS: vfmsub213ps	{${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZv213rmbk, X86_INS_VFMSUB213PS: vfmsub213ps	{${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZv213rmbkz, X86_INS_VFMSUB213PS: vfmsub213ps	{${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZv213rmk, X86_INS_VFMSUB213PS: vfmsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZv213rmkz, X86_INS_VFMSUB213PS: vfmsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZv213rr, X86_INS_VFMSUB213PS: vfmsub213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZv213rrb, X86_INS_VFMSUB213PS: vfmsub213ps	$dst , $src2, $src3, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VFMSUBPSZv213rrbk, X86_INS_VFMSUB213PS: vfmsub213ps	{$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZv213rrbkz, X86_INS_VFMSUB213PS: vfmsub213ps	{$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZv213rrk, X86_INS_VFMSUB213PS: vfmsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZv213rrkz, X86_INS_VFMSUB213PS: vfmsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZv231rm, X86_INS_VFMSUB231PS: vfmsub231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZv231rmb, X86_INS_VFMSUB231PS: vfmsub231ps	{${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZv231rmbk, X86_INS_VFMSUB231PS: vfmsub231ps	{${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZv231rmbkz, X86_INS_VFMSUB231PS: vfmsub231ps	{${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZv231rmk, X86_INS_VFMSUB231PS: vfmsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZv231rmkz, X86_INS_VFMSUB231PS: vfmsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZv231rr, X86_INS_VFMSUB231PS: vfmsub231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZv231rrk, X86_INS_VFMSUB231PS: vfmsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSZv231rrkz, X86_INS_VFMSUB231PS: vfmsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSr132m, X86_INS_VFMSUB132PS: vfmsub132ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSr132mY, X86_INS_VFMSUB132PS: vfmsub132ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSr132r, X86_INS_VFMSUB132PS: vfmsub132ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSr132rY, X86_INS_VFMSUB132PS: vfmsub132ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSr213m, X86_INS_VFMSUB213PS: vfmsub213ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSr213mY, X86_INS_VFMSUB213PS: vfmsub213ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSr213r, X86_INS_VFMSUB213PS: vfmsub213ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSr213rY, X86_INS_VFMSUB213PS: vfmsub213ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSr231m, X86_INS_VFMSUB231PS: vfmsub231ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSr231mY, X86_INS_VFMSUB231PS: vfmsub231ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSr231r, X86_INS_VFMSUB231PS: vfmsub231ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBPSr231rY, X86_INS_VFMSUB231PS: vfmsub231ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSD4mr, X86_INS_VFMSUBSD: vfmsubsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSD4mr_Int, X86_INS_VFMSUBSD: vfmsubsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSD4rm, X86_INS_VFMSUBSD: vfmsubsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSD4rm_Int, X86_INS_VFMSUBSD: vfmsubsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSD4rr, X86_INS_VFMSUBSD: vfmsubsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSD4rr_Int, X86_INS_VFMSUBSD: vfmsubsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSD4rr_REV, X86_INS_VFMSUBSD: vfmsubsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSDZm, X86_INS_VFMSUB213SD: vfmsub213sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSDZr, X86_INS_VFMSUB213SD: vfmsub213sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSDr132m, X86_INS_VFMSUB132SD: vfmsub132sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSDr132r, X86_INS_VFMSUB132SD: vfmsub132sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSDr213m, X86_INS_VFMSUB213SD: vfmsub213sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSDr213r, X86_INS_VFMSUB213SD: vfmsub213sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSDr231m, X86_INS_VFMSUB231SD: vfmsub231sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSDr231r, X86_INS_VFMSUB231SD: vfmsub231sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSS4mr, X86_INS_VFMSUBSS: vfmsubss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSS4mr_Int, X86_INS_VFMSUBSS: vfmsubss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSS4rm, X86_INS_VFMSUBSS: vfmsubss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSS4rm_Int, X86_INS_VFMSUBSS: vfmsubss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSS4rr, X86_INS_VFMSUBSS: vfmsubss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSS4rr_Int, X86_INS_VFMSUBSS: vfmsubss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSS4rr_REV, X86_INS_VFMSUBSS: vfmsubss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSSZm, X86_INS_VFMSUB213SS: vfmsub213ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSSZr, X86_INS_VFMSUB213SS: vfmsub213ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSSr132m, X86_INS_VFMSUB132SS: vfmsub132ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSSr132r, X86_INS_VFMSUB132SS: vfmsub132ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSSr213m, X86_INS_VFMSUB213SS: vfmsub213ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSSr213r, X86_INS_VFMSUB213SS: vfmsub213ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSSr231m, X86_INS_VFMSUB231SS: vfmsub231ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFMSUBSSr231r, X86_INS_VFMSUB231SS: vfmsub231ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADD132PDZ128m, X86_INS_VFNMADD132PD: vfnmadd132pd	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADD132PDZ128mb, X86_INS_VFNMADD132PD: vfnmadd132pd	{${src2}{1to2}, $src3, $dst|$dst, $src3, ${src2}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADD132PDZ256m, X86_INS_VFNMADD132PD: vfnmadd132pd	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADD132PDZ256mb, X86_INS_VFNMADD132PD: vfnmadd132pd	{${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADD132PDZm, X86_INS_VFNMADD132PD: vfnmadd132pd	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADD132PDZmb, X86_INS_VFNMADD132PD: vfnmadd132pd	{${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADD132PSZ128m, X86_INS_VFNMADD132PS: vfnmadd132ps	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADD132PSZ128mb, X86_INS_VFNMADD132PS: vfnmadd132ps	{${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADD132PSZ256m, X86_INS_VFNMADD132PS: vfnmadd132ps	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADD132PSZ256mb, X86_INS_VFNMADD132PS: vfnmadd132ps	{${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADD132PSZm, X86_INS_VFNMADD132PS: vfnmadd132ps	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADD132PSZmb, X86_INS_VFNMADD132PS: vfnmadd132ps	{${src2}{1to16}, $src3, $dst|$dst, $src3, ${src2}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPD4mr, X86_INS_VFNMADDPD: vfnmaddpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPD4mrY, X86_INS_VFNMADDPD: vfnmaddpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPD4rm, X86_INS_VFNMADDPD: vfnmaddpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPD4rmY, X86_INS_VFNMADDPD: vfnmaddpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPD4rr, X86_INS_VFNMADDPD: vfnmaddpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPD4rrY, X86_INS_VFNMADDPD: vfnmaddpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPD4rrY_REV, X86_INS_VFNMADDPD: vfnmaddpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPD4rr_REV, X86_INS_VFNMADDPD: vfnmaddpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ128v213rm, X86_INS_VFNMADD213PD: vfnmadd213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ128v213rmb, X86_INS_VFNMADD213PD: vfnmadd213pd	{${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ128v213rmbk, X86_INS_VFNMADD213PD: vfnmadd213pd	{${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ128v213rmbkz, X86_INS_VFNMADD213PD: vfnmadd213pd	{${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ128v213rmk, X86_INS_VFNMADD213PD: vfnmadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ128v213rmkz, X86_INS_VFNMADD213PD: vfnmadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ128v213rr, X86_INS_VFNMADD213PD: vfnmadd213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ128v213rrk, X86_INS_VFNMADD213PD: vfnmadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ128v213rrkz, X86_INS_VFNMADD213PD: vfnmadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ128v231rm, X86_INS_VFNMADD231PD: vfnmadd231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ128v231rmb, X86_INS_VFNMADD231PD: vfnmadd231pd	{${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ128v231rmbk, X86_INS_VFNMADD231PD: vfnmadd231pd	{${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ128v231rmbkz, X86_INS_VFNMADD231PD: vfnmadd231pd	{${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ128v231rmk, X86_INS_VFNMADD231PD: vfnmadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ128v231rmkz, X86_INS_VFNMADD231PD: vfnmadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ128v231rr, X86_INS_VFNMADD231PD: vfnmadd231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ128v231rrk, X86_INS_VFNMADD231PD: vfnmadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ128v231rrkz, X86_INS_VFNMADD231PD: vfnmadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ256v213rm, X86_INS_VFNMADD213PD: vfnmadd213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ256v213rmb, X86_INS_VFNMADD213PD: vfnmadd213pd	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ256v213rmbk, X86_INS_VFNMADD213PD: vfnmadd213pd	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ256v213rmbkz, X86_INS_VFNMADD213PD: vfnmadd213pd	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ256v213rmk, X86_INS_VFNMADD213PD: vfnmadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ256v213rmkz, X86_INS_VFNMADD213PD: vfnmadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ256v213rr, X86_INS_VFNMADD213PD: vfnmadd213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ256v213rrk, X86_INS_VFNMADD213PD: vfnmadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ256v213rrkz, X86_INS_VFNMADD213PD: vfnmadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ256v231rm, X86_INS_VFNMADD231PD: vfnmadd231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ256v231rmb, X86_INS_VFNMADD231PD: vfnmadd231pd	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ256v231rmbk, X86_INS_VFNMADD231PD: vfnmadd231pd	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ256v231rmbkz, X86_INS_VFNMADD231PD: vfnmadd231pd	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ256v231rmk, X86_INS_VFNMADD231PD: vfnmadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ256v231rmkz, X86_INS_VFNMADD231PD: vfnmadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ256v231rr, X86_INS_VFNMADD231PD: vfnmadd231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ256v231rrk, X86_INS_VFNMADD231PD: vfnmadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZ256v231rrkz, X86_INS_VFNMADD231PD: vfnmadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZv213rm, X86_INS_VFNMADD213PD: vfnmadd213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZv213rmb, X86_INS_VFNMADD213PD: vfnmadd213pd	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZv213rmbk, X86_INS_VFNMADD213PD: vfnmadd213pd	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZv213rmbkz, X86_INS_VFNMADD213PD: vfnmadd213pd	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZv213rmk, X86_INS_VFNMADD213PD: vfnmadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZv213rmkz, X86_INS_VFNMADD213PD: vfnmadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZv213rr, X86_INS_VFNMADD213PD: vfnmadd213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZv213rrb, X86_INS_VFNMADD213PD: vfnmadd213pd	$dst , $src2, $src3, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VFNMADDPDZv213rrbk, X86_INS_VFNMADD213PD: vfnmadd213pd	{$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZv213rrbkz, X86_INS_VFNMADD213PD: vfnmadd213pd	{$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZv213rrk, X86_INS_VFNMADD213PD: vfnmadd213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZv213rrkz, X86_INS_VFNMADD213PD: vfnmadd213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZv231rm, X86_INS_VFNMADD231PD: vfnmadd231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZv231rmb, X86_INS_VFNMADD231PD: vfnmadd231pd	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZv231rmbk, X86_INS_VFNMADD231PD: vfnmadd231pd	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZv231rmbkz, X86_INS_VFNMADD231PD: vfnmadd231pd	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZv231rmk, X86_INS_VFNMADD231PD: vfnmadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZv231rmkz, X86_INS_VFNMADD231PD: vfnmadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZv231rr, X86_INS_VFNMADD231PD: vfnmadd231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZv231rrk, X86_INS_VFNMADD231PD: vfnmadd231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDZv231rrkz, X86_INS_VFNMADD231PD: vfnmadd231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDr132m, X86_INS_VFNMADD132PD: vfnmadd132pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDr132mY, X86_INS_VFNMADD132PD: vfnmadd132pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDr132r, X86_INS_VFNMADD132PD: vfnmadd132pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDr132rY, X86_INS_VFNMADD132PD: vfnmadd132pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDr213m, X86_INS_VFNMADD213PD: vfnmadd213pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDr213mY, X86_INS_VFNMADD213PD: vfnmadd213pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDr213r, X86_INS_VFNMADD213PD: vfnmadd213pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDr213rY, X86_INS_VFNMADD213PD: vfnmadd213pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDr231m, X86_INS_VFNMADD231PD: vfnmadd231pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDr231mY, X86_INS_VFNMADD231PD: vfnmadd231pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDr231r, X86_INS_VFNMADD231PD: vfnmadd231pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPDr231rY, X86_INS_VFNMADD231PD: vfnmadd231pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPS4mr, X86_INS_VFNMADDPS: vfnmaddps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPS4mrY, X86_INS_VFNMADDPS: vfnmaddps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPS4rm, X86_INS_VFNMADDPS: vfnmaddps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPS4rmY, X86_INS_VFNMADDPS: vfnmaddps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPS4rr, X86_INS_VFNMADDPS: vfnmaddps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPS4rrY, X86_INS_VFNMADDPS: vfnmaddps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPS4rrY_REV, X86_INS_VFNMADDPS: vfnmaddps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPS4rr_REV, X86_INS_VFNMADDPS: vfnmaddps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ128v213rm, X86_INS_VFNMADD213PS: vfnmadd213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ128v213rmb, X86_INS_VFNMADD213PS: vfnmadd213ps	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ128v213rmbk, X86_INS_VFNMADD213PS: vfnmadd213ps	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ128v213rmbkz, X86_INS_VFNMADD213PS: vfnmadd213ps	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ128v213rmk, X86_INS_VFNMADD213PS: vfnmadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ128v213rmkz, X86_INS_VFNMADD213PS: vfnmadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ128v213rr, X86_INS_VFNMADD213PS: vfnmadd213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ128v213rrk, X86_INS_VFNMADD213PS: vfnmadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ128v213rrkz, X86_INS_VFNMADD213PS: vfnmadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ128v231rm, X86_INS_VFNMADD231PS: vfnmadd231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ128v231rmb, X86_INS_VFNMADD231PS: vfnmadd231ps	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ128v231rmbk, X86_INS_VFNMADD231PS: vfnmadd231ps	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ128v231rmbkz, X86_INS_VFNMADD231PS: vfnmadd231ps	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ128v231rmk, X86_INS_VFNMADD231PS: vfnmadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ128v231rmkz, X86_INS_VFNMADD231PS: vfnmadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ128v231rr, X86_INS_VFNMADD231PS: vfnmadd231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ128v231rrk, X86_INS_VFNMADD231PS: vfnmadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ128v231rrkz, X86_INS_VFNMADD231PS: vfnmadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ256v213rm, X86_INS_VFNMADD213PS: vfnmadd213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ256v213rmb, X86_INS_VFNMADD213PS: vfnmadd213ps	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ256v213rmbk, X86_INS_VFNMADD213PS: vfnmadd213ps	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ256v213rmbkz, X86_INS_VFNMADD213PS: vfnmadd213ps	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ256v213rmk, X86_INS_VFNMADD213PS: vfnmadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ256v213rmkz, X86_INS_VFNMADD213PS: vfnmadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ256v213rr, X86_INS_VFNMADD213PS: vfnmadd213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ256v213rrk, X86_INS_VFNMADD213PS: vfnmadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ256v213rrkz, X86_INS_VFNMADD213PS: vfnmadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ256v231rm, X86_INS_VFNMADD231PS: vfnmadd231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ256v231rmb, X86_INS_VFNMADD231PS: vfnmadd231ps	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ256v231rmbk, X86_INS_VFNMADD231PS: vfnmadd231ps	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ256v231rmbkz, X86_INS_VFNMADD231PS: vfnmadd231ps	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ256v231rmk, X86_INS_VFNMADD231PS: vfnmadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ256v231rmkz, X86_INS_VFNMADD231PS: vfnmadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ256v231rr, X86_INS_VFNMADD231PS: vfnmadd231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ256v231rrk, X86_INS_VFNMADD231PS: vfnmadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZ256v231rrkz, X86_INS_VFNMADD231PS: vfnmadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZv213rm, X86_INS_VFNMADD213PS: vfnmadd213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZv213rmb, X86_INS_VFNMADD213PS: vfnmadd213ps	{${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZv213rmbk, X86_INS_VFNMADD213PS: vfnmadd213ps	{${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZv213rmbkz, X86_INS_VFNMADD213PS: vfnmadd213ps	{${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZv213rmk, X86_INS_VFNMADD213PS: vfnmadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZv213rmkz, X86_INS_VFNMADD213PS: vfnmadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZv213rr, X86_INS_VFNMADD213PS: vfnmadd213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZv213rrb, X86_INS_VFNMADD213PS: vfnmadd213ps	$dst , $src2, $src3, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VFNMADDPSZv213rrbk, X86_INS_VFNMADD213PS: vfnmadd213ps	{$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZv213rrbkz, X86_INS_VFNMADD213PS: vfnmadd213ps	{$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZv213rrk, X86_INS_VFNMADD213PS: vfnmadd213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZv213rrkz, X86_INS_VFNMADD213PS: vfnmadd213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZv231rm, X86_INS_VFNMADD231PS: vfnmadd231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZv231rmb, X86_INS_VFNMADD231PS: vfnmadd231ps	{${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZv231rmbk, X86_INS_VFNMADD231PS: vfnmadd231ps	{${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZv231rmbkz, X86_INS_VFNMADD231PS: vfnmadd231ps	{${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZv231rmk, X86_INS_VFNMADD231PS: vfnmadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZv231rmkz, X86_INS_VFNMADD231PS: vfnmadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZv231rr, X86_INS_VFNMADD231PS: vfnmadd231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZv231rrk, X86_INS_VFNMADD231PS: vfnmadd231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSZv231rrkz, X86_INS_VFNMADD231PS: vfnmadd231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSr132m, X86_INS_VFNMADD132PS: vfnmadd132ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSr132mY, X86_INS_VFNMADD132PS: vfnmadd132ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSr132r, X86_INS_VFNMADD132PS: vfnmadd132ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSr132rY, X86_INS_VFNMADD132PS: vfnmadd132ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSr213m, X86_INS_VFNMADD213PS: vfnmadd213ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSr213mY, X86_INS_VFNMADD213PS: vfnmadd213ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSr213r, X86_INS_VFNMADD213PS: vfnmadd213ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSr213rY, X86_INS_VFNMADD213PS: vfnmadd213ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSr231m, X86_INS_VFNMADD231PS: vfnmadd231ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSr231mY, X86_INS_VFNMADD231PS: vfnmadd231ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSr231r, X86_INS_VFNMADD231PS: vfnmadd231ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDPSr231rY, X86_INS_VFNMADD231PS: vfnmadd231ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSD4mr, X86_INS_VFNMADDSD: vfnmaddsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSD4mr_Int, X86_INS_VFNMADDSD: vfnmaddsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSD4rm, X86_INS_VFNMADDSD: vfnmaddsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSD4rm_Int, X86_INS_VFNMADDSD: vfnmaddsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSD4rr, X86_INS_VFNMADDSD: vfnmaddsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSD4rr_Int, X86_INS_VFNMADDSD: vfnmaddsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSD4rr_REV, X86_INS_VFNMADDSD: vfnmaddsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSDZm, X86_INS_VFNMADD213SD: vfnmadd213sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSDZr, X86_INS_VFNMADD213SD: vfnmadd213sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSDr132m, X86_INS_VFNMADD132SD: vfnmadd132sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSDr132r, X86_INS_VFNMADD132SD: vfnmadd132sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSDr213m, X86_INS_VFNMADD213SD: vfnmadd213sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSDr213r, X86_INS_VFNMADD213SD: vfnmadd213sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSDr231m, X86_INS_VFNMADD231SD: vfnmadd231sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSDr231r, X86_INS_VFNMADD231SD: vfnmadd231sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSS4mr, X86_INS_VFNMADDSS: vfnmaddss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSS4mr_Int, X86_INS_VFNMADDSS: vfnmaddss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSS4rm, X86_INS_VFNMADDSS: vfnmaddss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSS4rm_Int, X86_INS_VFNMADDSS: vfnmaddss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSS4rr, X86_INS_VFNMADDSS: vfnmaddss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSS4rr_Int, X86_INS_VFNMADDSS: vfnmaddss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSS4rr_REV, X86_INS_VFNMADDSS: vfnmaddss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSSZm, X86_INS_VFNMADD213SS: vfnmadd213ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSSZr, X86_INS_VFNMADD213SS: vfnmadd213ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSSr132m, X86_INS_VFNMADD132SS: vfnmadd132ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSSr132r, X86_INS_VFNMADD132SS: vfnmadd132ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSSr213m, X86_INS_VFNMADD213SS: vfnmadd213ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSSr213r, X86_INS_VFNMADD213SS: vfnmadd213ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSSr231m, X86_INS_VFNMADD231SS: vfnmadd231ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMADDSSr231r, X86_INS_VFNMADD231SS: vfnmadd231ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUB132PDZ128m, X86_INS_VFNMSUB132PD: vfnmsub132pd	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUB132PDZ128mb, X86_INS_VFNMSUB132PD: vfnmsub132pd	{${src2}{1to2}, $src3, $dst|$dst, $src3, ${src2}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUB132PDZ256m, X86_INS_VFNMSUB132PD: vfnmsub132pd	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUB132PDZ256mb, X86_INS_VFNMSUB132PD: vfnmsub132pd	{${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUB132PDZm, X86_INS_VFNMSUB132PD: vfnmsub132pd	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUB132PDZmb, X86_INS_VFNMSUB132PD: vfnmsub132pd	{${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUB132PSZ128m, X86_INS_VFNMSUB132PS: vfnmsub132ps	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUB132PSZ128mb, X86_INS_VFNMSUB132PS: vfnmsub132ps	{${src2}{1to4}, $src3, $dst|$dst, $src3, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUB132PSZ256m, X86_INS_VFNMSUB132PS: vfnmsub132ps	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUB132PSZ256mb, X86_INS_VFNMSUB132PS: vfnmsub132ps	{${src2}{1to8}, $src3, $dst|$dst, $src3, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUB132PSZm, X86_INS_VFNMSUB132PS: vfnmsub132ps	$dst, $src3, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUB132PSZmb, X86_INS_VFNMSUB132PS: vfnmsub132ps	{${src2}{1to16}, $src3, $dst|$dst, $src3, ${src2}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPD4mr, X86_INS_VFNMSUBPD: vfnmsubpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPD4mrY, X86_INS_VFNMSUBPD: vfnmsubpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPD4rm, X86_INS_VFNMSUBPD: vfnmsubpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPD4rmY, X86_INS_VFNMSUBPD: vfnmsubpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPD4rr, X86_INS_VFNMSUBPD: vfnmsubpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPD4rrY, X86_INS_VFNMSUBPD: vfnmsubpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPD4rrY_REV, X86_INS_VFNMSUBPD: vfnmsubpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPD4rr_REV, X86_INS_VFNMSUBPD: vfnmsubpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ128v213rm, X86_INS_VFNMSUB213PD: vfnmsub213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ128v213rmb, X86_INS_VFNMSUB213PD: vfnmsub213pd	{${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ128v213rmbk, X86_INS_VFNMSUB213PD: vfnmsub213pd	{${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ128v213rmbkz, X86_INS_VFNMSUB213PD: vfnmsub213pd	{${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ128v213rmk, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ128v213rmkz, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ128v213rr, X86_INS_VFNMSUB213PD: vfnmsub213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ128v213rrk, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ128v213rrkz, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ128v231rm, X86_INS_VFNMSUB231PD: vfnmsub231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ128v231rmb, X86_INS_VFNMSUB231PD: vfnmsub231pd	{${src3}{1to2}, $src2, $dst |$dst , $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ128v231rmbk, X86_INS_VFNMSUB231PD: vfnmsub231pd	{${src3}{1to2}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ128v231rmbkz, X86_INS_VFNMSUB231PD: vfnmsub231pd	{${src3}{1to2}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ128v231rmk, X86_INS_VFNMSUB231PD: vfnmsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ128v231rmkz, X86_INS_VFNMSUB231PD: vfnmsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ128v231rr, X86_INS_VFNMSUB231PD: vfnmsub231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ128v231rrk, X86_INS_VFNMSUB231PD: vfnmsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ128v231rrkz, X86_INS_VFNMSUB231PD: vfnmsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ256v213rm, X86_INS_VFNMSUB213PD: vfnmsub213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ256v213rmb, X86_INS_VFNMSUB213PD: vfnmsub213pd	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ256v213rmbk, X86_INS_VFNMSUB213PD: vfnmsub213pd	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ256v213rmbkz, X86_INS_VFNMSUB213PD: vfnmsub213pd	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ256v213rmk, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ256v213rmkz, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ256v213rr, X86_INS_VFNMSUB213PD: vfnmsub213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ256v213rrk, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ256v213rrkz, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ256v231rm, X86_INS_VFNMSUB231PD: vfnmsub231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ256v231rmb, X86_INS_VFNMSUB231PD: vfnmsub231pd	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ256v231rmbk, X86_INS_VFNMSUB231PD: vfnmsub231pd	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ256v231rmbkz, X86_INS_VFNMSUB231PD: vfnmsub231pd	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ256v231rmk, X86_INS_VFNMSUB231PD: vfnmsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ256v231rmkz, X86_INS_VFNMSUB231PD: vfnmsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ256v231rr, X86_INS_VFNMSUB231PD: vfnmsub231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ256v231rrk, X86_INS_VFNMSUB231PD: vfnmsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZ256v231rrkz, X86_INS_VFNMSUB231PD: vfnmsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZv213rm, X86_INS_VFNMSUB213PD: vfnmsub213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZv213rmb, X86_INS_VFNMSUB213PD: vfnmsub213pd	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZv213rmbk, X86_INS_VFNMSUB213PD: vfnmsub213pd	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZv213rmbkz, X86_INS_VFNMSUB213PD: vfnmsub213pd	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZv213rmk, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZv213rmkz, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZv213rr, X86_INS_VFNMSUB213PD: vfnmsub213pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZv213rrb, X86_INS_VFNMSUB213PD: vfnmsub213pd	$dst , $src2, $src3, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VFNMSUBPDZv213rrbk, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZv213rrbkz, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZv213rrk, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZv213rrkz, X86_INS_VFNMSUB213PD: vfnmsub213pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZv231rm, X86_INS_VFNMSUB231PD: vfnmsub231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZv231rmb, X86_INS_VFNMSUB231PD: vfnmsub231pd	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZv231rmbk, X86_INS_VFNMSUB231PD: vfnmsub231pd	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZv231rmbkz, X86_INS_VFNMSUB231PD: vfnmsub231pd	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZv231rmk, X86_INS_VFNMSUB231PD: vfnmsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZv231rmkz, X86_INS_VFNMSUB231PD: vfnmsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZv231rr, X86_INS_VFNMSUB231PD: vfnmsub231pd	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZv231rrk, X86_INS_VFNMSUB231PD: vfnmsub231pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDZv231rrkz, X86_INS_VFNMSUB231PD: vfnmsub231pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDr132m, X86_INS_VFNMSUB132PD: vfnmsub132pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDr132mY, X86_INS_VFNMSUB132PD: vfnmsub132pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDr132r, X86_INS_VFNMSUB132PD: vfnmsub132pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDr132rY, X86_INS_VFNMSUB132PD: vfnmsub132pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDr213m, X86_INS_VFNMSUB213PD: vfnmsub213pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDr213mY, X86_INS_VFNMSUB213PD: vfnmsub213pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDr213r, X86_INS_VFNMSUB213PD: vfnmsub213pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDr213rY, X86_INS_VFNMSUB213PD: vfnmsub213pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDr231m, X86_INS_VFNMSUB231PD: vfnmsub231pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDr231mY, X86_INS_VFNMSUB231PD: vfnmsub231pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDr231r, X86_INS_VFNMSUB231PD: vfnmsub231pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPDr231rY, X86_INS_VFNMSUB231PD: vfnmsub231pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPS4mr, X86_INS_VFNMSUBPS: vfnmsubps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPS4mrY, X86_INS_VFNMSUBPS: vfnmsubps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPS4rm, X86_INS_VFNMSUBPS: vfnmsubps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPS4rmY, X86_INS_VFNMSUBPS: vfnmsubps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPS4rr, X86_INS_VFNMSUBPS: vfnmsubps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPS4rrY, X86_INS_VFNMSUBPS: vfnmsubps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPS4rrY_REV, X86_INS_VFNMSUBPS: vfnmsubps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPS4rr_REV, X86_INS_VFNMSUBPS: vfnmsubps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ128v213rm, X86_INS_VFNMSUB213PS: vfnmsub213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ128v213rmb, X86_INS_VFNMSUB213PS: vfnmsub213ps	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ128v213rmbk, X86_INS_VFNMSUB213PS: vfnmsub213ps	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ128v213rmbkz, X86_INS_VFNMSUB213PS: vfnmsub213ps	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ128v213rmk, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ128v213rmkz, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ128v213rr, X86_INS_VFNMSUB213PS: vfnmsub213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ128v213rrk, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ128v213rrkz, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ128v231rm, X86_INS_VFNMSUB231PS: vfnmsub231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ128v231rmb, X86_INS_VFNMSUB231PS: vfnmsub231ps	{${src3}{1to4}, $src2, $dst |$dst , $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ128v231rmbk, X86_INS_VFNMSUB231PS: vfnmsub231ps	{${src3}{1to4}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ128v231rmbkz, X86_INS_VFNMSUB231PS: vfnmsub231ps	{${src3}{1to4}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ128v231rmk, X86_INS_VFNMSUB231PS: vfnmsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ128v231rmkz, X86_INS_VFNMSUB231PS: vfnmsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ128v231rr, X86_INS_VFNMSUB231PS: vfnmsub231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ128v231rrk, X86_INS_VFNMSUB231PS: vfnmsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ128v231rrkz, X86_INS_VFNMSUB231PS: vfnmsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ256v213rm, X86_INS_VFNMSUB213PS: vfnmsub213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ256v213rmb, X86_INS_VFNMSUB213PS: vfnmsub213ps	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ256v213rmbk, X86_INS_VFNMSUB213PS: vfnmsub213ps	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ256v213rmbkz, X86_INS_VFNMSUB213PS: vfnmsub213ps	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ256v213rmk, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ256v213rmkz, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ256v213rr, X86_INS_VFNMSUB213PS: vfnmsub213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ256v213rrk, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ256v213rrkz, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ256v231rm, X86_INS_VFNMSUB231PS: vfnmsub231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ256v231rmb, X86_INS_VFNMSUB231PS: vfnmsub231ps	{${src3}{1to8}, $src2, $dst |$dst , $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ256v231rmbk, X86_INS_VFNMSUB231PS: vfnmsub231ps	{${src3}{1to8}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ256v231rmbkz, X86_INS_VFNMSUB231PS: vfnmsub231ps	{${src3}{1to8}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ256v231rmk, X86_INS_VFNMSUB231PS: vfnmsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ256v231rmkz, X86_INS_VFNMSUB231PS: vfnmsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ256v231rr, X86_INS_VFNMSUB231PS: vfnmsub231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ256v231rrk, X86_INS_VFNMSUB231PS: vfnmsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZ256v231rrkz, X86_INS_VFNMSUB231PS: vfnmsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZv213rm, X86_INS_VFNMSUB213PS: vfnmsub213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZv213rmb, X86_INS_VFNMSUB213PS: vfnmsub213ps	{${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZv213rmbk, X86_INS_VFNMSUB213PS: vfnmsub213ps	{${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZv213rmbkz, X86_INS_VFNMSUB213PS: vfnmsub213ps	{${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZv213rmk, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZv213rmkz, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZv213rr, X86_INS_VFNMSUB213PS: vfnmsub213ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZv213rrb, X86_INS_VFNMSUB213PS: vfnmsub213ps	$dst , $src2, $src3, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VFNMSUBPSZv213rrbk, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$rc, $src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZv213rrbkz, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$rc, $src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZv213rrk, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZv213rrkz, X86_INS_VFNMSUB213PS: vfnmsub213ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZv231rm, X86_INS_VFNMSUB231PS: vfnmsub231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZv231rmb, X86_INS_VFNMSUB231PS: vfnmsub231ps	{${src3}{1to16}, $src2, $dst |$dst , $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZv231rmbk, X86_INS_VFNMSUB231PS: vfnmsub231ps	{${src3}{1to16}, $src2, $dst {${mask}}|$dst {${mask}}, $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZv231rmbkz, X86_INS_VFNMSUB231PS: vfnmsub231ps	{${src3}{1to16}, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, ${src3}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZv231rmk, X86_INS_VFNMSUB231PS: vfnmsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZv231rmkz, X86_INS_VFNMSUB231PS: vfnmsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZv231rr, X86_INS_VFNMSUB231PS: vfnmsub231ps	$dst , $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZv231rrk, X86_INS_VFNMSUB231PS: vfnmsub231ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSZv231rrkz, X86_INS_VFNMSUB231PS: vfnmsub231ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSr132m, X86_INS_VFNMSUB132PS: vfnmsub132ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSr132mY, X86_INS_VFNMSUB132PS: vfnmsub132ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSr132r, X86_INS_VFNMSUB132PS: vfnmsub132ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSr132rY, X86_INS_VFNMSUB132PS: vfnmsub132ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSr213m, X86_INS_VFNMSUB213PS: vfnmsub213ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSr213mY, X86_INS_VFNMSUB213PS: vfnmsub213ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSr213r, X86_INS_VFNMSUB213PS: vfnmsub213ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSr213rY, X86_INS_VFNMSUB213PS: vfnmsub213ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSr231m, X86_INS_VFNMSUB231PS: vfnmsub231ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSr231mY, X86_INS_VFNMSUB231PS: vfnmsub231ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSr231r, X86_INS_VFNMSUB231PS: vfnmsub231ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBPSr231rY, X86_INS_VFNMSUB231PS: vfnmsub231ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSD4mr, X86_INS_VFNMSUBSD: vfnmsubsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSD4mr_Int, X86_INS_VFNMSUBSD: vfnmsubsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSD4rm, X86_INS_VFNMSUBSD: vfnmsubsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSD4rm_Int, X86_INS_VFNMSUBSD: vfnmsubsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSD4rr, X86_INS_VFNMSUBSD: vfnmsubsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSD4rr_Int, X86_INS_VFNMSUBSD: vfnmsubsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSD4rr_REV, X86_INS_VFNMSUBSD: vfnmsubsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSDZm, X86_INS_VFNMSUB213SD: vfnmsub213sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSDZr, X86_INS_VFNMSUB213SD: vfnmsub213sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSDr132m, X86_INS_VFNMSUB132SD: vfnmsub132sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSDr132r, X86_INS_VFNMSUB132SD: vfnmsub132sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSDr213m, X86_INS_VFNMSUB213SD: vfnmsub213sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSDr213r, X86_INS_VFNMSUB213SD: vfnmsub213sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSDr231m, X86_INS_VFNMSUB231SD: vfnmsub231sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSDr231r, X86_INS_VFNMSUB231SD: vfnmsub231sd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSS4mr, X86_INS_VFNMSUBSS: vfnmsubss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSS4mr_Int, X86_INS_VFNMSUBSS: vfnmsubss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSS4rm, X86_INS_VFNMSUBSS: vfnmsubss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSS4rm_Int, X86_INS_VFNMSUBSS: vfnmsubss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSS4rr, X86_INS_VFNMSUBSS: vfnmsubss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSS4rr_Int, X86_INS_VFNMSUBSS: vfnmsubss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSS4rr_REV, X86_INS_VFNMSUBSS: vfnmsubss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSSZm, X86_INS_VFNMSUB213SS: vfnmsub213ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSSZr, X86_INS_VFNMSUB213SS: vfnmsub213ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSSr132m, X86_INS_VFNMSUB132SS: vfnmsub132ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSSr132r, X86_INS_VFNMSUB132SS: vfnmsub132ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSSr213m, X86_INS_VFNMSUB213SS: vfnmsub213ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSSr213r, X86_INS_VFNMSUB213SS: vfnmsub213ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSSr231m, X86_INS_VFNMSUB231SS: vfnmsub231ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFNMSUBSSr231r, X86_INS_VFNMSUB231SS: vfnmsub231ss	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFRCZPDrm, X86_INS_VFRCZPD: vfrczpd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VFRCZPDrmY, X86_INS_VFRCZPD: vfrczpd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VFRCZPDrr, X86_INS_VFRCZPD: vfrczpd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VFRCZPDrrY, X86_INS_VFRCZPD: vfrczpd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VFRCZPSrm, X86_INS_VFRCZPS: vfrczps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VFRCZPSrmY, X86_INS_VFRCZPS: vfrczps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VFRCZPSrr, X86_INS_VFRCZPS: vfrczps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VFRCZPSrrY, X86_INS_VFRCZPS: vfrczps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VFRCZSDrm, X86_INS_VFRCZSD: vfrczsd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_VFRCZSDrr, X86_INS_VFRCZSD: vfrczsd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VFRCZSSrm, X86_INS_VFRCZSS: vfrczss	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_VFRCZSSrr, X86_INS_VFRCZSS: vfrczss	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VFsANDNPDrm, X86_INS_VANDNPD: vandnpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFsANDNPDrr, X86_INS_VANDNPD: vandnpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFsANDNPSrm, X86_INS_VANDNPS: vandnps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFsANDNPSrr, X86_INS_VANDNPS: vandnps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFsANDPDrm, X86_INS_VANDPD: vandpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFsANDPDrr, X86_INS_VANDPD: vandpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFsANDPSrm, X86_INS_VANDPS: vandps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFsANDPSrr, X86_INS_VANDPS: vandps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFsORPDrm, X86_INS_VORPD: vorpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFsORPDrr, X86_INS_VORPD: vorpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFsORPSrm, X86_INS_VORPS: vorps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFsORPSrr, X86_INS_VORPS: vorps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFsXORPDrm, X86_INS_VXORPD: vxorpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFsXORPDrr, X86_INS_VXORPD: vxorpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFsXORPSrm, X86_INS_VXORPS: vxorps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFsXORPSrr, X86_INS_VXORPS: vxorps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFvANDNPDrm, X86_INS_VANDNPD: vandnpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFvANDNPDrr, X86_INS_VANDNPD: vandnpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFvANDNPSrm, X86_INS_VANDNPS: vandnps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFvANDNPSrr, X86_INS_VANDNPS: vandnps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFvANDPDrm, X86_INS_VANDPD: vandpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFvANDPDrr, X86_INS_VANDPD: vandpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFvANDPSrm, X86_INS_VANDPS: vandps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFvANDPSrr, X86_INS_VANDPS: vandps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFvORPDrm, X86_INS_VORPD: vorpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFvORPDrr, X86_INS_VORPD: vorpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFvORPSrm, X86_INS_VORPS: vorps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFvORPSrr, X86_INS_VORPS: vorps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFvXORPDrm, X86_INS_VXORPD: vxorpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFvXORPDrr, X86_INS_VXORPD: vxorpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFvXORPSrm, X86_INS_VXORPS: vxorps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VFvXORPSrr, X86_INS_VXORPS: vxorps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VGATHERDPDYrm, X86_INS_VGATHERDPD: vgatherdpd	$dst, $src2, $mask */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VGATHERDPDZrm, X86_INS_VGATHERDPD: vgatherdpd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VGATHERDPDrm, X86_INS_VGATHERDPD: vgatherdpd	$dst, $src2, $mask */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VGATHERDPSYrm, X86_INS_VGATHERDPS: vgatherdps	$dst, $src2, $mask */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VGATHERDPSZrm, X86_INS_VGATHERDPS: vgatherdps	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VGATHERDPSrm, X86_INS_VGATHERDPS: vgatherdps	$dst, $src2, $mask */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VGATHERPF0DPDm, X86_INS_VGATHERPF0DPD: vgatherpf0dpd	{$src {${mask}}|{${mask}}, $src} */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_VGATHERPF0DPSm, X86_INS_VGATHERPF0DPS: vgatherpf0dps	{$src {${mask}}|{${mask}}, $src} */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_VGATHERPF0QPDm, X86_INS_VGATHERPF0QPD: vgatherpf0qpd	{$src {${mask}}|{${mask}}, $src} */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_VGATHERPF0QPSm, X86_INS_VGATHERPF0QPS: vgatherpf0qps	{$src {${mask}}|{${mask}}, $src} */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_VGATHERPF1DPDm, X86_INS_VGATHERPF1DPD: vgatherpf1dpd	{$src {${mask}}|{${mask}}, $src} */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_VGATHERPF1DPSm, X86_INS_VGATHERPF1DPS: vgatherpf1dps	{$src {${mask}}|{${mask}}, $src} */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_VGATHERPF1QPDm, X86_INS_VGATHERPF1QPD: vgatherpf1qpd	{$src {${mask}}|{${mask}}, $src} */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_VGATHERPF1QPSm, X86_INS_VGATHERPF1QPS: vgatherpf1qps	{$src {${mask}}|{${mask}}, $src} */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_VGATHERQPDYrm, X86_INS_VGATHERQPD: vgatherqpd	$dst, $src2, $mask */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VGATHERQPDZrm, X86_INS_VGATHERQPD: vgatherqpd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VGATHERQPDrm, X86_INS_VGATHERQPD: vgatherqpd	$dst, $src2, $mask */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VGATHERQPSYrm, X86_INS_VGATHERQPS: vgatherqps	$dst, $src2, $mask */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VGATHERQPSZrm, X86_INS_VGATHERQPS: vgatherqps	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VGATHERQPSrm, X86_INS_VGATHERQPS: vgatherqps	$dst, $src2, $mask */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VHADDPDYrm, X86_INS_VHADDPD: vhaddpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VHADDPDYrr, X86_INS_VHADDPD: vhaddpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VHADDPDrm, X86_INS_VHADDPD: vhaddpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VHADDPDrr, X86_INS_VHADDPD: vhaddpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VHADDPSYrm, X86_INS_VHADDPS: vhaddps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VHADDPSYrr, X86_INS_VHADDPS: vhaddps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VHADDPSrm, X86_INS_VHADDPS: vhaddps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VHADDPSrr, X86_INS_VHADDPS: vhaddps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VHSUBPDYrm, X86_INS_VHSUBPD: vhsubpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VHSUBPDYrr, X86_INS_VHSUBPD: vhsubpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VHSUBPDrm, X86_INS_VHSUBPD: vhsubpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VHSUBPDrr, X86_INS_VHSUBPD: vhsubpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VHSUBPSYrm, X86_INS_VHSUBPS: vhsubps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VHSUBPSYrr, X86_INS_VHSUBPS: vhsubps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VHSUBPSrm, X86_INS_VHSUBPS: vhsubps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VHSUBPSrr, X86_INS_VHSUBPS: vhsubps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VINSERTF128rm, X86_INS_VINSERTF128: vinsertf128	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VINSERTF128rr, X86_INS_VINSERTF128: vinsertf128	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VINSERTF32x4rm, X86_INS_VINSERTF32X4: vinsertf32x4	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VINSERTF32x4rr, X86_INS_VINSERTF32X4: vinsertf32x4	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VINSERTF32x8rm, X86_INS_VINSERTF32X8: vinsertf32x8	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VINSERTF32x8rr, X86_INS_VINSERTF32X8: vinsertf32x8	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VINSERTF64x2rm, X86_INS_VINSERTF64X2: vinsertf64x2	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VINSERTF64x2rr, X86_INS_VINSERTF64X2: vinsertf64x2	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VINSERTF64x4rm, X86_INS_VINSERTF64X4: vinsertf64x4	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VINSERTF64x4rr, X86_INS_VINSERTF64X4: vinsertf64x4	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VINSERTI128rm, X86_INS_VINSERTI128: vinserti128	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VINSERTI128rr, X86_INS_VINSERTI128: vinserti128	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VINSERTI32x4rm, X86_INS_VINSERTI32X4: vinserti32x4	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VINSERTI32x4rr, X86_INS_VINSERTI32X4: vinserti32x4	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VINSERTI32x8rm, X86_INS_VINSERTI32X8: vinserti32x8	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VINSERTI32x8rr, X86_INS_VINSERTI32X8: vinserti32x8	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VINSERTI64x2rm, X86_INS_VINSERTI64X2: vinserti64x2	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VINSERTI64x2rr, X86_INS_VINSERTI64X2: vinserti64x2	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VINSERTI64x4rm, X86_INS_VINSERTI64X4: vinserti64x4	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VINSERTI64x4rr, X86_INS_VINSERTI64X4: vinserti64x4	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VINSERTPSrm, X86_INS_VINSERTPS: vinsertps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VINSERTPSrr, X86_INS_VINSERTPS: vinsertps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VINSERTPSzrm, X86_INS_VINSERTPS: vinsertps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VINSERTPSzrr, X86_INS_VINSERTPS: vinsertps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VLDDQUYrm, X86_INS_VLDDQU: vlddqu	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VLDDQUrm, X86_INS_VLDDQU: vlddqu	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VLDMXCSR, X86_INS_VLDMXCSR: vldmxcsr	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_VMASKMOVDQU, X86_INS_VMASKMOVDQU: vmaskmovdqu	$src, $mask */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMASKMOVDQU64, X86_INS_VMASKMOVDQU: vmaskmovdqu	$src, $mask */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMASKMOVPDYmr, X86_INS_VMASKMOVPD: vmaskmovpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMASKMOVPDYrm, X86_INS_VMASKMOVPD: vmaskmovpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMASKMOVPDmr, X86_INS_VMASKMOVPD: vmaskmovpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMASKMOVPDrm, X86_INS_VMASKMOVPD: vmaskmovpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMASKMOVPSYmr, X86_INS_VMASKMOVPS: vmaskmovps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMASKMOVPSYrm, X86_INS_VMASKMOVPS: vmaskmovps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMASKMOVPSmr, X86_INS_VMASKMOVPS: vmaskmovps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMASKMOVPSrm, X86_INS_VMASKMOVPS: vmaskmovps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXCPDYrm, X86_INS_VMAXPD: vmaxpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXCPDYrr, X86_INS_VMAXPD: vmaxpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXCPDrm, X86_INS_VMAXPD: vmaxpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXCPDrr, X86_INS_VMAXPD: vmaxpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXCPSYrm, X86_INS_VMAXPS: vmaxps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXCPSYrr, X86_INS_VMAXPS: vmaxps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXCPSrm, X86_INS_VMAXPS: vmaxps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXCPSrr, X86_INS_VMAXPS: vmaxps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXCSDrm, X86_INS_VMAXSD: vmaxsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXCSDrr, X86_INS_VMAXSD: vmaxsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXCSSrm, X86_INS_VMAXSS: vmaxss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXCSSrr, X86_INS_VMAXSS: vmaxss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDYrm, X86_INS_VMAXPD: vmaxpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDYrr, X86_INS_VMAXPD: vmaxpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZ128rm, X86_INS_VMAXPD: vmaxpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZ128rmb, X86_INS_VMAXPD: vmaxpd	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZ128rmbk, X86_INS_VMAXPD: vmaxpd	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZ128rmbkz, X86_INS_VMAXPD: vmaxpd	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZ128rmk, X86_INS_VMAXPD: vmaxpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZ128rmkz, X86_INS_VMAXPD: vmaxpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZ128rr, X86_INS_VMAXPD: vmaxpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZ128rrk, X86_INS_VMAXPD: vmaxpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZ128rrkz, X86_INS_VMAXPD: vmaxpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZ256rm, X86_INS_VMAXPD: vmaxpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZ256rmb, X86_INS_VMAXPD: vmaxpd	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZ256rmbk, X86_INS_VMAXPD: vmaxpd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZ256rmbkz, X86_INS_VMAXPD: vmaxpd	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZ256rmk, X86_INS_VMAXPD: vmaxpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZ256rmkz, X86_INS_VMAXPD: vmaxpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZ256rr, X86_INS_VMAXPD: vmaxpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZ256rrk, X86_INS_VMAXPD: vmaxpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZ256rrkz, X86_INS_VMAXPD: vmaxpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZrm, X86_INS_VMAXPD: vmaxpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZrmb, X86_INS_VMAXPD: vmaxpd	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZrmbk, X86_INS_VMAXPD: vmaxpd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZrmbkz, X86_INS_VMAXPD: vmaxpd	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZrmk, X86_INS_VMAXPD: vmaxpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZrmkz, X86_INS_VMAXPD: vmaxpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZrr, X86_INS_VMAXPD: vmaxpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZrrk, X86_INS_VMAXPD: vmaxpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDZrrkz, X86_INS_VMAXPD: vmaxpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDrm, X86_INS_VMAXPD: vmaxpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPDrr, X86_INS_VMAXPD: vmaxpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSYrm, X86_INS_VMAXPS: vmaxps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSYrr, X86_INS_VMAXPS: vmaxps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZ128rm, X86_INS_VMAXPS: vmaxps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZ128rmb, X86_INS_VMAXPS: vmaxps	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZ128rmbk, X86_INS_VMAXPS: vmaxps	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZ128rmbkz, X86_INS_VMAXPS: vmaxps	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZ128rmk, X86_INS_VMAXPS: vmaxps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZ128rmkz, X86_INS_VMAXPS: vmaxps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZ128rr, X86_INS_VMAXPS: vmaxps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZ128rrk, X86_INS_VMAXPS: vmaxps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZ128rrkz, X86_INS_VMAXPS: vmaxps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZ256rm, X86_INS_VMAXPS: vmaxps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZ256rmb, X86_INS_VMAXPS: vmaxps	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZ256rmbk, X86_INS_VMAXPS: vmaxps	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZ256rmbkz, X86_INS_VMAXPS: vmaxps	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZ256rmk, X86_INS_VMAXPS: vmaxps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZ256rmkz, X86_INS_VMAXPS: vmaxps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZ256rr, X86_INS_VMAXPS: vmaxps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZ256rrk, X86_INS_VMAXPS: vmaxps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZ256rrkz, X86_INS_VMAXPS: vmaxps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZrm, X86_INS_VMAXPS: vmaxps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZrmb, X86_INS_VMAXPS: vmaxps	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZrmbk, X86_INS_VMAXPS: vmaxps	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZrmbkz, X86_INS_VMAXPS: vmaxps	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZrmk, X86_INS_VMAXPS: vmaxps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZrmkz, X86_INS_VMAXPS: vmaxps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZrr, X86_INS_VMAXPS: vmaxps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZrrk, X86_INS_VMAXPS: vmaxps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSZrrkz, X86_INS_VMAXPS: vmaxps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSrm, X86_INS_VMAXPS: vmaxps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXPSrr, X86_INS_VMAXPS: vmaxps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSDZrm, X86_INS_VMAXSD: vmaxsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSDZrm_Int, X86_INS_VMAXSD: vmaxsd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSDZrm_Intk, X86_INS_VMAXSD: vmaxsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSDZrm_Intkz, X86_INS_VMAXSD: vmaxsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSDZrr, X86_INS_VMAXSD: vmaxsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSDZrr_Int, X86_INS_VMAXSD: vmaxsd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSDZrr_Intk, X86_INS_VMAXSD: vmaxsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSDZrr_Intkz, X86_INS_VMAXSD: vmaxsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSDZrrb, X86_INS_VMAXSD: vmaxsd	{$src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSDZrrbk, X86_INS_VMAXSD: vmaxsd	{$src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSDZrrbkz, X86_INS_VMAXSD: vmaxsd	{$src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSDrm, X86_INS_VMAXSD: vmaxsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSDrm_Int, X86_INS_VMAXSD: vmaxsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSDrr, X86_INS_VMAXSD: vmaxsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSDrr_Int, X86_INS_VMAXSD: vmaxsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSSZrm, X86_INS_VMAXSS: vmaxss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSSZrm_Int, X86_INS_VMAXSS: vmaxss	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSSZrm_Intk, X86_INS_VMAXSS: vmaxss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSSZrm_Intkz, X86_INS_VMAXSS: vmaxss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSSZrr, X86_INS_VMAXSS: vmaxss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSSZrr_Int, X86_INS_VMAXSS: vmaxss	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSSZrr_Intk, X86_INS_VMAXSS: vmaxss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSSZrr_Intkz, X86_INS_VMAXSS: vmaxss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSSZrrb, X86_INS_VMAXSS: vmaxss	{$src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSSZrrbk, X86_INS_VMAXSS: vmaxss	{$src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSSZrrbkz, X86_INS_VMAXSS: vmaxss	{$src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSSrm, X86_INS_VMAXSS: vmaxss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSSrm_Int, X86_INS_VMAXSS: vmaxss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSSrr, X86_INS_VMAXSS: vmaxss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMAXSSrr_Int, X86_INS_VMAXSS: vmaxss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMCALL, X86_INS_VMCALL: vmcall */
+	0,
+	{ 0 }
+},
+{	/* X86_VMCLEARm, X86_INS_VMCLEAR: vmclear	$vmcs */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_VMFUNC, X86_INS_VMFUNC: vmfunc */
+	0,
+	{ 0 }
+},
+{	/* X86_VMINCPDYrm, X86_INS_VMINPD: vminpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINCPDYrr, X86_INS_VMINPD: vminpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINCPDrm, X86_INS_VMINPD: vminpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINCPDrr, X86_INS_VMINPD: vminpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINCPSYrm, X86_INS_VMINPS: vminps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINCPSYrr, X86_INS_VMINPS: vminps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINCPSrm, X86_INS_VMINPS: vminps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINCPSrr, X86_INS_VMINPS: vminps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINCSDrm, X86_INS_VMINSD: vminsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINCSDrr, X86_INS_VMINSD: vminsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINCSSrm, X86_INS_VMINSS: vminss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINCSSrr, X86_INS_VMINSS: vminss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDYrm, X86_INS_VMINPD: vminpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDYrr, X86_INS_VMINPD: vminpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZ128rm, X86_INS_VMINPD: vminpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZ128rmb, X86_INS_VMINPD: vminpd	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZ128rmbk, X86_INS_VMINPD: vminpd	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZ128rmbkz, X86_INS_VMINPD: vminpd	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZ128rmk, X86_INS_VMINPD: vminpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZ128rmkz, X86_INS_VMINPD: vminpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZ128rr, X86_INS_VMINPD: vminpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZ128rrk, X86_INS_VMINPD: vminpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZ128rrkz, X86_INS_VMINPD: vminpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZ256rm, X86_INS_VMINPD: vminpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZ256rmb, X86_INS_VMINPD: vminpd	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZ256rmbk, X86_INS_VMINPD: vminpd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZ256rmbkz, X86_INS_VMINPD: vminpd	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZ256rmk, X86_INS_VMINPD: vminpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZ256rmkz, X86_INS_VMINPD: vminpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZ256rr, X86_INS_VMINPD: vminpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZ256rrk, X86_INS_VMINPD: vminpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZ256rrkz, X86_INS_VMINPD: vminpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZrm, X86_INS_VMINPD: vminpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZrmb, X86_INS_VMINPD: vminpd	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZrmbk, X86_INS_VMINPD: vminpd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZrmbkz, X86_INS_VMINPD: vminpd	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZrmk, X86_INS_VMINPD: vminpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZrmkz, X86_INS_VMINPD: vminpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZrr, X86_INS_VMINPD: vminpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZrrk, X86_INS_VMINPD: vminpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDZrrkz, X86_INS_VMINPD: vminpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDrm, X86_INS_VMINPD: vminpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPDrr, X86_INS_VMINPD: vminpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSYrm, X86_INS_VMINPS: vminps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSYrr, X86_INS_VMINPS: vminps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZ128rm, X86_INS_VMINPS: vminps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZ128rmb, X86_INS_VMINPS: vminps	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZ128rmbk, X86_INS_VMINPS: vminps	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZ128rmbkz, X86_INS_VMINPS: vminps	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZ128rmk, X86_INS_VMINPS: vminps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZ128rmkz, X86_INS_VMINPS: vminps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZ128rr, X86_INS_VMINPS: vminps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZ128rrk, X86_INS_VMINPS: vminps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZ128rrkz, X86_INS_VMINPS: vminps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZ256rm, X86_INS_VMINPS: vminps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZ256rmb, X86_INS_VMINPS: vminps	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZ256rmbk, X86_INS_VMINPS: vminps	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZ256rmbkz, X86_INS_VMINPS: vminps	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZ256rmk, X86_INS_VMINPS: vminps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZ256rmkz, X86_INS_VMINPS: vminps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZ256rr, X86_INS_VMINPS: vminps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZ256rrk, X86_INS_VMINPS: vminps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZ256rrkz, X86_INS_VMINPS: vminps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZrm, X86_INS_VMINPS: vminps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZrmb, X86_INS_VMINPS: vminps	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZrmbk, X86_INS_VMINPS: vminps	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZrmbkz, X86_INS_VMINPS: vminps	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZrmk, X86_INS_VMINPS: vminps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZrmkz, X86_INS_VMINPS: vminps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZrr, X86_INS_VMINPS: vminps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZrrk, X86_INS_VMINPS: vminps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSZrrkz, X86_INS_VMINPS: vminps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSrm, X86_INS_VMINPS: vminps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINPSrr, X86_INS_VMINPS: vminps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSDZrm, X86_INS_VMINSD: vminsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSDZrm_Int, X86_INS_VMINSD: vminsd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSDZrm_Intk, X86_INS_VMINSD: vminsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSDZrm_Intkz, X86_INS_VMINSD: vminsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSDZrr, X86_INS_VMINSD: vminsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSDZrr_Int, X86_INS_VMINSD: vminsd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSDZrr_Intk, X86_INS_VMINSD: vminsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSDZrr_Intkz, X86_INS_VMINSD: vminsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSDZrrb, X86_INS_VMINSD: vminsd	{$src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSDZrrbk, X86_INS_VMINSD: vminsd	{$src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSDZrrbkz, X86_INS_VMINSD: vminsd	{$src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSDrm, X86_INS_VMINSD: vminsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSDrm_Int, X86_INS_VMINSD: vminsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSDrr, X86_INS_VMINSD: vminsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSDrr_Int, X86_INS_VMINSD: vminsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSSZrm, X86_INS_VMINSS: vminss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSSZrm_Int, X86_INS_VMINSS: vminss	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSSZrm_Intk, X86_INS_VMINSS: vminss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSSZrm_Intkz, X86_INS_VMINSS: vminss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSSZrr, X86_INS_VMINSS: vminss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSSZrr_Int, X86_INS_VMINSS: vminss	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSSZrr_Intk, X86_INS_VMINSS: vminss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSSZrr_Intkz, X86_INS_VMINSS: vminss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSSZrrb, X86_INS_VMINSS: vminss	{$src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSSZrrbk, X86_INS_VMINSS: vminss	{$src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSSZrrbkz, X86_INS_VMINSS: vminss	{$src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSSrm, X86_INS_VMINSS: vminss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSSrm_Int, X86_INS_VMINSS: vminss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSSrr, X86_INS_VMINSS: vminss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMINSSrr_Int, X86_INS_VMINSS: vminss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMLAUNCH, X86_INS_VMLAUNCH: vmlaunch */
+	0,
+	{ 0 }
+},
+{	/* X86_VMLOAD32, X86_INS_VMLOAD: vmload	eax */
+	0,
+	{ 0 }
+},
+{	/* X86_VMLOAD64, X86_INS_VMLOAD: vmload	rax */
+	0,
+	{ 0 }
+},
+{	/* X86_VMMCALL, X86_INS_VMMCALL: vmmcall */
+	0,
+	{ 0 }
+},
+{	/* X86_VMOV64toPQIZrr, X86_INS_VMOVQ: vmovq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOV64toPQIrm, X86_INS_VMOVQ: vmovq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOV64toPQIrr, X86_INS_VMOVQ: vmovq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOV64toSDZrr, X86_INS_VMOVQ: vmovq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOV64toSDrm, X86_INS_VMOVQ: vmovq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOV64toSDrr, X86_INS_VMOVQ: vmovq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDYmr, X86_INS_VMOVAPD: vmovapd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDYrm, X86_INS_VMOVAPD: vmovapd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDYrr, X86_INS_VMOVAPD: vmovapd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDYrr_REV, X86_INS_VMOVAPD: vmovapd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZ128mr, X86_INS_VMOVAPD: vmovapd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZ128mrk, X86_INS_VMOVAPD: vmovapd	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZ128rm, X86_INS_VMOVAPD: vmovapd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZ128rmk, X86_INS_VMOVAPD: vmovapd	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZ128rmkz, X86_INS_VMOVAPD: vmovapd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZ128rr, X86_INS_VMOVAPD: vmovapd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZ128rr_alt, X86_INS_VMOVAPD: vmovapd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZ128rrk, X86_INS_VMOVAPD: vmovapd	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZ128rrk_alt, X86_INS_VMOVAPD: vmovapd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZ128rrkz, X86_INS_VMOVAPD: vmovapd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZ128rrkz_alt, X86_INS_VMOVAPD: vmovapd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZ256mr, X86_INS_VMOVAPD: vmovapd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZ256mrk, X86_INS_VMOVAPD: vmovapd	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZ256rm, X86_INS_VMOVAPD: vmovapd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZ256rmk, X86_INS_VMOVAPD: vmovapd	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZ256rmkz, X86_INS_VMOVAPD: vmovapd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZ256rr, X86_INS_VMOVAPD: vmovapd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZ256rr_alt, X86_INS_VMOVAPD: vmovapd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZ256rrk, X86_INS_VMOVAPD: vmovapd	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZ256rrk_alt, X86_INS_VMOVAPD: vmovapd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZ256rrkz, X86_INS_VMOVAPD: vmovapd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZ256rrkz_alt, X86_INS_VMOVAPD: vmovapd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZmr, X86_INS_VMOVAPD: vmovapd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZmrk, X86_INS_VMOVAPD: vmovapd	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZrm, X86_INS_VMOVAPD: vmovapd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZrmk, X86_INS_VMOVAPD: vmovapd	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZrmkz, X86_INS_VMOVAPD: vmovapd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZrr, X86_INS_VMOVAPD: vmovapd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZrr_alt, X86_INS_VMOVAPD: vmovapd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZrrk, X86_INS_VMOVAPD: vmovapd	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZrrk_alt, X86_INS_VMOVAPD: vmovapd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZrrkz, X86_INS_VMOVAPD: vmovapd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDZrrkz_alt, X86_INS_VMOVAPD: vmovapd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDmr, X86_INS_VMOVAPD: vmovapd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDrm, X86_INS_VMOVAPD: vmovapd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDrr, X86_INS_VMOVAPD: vmovapd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPDrr_REV, X86_INS_VMOVAPD: vmovapd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSYmr, X86_INS_VMOVAPS: vmovaps	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSYrm, X86_INS_VMOVAPS: vmovaps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSYrr, X86_INS_VMOVAPS: vmovaps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSYrr_REV, X86_INS_VMOVAPS: vmovaps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZ128mr, X86_INS_VMOVAPS: vmovaps	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZ128mrk, X86_INS_VMOVAPS: vmovaps	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZ128rm, X86_INS_VMOVAPS: vmovaps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZ128rmk, X86_INS_VMOVAPS: vmovaps	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZ128rmkz, X86_INS_VMOVAPS: vmovaps	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZ128rr, X86_INS_VMOVAPS: vmovaps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZ128rr_alt, X86_INS_VMOVAPS: vmovaps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZ128rrk, X86_INS_VMOVAPS: vmovaps	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZ128rrk_alt, X86_INS_VMOVAPS: vmovaps	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZ128rrkz, X86_INS_VMOVAPS: vmovaps	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZ128rrkz_alt, X86_INS_VMOVAPS: vmovaps	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZ256mr, X86_INS_VMOVAPS: vmovaps	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZ256mrk, X86_INS_VMOVAPS: vmovaps	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZ256rm, X86_INS_VMOVAPS: vmovaps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZ256rmk, X86_INS_VMOVAPS: vmovaps	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZ256rmkz, X86_INS_VMOVAPS: vmovaps	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZ256rr, X86_INS_VMOVAPS: vmovaps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZ256rr_alt, X86_INS_VMOVAPS: vmovaps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZ256rrk, X86_INS_VMOVAPS: vmovaps	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZ256rrk_alt, X86_INS_VMOVAPS: vmovaps	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZ256rrkz, X86_INS_VMOVAPS: vmovaps	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZ256rrkz_alt, X86_INS_VMOVAPS: vmovaps	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZmr, X86_INS_VMOVAPS: vmovaps	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZmrk, X86_INS_VMOVAPS: vmovaps	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZrm, X86_INS_VMOVAPS: vmovaps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZrmk, X86_INS_VMOVAPS: vmovaps	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZrmkz, X86_INS_VMOVAPS: vmovaps	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZrr, X86_INS_VMOVAPS: vmovaps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZrr_alt, X86_INS_VMOVAPS: vmovaps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZrrk, X86_INS_VMOVAPS: vmovaps	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZrrk_alt, X86_INS_VMOVAPS: vmovaps	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZrrkz, X86_INS_VMOVAPS: vmovaps	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSZrrkz_alt, X86_INS_VMOVAPS: vmovaps	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSmr, X86_INS_VMOVAPS: vmovaps	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSrm, X86_INS_VMOVAPS: vmovaps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSrr, X86_INS_VMOVAPS: vmovaps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVAPSrr_REV, X86_INS_VMOVAPS: vmovaps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDDUPYrm, X86_INS_VMOVDDUP: vmovddup	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDDUPYrr, X86_INS_VMOVDDUP: vmovddup	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDDUPZrm, X86_INS_VMOVDDUP: vmovddup	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDDUPZrr, X86_INS_VMOVDDUP: vmovddup	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDDUPrm, X86_INS_VMOVDDUP: vmovddup	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDDUPrr, X86_INS_VMOVDDUP: vmovddup	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDI2PDIZrm, X86_INS_VMOVD: vmovd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDI2PDIZrr, X86_INS_VMOVD: vmovd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDI2PDIrm, X86_INS_VMOVD: vmovd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDI2PDIrr, X86_INS_VMOVD: vmovd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDI2SSZrm, X86_INS_VMOVD: vmovd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDI2SSZrr, X86_INS_VMOVD: vmovd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDI2SSrm, X86_INS_VMOVD: vmovd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDI2SSrr, X86_INS_VMOVD: vmovd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Z128mr, X86_INS_VMOVDQA32: vmovdqa32	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Z128mrk, X86_INS_VMOVDQA32: vmovdqa32	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Z128rm, X86_INS_VMOVDQA32: vmovdqa32	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Z128rmk, X86_INS_VMOVDQA32: vmovdqa32	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Z128rmkz, X86_INS_VMOVDQA32: vmovdqa32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Z128rr, X86_INS_VMOVDQA32: vmovdqa32	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Z128rr_alt, X86_INS_VMOVDQA32: vmovdqa32	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Z128rrk, X86_INS_VMOVDQA32: vmovdqa32	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Z128rrk_alt, X86_INS_VMOVDQA32: vmovdqa32	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Z128rrkz, X86_INS_VMOVDQA32: vmovdqa32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Z128rrkz_alt, X86_INS_VMOVDQA32: vmovdqa32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Z256mr, X86_INS_VMOVDQA32: vmovdqa32	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Z256mrk, X86_INS_VMOVDQA32: vmovdqa32	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Z256rm, X86_INS_VMOVDQA32: vmovdqa32	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Z256rmk, X86_INS_VMOVDQA32: vmovdqa32	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Z256rmkz, X86_INS_VMOVDQA32: vmovdqa32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Z256rr, X86_INS_VMOVDQA32: vmovdqa32	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Z256rr_alt, X86_INS_VMOVDQA32: vmovdqa32	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Z256rrk, X86_INS_VMOVDQA32: vmovdqa32	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Z256rrk_alt, X86_INS_VMOVDQA32: vmovdqa32	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Z256rrkz, X86_INS_VMOVDQA32: vmovdqa32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Z256rrkz_alt, X86_INS_VMOVDQA32: vmovdqa32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Zmr, X86_INS_VMOVDQA32: vmovdqa32	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Zmrk, X86_INS_VMOVDQA32: vmovdqa32	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Zrm, X86_INS_VMOVDQA32: vmovdqa32	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Zrmk, X86_INS_VMOVDQA32: vmovdqa32	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Zrmkz, X86_INS_VMOVDQA32: vmovdqa32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Zrr, X86_INS_VMOVDQA32: vmovdqa32	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Zrr_alt, X86_INS_VMOVDQA32: vmovdqa32	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Zrrk, X86_INS_VMOVDQA32: vmovdqa32	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Zrrk_alt, X86_INS_VMOVDQA32: vmovdqa32	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Zrrkz, X86_INS_VMOVDQA32: vmovdqa32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA32Zrrkz_alt, X86_INS_VMOVDQA32: vmovdqa32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Z128mr, X86_INS_VMOVDQA64: vmovdqa64	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Z128mrk, X86_INS_VMOVDQA64: vmovdqa64	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Z128rm, X86_INS_VMOVDQA64: vmovdqa64	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Z128rmk, X86_INS_VMOVDQA64: vmovdqa64	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Z128rmkz, X86_INS_VMOVDQA64: vmovdqa64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Z128rr, X86_INS_VMOVDQA64: vmovdqa64	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Z128rr_alt, X86_INS_VMOVDQA64: vmovdqa64	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Z128rrk, X86_INS_VMOVDQA64: vmovdqa64	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Z128rrk_alt, X86_INS_VMOVDQA64: vmovdqa64	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Z128rrkz, X86_INS_VMOVDQA64: vmovdqa64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Z128rrkz_alt, X86_INS_VMOVDQA64: vmovdqa64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Z256mr, X86_INS_VMOVDQA64: vmovdqa64	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Z256mrk, X86_INS_VMOVDQA64: vmovdqa64	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Z256rm, X86_INS_VMOVDQA64: vmovdqa64	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Z256rmk, X86_INS_VMOVDQA64: vmovdqa64	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Z256rmkz, X86_INS_VMOVDQA64: vmovdqa64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Z256rr, X86_INS_VMOVDQA64: vmovdqa64	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Z256rr_alt, X86_INS_VMOVDQA64: vmovdqa64	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Z256rrk, X86_INS_VMOVDQA64: vmovdqa64	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Z256rrk_alt, X86_INS_VMOVDQA64: vmovdqa64	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Z256rrkz, X86_INS_VMOVDQA64: vmovdqa64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Z256rrkz_alt, X86_INS_VMOVDQA64: vmovdqa64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Zmr, X86_INS_VMOVDQA64: vmovdqa64	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Zmrk, X86_INS_VMOVDQA64: vmovdqa64	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Zrm, X86_INS_VMOVDQA64: vmovdqa64	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Zrmk, X86_INS_VMOVDQA64: vmovdqa64	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Zrmkz, X86_INS_VMOVDQA64: vmovdqa64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Zrr, X86_INS_VMOVDQA64: vmovdqa64	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Zrr_alt, X86_INS_VMOVDQA64: vmovdqa64	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Zrrk, X86_INS_VMOVDQA64: vmovdqa64	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Zrrk_alt, X86_INS_VMOVDQA64: vmovdqa64	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Zrrkz, X86_INS_VMOVDQA64: vmovdqa64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQA64Zrrkz_alt, X86_INS_VMOVDQA64: vmovdqa64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQAYmr, X86_INS_VMOVDQA: vmovdqa	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQAYrm, X86_INS_VMOVDQA: vmovdqa	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQAYrr, X86_INS_VMOVDQA: vmovdqa	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQAYrr_REV, X86_INS_VMOVDQA: vmovdqa	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQAmr, X86_INS_VMOVDQA: vmovdqa	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQArm, X86_INS_VMOVDQA: vmovdqa	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQArr, X86_INS_VMOVDQA: vmovdqa	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQArr_REV, X86_INS_VMOVDQA: vmovdqa	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Z128mr, X86_INS_VMOVDQU16: vmovdqu16	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Z128mrk, X86_INS_VMOVDQU16: vmovdqu16	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Z128rm, X86_INS_VMOVDQU16: vmovdqu16	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Z128rmk, X86_INS_VMOVDQU16: vmovdqu16	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Z128rmkz, X86_INS_VMOVDQU16: vmovdqu16	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Z128rr, X86_INS_VMOVDQU16: vmovdqu16	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Z128rr_alt, X86_INS_VMOVDQU16: vmovdqu16	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Z128rrk, X86_INS_VMOVDQU16: vmovdqu16	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Z128rrk_alt, X86_INS_VMOVDQU16: vmovdqu16	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Z128rrkz, X86_INS_VMOVDQU16: vmovdqu16	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Z128rrkz_alt, X86_INS_VMOVDQU16: vmovdqu16	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Z256mr, X86_INS_VMOVDQU16: vmovdqu16	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Z256mrk, X86_INS_VMOVDQU16: vmovdqu16	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Z256rm, X86_INS_VMOVDQU16: vmovdqu16	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Z256rmk, X86_INS_VMOVDQU16: vmovdqu16	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Z256rmkz, X86_INS_VMOVDQU16: vmovdqu16	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Z256rr, X86_INS_VMOVDQU16: vmovdqu16	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Z256rr_alt, X86_INS_VMOVDQU16: vmovdqu16	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Z256rrk, X86_INS_VMOVDQU16: vmovdqu16	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Z256rrk_alt, X86_INS_VMOVDQU16: vmovdqu16	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Z256rrkz, X86_INS_VMOVDQU16: vmovdqu16	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Z256rrkz_alt, X86_INS_VMOVDQU16: vmovdqu16	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Zmr, X86_INS_VMOVDQU16: vmovdqu16	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Zmrk, X86_INS_VMOVDQU16: vmovdqu16	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Zrm, X86_INS_VMOVDQU16: vmovdqu16	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Zrmk, X86_INS_VMOVDQU16: vmovdqu16	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Zrmkz, X86_INS_VMOVDQU16: vmovdqu16	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Zrr, X86_INS_VMOVDQU16: vmovdqu16	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Zrr_alt, X86_INS_VMOVDQU16: vmovdqu16	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Zrrk, X86_INS_VMOVDQU16: vmovdqu16	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Zrrk_alt, X86_INS_VMOVDQU16: vmovdqu16	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Zrrkz, X86_INS_VMOVDQU16: vmovdqu16	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU16Zrrkz_alt, X86_INS_VMOVDQU16: vmovdqu16	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Z128mr, X86_INS_VMOVDQU32: vmovdqu32	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Z128mrk, X86_INS_VMOVDQU32: vmovdqu32	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Z128rm, X86_INS_VMOVDQU32: vmovdqu32	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Z128rmk, X86_INS_VMOVDQU32: vmovdqu32	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Z128rmkz, X86_INS_VMOVDQU32: vmovdqu32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Z128rr, X86_INS_VMOVDQU32: vmovdqu32	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Z128rr_alt, X86_INS_VMOVDQU32: vmovdqu32	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Z128rrk, X86_INS_VMOVDQU32: vmovdqu32	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Z128rrk_alt, X86_INS_VMOVDQU32: vmovdqu32	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Z128rrkz, X86_INS_VMOVDQU32: vmovdqu32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Z128rrkz_alt, X86_INS_VMOVDQU32: vmovdqu32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Z256mr, X86_INS_VMOVDQU32: vmovdqu32	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Z256mrk, X86_INS_VMOVDQU32: vmovdqu32	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Z256rm, X86_INS_VMOVDQU32: vmovdqu32	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Z256rmk, X86_INS_VMOVDQU32: vmovdqu32	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Z256rmkz, X86_INS_VMOVDQU32: vmovdqu32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Z256rr, X86_INS_VMOVDQU32: vmovdqu32	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Z256rr_alt, X86_INS_VMOVDQU32: vmovdqu32	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Z256rrk, X86_INS_VMOVDQU32: vmovdqu32	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Z256rrk_alt, X86_INS_VMOVDQU32: vmovdqu32	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Z256rrkz, X86_INS_VMOVDQU32: vmovdqu32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Z256rrkz_alt, X86_INS_VMOVDQU32: vmovdqu32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Zmr, X86_INS_VMOVDQU32: vmovdqu32	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Zmrk, X86_INS_VMOVDQU32: vmovdqu32	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Zrm, X86_INS_VMOVDQU32: vmovdqu32	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Zrmk, X86_INS_VMOVDQU32: vmovdqu32	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Zrmkz, X86_INS_VMOVDQU32: vmovdqu32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Zrr, X86_INS_VMOVDQU32: vmovdqu32	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Zrr_alt, X86_INS_VMOVDQU32: vmovdqu32	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Zrrk, X86_INS_VMOVDQU32: vmovdqu32	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Zrrk_alt, X86_INS_VMOVDQU32: vmovdqu32	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Zrrkz, X86_INS_VMOVDQU32: vmovdqu32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU32Zrrkz_alt, X86_INS_VMOVDQU32: vmovdqu32	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Z128mr, X86_INS_VMOVDQU64: vmovdqu64	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Z128mrk, X86_INS_VMOVDQU64: vmovdqu64	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Z128rm, X86_INS_VMOVDQU64: vmovdqu64	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Z128rmk, X86_INS_VMOVDQU64: vmovdqu64	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Z128rmkz, X86_INS_VMOVDQU64: vmovdqu64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Z128rr, X86_INS_VMOVDQU64: vmovdqu64	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Z128rr_alt, X86_INS_VMOVDQU64: vmovdqu64	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Z128rrk, X86_INS_VMOVDQU64: vmovdqu64	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Z128rrk_alt, X86_INS_VMOVDQU64: vmovdqu64	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Z128rrkz, X86_INS_VMOVDQU64: vmovdqu64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Z128rrkz_alt, X86_INS_VMOVDQU64: vmovdqu64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Z256mr, X86_INS_VMOVDQU64: vmovdqu64	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Z256mrk, X86_INS_VMOVDQU64: vmovdqu64	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Z256rm, X86_INS_VMOVDQU64: vmovdqu64	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Z256rmk, X86_INS_VMOVDQU64: vmovdqu64	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Z256rmkz, X86_INS_VMOVDQU64: vmovdqu64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Z256rr, X86_INS_VMOVDQU64: vmovdqu64	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Z256rr_alt, X86_INS_VMOVDQU64: vmovdqu64	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Z256rrk, X86_INS_VMOVDQU64: vmovdqu64	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Z256rrk_alt, X86_INS_VMOVDQU64: vmovdqu64	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Z256rrkz, X86_INS_VMOVDQU64: vmovdqu64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Z256rrkz_alt, X86_INS_VMOVDQU64: vmovdqu64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Zmr, X86_INS_VMOVDQU64: vmovdqu64	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Zmrk, X86_INS_VMOVDQU64: vmovdqu64	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Zrm, X86_INS_VMOVDQU64: vmovdqu64	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Zrmk, X86_INS_VMOVDQU64: vmovdqu64	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Zrmkz, X86_INS_VMOVDQU64: vmovdqu64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Zrr, X86_INS_VMOVDQU64: vmovdqu64	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Zrr_alt, X86_INS_VMOVDQU64: vmovdqu64	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Zrrk, X86_INS_VMOVDQU64: vmovdqu64	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Zrrk_alt, X86_INS_VMOVDQU64: vmovdqu64	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Zrrkz, X86_INS_VMOVDQU64: vmovdqu64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU64Zrrkz_alt, X86_INS_VMOVDQU64: vmovdqu64	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Z128mr, X86_INS_VMOVDQU8: vmovdqu8	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Z128mrk, X86_INS_VMOVDQU8: vmovdqu8	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Z128rm, X86_INS_VMOVDQU8: vmovdqu8	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Z128rmk, X86_INS_VMOVDQU8: vmovdqu8	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Z128rmkz, X86_INS_VMOVDQU8: vmovdqu8	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Z128rr, X86_INS_VMOVDQU8: vmovdqu8	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Z128rr_alt, X86_INS_VMOVDQU8: vmovdqu8	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Z128rrk, X86_INS_VMOVDQU8: vmovdqu8	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Z128rrk_alt, X86_INS_VMOVDQU8: vmovdqu8	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Z128rrkz, X86_INS_VMOVDQU8: vmovdqu8	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Z128rrkz_alt, X86_INS_VMOVDQU8: vmovdqu8	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Z256mr, X86_INS_VMOVDQU8: vmovdqu8	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Z256mrk, X86_INS_VMOVDQU8: vmovdqu8	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Z256rm, X86_INS_VMOVDQU8: vmovdqu8	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Z256rmk, X86_INS_VMOVDQU8: vmovdqu8	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Z256rmkz, X86_INS_VMOVDQU8: vmovdqu8	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Z256rr, X86_INS_VMOVDQU8: vmovdqu8	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Z256rr_alt, X86_INS_VMOVDQU8: vmovdqu8	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Z256rrk, X86_INS_VMOVDQU8: vmovdqu8	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Z256rrk_alt, X86_INS_VMOVDQU8: vmovdqu8	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Z256rrkz, X86_INS_VMOVDQU8: vmovdqu8	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Z256rrkz_alt, X86_INS_VMOVDQU8: vmovdqu8	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Zmr, X86_INS_VMOVDQU8: vmovdqu8	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Zmrk, X86_INS_VMOVDQU8: vmovdqu8	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Zrm, X86_INS_VMOVDQU8: vmovdqu8	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Zrmk, X86_INS_VMOVDQU8: vmovdqu8	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Zrmkz, X86_INS_VMOVDQU8: vmovdqu8	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Zrr, X86_INS_VMOVDQU8: vmovdqu8	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Zrr_alt, X86_INS_VMOVDQU8: vmovdqu8	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Zrrk, X86_INS_VMOVDQU8: vmovdqu8	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Zrrk_alt, X86_INS_VMOVDQU8: vmovdqu8	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Zrrkz, X86_INS_VMOVDQU8: vmovdqu8	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQU8Zrrkz_alt, X86_INS_VMOVDQU8: vmovdqu8	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQUYmr, X86_INS_VMOVDQU: vmovdqu	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQUYrm, X86_INS_VMOVDQU: vmovdqu	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQUYrr, X86_INS_VMOVDQU: vmovdqu	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQUYrr_REV, X86_INS_VMOVDQU: vmovdqu	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQUmr, X86_INS_VMOVDQU: vmovdqu	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQUrm, X86_INS_VMOVDQU: vmovdqu	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQUrr, X86_INS_VMOVDQU: vmovdqu	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVDQUrr_REV, X86_INS_VMOVDQU: vmovdqu	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVHLPSZrr, X86_INS_VMOVHLPS: vmovhlps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVHLPSrr, X86_INS_VMOVHLPS: vmovhlps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVHPDmr, X86_INS_VMOVHPD: vmovhpd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVHPDrm, X86_INS_VMOVHPD: vmovhpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVHPSmr, X86_INS_VMOVHPS: vmovhps	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVHPSrm, X86_INS_VMOVHPS: vmovhps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVLHPSZrr, X86_INS_VMOVLHPS: vmovlhps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVLHPSrr, X86_INS_VMOVLHPS: vmovlhps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVLPDmr, X86_INS_VMOVLPD: vmovlpd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVLPDrm, X86_INS_VMOVLPD: vmovlpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVLPSmr, X86_INS_VMOVLPS: vmovlps	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVLPSrm, X86_INS_VMOVLPS: vmovlps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVMSKPDYrr, X86_INS_VMOVMSKPD: vmovmskpd	$dst, $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVMSKPDrr, X86_INS_VMOVMSKPD: vmovmskpd	$dst, $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVMSKPSYrr, X86_INS_VMOVMSKPS: vmovmskps	$dst, $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVMSKPSrr, X86_INS_VMOVMSKPS: vmovmskps	$dst, $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVNTDQAYrm, X86_INS_VMOVNTDQA: vmovntdqa	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVNTDQAZ128rm, X86_INS_VMOVNTDQA: vmovntdqa	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVNTDQAZ256rm, X86_INS_VMOVNTDQA: vmovntdqa	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVNTDQAZrm, X86_INS_VMOVNTDQA: vmovntdqa	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVNTDQArm, X86_INS_VMOVNTDQA: vmovntdqa	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVNTDQYmr, X86_INS_VMOVNTDQ: vmovntdq	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVNTDQZ128mr, X86_INS_VMOVNTDQ: vmovntdq	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVNTDQZ256mr, X86_INS_VMOVNTDQ: vmovntdq	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVNTDQZmr, X86_INS_VMOVNTDQ: vmovntdq	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVNTDQmr, X86_INS_VMOVNTDQ: vmovntdq	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVNTPDYmr, X86_INS_VMOVNTPD: vmovntpd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVNTPDZ128mr, X86_INS_VMOVNTPD: vmovntpd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVNTPDZ256mr, X86_INS_VMOVNTPD: vmovntpd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVNTPDZmr, X86_INS_VMOVNTPD: vmovntpd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVNTPDmr, X86_INS_VMOVNTPD: vmovntpd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVNTPSYmr, X86_INS_VMOVNTPS: vmovntps	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVNTPSZ128mr, X86_INS_VMOVNTPS: vmovntps	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVNTPSZ256mr, X86_INS_VMOVNTPS: vmovntps	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVNTPSZmr, X86_INS_VMOVNTPS: vmovntps	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVNTPSmr, X86_INS_VMOVNTPS: vmovntps	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVPDI2DIZmr, X86_INS_VMOVD: vmovd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVPDI2DIZrr, X86_INS_VMOVD: vmovd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVPDI2DImr, X86_INS_VMOVD: vmovd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVPDI2DIrr, X86_INS_VMOVD: vmovd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVPQI2QImr, X86_INS_VMOVQ: vmovq	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVPQI2QIrr, X86_INS_VMOVQ: vmovq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVPQIto64Zmr, X86_INS_VMOVQ: vmovq	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVPQIto64Zrr, X86_INS_VMOVQ: vmovq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVPQIto64rm, X86_INS_VMOVQ: vmovq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVPQIto64rr, X86_INS_VMOVQ: vmovq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVQI2PQIZrm, X86_INS_VMOVQ: vmovq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVQI2PQIrm, X86_INS_VMOVQ: vmovq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSDZmr, X86_INS_VMOVSD: vmovsd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSDZmrk, X86_INS_VMOVSD: vmovsd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSDZrm, X86_INS_VMOVSD: vmovsd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSDZrr, X86_INS_VMOVSD: vmovsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSDZrr_REV, X86_INS_VMOVSD: vmovsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSDZrrk, X86_INS_VMOVSD: vmovsd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSDmr, X86_INS_VMOVSD: vmovsd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSDrm, X86_INS_VMOVSD: vmovsd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSDrr, X86_INS_VMOVSD: vmovsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSDrr_REV, X86_INS_VMOVSD: vmovsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSDto64Zmr, X86_INS_VMOVQ: vmovq	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSDto64Zrr, X86_INS_VMOVQ: vmovq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSDto64mr, X86_INS_VMOVQ: vmovq	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSDto64rr, X86_INS_VMOVQ: vmovq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSHDUPYrm, X86_INS_VMOVSHDUP: vmovshdup	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSHDUPYrr, X86_INS_VMOVSHDUP: vmovshdup	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSHDUPZrm, X86_INS_VMOVSHDUP: vmovshdup	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSHDUPZrr, X86_INS_VMOVSHDUP: vmovshdup	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSHDUPrm, X86_INS_VMOVSHDUP: vmovshdup	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSHDUPrr, X86_INS_VMOVSHDUP: vmovshdup	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSLDUPYrm, X86_INS_VMOVSLDUP: vmovsldup	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSLDUPYrr, X86_INS_VMOVSLDUP: vmovsldup	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSLDUPZrm, X86_INS_VMOVSLDUP: vmovsldup	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSLDUPZrr, X86_INS_VMOVSLDUP: vmovsldup	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSLDUPrm, X86_INS_VMOVSLDUP: vmovsldup	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSLDUPrr, X86_INS_VMOVSLDUP: vmovsldup	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSS2DIZmr, X86_INS_VMOVD: vmovd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSS2DIZrr, X86_INS_VMOVD: vmovd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSS2DImr, X86_INS_VMOVD: vmovd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSS2DIrr, X86_INS_VMOVD: vmovd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSSZmr, X86_INS_VMOVSS: vmovss	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSSZmrk, X86_INS_VMOVSS: vmovss	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSSZrm, X86_INS_VMOVSS: vmovss	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSSZrr, X86_INS_VMOVSS: vmovss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSSZrr_REV, X86_INS_VMOVSS: vmovss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSSZrrk, X86_INS_VMOVSS: vmovss	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSSmr, X86_INS_VMOVSS: vmovss	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSSrm, X86_INS_VMOVSS: vmovss	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSSrr, X86_INS_VMOVSS: vmovss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVSSrr_REV, X86_INS_VMOVSS: vmovss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDYmr, X86_INS_VMOVUPD: vmovupd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDYrm, X86_INS_VMOVUPD: vmovupd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDYrr, X86_INS_VMOVUPD: vmovupd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDYrr_REV, X86_INS_VMOVUPD: vmovupd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZ128mr, X86_INS_VMOVUPD: vmovupd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZ128mrk, X86_INS_VMOVUPD: vmovupd	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZ128rm, X86_INS_VMOVUPD: vmovupd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZ128rmk, X86_INS_VMOVUPD: vmovupd	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZ128rmkz, X86_INS_VMOVUPD: vmovupd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZ128rr, X86_INS_VMOVUPD: vmovupd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZ128rr_alt, X86_INS_VMOVUPD: vmovupd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZ128rrk, X86_INS_VMOVUPD: vmovupd	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZ128rrk_alt, X86_INS_VMOVUPD: vmovupd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZ128rrkz, X86_INS_VMOVUPD: vmovupd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZ128rrkz_alt, X86_INS_VMOVUPD: vmovupd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZ256mr, X86_INS_VMOVUPD: vmovupd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZ256mrk, X86_INS_VMOVUPD: vmovupd	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZ256rm, X86_INS_VMOVUPD: vmovupd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZ256rmk, X86_INS_VMOVUPD: vmovupd	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZ256rmkz, X86_INS_VMOVUPD: vmovupd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZ256rr, X86_INS_VMOVUPD: vmovupd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZ256rr_alt, X86_INS_VMOVUPD: vmovupd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZ256rrk, X86_INS_VMOVUPD: vmovupd	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZ256rrk_alt, X86_INS_VMOVUPD: vmovupd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZ256rrkz, X86_INS_VMOVUPD: vmovupd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZ256rrkz_alt, X86_INS_VMOVUPD: vmovupd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZmr, X86_INS_VMOVUPD: vmovupd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZmrk, X86_INS_VMOVUPD: vmovupd	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZrm, X86_INS_VMOVUPD: vmovupd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZrmk, X86_INS_VMOVUPD: vmovupd	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZrmkz, X86_INS_VMOVUPD: vmovupd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZrr, X86_INS_VMOVUPD: vmovupd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZrr_alt, X86_INS_VMOVUPD: vmovupd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZrrk, X86_INS_VMOVUPD: vmovupd	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZrrk_alt, X86_INS_VMOVUPD: vmovupd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZrrkz, X86_INS_VMOVUPD: vmovupd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDZrrkz_alt, X86_INS_VMOVUPD: vmovupd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDmr, X86_INS_VMOVUPD: vmovupd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDrm, X86_INS_VMOVUPD: vmovupd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDrr, X86_INS_VMOVUPD: vmovupd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPDrr_REV, X86_INS_VMOVUPD: vmovupd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSYmr, X86_INS_VMOVUPS: vmovups	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSYrm, X86_INS_VMOVUPS: vmovups	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSYrr, X86_INS_VMOVUPS: vmovups	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSYrr_REV, X86_INS_VMOVUPS: vmovups	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZ128mr, X86_INS_VMOVUPS: vmovups	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZ128mrk, X86_INS_VMOVUPS: vmovups	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZ128rm, X86_INS_VMOVUPS: vmovups	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZ128rmk, X86_INS_VMOVUPS: vmovups	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZ128rmkz, X86_INS_VMOVUPS: vmovups	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZ128rr, X86_INS_VMOVUPS: vmovups	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZ128rr_alt, X86_INS_VMOVUPS: vmovups	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZ128rrk, X86_INS_VMOVUPS: vmovups	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZ128rrk_alt, X86_INS_VMOVUPS: vmovups	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZ128rrkz, X86_INS_VMOVUPS: vmovups	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZ128rrkz_alt, X86_INS_VMOVUPS: vmovups	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZ256mr, X86_INS_VMOVUPS: vmovups	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZ256mrk, X86_INS_VMOVUPS: vmovups	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZ256rm, X86_INS_VMOVUPS: vmovups	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZ256rmk, X86_INS_VMOVUPS: vmovups	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZ256rmkz, X86_INS_VMOVUPS: vmovups	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZ256rr, X86_INS_VMOVUPS: vmovups	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZ256rr_alt, X86_INS_VMOVUPS: vmovups	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZ256rrk, X86_INS_VMOVUPS: vmovups	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZ256rrk_alt, X86_INS_VMOVUPS: vmovups	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZ256rrkz, X86_INS_VMOVUPS: vmovups	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZ256rrkz_alt, X86_INS_VMOVUPS: vmovups	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZmr, X86_INS_VMOVUPS: vmovups	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZmrk, X86_INS_VMOVUPS: vmovups	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZrm, X86_INS_VMOVUPS: vmovups	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZrmk, X86_INS_VMOVUPS: vmovups	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZrmkz, X86_INS_VMOVUPS: vmovups	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZrr, X86_INS_VMOVUPS: vmovups	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZrr_alt, X86_INS_VMOVUPS: vmovups	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZrrk, X86_INS_VMOVUPS: vmovups	{$src1, ${dst} {${mask}}|${dst} {${mask}}, $src1} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZrrk_alt, X86_INS_VMOVUPS: vmovups	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZrrkz, X86_INS_VMOVUPS: vmovups	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSZrrkz_alt, X86_INS_VMOVUPS: vmovups	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSmr, X86_INS_VMOVUPS: vmovups	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSrm, X86_INS_VMOVUPS: vmovups	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSrr, X86_INS_VMOVUPS: vmovups	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVUPSrr_REV, X86_INS_VMOVUPS: vmovups	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVZPQILo2PQIZrm, X86_INS_VMOVQ: vmovq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVZPQILo2PQIZrr, X86_INS_VMOVQ: vmovq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVZPQILo2PQIrm, X86_INS_VMOVQ: vmovq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVZPQILo2PQIrr, X86_INS_VMOVQ: vmovq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVZQI2PQIrm, X86_INS_VMOVQ: vmovq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMOVZQI2PQIrr, X86_INS_VMOVQ: vmovq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMPSADBWYrmi, X86_INS_VMPSADBW: vmpsadbw	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMPSADBWYrri, X86_INS_VMPSADBW: vmpsadbw	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMPSADBWrmi, X86_INS_VMPSADBW: vmpsadbw	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMPSADBWrri, X86_INS_VMPSADBW: vmpsadbw	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMPTRLDm, X86_INS_VMPTRLD: vmptrld	$vmcs */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_VMPTRSTm, X86_INS_VMPTRST: vmptrst	$vmcs */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_VMREAD32rm, X86_INS_VMREAD: vmread{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMREAD32rr, X86_INS_VMREAD: vmread{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMREAD64rm, X86_INS_VMREAD: vmread{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMREAD64rr, X86_INS_VMREAD: vmread{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMRESUME, X86_INS_VMRESUME: vmresume */
+	0,
+	{ 0 }
+},
+{	/* X86_VMRUN32, X86_INS_VMRUN: vmrun	eax */
+	0,
+	{ 0 }
+},
+{	/* X86_VMRUN64, X86_INS_VMRUN: vmrun	rax */
+	0,
+	{ 0 }
+},
+{	/* X86_VMSAVE32, X86_INS_VMSAVE: vmsave	eax */
+	0,
+	{ 0 }
+},
+{	/* X86_VMSAVE64, X86_INS_VMSAVE: vmsave	rax */
+	0,
+	{ 0 }
+},
+{	/* X86_VMULPDYrm, X86_INS_VMULPD: vmulpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDYrr, X86_INS_VMULPD: vmulpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZ128rm, X86_INS_VMULPD: vmulpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZ128rmb, X86_INS_VMULPD: vmulpd	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZ128rmbk, X86_INS_VMULPD: vmulpd	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZ128rmbkz, X86_INS_VMULPD: vmulpd	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZ128rmk, X86_INS_VMULPD: vmulpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZ128rmkz, X86_INS_VMULPD: vmulpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZ128rr, X86_INS_VMULPD: vmulpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZ128rrk, X86_INS_VMULPD: vmulpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZ128rrkz, X86_INS_VMULPD: vmulpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZ256rm, X86_INS_VMULPD: vmulpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZ256rmb, X86_INS_VMULPD: vmulpd	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZ256rmbk, X86_INS_VMULPD: vmulpd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZ256rmbkz, X86_INS_VMULPD: vmulpd	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZ256rmk, X86_INS_VMULPD: vmulpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZ256rmkz, X86_INS_VMULPD: vmulpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZ256rr, X86_INS_VMULPD: vmulpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZ256rrk, X86_INS_VMULPD: vmulpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZ256rrkz, X86_INS_VMULPD: vmulpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZrb, X86_INS_VMULPD: vmulpd	$dst , $src1, $src2, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VMULPDZrbk, X86_INS_VMULPD: vmulpd	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZrbkz, X86_INS_VMULPD: vmulpd	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZrm, X86_INS_VMULPD: vmulpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZrmb, X86_INS_VMULPD: vmulpd	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZrmbk, X86_INS_VMULPD: vmulpd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZrmbkz, X86_INS_VMULPD: vmulpd	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZrmk, X86_INS_VMULPD: vmulpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZrmkz, X86_INS_VMULPD: vmulpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZrr, X86_INS_VMULPD: vmulpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZrrk, X86_INS_VMULPD: vmulpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDZrrkz, X86_INS_VMULPD: vmulpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDrm, X86_INS_VMULPD: vmulpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPDrr, X86_INS_VMULPD: vmulpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSYrm, X86_INS_VMULPS: vmulps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSYrr, X86_INS_VMULPS: vmulps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZ128rm, X86_INS_VMULPS: vmulps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZ128rmb, X86_INS_VMULPS: vmulps	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZ128rmbk, X86_INS_VMULPS: vmulps	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZ128rmbkz, X86_INS_VMULPS: vmulps	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZ128rmk, X86_INS_VMULPS: vmulps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZ128rmkz, X86_INS_VMULPS: vmulps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZ128rr, X86_INS_VMULPS: vmulps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZ128rrk, X86_INS_VMULPS: vmulps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZ128rrkz, X86_INS_VMULPS: vmulps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZ256rm, X86_INS_VMULPS: vmulps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZ256rmb, X86_INS_VMULPS: vmulps	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZ256rmbk, X86_INS_VMULPS: vmulps	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZ256rmbkz, X86_INS_VMULPS: vmulps	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZ256rmk, X86_INS_VMULPS: vmulps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZ256rmkz, X86_INS_VMULPS: vmulps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZ256rr, X86_INS_VMULPS: vmulps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZ256rrk, X86_INS_VMULPS: vmulps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZ256rrkz, X86_INS_VMULPS: vmulps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZrb, X86_INS_VMULPS: vmulps	$dst , $src1, $src2, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VMULPSZrbk, X86_INS_VMULPS: vmulps	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZrbkz, X86_INS_VMULPS: vmulps	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZrm, X86_INS_VMULPS: vmulps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZrmb, X86_INS_VMULPS: vmulps	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZrmbk, X86_INS_VMULPS: vmulps	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZrmbkz, X86_INS_VMULPS: vmulps	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZrmk, X86_INS_VMULPS: vmulps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZrmkz, X86_INS_VMULPS: vmulps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZrr, X86_INS_VMULPS: vmulps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZrrk, X86_INS_VMULPS: vmulps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSZrrkz, X86_INS_VMULPS: vmulps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSrm, X86_INS_VMULPS: vmulps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULPSrr, X86_INS_VMULPS: vmulps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSDZrm, X86_INS_VMULSD: vmulsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSDZrm_Int, X86_INS_VMULSD: vmulsd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSDZrm_Intk, X86_INS_VMULSD: vmulsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSDZrm_Intkz, X86_INS_VMULSD: vmulsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSDZrr, X86_INS_VMULSD: vmulsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSDZrr_Int, X86_INS_VMULSD: vmulsd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSDZrr_Intk, X86_INS_VMULSD: vmulsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSDZrr_Intkz, X86_INS_VMULSD: vmulsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSDZrrb, X86_INS_VMULSD: vmulsd	$dst , $src1, $src2, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VMULSDZrrbk, X86_INS_VMULSD: vmulsd	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSDZrrbkz, X86_INS_VMULSD: vmulsd	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSDrm, X86_INS_VMULSD: vmulsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSDrm_Int, X86_INS_VMULSD: vmulsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSDrr, X86_INS_VMULSD: vmulsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSDrr_Int, X86_INS_VMULSD: vmulsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSSZrm, X86_INS_VMULSS: vmulss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSSZrm_Int, X86_INS_VMULSS: vmulss	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSSZrm_Intk, X86_INS_VMULSS: vmulss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSSZrm_Intkz, X86_INS_VMULSS: vmulss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSSZrr, X86_INS_VMULSS: vmulss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSSZrr_Int, X86_INS_VMULSS: vmulss	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSSZrr_Intk, X86_INS_VMULSS: vmulss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSSZrr_Intkz, X86_INS_VMULSS: vmulss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSSZrrb, X86_INS_VMULSS: vmulss	$dst , $src1, $src2, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VMULSSZrrbk, X86_INS_VMULSS: vmulss	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSSZrrbkz, X86_INS_VMULSS: vmulss	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSSrm, X86_INS_VMULSS: vmulss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSSrm_Int, X86_INS_VMULSS: vmulss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSSrr, X86_INS_VMULSS: vmulss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMULSSrr_Int, X86_INS_VMULSS: vmulss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VMWRITE32rm, X86_INS_VMWRITE: vmwrite{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMWRITE32rr, X86_INS_VMWRITE: vmwrite{l}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMWRITE64rm, X86_INS_VMWRITE: vmwrite{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMWRITE64rr, X86_INS_VMWRITE: vmwrite{q}	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VMXOFF, X86_INS_VMXOFF: vmxoff */
+	0,
+	{ 0 }
+},
+{	/* X86_VMXON, X86_INS_VMXON: vmxon	$vmxon */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_VORPDYrm, X86_INS_VORPD: vorpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VORPDYrr, X86_INS_VORPD: vorpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VORPDrm, X86_INS_VORPD: vorpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VORPDrr, X86_INS_VORPD: vorpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VORPSYrm, X86_INS_VORPS: vorps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VORPSYrr, X86_INS_VORPS: vorps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VORPSrm, X86_INS_VORPS: vorps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VORPSrr, X86_INS_VORPS: vorps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSBrm128, X86_INS_VPABSB: vpabsb	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSBrm256, X86_INS_VPABSB: vpabsb	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSBrr128, X86_INS_VPABSB: vpabsb	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSBrr256, X86_INS_VPABSB: vpabsb	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSDZrm, X86_INS_VPABSD: vpabsd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSDZrmb, X86_INS_VPABSD: vpabsd	{${src}{1to16}, $dst|$dst, ${src}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSDZrmbk, X86_INS_VPABSD: vpabsd	{${src}{1to16}, $dst {${mask}}|$dst {${mask}}, ${src}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSDZrmbkz, X86_INS_VPABSD: vpabsd	{${src}{1to16}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSDZrmk, X86_INS_VPABSD: vpabsd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSDZrmkz, X86_INS_VPABSD: vpabsd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSDZrr, X86_INS_VPABSD: vpabsd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSDZrrk, X86_INS_VPABSD: vpabsd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSDZrrkz, X86_INS_VPABSD: vpabsd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSDrm128, X86_INS_VPABSD: vpabsd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSDrm256, X86_INS_VPABSD: vpabsd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSDrr128, X86_INS_VPABSD: vpabsd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSDrr256, X86_INS_VPABSD: vpabsd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSQZrm, X86_INS_VPABSQ: vpabsq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSQZrmb, X86_INS_VPABSQ: vpabsq	{${src}{1to8}, $dst|$dst, ${src}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSQZrmbk, X86_INS_VPABSQ: vpabsq	{${src}{1to8}, $dst {${mask}}|$dst {${mask}}, ${src}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSQZrmbkz, X86_INS_VPABSQ: vpabsq	{${src}{1to8}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSQZrmk, X86_INS_VPABSQ: vpabsq	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSQZrmkz, X86_INS_VPABSQ: vpabsq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSQZrr, X86_INS_VPABSQ: vpabsq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSQZrrk, X86_INS_VPABSQ: vpabsq	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSQZrrkz, X86_INS_VPABSQ: vpabsq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSWrm128, X86_INS_VPABSW: vpabsw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSWrm256, X86_INS_VPABSW: vpabsw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSWrr128, X86_INS_VPABSW: vpabsw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPABSWrr256, X86_INS_VPABSW: vpabsw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPACKSSDWYrm, X86_INS_VPACKSSDW: vpackssdw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPACKSSDWYrr, X86_INS_VPACKSSDW: vpackssdw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPACKSSDWrm, X86_INS_VPACKSSDW: vpackssdw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPACKSSDWrr, X86_INS_VPACKSSDW: vpackssdw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPACKSSWBYrm, X86_INS_VPACKSSWB: vpacksswb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPACKSSWBYrr, X86_INS_VPACKSSWB: vpacksswb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPACKSSWBrm, X86_INS_VPACKSSWB: vpacksswb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPACKSSWBrr, X86_INS_VPACKSSWB: vpacksswb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPACKUSDWYrm, X86_INS_VPACKUSDW: vpackusdw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPACKUSDWYrr, X86_INS_VPACKUSDW: vpackusdw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPACKUSDWrm, X86_INS_VPACKUSDW: vpackusdw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPACKUSDWrr, X86_INS_VPACKUSDW: vpackusdw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPACKUSWBYrm, X86_INS_VPACKUSWB: vpackuswb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPACKUSWBYrr, X86_INS_VPACKUSWB: vpackuswb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPACKUSWBrm, X86_INS_VPACKUSWB: vpackuswb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPACKUSWBrr, X86_INS_VPACKUSWB: vpackuswb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDBYrm, X86_INS_VPADDB: vpaddb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDBYrr, X86_INS_VPADDB: vpaddb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDBZ128rm, X86_INS_VPADDB: vpaddb	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDBZ128rmk, X86_INS_VPADDB: vpaddb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDBZ128rmkz, X86_INS_VPADDB: vpaddb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDBZ128rr, X86_INS_VPADDB: vpaddb	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDBZ128rrk, X86_INS_VPADDB: vpaddb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDBZ128rrkz, X86_INS_VPADDB: vpaddb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDBZ256rm, X86_INS_VPADDB: vpaddb	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDBZ256rmk, X86_INS_VPADDB: vpaddb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDBZ256rmkz, X86_INS_VPADDB: vpaddb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDBZ256rr, X86_INS_VPADDB: vpaddb	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDBZ256rrk, X86_INS_VPADDB: vpaddb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDBZ256rrkz, X86_INS_VPADDB: vpaddb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDBZrm, X86_INS_VPADDB: vpaddb	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDBZrmk, X86_INS_VPADDB: vpaddb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDBZrmkz, X86_INS_VPADDB: vpaddb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDBZrr, X86_INS_VPADDB: vpaddb	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDBZrrk, X86_INS_VPADDB: vpaddb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDBZrrkz, X86_INS_VPADDB: vpaddb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDBrm, X86_INS_VPADDB: vpaddb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDBrr, X86_INS_VPADDB: vpaddb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDYrm, X86_INS_VPADDD: vpaddd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDYrr, X86_INS_VPADDD: vpaddd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZ128rm, X86_INS_VPADDD: vpaddd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZ128rmb, X86_INS_VPADDD: vpaddd	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZ128rmbk, X86_INS_VPADDD: vpaddd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZ128rmbkz, X86_INS_VPADDD: vpaddd	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZ128rmk, X86_INS_VPADDD: vpaddd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZ128rmkz, X86_INS_VPADDD: vpaddd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZ128rr, X86_INS_VPADDD: vpaddd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZ128rrk, X86_INS_VPADDD: vpaddd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZ128rrkz, X86_INS_VPADDD: vpaddd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZ256rm, X86_INS_VPADDD: vpaddd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZ256rmb, X86_INS_VPADDD: vpaddd	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZ256rmbk, X86_INS_VPADDD: vpaddd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZ256rmbkz, X86_INS_VPADDD: vpaddd	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZ256rmk, X86_INS_VPADDD: vpaddd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZ256rmkz, X86_INS_VPADDD: vpaddd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZ256rr, X86_INS_VPADDD: vpaddd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZ256rrk, X86_INS_VPADDD: vpaddd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZ256rrkz, X86_INS_VPADDD: vpaddd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZrm, X86_INS_VPADDD: vpaddd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZrmb, X86_INS_VPADDD: vpaddd	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZrmbk, X86_INS_VPADDD: vpaddd	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZrmbkz, X86_INS_VPADDD: vpaddd	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZrmk, X86_INS_VPADDD: vpaddd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZrmkz, X86_INS_VPADDD: vpaddd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZrr, X86_INS_VPADDD: vpaddd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZrrk, X86_INS_VPADDD: vpaddd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDZrrkz, X86_INS_VPADDD: vpaddd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDrm, X86_INS_VPADDD: vpaddd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDDrr, X86_INS_VPADDD: vpaddd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQYrm, X86_INS_VPADDQ: vpaddq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQYrr, X86_INS_VPADDQ: vpaddq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZ128rm, X86_INS_VPADDQ: vpaddq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZ128rmb, X86_INS_VPADDQ: vpaddq	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZ128rmbk, X86_INS_VPADDQ: vpaddq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZ128rmbkz, X86_INS_VPADDQ: vpaddq	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZ128rmk, X86_INS_VPADDQ: vpaddq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZ128rmkz, X86_INS_VPADDQ: vpaddq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZ128rr, X86_INS_VPADDQ: vpaddq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZ128rrk, X86_INS_VPADDQ: vpaddq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZ128rrkz, X86_INS_VPADDQ: vpaddq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZ256rm, X86_INS_VPADDQ: vpaddq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZ256rmb, X86_INS_VPADDQ: vpaddq	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZ256rmbk, X86_INS_VPADDQ: vpaddq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZ256rmbkz, X86_INS_VPADDQ: vpaddq	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZ256rmk, X86_INS_VPADDQ: vpaddq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZ256rmkz, X86_INS_VPADDQ: vpaddq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZ256rr, X86_INS_VPADDQ: vpaddq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZ256rrk, X86_INS_VPADDQ: vpaddq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZ256rrkz, X86_INS_VPADDQ: vpaddq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZrm, X86_INS_VPADDQ: vpaddq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZrmb, X86_INS_VPADDQ: vpaddq	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZrmbk, X86_INS_VPADDQ: vpaddq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZrmbkz, X86_INS_VPADDQ: vpaddq	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZrmk, X86_INS_VPADDQ: vpaddq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZrmkz, X86_INS_VPADDQ: vpaddq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZrr, X86_INS_VPADDQ: vpaddq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZrrk, X86_INS_VPADDQ: vpaddq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQZrrkz, X86_INS_VPADDQ: vpaddq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQrm, X86_INS_VPADDQ: vpaddq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDQrr, X86_INS_VPADDQ: vpaddq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDSBYrm, X86_INS_VPADDSB: vpaddsb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDSBYrr, X86_INS_VPADDSB: vpaddsb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDSBrm, X86_INS_VPADDSB: vpaddsb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDSBrr, X86_INS_VPADDSB: vpaddsb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDSWYrm, X86_INS_VPADDSW: vpaddsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDSWYrr, X86_INS_VPADDSW: vpaddsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDSWrm, X86_INS_VPADDSW: vpaddsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDSWrr, X86_INS_VPADDSW: vpaddsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDUSBYrm, X86_INS_VPADDUSB: vpaddusb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDUSBYrr, X86_INS_VPADDUSB: vpaddusb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDUSBrm, X86_INS_VPADDUSB: vpaddusb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDUSBrr, X86_INS_VPADDUSB: vpaddusb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDUSWYrm, X86_INS_VPADDUSW: vpaddusw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDUSWYrr, X86_INS_VPADDUSW: vpaddusw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDUSWrm, X86_INS_VPADDUSW: vpaddusw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDUSWrr, X86_INS_VPADDUSW: vpaddusw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDWYrm, X86_INS_VPADDW: vpaddw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDWYrr, X86_INS_VPADDW: vpaddw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDWZ128rm, X86_INS_VPADDW: vpaddw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDWZ128rmk, X86_INS_VPADDW: vpaddw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDWZ128rmkz, X86_INS_VPADDW: vpaddw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDWZ128rr, X86_INS_VPADDW: vpaddw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDWZ128rrk, X86_INS_VPADDW: vpaddw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDWZ128rrkz, X86_INS_VPADDW: vpaddw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDWZ256rm, X86_INS_VPADDW: vpaddw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDWZ256rmk, X86_INS_VPADDW: vpaddw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDWZ256rmkz, X86_INS_VPADDW: vpaddw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDWZ256rr, X86_INS_VPADDW: vpaddw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDWZ256rrk, X86_INS_VPADDW: vpaddw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDWZ256rrkz, X86_INS_VPADDW: vpaddw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDWZrm, X86_INS_VPADDW: vpaddw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDWZrmk, X86_INS_VPADDW: vpaddw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDWZrmkz, X86_INS_VPADDW: vpaddw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDWZrr, X86_INS_VPADDW: vpaddw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDWZrrk, X86_INS_VPADDW: vpaddw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDWZrrkz, X86_INS_VPADDW: vpaddw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDWrm, X86_INS_VPADDW: vpaddw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPADDWrr, X86_INS_VPADDW: vpaddw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPALIGNR128rm, X86_INS_VPALIGNR: vpalignr	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPALIGNR128rr, X86_INS_VPALIGNR: vpalignr	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPALIGNR256rm, X86_INS_VPALIGNR: vpalignr	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPALIGNR256rr, X86_INS_VPALIGNR: vpalignr	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZ128rm, X86_INS_VPANDD: vpandd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZ128rmb, X86_INS_VPANDD: vpandd	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZ128rmbk, X86_INS_VPANDD: vpandd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZ128rmbkz, X86_INS_VPANDD: vpandd	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZ128rmk, X86_INS_VPANDD: vpandd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZ128rmkz, X86_INS_VPANDD: vpandd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZ128rr, X86_INS_VPANDD: vpandd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZ128rrk, X86_INS_VPANDD: vpandd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZ128rrkz, X86_INS_VPANDD: vpandd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZ256rm, X86_INS_VPANDD: vpandd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZ256rmb, X86_INS_VPANDD: vpandd	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZ256rmbk, X86_INS_VPANDD: vpandd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZ256rmbkz, X86_INS_VPANDD: vpandd	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZ256rmk, X86_INS_VPANDD: vpandd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZ256rmkz, X86_INS_VPANDD: vpandd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZ256rr, X86_INS_VPANDD: vpandd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZ256rrk, X86_INS_VPANDD: vpandd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZ256rrkz, X86_INS_VPANDD: vpandd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZrm, X86_INS_VPANDD: vpandd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZrmb, X86_INS_VPANDD: vpandd	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZrmbk, X86_INS_VPANDD: vpandd	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZrmbkz, X86_INS_VPANDD: vpandd	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZrmk, X86_INS_VPANDD: vpandd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZrmkz, X86_INS_VPANDD: vpandd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZrr, X86_INS_VPANDD: vpandd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZrrk, X86_INS_VPANDD: vpandd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDDZrrkz, X86_INS_VPANDD: vpandd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZ128rm, X86_INS_VPANDND: vpandnd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZ128rmb, X86_INS_VPANDND: vpandnd	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZ128rmbk, X86_INS_VPANDND: vpandnd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZ128rmbkz, X86_INS_VPANDND: vpandnd	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZ128rmk, X86_INS_VPANDND: vpandnd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZ128rmkz, X86_INS_VPANDND: vpandnd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZ128rr, X86_INS_VPANDND: vpandnd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZ128rrk, X86_INS_VPANDND: vpandnd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZ128rrkz, X86_INS_VPANDND: vpandnd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZ256rm, X86_INS_VPANDND: vpandnd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZ256rmb, X86_INS_VPANDND: vpandnd	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZ256rmbk, X86_INS_VPANDND: vpandnd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZ256rmbkz, X86_INS_VPANDND: vpandnd	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZ256rmk, X86_INS_VPANDND: vpandnd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZ256rmkz, X86_INS_VPANDND: vpandnd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZ256rr, X86_INS_VPANDND: vpandnd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZ256rrk, X86_INS_VPANDND: vpandnd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZ256rrkz, X86_INS_VPANDND: vpandnd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZrm, X86_INS_VPANDND: vpandnd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZrmb, X86_INS_VPANDND: vpandnd	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZrmbk, X86_INS_VPANDND: vpandnd	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZrmbkz, X86_INS_VPANDND: vpandnd	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZrmk, X86_INS_VPANDND: vpandnd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZrmkz, X86_INS_VPANDND: vpandnd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZrr, X86_INS_VPANDND: vpandnd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZrrk, X86_INS_VPANDND: vpandnd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNDZrrkz, X86_INS_VPANDND: vpandnd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZ128rm, X86_INS_VPANDNQ: vpandnq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZ128rmb, X86_INS_VPANDNQ: vpandnq	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZ128rmbk, X86_INS_VPANDNQ: vpandnq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZ128rmbkz, X86_INS_VPANDNQ: vpandnq	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZ128rmk, X86_INS_VPANDNQ: vpandnq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZ128rmkz, X86_INS_VPANDNQ: vpandnq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZ128rr, X86_INS_VPANDNQ: vpandnq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZ128rrk, X86_INS_VPANDNQ: vpandnq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZ128rrkz, X86_INS_VPANDNQ: vpandnq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZ256rm, X86_INS_VPANDNQ: vpandnq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZ256rmb, X86_INS_VPANDNQ: vpandnq	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZ256rmbk, X86_INS_VPANDNQ: vpandnq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZ256rmbkz, X86_INS_VPANDNQ: vpandnq	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZ256rmk, X86_INS_VPANDNQ: vpandnq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZ256rmkz, X86_INS_VPANDNQ: vpandnq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZ256rr, X86_INS_VPANDNQ: vpandnq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZ256rrk, X86_INS_VPANDNQ: vpandnq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZ256rrkz, X86_INS_VPANDNQ: vpandnq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZrm, X86_INS_VPANDNQ: vpandnq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZrmb, X86_INS_VPANDNQ: vpandnq	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZrmbk, X86_INS_VPANDNQ: vpandnq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZrmbkz, X86_INS_VPANDNQ: vpandnq	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZrmk, X86_INS_VPANDNQ: vpandnq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZrmkz, X86_INS_VPANDNQ: vpandnq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZrr, X86_INS_VPANDNQ: vpandnq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZrrk, X86_INS_VPANDNQ: vpandnq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNQZrrkz, X86_INS_VPANDNQ: vpandnq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNYrm, X86_INS_VPANDN: vpandn	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNYrr, X86_INS_VPANDN: vpandn	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNrm, X86_INS_VPANDN: vpandn	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDNrr, X86_INS_VPANDN: vpandn	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZ128rm, X86_INS_VPANDQ: vpandq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZ128rmb, X86_INS_VPANDQ: vpandq	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZ128rmbk, X86_INS_VPANDQ: vpandq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZ128rmbkz, X86_INS_VPANDQ: vpandq	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZ128rmk, X86_INS_VPANDQ: vpandq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZ128rmkz, X86_INS_VPANDQ: vpandq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZ128rr, X86_INS_VPANDQ: vpandq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZ128rrk, X86_INS_VPANDQ: vpandq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZ128rrkz, X86_INS_VPANDQ: vpandq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZ256rm, X86_INS_VPANDQ: vpandq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZ256rmb, X86_INS_VPANDQ: vpandq	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZ256rmbk, X86_INS_VPANDQ: vpandq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZ256rmbkz, X86_INS_VPANDQ: vpandq	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZ256rmk, X86_INS_VPANDQ: vpandq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZ256rmkz, X86_INS_VPANDQ: vpandq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZ256rr, X86_INS_VPANDQ: vpandq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZ256rrk, X86_INS_VPANDQ: vpandq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZ256rrkz, X86_INS_VPANDQ: vpandq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZrm, X86_INS_VPANDQ: vpandq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZrmb, X86_INS_VPANDQ: vpandq	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZrmbk, X86_INS_VPANDQ: vpandq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZrmbkz, X86_INS_VPANDQ: vpandq	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZrmk, X86_INS_VPANDQ: vpandq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZrmkz, X86_INS_VPANDQ: vpandq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZrr, X86_INS_VPANDQ: vpandq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZrrk, X86_INS_VPANDQ: vpandq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDQZrrkz, X86_INS_VPANDQ: vpandq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDYrm, X86_INS_VPAND: vpand	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDYrr, X86_INS_VPAND: vpand	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDrm, X86_INS_VPAND: vpand	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPANDrr, X86_INS_VPAND: vpand	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPAVGBYrm, X86_INS_VPAVGB: vpavgb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPAVGBYrr, X86_INS_VPAVGB: vpavgb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPAVGBrm, X86_INS_VPAVGB: vpavgb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPAVGBrr, X86_INS_VPAVGB: vpavgb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPAVGWYrm, X86_INS_VPAVGW: vpavgw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPAVGWYrr, X86_INS_VPAVGW: vpavgw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPAVGWrm, X86_INS_VPAVGW: vpavgw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPAVGWrr, X86_INS_VPAVGW: vpavgw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDDYrmi, X86_INS_VPBLENDD: vpblendd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDDYrri, X86_INS_VPBLENDD: vpblendd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDDrmi, X86_INS_VPBLENDD: vpblendd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDDrri, X86_INS_VPBLENDD: vpblendd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMBZ128rm, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMBZ128rmk, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMBZ128rmkz, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMBZ128rr, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMBZ128rrk, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMBZ128rrkz, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMBZ256rm, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMBZ256rmk, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMBZ256rmkz, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMBZ256rr, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMBZ256rrk, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMBZ256rrkz, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMBZrm, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMBZrmk, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMBZrmkz, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMBZrr, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMBZrrk, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMBZrrkz, X86_INS_VPBLENDMB: vpblendmb	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMDZ128rm, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMDZ128rmb, X86_INS_VPBLENDMD: vpblendmd	{${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMDZ128rmbk, X86_INS_VPBLENDMD: vpblendmd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMDZ128rmk, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMDZ128rmkz, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMDZ128rr, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMDZ128rrk, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMDZ128rrkz, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMDZ256rm, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMDZ256rmb, X86_INS_VPBLENDMD: vpblendmd	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMDZ256rmbk, X86_INS_VPBLENDMD: vpblendmd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMDZ256rmk, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMDZ256rmkz, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMDZ256rr, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMDZ256rrk, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMDZ256rrkz, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMDZrm, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMDZrmb, X86_INS_VPBLENDMD: vpblendmd	{${src2}{1to16}, $src1, $dst|$dst, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMDZrmbk, X86_INS_VPBLENDMD: vpblendmd	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMDZrmk, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMDZrmkz, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMDZrr, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMDZrrk, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMDZrrkz, X86_INS_VPBLENDMD: vpblendmd	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMQZ128rm, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMQZ128rmb, X86_INS_VPBLENDMQ: vpblendmq	{${src2}{1to2}, $src1, $dst|$dst, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMQZ128rmbk, X86_INS_VPBLENDMQ: vpblendmq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMQZ128rmk, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMQZ128rmkz, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMQZ128rr, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMQZ128rrk, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMQZ128rrkz, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMQZ256rm, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMQZ256rmb, X86_INS_VPBLENDMQ: vpblendmq	{${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMQZ256rmbk, X86_INS_VPBLENDMQ: vpblendmq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMQZ256rmk, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMQZ256rmkz, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMQZ256rr, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMQZ256rrk, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMQZ256rrkz, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMQZrm, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMQZrmb, X86_INS_VPBLENDMQ: vpblendmq	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMQZrmbk, X86_INS_VPBLENDMQ: vpblendmq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMQZrmk, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMQZrmkz, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMQZrr, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMQZrrk, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMQZrrkz, X86_INS_VPBLENDMQ: vpblendmq	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMWZ128rm, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMWZ128rmk, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMWZ128rmkz, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMWZ128rr, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMWZ128rrk, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMWZ128rrkz, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMWZ256rm, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMWZ256rmk, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMWZ256rmkz, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMWZ256rr, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMWZ256rrk, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMWZ256rrkz, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMWZrm, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} |${dst},  $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMWZrmk, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMWZrmkz, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMWZrr, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} |${dst}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMWZrrk, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDMWZrrkz, X86_INS_VPBLENDMW: vpblendmw	{$src2, $src1, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDVBYrm, X86_INS_VPBLENDVB: vpblendvb	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDVBYrr, X86_INS_VPBLENDVB: vpblendvb	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDVBrm, X86_INS_VPBLENDVB: vpblendvb	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDVBrr, X86_INS_VPBLENDVB: vpblendvb	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDWYrmi, X86_INS_VPBLENDW: vpblendw	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDWYrri, X86_INS_VPBLENDW: vpblendw	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDWrmi, X86_INS_VPBLENDW: vpblendw	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBLENDWrri, X86_INS_VPBLENDW: vpblendw	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTBYrm, X86_INS_VPBROADCASTB: vpbroadcastb	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTBYrr, X86_INS_VPBROADCASTB: vpbroadcastb	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTBrZ128r, X86_INS_VPBROADCASTB: vpbroadcastb	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTBrZ128rk, X86_INS_VPBROADCASTB: vpbroadcastb	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTBrZ128rkz, X86_INS_VPBROADCASTB: vpbroadcastb	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTBrZ256r, X86_INS_VPBROADCASTB: vpbroadcastb	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTBrZ256rk, X86_INS_VPBROADCASTB: vpbroadcastb	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTBrZ256rkz, X86_INS_VPBROADCASTB: vpbroadcastb	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTBrZr, X86_INS_VPBROADCASTB: vpbroadcastb	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTBrZrk, X86_INS_VPBROADCASTB: vpbroadcastb	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTBrZrkz, X86_INS_VPBROADCASTB: vpbroadcastb	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTBrm, X86_INS_VPBROADCASTB: vpbroadcastb	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTBrr, X86_INS_VPBROADCASTB: vpbroadcastb	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTDYrm, X86_INS_VPBROADCASTD: vpbroadcastd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTDYrr, X86_INS_VPBROADCASTD: vpbroadcastd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTDZkrm, X86_INS_VPBROADCASTD: vpbroadcastd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTDZkrr, X86_INS_VPBROADCASTD: vpbroadcastd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTDZrm, X86_INS_VPBROADCASTD: vpbroadcastd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTDZrr, X86_INS_VPBROADCASTD: vpbroadcastd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTDrZ128r, X86_INS_VPBROADCASTD: vpbroadcastd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTDrZ128rk, X86_INS_VPBROADCASTD: vpbroadcastd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTDrZ128rkz, X86_INS_VPBROADCASTD: vpbroadcastd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTDrZ256r, X86_INS_VPBROADCASTD: vpbroadcastd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTDrZ256rk, X86_INS_VPBROADCASTD: vpbroadcastd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTDrZ256rkz, X86_INS_VPBROADCASTD: vpbroadcastd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTDrZr, X86_INS_VPBROADCASTD: vpbroadcastd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTDrZrk, X86_INS_VPBROADCASTD: vpbroadcastd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTDrZrkz, X86_INS_VPBROADCASTD: vpbroadcastd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTDrm, X86_INS_VPBROADCASTD: vpbroadcastd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTDrr, X86_INS_VPBROADCASTD: vpbroadcastd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTMB2QZ128rr, X86_INS_VPBROADCASTMB2Q: vpbroadcastmb2q	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTMB2QZ256rr, X86_INS_VPBROADCASTMB2Q: vpbroadcastmb2q	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTMB2QZrr, X86_INS_VPBROADCASTMB2Q: vpbroadcastmb2q	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTMW2DZ128rr, X86_INS_VPBROADCASTMW2D: vpbroadcastmw2d	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTMW2DZ256rr, X86_INS_VPBROADCASTMW2D: vpbroadcastmw2d	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTMW2DZrr, X86_INS_VPBROADCASTMW2D: vpbroadcastmw2d	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTQYrm, X86_INS_VPBROADCASTQ: vpbroadcastq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTQYrr, X86_INS_VPBROADCASTQ: vpbroadcastq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTQZkrm, X86_INS_VPBROADCASTQ: vpbroadcastq	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTQZkrr, X86_INS_VPBROADCASTQ: vpbroadcastq	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTQZrm, X86_INS_VPBROADCASTQ: vpbroadcastq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTQZrr, X86_INS_VPBROADCASTQ: vpbroadcastq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTQrZ128r, X86_INS_VPBROADCASTQ: vpbroadcastq	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTQrZ128rk, X86_INS_VPBROADCASTQ: vpbroadcastq	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTQrZ128rkz, X86_INS_VPBROADCASTQ: vpbroadcastq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTQrZ256r, X86_INS_VPBROADCASTQ: vpbroadcastq	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTQrZ256rk, X86_INS_VPBROADCASTQ: vpbroadcastq	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTQrZ256rkz, X86_INS_VPBROADCASTQ: vpbroadcastq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTQrZr, X86_INS_VPBROADCASTQ: vpbroadcastq	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTQrZrk, X86_INS_VPBROADCASTQ: vpbroadcastq	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTQrZrkz, X86_INS_VPBROADCASTQ: vpbroadcastq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTQrm, X86_INS_VPBROADCASTQ: vpbroadcastq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTQrr, X86_INS_VPBROADCASTQ: vpbroadcastq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTWYrm, X86_INS_VPBROADCASTW: vpbroadcastw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTWYrr, X86_INS_VPBROADCASTW: vpbroadcastw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTWrZ128r, X86_INS_VPBROADCASTW: vpbroadcastw	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTWrZ128rk, X86_INS_VPBROADCASTW: vpbroadcastw	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTWrZ128rkz, X86_INS_VPBROADCASTW: vpbroadcastw	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTWrZ256r, X86_INS_VPBROADCASTW: vpbroadcastw	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTWrZ256rk, X86_INS_VPBROADCASTW: vpbroadcastw	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTWrZ256rkz, X86_INS_VPBROADCASTW: vpbroadcastw	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTWrZr, X86_INS_VPBROADCASTW: vpbroadcastw	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTWrZrk, X86_INS_VPBROADCASTW: vpbroadcastw	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTWrZrkz, X86_INS_VPBROADCASTW: vpbroadcastw	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTWrm, X86_INS_VPBROADCASTW: vpbroadcastw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPBROADCASTWrr, X86_INS_VPBROADCASTW: vpbroadcastw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCLMULQDQrm, X86_INS_VPCLMULQDQ: vpclmulqdq	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCLMULQDQrr, X86_INS_VPCLMULQDQ: vpclmulqdq	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMOVmr, X86_INS_VPCMOV: vpcmov	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMOVmrY, X86_INS_VPCMOV: vpcmov	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMOVrm, X86_INS_VPCMOV: vpcmov	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMOVrmY, X86_INS_VPCMOV: vpcmov	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMOVrr, X86_INS_VPCMOV: vpcmov	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMOVrrY, X86_INS_VPCMOV: vpcmov	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPBZ128rmi, X86_INS_VPCMPB: vpcmp${cc}b	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPBZ128rmi_alt, X86_INS_VPCMPB: vpcmpb	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPBZ128rmik, X86_INS_VPCMPB: vpcmp${cc}b	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPBZ128rmik_alt, X86_INS_VPCMPB: vpcmpb	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPBZ128rri, X86_INS_VPCMPB: vpcmp${cc}b	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPBZ128rri_alt, X86_INS_VPCMPB: vpcmpb	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPBZ128rrik, X86_INS_VPCMPB: vpcmp${cc}b	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPBZ128rrik_alt, X86_INS_VPCMPB: vpcmpb	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPBZ256rmi, X86_INS_VPCMPB: vpcmp${cc}b	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPBZ256rmi_alt, X86_INS_VPCMPB: vpcmpb	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPBZ256rmik, X86_INS_VPCMPB: vpcmp${cc}b	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPBZ256rmik_alt, X86_INS_VPCMPB: vpcmpb	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPBZ256rri, X86_INS_VPCMPB: vpcmp${cc}b	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPBZ256rri_alt, X86_INS_VPCMPB: vpcmpb	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPBZ256rrik, X86_INS_VPCMPB: vpcmp${cc}b	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPBZ256rrik_alt, X86_INS_VPCMPB: vpcmpb	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPBZrmi, X86_INS_VPCMPB: vpcmp${cc}b	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPBZrmi_alt, X86_INS_VPCMPB: vpcmpb	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPBZrmik, X86_INS_VPCMPB: vpcmp${cc}b	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPBZrmik_alt, X86_INS_VPCMPB: vpcmpb	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPBZrri, X86_INS_VPCMPB: vpcmp${cc}b	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPBZrri_alt, X86_INS_VPCMPB: vpcmpb	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPBZrrik, X86_INS_VPCMPB: vpcmp${cc}b	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPBZrrik_alt, X86_INS_VPCMPB: vpcmpb	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZ128rmi, X86_INS_VPCMPD: vpcmp${cc}d	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZ128rmi_alt, X86_INS_VPCMPD: vpcmpd	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPDZ128rmib, X86_INS_VPCMPD: vpcmp${cc}d	{${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZ128rmib_alt, X86_INS_VPCMPD: vpcmpd	{$cc, ${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}, $cc} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPDZ128rmibk, X86_INS_VPCMPD: vpcmp${cc}d	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZ128rmibk_alt, X86_INS_VPCMPD: vpcmpd	{$cc, ${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}, $cc} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPDZ128rmik, X86_INS_VPCMPD: vpcmp${cc}d	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZ128rmik_alt, X86_INS_VPCMPD: vpcmpd	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPDZ128rri, X86_INS_VPCMPD: vpcmp${cc}d	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZ128rri_alt, X86_INS_VPCMPD: vpcmpd	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPDZ128rrik, X86_INS_VPCMPD: vpcmp${cc}d	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZ128rrik_alt, X86_INS_VPCMPD: vpcmpd	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPDZ256rmi, X86_INS_VPCMPD: vpcmp${cc}d	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZ256rmi_alt, X86_INS_VPCMPD: vpcmpd	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZ256rmib, X86_INS_VPCMPD: vpcmp${cc}d	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZ256rmib_alt, X86_INS_VPCMPD: vpcmpd	{$cc, ${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZ256rmibk, X86_INS_VPCMPD: vpcmp${cc}d	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZ256rmibk_alt, X86_INS_VPCMPD: vpcmpd	{$cc, ${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZ256rmik, X86_INS_VPCMPD: vpcmp${cc}d	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZ256rmik_alt, X86_INS_VPCMPD: vpcmpd	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZ256rri, X86_INS_VPCMPD: vpcmp${cc}d	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZ256rri_alt, X86_INS_VPCMPD: vpcmpd	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZ256rrik, X86_INS_VPCMPD: vpcmp${cc}d	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZ256rrik_alt, X86_INS_VPCMPD: vpcmpd	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZrmi, X86_INS_VPCMPD: vpcmp${cc}d	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZrmi_alt, X86_INS_VPCMPD: vpcmpd	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZrmib, X86_INS_VPCMPD: vpcmp${cc}d	{${src2}{1to16}, $src1, $dst|$dst, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZrmib_alt, X86_INS_VPCMPD: vpcmpd	{$cc, ${src2}{1to16}, $src1, $dst|$dst, $src1, ${src2}{1to16}, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZrmibk, X86_INS_VPCMPD: vpcmp${cc}d	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZrmibk_alt, X86_INS_VPCMPD: vpcmpd	{$cc, ${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZrmik, X86_INS_VPCMPD: vpcmp${cc}d	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZrmik_alt, X86_INS_VPCMPD: vpcmpd	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZrri, X86_INS_VPCMPD: vpcmp${cc}d	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZrri_alt, X86_INS_VPCMPD: vpcmpd	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZrrik, X86_INS_VPCMPD: vpcmp${cc}d	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPDZrrik_alt, X86_INS_VPCMPD: vpcmpd	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQBYrm, X86_INS_VPCMPEQB: vpcmpeqb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQBYrr, X86_INS_VPCMPEQB: vpcmpeqb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQBZ128rm, X86_INS_VPCMPEQB: vpcmpeqb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQBZ128rmk, X86_INS_VPCMPEQB: vpcmpeqb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQBZ128rr, X86_INS_VPCMPEQB: vpcmpeqb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQBZ128rrk, X86_INS_VPCMPEQB: vpcmpeqb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQBZ256rm, X86_INS_VPCMPEQB: vpcmpeqb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQBZ256rmk, X86_INS_VPCMPEQB: vpcmpeqb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQBZ256rr, X86_INS_VPCMPEQB: vpcmpeqb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQBZ256rrk, X86_INS_VPCMPEQB: vpcmpeqb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQBZrm, X86_INS_VPCMPEQB: vpcmpeqb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQBZrmk, X86_INS_VPCMPEQB: vpcmpeqb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQBZrr, X86_INS_VPCMPEQB: vpcmpeqb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQBZrrk, X86_INS_VPCMPEQB: vpcmpeqb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQBrm, X86_INS_VPCMPEQB: vpcmpeqb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQBrr, X86_INS_VPCMPEQB: vpcmpeqb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQDYrm, X86_INS_VPCMPEQD: vpcmpeqd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQDYrr, X86_INS_VPCMPEQD: vpcmpeqd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQDZ128rm, X86_INS_VPCMPEQD: vpcmpeqd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQDZ128rmb, X86_INS_VPCMPEQD: vpcmpeqd	{${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQDZ128rmbk, X86_INS_VPCMPEQD: vpcmpeqd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQDZ128rmk, X86_INS_VPCMPEQD: vpcmpeqd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQDZ128rr, X86_INS_VPCMPEQD: vpcmpeqd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQDZ128rrk, X86_INS_VPCMPEQD: vpcmpeqd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQDZ256rm, X86_INS_VPCMPEQD: vpcmpeqd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQDZ256rmb, X86_INS_VPCMPEQD: vpcmpeqd	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQDZ256rmbk, X86_INS_VPCMPEQD: vpcmpeqd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQDZ256rmk, X86_INS_VPCMPEQD: vpcmpeqd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQDZ256rr, X86_INS_VPCMPEQD: vpcmpeqd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQDZ256rrk, X86_INS_VPCMPEQD: vpcmpeqd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQDZrm, X86_INS_VPCMPEQD: vpcmpeqd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQDZrmb, X86_INS_VPCMPEQD: vpcmpeqd	{${src2}{1to16}, $src1, $dst|$dst, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQDZrmbk, X86_INS_VPCMPEQD: vpcmpeqd	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQDZrmk, X86_INS_VPCMPEQD: vpcmpeqd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQDZrr, X86_INS_VPCMPEQD: vpcmpeqd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQDZrrk, X86_INS_VPCMPEQD: vpcmpeqd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQDrm, X86_INS_VPCMPEQD: vpcmpeqd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQDrr, X86_INS_VPCMPEQD: vpcmpeqd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQQYrm, X86_INS_VPCMPEQQ: vpcmpeqq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQQYrr, X86_INS_VPCMPEQQ: vpcmpeqq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQQZ128rm, X86_INS_VPCMPEQQ: vpcmpeqq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQQZ128rmb, X86_INS_VPCMPEQQ: vpcmpeqq	{${src2}{1to2}, $src1, $dst|$dst, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQQZ128rmbk, X86_INS_VPCMPEQQ: vpcmpeqq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQQZ128rmk, X86_INS_VPCMPEQQ: vpcmpeqq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQQZ128rr, X86_INS_VPCMPEQQ: vpcmpeqq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQQZ128rrk, X86_INS_VPCMPEQQ: vpcmpeqq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQQZ256rm, X86_INS_VPCMPEQQ: vpcmpeqq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQQZ256rmb, X86_INS_VPCMPEQQ: vpcmpeqq	{${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQQZ256rmbk, X86_INS_VPCMPEQQ: vpcmpeqq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQQZ256rmk, X86_INS_VPCMPEQQ: vpcmpeqq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQQZ256rr, X86_INS_VPCMPEQQ: vpcmpeqq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQQZ256rrk, X86_INS_VPCMPEQQ: vpcmpeqq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQQZrm, X86_INS_VPCMPEQQ: vpcmpeqq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQQZrmb, X86_INS_VPCMPEQQ: vpcmpeqq	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQQZrmbk, X86_INS_VPCMPEQQ: vpcmpeqq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQQZrmk, X86_INS_VPCMPEQQ: vpcmpeqq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQQZrr, X86_INS_VPCMPEQQ: vpcmpeqq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQQZrrk, X86_INS_VPCMPEQQ: vpcmpeqq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQQrm, X86_INS_VPCMPEQQ: vpcmpeqq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQQrr, X86_INS_VPCMPEQQ: vpcmpeqq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQWYrm, X86_INS_VPCMPEQW: vpcmpeqw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQWYrr, X86_INS_VPCMPEQW: vpcmpeqw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQWZ128rm, X86_INS_VPCMPEQW: vpcmpeqw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQWZ128rmk, X86_INS_VPCMPEQW: vpcmpeqw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQWZ128rr, X86_INS_VPCMPEQW: vpcmpeqw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQWZ128rrk, X86_INS_VPCMPEQW: vpcmpeqw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQWZ256rm, X86_INS_VPCMPEQW: vpcmpeqw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQWZ256rmk, X86_INS_VPCMPEQW: vpcmpeqw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQWZ256rr, X86_INS_VPCMPEQW: vpcmpeqw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQWZ256rrk, X86_INS_VPCMPEQW: vpcmpeqw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQWZrm, X86_INS_VPCMPEQW: vpcmpeqw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQWZrmk, X86_INS_VPCMPEQW: vpcmpeqw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQWZrr, X86_INS_VPCMPEQW: vpcmpeqw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQWZrrk, X86_INS_VPCMPEQW: vpcmpeqw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQWrm, X86_INS_VPCMPEQW: vpcmpeqw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPEQWrr, X86_INS_VPCMPEQW: vpcmpeqw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPESTRIrm, X86_INS_VPCMPESTRI: vpcmpestri	$src1, $src3, $src5 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPESTRIrr, X86_INS_VPCMPESTRI: vpcmpestri	$src1, $src3, $src5 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPESTRM128rm, X86_INS_VPCMPESTRM: vpcmpestrm	$src1, $src3, $src5 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPESTRM128rr, X86_INS_VPCMPESTRM: vpcmpestrm	$src1, $src3, $src5 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTBYrm, X86_INS_VPCMPGTB: vpcmpgtb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTBYrr, X86_INS_VPCMPGTB: vpcmpgtb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTBZ128rm, X86_INS_VPCMPGTB: vpcmpgtb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTBZ128rmk, X86_INS_VPCMPGTB: vpcmpgtb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTBZ128rr, X86_INS_VPCMPGTB: vpcmpgtb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTBZ128rrk, X86_INS_VPCMPGTB: vpcmpgtb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTBZ256rm, X86_INS_VPCMPGTB: vpcmpgtb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTBZ256rmk, X86_INS_VPCMPGTB: vpcmpgtb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTBZ256rr, X86_INS_VPCMPGTB: vpcmpgtb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTBZ256rrk, X86_INS_VPCMPGTB: vpcmpgtb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTBZrm, X86_INS_VPCMPGTB: vpcmpgtb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTBZrmk, X86_INS_VPCMPGTB: vpcmpgtb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTBZrr, X86_INS_VPCMPGTB: vpcmpgtb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTBZrrk, X86_INS_VPCMPGTB: vpcmpgtb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTBrm, X86_INS_VPCMPGTB: vpcmpgtb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTBrr, X86_INS_VPCMPGTB: vpcmpgtb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTDYrm, X86_INS_VPCMPGTD: vpcmpgtd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTDYrr, X86_INS_VPCMPGTD: vpcmpgtd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTDZ128rm, X86_INS_VPCMPGTD: vpcmpgtd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTDZ128rmb, X86_INS_VPCMPGTD: vpcmpgtd	{${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTDZ128rmbk, X86_INS_VPCMPGTD: vpcmpgtd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTDZ128rmk, X86_INS_VPCMPGTD: vpcmpgtd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTDZ128rr, X86_INS_VPCMPGTD: vpcmpgtd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTDZ128rrk, X86_INS_VPCMPGTD: vpcmpgtd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTDZ256rm, X86_INS_VPCMPGTD: vpcmpgtd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTDZ256rmb, X86_INS_VPCMPGTD: vpcmpgtd	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTDZ256rmbk, X86_INS_VPCMPGTD: vpcmpgtd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTDZ256rmk, X86_INS_VPCMPGTD: vpcmpgtd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTDZ256rr, X86_INS_VPCMPGTD: vpcmpgtd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTDZ256rrk, X86_INS_VPCMPGTD: vpcmpgtd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTDZrm, X86_INS_VPCMPGTD: vpcmpgtd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTDZrmb, X86_INS_VPCMPGTD: vpcmpgtd	{${src2}{1to16}, $src1, $dst|$dst, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTDZrmbk, X86_INS_VPCMPGTD: vpcmpgtd	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTDZrmk, X86_INS_VPCMPGTD: vpcmpgtd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTDZrr, X86_INS_VPCMPGTD: vpcmpgtd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTDZrrk, X86_INS_VPCMPGTD: vpcmpgtd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTDrm, X86_INS_VPCMPGTD: vpcmpgtd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTDrr, X86_INS_VPCMPGTD: vpcmpgtd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTQYrm, X86_INS_VPCMPGTQ: vpcmpgtq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTQYrr, X86_INS_VPCMPGTQ: vpcmpgtq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTQZ128rm, X86_INS_VPCMPGTQ: vpcmpgtq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTQZ128rmb, X86_INS_VPCMPGTQ: vpcmpgtq	{${src2}{1to2}, $src1, $dst|$dst, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTQZ128rmbk, X86_INS_VPCMPGTQ: vpcmpgtq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTQZ128rmk, X86_INS_VPCMPGTQ: vpcmpgtq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTQZ128rr, X86_INS_VPCMPGTQ: vpcmpgtq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTQZ128rrk, X86_INS_VPCMPGTQ: vpcmpgtq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTQZ256rm, X86_INS_VPCMPGTQ: vpcmpgtq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTQZ256rmb, X86_INS_VPCMPGTQ: vpcmpgtq	{${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTQZ256rmbk, X86_INS_VPCMPGTQ: vpcmpgtq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTQZ256rmk, X86_INS_VPCMPGTQ: vpcmpgtq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTQZ256rr, X86_INS_VPCMPGTQ: vpcmpgtq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTQZ256rrk, X86_INS_VPCMPGTQ: vpcmpgtq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTQZrm, X86_INS_VPCMPGTQ: vpcmpgtq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTQZrmb, X86_INS_VPCMPGTQ: vpcmpgtq	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTQZrmbk, X86_INS_VPCMPGTQ: vpcmpgtq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTQZrmk, X86_INS_VPCMPGTQ: vpcmpgtq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTQZrr, X86_INS_VPCMPGTQ: vpcmpgtq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTQZrrk, X86_INS_VPCMPGTQ: vpcmpgtq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTQrm, X86_INS_VPCMPGTQ: vpcmpgtq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTQrr, X86_INS_VPCMPGTQ: vpcmpgtq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTWYrm, X86_INS_VPCMPGTW: vpcmpgtw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTWYrr, X86_INS_VPCMPGTW: vpcmpgtw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTWZ128rm, X86_INS_VPCMPGTW: vpcmpgtw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTWZ128rmk, X86_INS_VPCMPGTW: vpcmpgtw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTWZ128rr, X86_INS_VPCMPGTW: vpcmpgtw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTWZ128rrk, X86_INS_VPCMPGTW: vpcmpgtw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTWZ256rm, X86_INS_VPCMPGTW: vpcmpgtw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTWZ256rmk, X86_INS_VPCMPGTW: vpcmpgtw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTWZ256rr, X86_INS_VPCMPGTW: vpcmpgtw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTWZ256rrk, X86_INS_VPCMPGTW: vpcmpgtw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTWZrm, X86_INS_VPCMPGTW: vpcmpgtw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTWZrmk, X86_INS_VPCMPGTW: vpcmpgtw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTWZrr, X86_INS_VPCMPGTW: vpcmpgtw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTWZrrk, X86_INS_VPCMPGTW: vpcmpgtw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTWrm, X86_INS_VPCMPGTW: vpcmpgtw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPGTWrr, X86_INS_VPCMPGTW: vpcmpgtw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPISTRIrm, X86_INS_VPCMPISTRI: vpcmpistri	$src1, $src2, $src3 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPISTRIrr, X86_INS_VPCMPISTRI: vpcmpistri	$src1, $src2, $src3 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPISTRM128rm, X86_INS_VPCMPISTRM: vpcmpistrm	$src1, $src2, $src3 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPISTRM128rr, X86_INS_VPCMPISTRM: vpcmpistrm	$src1, $src2, $src3 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPQZ128rmi, X86_INS_VPCMPQ: vpcmp${cc}q	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPQZ128rmi_alt, X86_INS_VPCMPQ: vpcmpq	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPQZ128rmib, X86_INS_VPCMPQ: vpcmp${cc}q	{${src2}{1to2}, $src1, $dst|$dst, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPQZ128rmib_alt, X86_INS_VPCMPQ: vpcmpq	{$cc, ${src2}{1to2}, $src1, $dst|$dst, $src1, ${src2}{1to2}, $cc} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPQZ128rmibk, X86_INS_VPCMPQ: vpcmp${cc}q	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPQZ128rmibk_alt, X86_INS_VPCMPQ: vpcmpq	{$cc, ${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}, $cc} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPQZ128rmik, X86_INS_VPCMPQ: vpcmp${cc}q	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPQZ128rmik_alt, X86_INS_VPCMPQ: vpcmpq	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPQZ128rri, X86_INS_VPCMPQ: vpcmp${cc}q	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPQZ128rri_alt, X86_INS_VPCMPQ: vpcmpq	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPQZ128rrik, X86_INS_VPCMPQ: vpcmp${cc}q	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPQZ128rrik_alt, X86_INS_VPCMPQ: vpcmpq	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPQZ256rmi, X86_INS_VPCMPQ: vpcmp${cc}q	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPQZ256rmi_alt, X86_INS_VPCMPQ: vpcmpq	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPQZ256rmib, X86_INS_VPCMPQ: vpcmp${cc}q	{${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPQZ256rmib_alt, X86_INS_VPCMPQ: vpcmpq	{$cc, ${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}, $cc} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPQZ256rmibk, X86_INS_VPCMPQ: vpcmp${cc}q	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPQZ256rmibk_alt, X86_INS_VPCMPQ: vpcmpq	{$cc, ${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}, $cc} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPQZ256rmik, X86_INS_VPCMPQ: vpcmp${cc}q	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPQZ256rmik_alt, X86_INS_VPCMPQ: vpcmpq	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPQZ256rri, X86_INS_VPCMPQ: vpcmp${cc}q	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPQZ256rri_alt, X86_INS_VPCMPQ: vpcmpq	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPQZ256rrik, X86_INS_VPCMPQ: vpcmp${cc}q	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPQZ256rrik_alt, X86_INS_VPCMPQ: vpcmpq	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPQZrmi, X86_INS_VPCMPQ: vpcmp${cc}q	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPQZrmi_alt, X86_INS_VPCMPQ: vpcmpq	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPQZrmib, X86_INS_VPCMPQ: vpcmp${cc}q	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPQZrmib_alt, X86_INS_VPCMPQ: vpcmpq	{$cc, ${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPQZrmibk, X86_INS_VPCMPQ: vpcmp${cc}q	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPQZrmibk_alt, X86_INS_VPCMPQ: vpcmpq	{$cc, ${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPQZrmik, X86_INS_VPCMPQ: vpcmp${cc}q	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPQZrmik_alt, X86_INS_VPCMPQ: vpcmpq	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPQZrri, X86_INS_VPCMPQ: vpcmp${cc}q	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPQZrri_alt, X86_INS_VPCMPQ: vpcmpq	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPQZrrik, X86_INS_VPCMPQ: vpcmp${cc}q	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPQZrrik_alt, X86_INS_VPCMPQ: vpcmpq	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUBZ128rmi, X86_INS_VPCMPUB: vpcmp${cc}ub	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUBZ128rmi_alt, X86_INS_VPCMPUB: vpcmpub	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUBZ128rmik, X86_INS_VPCMPUB: vpcmp${cc}ub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUBZ128rmik_alt, X86_INS_VPCMPUB: vpcmpub	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUBZ128rri, X86_INS_VPCMPUB: vpcmp${cc}ub	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUBZ128rri_alt, X86_INS_VPCMPUB: vpcmpub	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUBZ128rrik, X86_INS_VPCMPUB: vpcmp${cc}ub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUBZ128rrik_alt, X86_INS_VPCMPUB: vpcmpub	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUBZ256rmi, X86_INS_VPCMPUB: vpcmp${cc}ub	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUBZ256rmi_alt, X86_INS_VPCMPUB: vpcmpub	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUBZ256rmik, X86_INS_VPCMPUB: vpcmp${cc}ub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUBZ256rmik_alt, X86_INS_VPCMPUB: vpcmpub	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUBZ256rri, X86_INS_VPCMPUB: vpcmp${cc}ub	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUBZ256rri_alt, X86_INS_VPCMPUB: vpcmpub	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUBZ256rrik, X86_INS_VPCMPUB: vpcmp${cc}ub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUBZ256rrik_alt, X86_INS_VPCMPUB: vpcmpub	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUBZrmi, X86_INS_VPCMPUB: vpcmp${cc}ub	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUBZrmi_alt, X86_INS_VPCMPUB: vpcmpub	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUBZrmik, X86_INS_VPCMPUB: vpcmp${cc}ub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUBZrmik_alt, X86_INS_VPCMPUB: vpcmpub	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUBZrri, X86_INS_VPCMPUB: vpcmp${cc}ub	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUBZrri_alt, X86_INS_VPCMPUB: vpcmpub	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUBZrrik, X86_INS_VPCMPUB: vpcmp${cc}ub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUBZrrik_alt, X86_INS_VPCMPUB: vpcmpub	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZ128rmi, X86_INS_VPCMPUD: vpcmp${cc}ud	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZ128rmi_alt, X86_INS_VPCMPUD: vpcmpud	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPUDZ128rmib, X86_INS_VPCMPUD: vpcmp${cc}ud	{${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZ128rmib_alt, X86_INS_VPCMPUD: vpcmpud	{$cc, ${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}, $cc} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPUDZ128rmibk, X86_INS_VPCMPUD: vpcmp${cc}ud	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZ128rmibk_alt, X86_INS_VPCMPUD: vpcmpud	{$cc, ${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}, $cc} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPUDZ128rmik, X86_INS_VPCMPUD: vpcmp${cc}ud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZ128rmik_alt, X86_INS_VPCMPUD: vpcmpud	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPUDZ128rri, X86_INS_VPCMPUD: vpcmp${cc}ud	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZ128rri_alt, X86_INS_VPCMPUD: vpcmpud	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPUDZ128rrik, X86_INS_VPCMPUD: vpcmp${cc}ud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZ128rrik_alt, X86_INS_VPCMPUD: vpcmpud	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPUDZ256rmi, X86_INS_VPCMPUD: vpcmp${cc}ud	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZ256rmi_alt, X86_INS_VPCMPUD: vpcmpud	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZ256rmib, X86_INS_VPCMPUD: vpcmp${cc}ud	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZ256rmib_alt, X86_INS_VPCMPUD: vpcmpud	{$cc, ${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZ256rmibk, X86_INS_VPCMPUD: vpcmp${cc}ud	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZ256rmibk_alt, X86_INS_VPCMPUD: vpcmpud	{$cc, ${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZ256rmik, X86_INS_VPCMPUD: vpcmp${cc}ud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZ256rmik_alt, X86_INS_VPCMPUD: vpcmpud	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZ256rri, X86_INS_VPCMPUD: vpcmp${cc}ud	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZ256rri_alt, X86_INS_VPCMPUD: vpcmpud	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZ256rrik, X86_INS_VPCMPUD: vpcmp${cc}ud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZ256rrik_alt, X86_INS_VPCMPUD: vpcmpud	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZrmi, X86_INS_VPCMPUD: vpcmp${cc}ud	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZrmi_alt, X86_INS_VPCMPUD: vpcmpud	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZrmib, X86_INS_VPCMPUD: vpcmp${cc}ud	{${src2}{1to16}, $src1, $dst|$dst, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZrmib_alt, X86_INS_VPCMPUD: vpcmpud	{$cc, ${src2}{1to16}, $src1, $dst|$dst, $src1, ${src2}{1to16}, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZrmibk, X86_INS_VPCMPUD: vpcmp${cc}ud	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZrmibk_alt, X86_INS_VPCMPUD: vpcmpud	{$cc, ${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZrmik, X86_INS_VPCMPUD: vpcmp${cc}ud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZrmik_alt, X86_INS_VPCMPUD: vpcmpud	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZrri, X86_INS_VPCMPUD: vpcmp${cc}ud	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZrri_alt, X86_INS_VPCMPUD: vpcmpud	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZrrik, X86_INS_VPCMPUD: vpcmp${cc}ud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUDZrrik_alt, X86_INS_VPCMPUD: vpcmpud	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUQZ128rmi, X86_INS_VPCMPUQ: vpcmp${cc}uq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUQZ128rmi_alt, X86_INS_VPCMPUQ: vpcmpuq	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPUQZ128rmib, X86_INS_VPCMPUQ: vpcmp${cc}uq	{${src2}{1to2}, $src1, $dst|$dst, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUQZ128rmib_alt, X86_INS_VPCMPUQ: vpcmpuq	{$cc, ${src2}{1to2}, $src1, $dst|$dst, $src1, ${src2}{1to2}, $cc} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPUQZ128rmibk, X86_INS_VPCMPUQ: vpcmp${cc}uq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUQZ128rmibk_alt, X86_INS_VPCMPUQ: vpcmpuq	{$cc, ${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}, $cc} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPUQZ128rmik, X86_INS_VPCMPUQ: vpcmp${cc}uq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUQZ128rmik_alt, X86_INS_VPCMPUQ: vpcmpuq	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPUQZ128rri, X86_INS_VPCMPUQ: vpcmp${cc}uq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUQZ128rri_alt, X86_INS_VPCMPUQ: vpcmpuq	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPUQZ128rrik, X86_INS_VPCMPUQ: vpcmp${cc}uq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUQZ128rrik_alt, X86_INS_VPCMPUQ: vpcmpuq	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPUQZ256rmi, X86_INS_VPCMPUQ: vpcmp${cc}uq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUQZ256rmi_alt, X86_INS_VPCMPUQ: vpcmpuq	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPUQZ256rmib, X86_INS_VPCMPUQ: vpcmp${cc}uq	{${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUQZ256rmib_alt, X86_INS_VPCMPUQ: vpcmpuq	{$cc, ${src2}{1to4}, $src1, $dst|$dst, $src1, ${src2}{1to4}, $cc} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPUQZ256rmibk, X86_INS_VPCMPUQ: vpcmp${cc}uq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUQZ256rmibk_alt, X86_INS_VPCMPUQ: vpcmpuq	{$cc, ${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}, $cc} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPUQZ256rmik, X86_INS_VPCMPUQ: vpcmp${cc}uq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUQZ256rmik_alt, X86_INS_VPCMPUQ: vpcmpuq	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPUQZ256rri, X86_INS_VPCMPUQ: vpcmp${cc}uq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUQZ256rri_alt, X86_INS_VPCMPUQ: vpcmpuq	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPUQZ256rrik, X86_INS_VPCMPUQ: vpcmp${cc}uq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUQZ256rrik_alt, X86_INS_VPCMPUQ: vpcmpuq	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPCMPUQZrmi, X86_INS_VPCMPUQ: vpcmp${cc}uq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUQZrmi_alt, X86_INS_VPCMPUQ: vpcmpuq	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUQZrmib, X86_INS_VPCMPUQ: vpcmp${cc}uq	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUQZrmib_alt, X86_INS_VPCMPUQ: vpcmpuq	{$cc, ${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUQZrmibk, X86_INS_VPCMPUQ: vpcmp${cc}uq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUQZrmibk_alt, X86_INS_VPCMPUQ: vpcmpuq	{$cc, ${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUQZrmik, X86_INS_VPCMPUQ: vpcmp${cc}uq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUQZrmik_alt, X86_INS_VPCMPUQ: vpcmpuq	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUQZrri, X86_INS_VPCMPUQ: vpcmp${cc}uq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUQZrri_alt, X86_INS_VPCMPUQ: vpcmpuq	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUQZrrik, X86_INS_VPCMPUQ: vpcmp${cc}uq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUQZrrik_alt, X86_INS_VPCMPUQ: vpcmpuq	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUWZ128rmi, X86_INS_VPCMPUW: vpcmp${cc}uw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUWZ128rmi_alt, X86_INS_VPCMPUW: vpcmpuw	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUWZ128rmik, X86_INS_VPCMPUW: vpcmp${cc}uw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUWZ128rmik_alt, X86_INS_VPCMPUW: vpcmpuw	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUWZ128rri, X86_INS_VPCMPUW: vpcmp${cc}uw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUWZ128rri_alt, X86_INS_VPCMPUW: vpcmpuw	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUWZ128rrik, X86_INS_VPCMPUW: vpcmp${cc}uw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUWZ128rrik_alt, X86_INS_VPCMPUW: vpcmpuw	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUWZ256rmi, X86_INS_VPCMPUW: vpcmp${cc}uw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUWZ256rmi_alt, X86_INS_VPCMPUW: vpcmpuw	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUWZ256rmik, X86_INS_VPCMPUW: vpcmp${cc}uw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUWZ256rmik_alt, X86_INS_VPCMPUW: vpcmpuw	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUWZ256rri, X86_INS_VPCMPUW: vpcmp${cc}uw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUWZ256rri_alt, X86_INS_VPCMPUW: vpcmpuw	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUWZ256rrik, X86_INS_VPCMPUW: vpcmp${cc}uw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUWZ256rrik_alt, X86_INS_VPCMPUW: vpcmpuw	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUWZrmi, X86_INS_VPCMPUW: vpcmp${cc}uw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUWZrmi_alt, X86_INS_VPCMPUW: vpcmpuw	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUWZrmik, X86_INS_VPCMPUW: vpcmp${cc}uw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUWZrmik_alt, X86_INS_VPCMPUW: vpcmpuw	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUWZrri, X86_INS_VPCMPUW: vpcmp${cc}uw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUWZrri_alt, X86_INS_VPCMPUW: vpcmpuw	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUWZrrik, X86_INS_VPCMPUW: vpcmp${cc}uw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPUWZrrik_alt, X86_INS_VPCMPUW: vpcmpuw	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPWZ128rmi, X86_INS_VPCMPW: vpcmp${cc}w	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPWZ128rmi_alt, X86_INS_VPCMPW: vpcmpw	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPWZ128rmik, X86_INS_VPCMPW: vpcmp${cc}w	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPWZ128rmik_alt, X86_INS_VPCMPW: vpcmpw	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPWZ128rri, X86_INS_VPCMPW: vpcmp${cc}w	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPWZ128rri_alt, X86_INS_VPCMPW: vpcmpw	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPWZ128rrik, X86_INS_VPCMPW: vpcmp${cc}w	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPWZ128rrik_alt, X86_INS_VPCMPW: vpcmpw	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPWZ256rmi, X86_INS_VPCMPW: vpcmp${cc}w	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPWZ256rmi_alt, X86_INS_VPCMPW: vpcmpw	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPWZ256rmik, X86_INS_VPCMPW: vpcmp${cc}w	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPWZ256rmik_alt, X86_INS_VPCMPW: vpcmpw	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPWZ256rri, X86_INS_VPCMPW: vpcmp${cc}w	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPWZ256rri_alt, X86_INS_VPCMPW: vpcmpw	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPWZ256rrik, X86_INS_VPCMPW: vpcmp${cc}w	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPWZ256rrik_alt, X86_INS_VPCMPW: vpcmpw	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPWZrmi, X86_INS_VPCMPW: vpcmp${cc}w	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPWZrmi_alt, X86_INS_VPCMPW: vpcmpw	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPWZrmik, X86_INS_VPCMPW: vpcmp${cc}w	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPWZrmik_alt, X86_INS_VPCMPW: vpcmpw	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPWZrri, X86_INS_VPCMPW: vpcmp${cc}w	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPWZrri_alt, X86_INS_VPCMPW: vpcmpw	$dst, $src1, $src2, $cc */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPWZrrik, X86_INS_VPCMPW: vpcmp${cc}w	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCMPWZrrik_alt, X86_INS_VPCMPW: vpcmpw	{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMBmi, X86_INS_VPCOMB: vpcom${cc}b	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMBmi_alt, X86_INS_VPCOMB: vpcomb	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMBri, X86_INS_VPCOMB: vpcom${cc}b	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMBri_alt, X86_INS_VPCOMB: vpcomb	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMDmi, X86_INS_VPCOMD: vpcom${cc}d	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMDmi_alt, X86_INS_VPCOMD: vpcomd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMDri, X86_INS_VPCOMD: vpcom${cc}d	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMDri_alt, X86_INS_VPCOMD: vpcomd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMPRESSDZ128mrk, X86_INS_VPCOMPRESSD: vpcompressd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMPRESSDZ128rrk, X86_INS_VPCOMPRESSD: vpcompressd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMPRESSDZ128rrkz, X86_INS_VPCOMPRESSD: vpcompressd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMPRESSDZ256mrk, X86_INS_VPCOMPRESSD: vpcompressd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMPRESSDZ256rrk, X86_INS_VPCOMPRESSD: vpcompressd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMPRESSDZ256rrkz, X86_INS_VPCOMPRESSD: vpcompressd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMPRESSDZmrk, X86_INS_VPCOMPRESSD: vpcompressd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMPRESSDZrrk, X86_INS_VPCOMPRESSD: vpcompressd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMPRESSDZrrkz, X86_INS_VPCOMPRESSD: vpcompressd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMPRESSQZ128mrk, X86_INS_VPCOMPRESSQ: vpcompressq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMPRESSQZ128rrk, X86_INS_VPCOMPRESSQ: vpcompressq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMPRESSQZ128rrkz, X86_INS_VPCOMPRESSQ: vpcompressq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMPRESSQZ256mrk, X86_INS_VPCOMPRESSQ: vpcompressq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMPRESSQZ256rrk, X86_INS_VPCOMPRESSQ: vpcompressq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMPRESSQZ256rrkz, X86_INS_VPCOMPRESSQ: vpcompressq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMPRESSQZmrk, X86_INS_VPCOMPRESSQ: vpcompressq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMPRESSQZrrk, X86_INS_VPCOMPRESSQ: vpcompressq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMPRESSQZrrkz, X86_INS_VPCOMPRESSQ: vpcompressq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMQmi, X86_INS_VPCOMQ: vpcom${cc}q	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMQmi_alt, X86_INS_VPCOMQ: vpcomq	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMQri, X86_INS_VPCOMQ: vpcom${cc}q	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMQri_alt, X86_INS_VPCOMQ: vpcomq	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMUBmi, X86_INS_VPCOMUB: vpcom${cc}ub	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMUBmi_alt, X86_INS_VPCOMUB: vpcomub	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMUBri, X86_INS_VPCOMUB: vpcom${cc}ub	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMUBri_alt, X86_INS_VPCOMUB: vpcomub	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMUDmi, X86_INS_VPCOMUD: vpcom${cc}ud	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMUDmi_alt, X86_INS_VPCOMUD: vpcomud	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMUDri, X86_INS_VPCOMUD: vpcom${cc}ud	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMUDri_alt, X86_INS_VPCOMUD: vpcomud	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMUQmi, X86_INS_VPCOMUQ: vpcom${cc}uq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMUQmi_alt, X86_INS_VPCOMUQ: vpcomuq	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMUQri, X86_INS_VPCOMUQ: vpcom${cc}uq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMUQri_alt, X86_INS_VPCOMUQ: vpcomuq	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMUWmi, X86_INS_VPCOMUW: vpcom${cc}uw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMUWmi_alt, X86_INS_VPCOMUW: vpcomuw	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMUWri, X86_INS_VPCOMUW: vpcom${cc}uw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMUWri_alt, X86_INS_VPCOMUW: vpcomuw	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMWmi, X86_INS_VPCOMW: vpcom${cc}w	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMWmi_alt, X86_INS_VPCOMW: vpcomw	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMWri, X86_INS_VPCOMW: vpcom${cc}w	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCOMWri_alt, X86_INS_VPCOMW: vpcomw	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPCONFLICTDrm, X86_INS_VPCONFLICTD: vpconflictd	{$src, ${dst}|${dst}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCONFLICTDrmb, X86_INS_VPCONFLICTD: vpconflictd	{${src}{1to16}, ${dst}|${dst}, ${src}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCONFLICTDrmbk, X86_INS_VPCONFLICTD: vpconflictd	{${src2}{1to16}, ${dst} {${mask}}|${dst} {${mask}}, ${src2}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCONFLICTDrmbkz, X86_INS_VPCONFLICTD: vpconflictd	{${src}{1to16}, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, ${src}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCONFLICTDrmk, X86_INS_VPCONFLICTD: vpconflictd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCONFLICTDrmkz, X86_INS_VPCONFLICTD: vpconflictd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCONFLICTDrr, X86_INS_VPCONFLICTD: vpconflictd	{$src, ${dst} |${dst}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCONFLICTDrrk, X86_INS_VPCONFLICTD: vpconflictd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCONFLICTDrrkz, X86_INS_VPCONFLICTD: vpconflictd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCONFLICTQrm, X86_INS_VPCONFLICTQ: vpconflictq	{$src, ${dst}|${dst}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCONFLICTQrmb, X86_INS_VPCONFLICTQ: vpconflictq	{${src}{1to8}, ${dst}|${dst}, ${src}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCONFLICTQrmbk, X86_INS_VPCONFLICTQ: vpconflictq	{${src2}{1to8}, ${dst} {${mask}}|${dst} {${mask}}, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCONFLICTQrmbkz, X86_INS_VPCONFLICTQ: vpconflictq	{${src}{1to8}, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, ${src}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCONFLICTQrmk, X86_INS_VPCONFLICTQ: vpconflictq	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCONFLICTQrmkz, X86_INS_VPCONFLICTQ: vpconflictq	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCONFLICTQrr, X86_INS_VPCONFLICTQ: vpconflictq	{$src, ${dst} |${dst}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCONFLICTQrrk, X86_INS_VPCONFLICTQ: vpconflictq	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPCONFLICTQrrkz, X86_INS_VPCONFLICTQ: vpconflictq	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPERM2F128rm, X86_INS_VPERM2F128: vperm2f128	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERM2F128rr, X86_INS_VPERM2F128: vperm2f128	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERM2I128rm, X86_INS_VPERM2I128: vperm2i128	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERM2I128rr, X86_INS_VPERM2I128: vperm2i128	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMDYrm, X86_INS_VPERMD: vpermd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMDYrr, X86_INS_VPERMD: vpermd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMDZrm, X86_INS_VPERMD: vpermd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMDZrr, X86_INS_VPERMD: vpermd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMI2Drm, X86_INS_VPERMI2D: vpermi2d	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMI2Drmk, X86_INS_VPERMI2D: vpermi2d	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMI2Drmkz, X86_INS_VPERMI2D: vpermi2d	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMI2Drr, X86_INS_VPERMI2D: vpermi2d	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMI2Drrk, X86_INS_VPERMI2D: vpermi2d	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMI2Drrkz, X86_INS_VPERMI2D: vpermi2d	{$src3, $src2, $dst {${mask}} {z} |$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMI2PDrm, X86_INS_VPERMI2PD: vpermi2pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMI2PDrmk, X86_INS_VPERMI2PD: vpermi2pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMI2PDrmkz, X86_INS_VPERMI2PD: vpermi2pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMI2PDrr, X86_INS_VPERMI2PD: vpermi2pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMI2PDrrk, X86_INS_VPERMI2PD: vpermi2pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMI2PDrrkz, X86_INS_VPERMI2PD: vpermi2pd	{$src3, $src2, $dst {${mask}} {z} |$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMI2PSrm, X86_INS_VPERMI2PS: vpermi2ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMI2PSrmk, X86_INS_VPERMI2PS: vpermi2ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMI2PSrmkz, X86_INS_VPERMI2PS: vpermi2ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMI2PSrr, X86_INS_VPERMI2PS: vpermi2ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMI2PSrrk, X86_INS_VPERMI2PS: vpermi2ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMI2PSrrkz, X86_INS_VPERMI2PS: vpermi2ps	{$src3, $src2, $dst {${mask}} {z} |$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMI2Qrm, X86_INS_VPERMI2Q: vpermi2q	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMI2Qrmk, X86_INS_VPERMI2Q: vpermi2q	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMI2Qrmkz, X86_INS_VPERMI2Q: vpermi2q	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMI2Qrr, X86_INS_VPERMI2Q: vpermi2q	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMI2Qrrk, X86_INS_VPERMI2Q: vpermi2q	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMI2Qrrkz, X86_INS_VPERMI2Q: vpermi2q	{$src3, $src2, $dst {${mask}} {z} |$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMIL2PDmr, X86_INS_VPERMIL2PD: vpermil2pd	$dst, $src1, $src2, $src3, $src4 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMIL2PDmrY, X86_INS_VPERMIL2PD: vpermil2pd	$dst, $src1, $src2, $src3, $src4 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMIL2PDrm, X86_INS_VPERMIL2PD: vpermil2pd	$dst, $src1, $src2, $src3, $src4 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMIL2PDrmY, X86_INS_VPERMIL2PD: vpermil2pd	$dst, $src1, $src2, $src3, $src4 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMIL2PDrr, X86_INS_VPERMIL2PD: vpermil2pd	$dst, $src1, $src2, $src3, $src4 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMIL2PDrrY, X86_INS_VPERMIL2PD: vpermil2pd	$dst, $src1, $src2, $src3, $src4 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMIL2PSmr, X86_INS_VPERMIL2PS: vpermil2ps	$dst, $src1, $src2, $src3, $src4 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMIL2PSmrY, X86_INS_VPERMIL2PS: vpermil2ps	$dst, $src1, $src2, $src3, $src4 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMIL2PSrm, X86_INS_VPERMIL2PS: vpermil2ps	$dst, $src1, $src2, $src3, $src4 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMIL2PSrmY, X86_INS_VPERMIL2PS: vpermil2ps	$dst, $src1, $src2, $src3, $src4 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMIL2PSrr, X86_INS_VPERMIL2PS: vpermil2ps	$dst, $src1, $src2, $src3, $src4 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMIL2PSrrY, X86_INS_VPERMIL2PS: vpermil2ps	$dst, $src1, $src2, $src3, $src4 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMILPDYmi, X86_INS_VPERMILPD: vpermilpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMILPDYri, X86_INS_VPERMILPD: vpermilpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMILPDYrm, X86_INS_VPERMILPD: vpermilpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMILPDYrr, X86_INS_VPERMILPD: vpermilpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMILPDZmi, X86_INS_VPERMILPD: vpermilpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMILPDZri, X86_INS_VPERMILPD: vpermilpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMILPDZrm, X86_INS_VPERMILPD: vpermilpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMILPDZrr, X86_INS_VPERMILPD: vpermilpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMILPDmi, X86_INS_VPERMILPD: vpermilpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMILPDri, X86_INS_VPERMILPD: vpermilpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMILPDrm, X86_INS_VPERMILPD: vpermilpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMILPDrr, X86_INS_VPERMILPD: vpermilpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMILPSYmi, X86_INS_VPERMILPS: vpermilps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMILPSYri, X86_INS_VPERMILPS: vpermilps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMILPSYrm, X86_INS_VPERMILPS: vpermilps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMILPSYrr, X86_INS_VPERMILPS: vpermilps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMILPSZmi, X86_INS_VPERMILPS: vpermilps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMILPSZri, X86_INS_VPERMILPS: vpermilps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMILPSZrm, X86_INS_VPERMILPS: vpermilps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMILPSZrr, X86_INS_VPERMILPS: vpermilps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMILPSmi, X86_INS_VPERMILPS: vpermilps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMILPSri, X86_INS_VPERMILPS: vpermilps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMILPSrm, X86_INS_VPERMILPS: vpermilps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMILPSrr, X86_INS_VPERMILPS: vpermilps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMPDYmi, X86_INS_VPERMPD: vpermpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMPDYri, X86_INS_VPERMPD: vpermpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMPDZmi, X86_INS_VPERMPD: vpermpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMPDZri, X86_INS_VPERMPD: vpermpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMPDZrm, X86_INS_VPERMPD: vpermpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMPDZrr, X86_INS_VPERMPD: vpermpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMPSYrm, X86_INS_VPERMPS: vpermps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMPSYrr, X86_INS_VPERMPS: vpermps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMPSZrm, X86_INS_VPERMPS: vpermps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMPSZrr, X86_INS_VPERMPS: vpermps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMQYmi, X86_INS_VPERMQ: vpermq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMQYri, X86_INS_VPERMQ: vpermq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMQZmi, X86_INS_VPERMQ: vpermq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMQZri, X86_INS_VPERMQ: vpermq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMQZrm, X86_INS_VPERMQ: vpermq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMQZrr, X86_INS_VPERMQ: vpermq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMT2Drm, X86_INS_VPERMT2D: vpermt2d	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMT2Drmk, X86_INS_VPERMT2D: vpermt2d	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMT2Drmkz, X86_INS_VPERMT2D: vpermt2d	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMT2Drr, X86_INS_VPERMT2D: vpermt2d	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMT2Drrk, X86_INS_VPERMT2D: vpermt2d	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMT2Drrkz, X86_INS_VPERMT2D: vpermt2d	{$src3, $src2, $dst {${mask}} {z} |$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMT2PDrm, X86_INS_VPERMT2PD: vpermt2pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMT2PDrmk, X86_INS_VPERMT2PD: vpermt2pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMT2PDrmkz, X86_INS_VPERMT2PD: vpermt2pd	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMT2PDrr, X86_INS_VPERMT2PD: vpermt2pd	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMT2PDrrk, X86_INS_VPERMT2PD: vpermt2pd	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMT2PDrrkz, X86_INS_VPERMT2PD: vpermt2pd	{$src3, $src2, $dst {${mask}} {z} |$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMT2PSrm, X86_INS_VPERMT2PS: vpermt2ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMT2PSrmk, X86_INS_VPERMT2PS: vpermt2ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMT2PSrmkz, X86_INS_VPERMT2PS: vpermt2ps	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMT2PSrr, X86_INS_VPERMT2PS: vpermt2ps	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMT2PSrrk, X86_INS_VPERMT2PS: vpermt2ps	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMT2PSrrkz, X86_INS_VPERMT2PS: vpermt2ps	{$src3, $src2, $dst {${mask}} {z} |$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMT2Qrm, X86_INS_VPERMT2Q: vpermt2q	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMT2Qrmk, X86_INS_VPERMT2Q: vpermt2q	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMT2Qrmkz, X86_INS_VPERMT2Q: vpermt2q	{$src3, $src2, $dst {${mask}} {z}|$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMT2Qrr, X86_INS_VPERMT2Q: vpermt2q	$dst, $src2, $src3 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMT2Qrrk, X86_INS_VPERMT2Q: vpermt2q	{$src3, $src2, $dst {${mask}}|$dst {${mask}}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPERMT2Qrrkz, X86_INS_VPERMT2Q: vpermt2q	{$src3, $src2, $dst {${mask}} {z} |$dst {${mask}} {z}, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXPANDDZ128rmk, X86_INS_VPEXPANDD: vpexpandd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXPANDDZ128rmkz, X86_INS_VPEXPANDD: vpexpandd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXPANDDZ128rrk, X86_INS_VPEXPANDD: vpexpandd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXPANDDZ128rrkz, X86_INS_VPEXPANDD: vpexpandd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXPANDDZ256rmk, X86_INS_VPEXPANDD: vpexpandd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXPANDDZ256rmkz, X86_INS_VPEXPANDD: vpexpandd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXPANDDZ256rrk, X86_INS_VPEXPANDD: vpexpandd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXPANDDZ256rrkz, X86_INS_VPEXPANDD: vpexpandd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXPANDDZrmk, X86_INS_VPEXPANDD: vpexpandd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXPANDDZrmkz, X86_INS_VPEXPANDD: vpexpandd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXPANDDZrrk, X86_INS_VPEXPANDD: vpexpandd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXPANDDZrrkz, X86_INS_VPEXPANDD: vpexpandd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXPANDQZ128rmk, X86_INS_VPEXPANDQ: vpexpandq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXPANDQZ128rmkz, X86_INS_VPEXPANDQ: vpexpandq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXPANDQZ128rrk, X86_INS_VPEXPANDQ: vpexpandq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXPANDQZ128rrkz, X86_INS_VPEXPANDQ: vpexpandq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXPANDQZ256rmk, X86_INS_VPEXPANDQ: vpexpandq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXPANDQZ256rmkz, X86_INS_VPEXPANDQ: vpexpandq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXPANDQZ256rrk, X86_INS_VPEXPANDQ: vpexpandq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXPANDQZ256rrkz, X86_INS_VPEXPANDQ: vpexpandq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXPANDQZrmk, X86_INS_VPEXPANDQ: vpexpandq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXPANDQZrmkz, X86_INS_VPEXPANDQ: vpexpandq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXPANDQZrrk, X86_INS_VPEXPANDQ: vpexpandq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXPANDQZrrkz, X86_INS_VPEXPANDQ: vpexpandq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXTRBmr, X86_INS_VPEXTRB: vpextrb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXTRBrr, X86_INS_VPEXTRB: vpextrb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPEXTRDmr, X86_INS_VPEXTRD: vpextrd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXTRDrr, X86_INS_VPEXTRD: vpextrd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXTRQmr, X86_INS_VPEXTRQ: vpextrq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXTRQrr, X86_INS_VPEXTRQ: vpextrq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXTRWmr, X86_INS_VPEXTRW: vpextrw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPEXTRWri, X86_INS_VPEXTRW: vpextrw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPEXTRWrr_REV, X86_INS_VPEXTRW: vpextrw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPGATHERDDYrm, X86_INS_VPGATHERDD: vpgatherdd	$dst, $src2, $mask */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPGATHERDDZrm, X86_INS_VPGATHERDD: vpgatherdd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPGATHERDDrm, X86_INS_VPGATHERDD: vpgatherdd	$dst, $src2, $mask */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPGATHERDQYrm, X86_INS_VPGATHERDQ: vpgatherdq	$dst, $src2, $mask */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPGATHERDQZrm, X86_INS_VPGATHERDQ: vpgatherdq	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPGATHERDQrm, X86_INS_VPGATHERDQ: vpgatherdq	$dst, $src2, $mask */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPGATHERQDYrm, X86_INS_VPGATHERQD: vpgatherqd	$dst, $src2, $mask */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPGATHERQDZrm, X86_INS_VPGATHERQD: vpgatherqd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPGATHERQDrm, X86_INS_VPGATHERQD: vpgatherqd	$dst, $src2, $mask */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPGATHERQQYrm, X86_INS_VPGATHERQQ: vpgatherqq	$dst, $src2, $mask */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPGATHERQQZrm, X86_INS_VPGATHERQQ: vpgatherqq	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPGATHERQQrm, X86_INS_VPGATHERQQ: vpgatherqq	$dst, $src2, $mask */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDBDrm, X86_INS_VPHADDBD: vphaddbd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDBDrr, X86_INS_VPHADDBD: vphaddbd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDBQrm, X86_INS_VPHADDBQ: vphaddbq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDBQrr, X86_INS_VPHADDBQ: vphaddbq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDBWrm, X86_INS_VPHADDBW: vphaddbw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDBWrr, X86_INS_VPHADDBW: vphaddbw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDDQrm, X86_INS_VPHADDDQ: vphadddq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDDQrr, X86_INS_VPHADDDQ: vphadddq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDDYrm, X86_INS_VPHADDD: vphaddd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDDYrr, X86_INS_VPHADDD: vphaddd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDDrm, X86_INS_VPHADDD: vphaddd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDDrr, X86_INS_VPHADDD: vphaddd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDSWrm128, X86_INS_VPHADDSW: vphaddsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDSWrm256, X86_INS_VPHADDSW: vphaddsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDSWrr128, X86_INS_VPHADDSW: vphaddsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDSWrr256, X86_INS_VPHADDSW: vphaddsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDUBDrm, X86_INS_VPHADDUBD: vphaddubd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDUBDrr, X86_INS_VPHADDUBD: vphaddubd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDUBQrm, X86_INS_VPHADDUBQ: vphaddubq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDUBQrr, X86_INS_VPHADDUBQ: vphaddubq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDUBWrm, X86_INS_VPHADDUBW: vphaddubw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDUBWrr, X86_INS_VPHADDUBW: vphaddubw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDUDQrm, X86_INS_VPHADDUDQ: vphaddudq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDUDQrr, X86_INS_VPHADDUDQ: vphaddudq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDUWDrm, X86_INS_VPHADDUWD: vphadduwd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDUWDrr, X86_INS_VPHADDUWD: vphadduwd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDUWQrm, X86_INS_VPHADDUWQ: vphadduwq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDUWQrr, X86_INS_VPHADDUWQ: vphadduwq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDWDrm, X86_INS_VPHADDWD: vphaddwd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDWDrr, X86_INS_VPHADDWD: vphaddwd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDWQrm, X86_INS_VPHADDWQ: vphaddwq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDWQrr, X86_INS_VPHADDWQ: vphaddwq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDWYrm, X86_INS_VPHADDW: vphaddw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDWYrr, X86_INS_VPHADDW: vphaddw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDWrm, X86_INS_VPHADDW: vphaddw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPHADDWrr, X86_INS_VPHADDW: vphaddw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPHMINPOSUWrm128, X86_INS_VPHMINPOSUW: vphminposuw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHMINPOSUWrr128, X86_INS_VPHMINPOSUW: vphminposuw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHSUBBWrm, X86_INS_VPHSUBBW: vphsubbw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHSUBBWrr, X86_INS_VPHSUBBW: vphsubbw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHSUBDQrm, X86_INS_VPHSUBDQ: vphsubdq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHSUBDQrr, X86_INS_VPHSUBDQ: vphsubdq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHSUBDYrm, X86_INS_VPHSUBD: vphsubd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPHSUBDYrr, X86_INS_VPHSUBD: vphsubd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPHSUBDrm, X86_INS_VPHSUBD: vphsubd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPHSUBDrr, X86_INS_VPHSUBD: vphsubd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPHSUBSWrm128, X86_INS_VPHSUBSW: vphsubsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPHSUBSWrm256, X86_INS_VPHSUBSW: vphsubsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPHSUBSWrr128, X86_INS_VPHSUBSW: vphsubsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPHSUBSWrr256, X86_INS_VPHSUBSW: vphsubsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPHSUBWDrm, X86_INS_VPHSUBWD: vphsubwd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHSUBWDrr, X86_INS_VPHSUBWD: vphsubwd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPHSUBWYrm, X86_INS_VPHSUBW: vphsubw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPHSUBWYrr, X86_INS_VPHSUBW: vphsubw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPHSUBWrm, X86_INS_VPHSUBW: vphsubw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPHSUBWrr, X86_INS_VPHSUBW: vphsubw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPINSRBrm, X86_INS_VPINSRB: vpinsrb	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPINSRBrr, X86_INS_VPINSRB: vpinsrb	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPINSRDrm, X86_INS_VPINSRD: vpinsrd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPINSRDrr, X86_INS_VPINSRD: vpinsrd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPINSRQrm, X86_INS_VPINSRQ: vpinsrq	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPINSRQrr, X86_INS_VPINSRQ: vpinsrq	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPINSRWrmi, X86_INS_VPINSRW: vpinsrw	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPINSRWrri, X86_INS_VPINSRW: vpinsrw	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPLZCNTDrm, X86_INS_VPLZCNTD: vplzcntd	{$src, ${dst}|${dst}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPLZCNTDrmb, X86_INS_VPLZCNTD: vplzcntd	{${src}{1to16}, ${dst}|${dst}, ${src}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPLZCNTDrmbk, X86_INS_VPLZCNTD: vplzcntd	{${src2}{1to16}, ${dst} {${mask}}|${dst} {${mask}}, ${src2}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPLZCNTDrmbkz, X86_INS_VPLZCNTD: vplzcntd	{${src}{1to16}, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, ${src}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPLZCNTDrmk, X86_INS_VPLZCNTD: vplzcntd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPLZCNTDrmkz, X86_INS_VPLZCNTD: vplzcntd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPLZCNTDrr, X86_INS_VPLZCNTD: vplzcntd	{$src, ${dst} |${dst}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPLZCNTDrrk, X86_INS_VPLZCNTD: vplzcntd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPLZCNTDrrkz, X86_INS_VPLZCNTD: vplzcntd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPLZCNTQrm, X86_INS_VPLZCNTQ: vplzcntq	{$src, ${dst}|${dst}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPLZCNTQrmb, X86_INS_VPLZCNTQ: vplzcntq	{${src}{1to8}, ${dst}|${dst}, ${src}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPLZCNTQrmbk, X86_INS_VPLZCNTQ: vplzcntq	{${src2}{1to8}, ${dst} {${mask}}|${dst} {${mask}}, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPLZCNTQrmbkz, X86_INS_VPLZCNTQ: vplzcntq	{${src}{1to8}, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, ${src}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPLZCNTQrmk, X86_INS_VPLZCNTQ: vplzcntq	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPLZCNTQrmkz, X86_INS_VPLZCNTQ: vplzcntq	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPLZCNTQrr, X86_INS_VPLZCNTQ: vplzcntq	{$src, ${dst} |${dst}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPLZCNTQrrk, X86_INS_VPLZCNTQ: vplzcntq	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPLZCNTQrrkz, X86_INS_VPLZCNTQ: vplzcntq	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMACSDDrm, X86_INS_VPMACSDD: vpmacsdd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMACSDDrr, X86_INS_VPMACSDD: vpmacsdd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMACSDQHrm, X86_INS_VPMACSDQH: vpmacsdqh	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMACSDQHrr, X86_INS_VPMACSDQH: vpmacsdqh	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMACSDQLrm, X86_INS_VPMACSDQL: vpmacsdql	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMACSDQLrr, X86_INS_VPMACSDQL: vpmacsdql	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMACSSDDrm, X86_INS_VPMACSSDD: vpmacssdd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMACSSDDrr, X86_INS_VPMACSSDD: vpmacssdd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMACSSDQHrm, X86_INS_VPMACSSDQH: vpmacssdqh	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMACSSDQHrr, X86_INS_VPMACSSDQH: vpmacssdqh	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMACSSDQLrm, X86_INS_VPMACSSDQL: vpmacssdql	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMACSSDQLrr, X86_INS_VPMACSSDQL: vpmacssdql	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMACSSWDrm, X86_INS_VPMACSSWD: vpmacsswd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMACSSWDrr, X86_INS_VPMACSSWD: vpmacsswd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMACSSWWrm, X86_INS_VPMACSSWW: vpmacssww	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMACSSWWrr, X86_INS_VPMACSSWW: vpmacssww	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMACSWDrm, X86_INS_VPMACSWD: vpmacswd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMACSWDrr, X86_INS_VPMACSWD: vpmacswd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMACSWWrm, X86_INS_VPMACSWW: vpmacsww	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMACSWWrr, X86_INS_VPMACSWW: vpmacsww	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMADCSSWDrm, X86_INS_VPMADCSSWD: vpmadcsswd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMADCSSWDrr, X86_INS_VPMADCSSWD: vpmadcsswd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMADCSWDrm, X86_INS_VPMADCSWD: vpmadcswd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMADCSWDrr, X86_INS_VPMADCSWD: vpmadcswd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMADDUBSWrm128, X86_INS_VPMADDUBSW: vpmaddubsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMADDUBSWrm256, X86_INS_VPMADDUBSW: vpmaddubsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMADDUBSWrr128, X86_INS_VPMADDUBSW: vpmaddubsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMADDUBSWrr256, X86_INS_VPMADDUBSW: vpmaddubsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMADDWDYrm, X86_INS_VPMADDWD: vpmaddwd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMADDWDYrr, X86_INS_VPMADDWD: vpmaddwd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMADDWDrm, X86_INS_VPMADDWD: vpmaddwd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMADDWDrr, X86_INS_VPMADDWD: vpmaddwd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMASKMOVDYmr, X86_INS_VPMASKMOVD: vpmaskmovd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMASKMOVDYrm, X86_INS_VPMASKMOVD: vpmaskmovd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMASKMOVDmr, X86_INS_VPMASKMOVD: vpmaskmovd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMASKMOVDrm, X86_INS_VPMASKMOVD: vpmaskmovd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMASKMOVQYmr, X86_INS_VPMASKMOVQ: vpmaskmovq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMASKMOVQYrm, X86_INS_VPMASKMOVQ: vpmaskmovq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMASKMOVQmr, X86_INS_VPMASKMOVQ: vpmaskmovq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMASKMOVQrm, X86_INS_VPMASKMOVQ: vpmaskmovq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSBYrm, X86_INS_VPMAXSB: vpmaxsb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSBYrr, X86_INS_VPMAXSB: vpmaxsb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSBZ128rm, X86_INS_VPMAXSB: vpmaxsb	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSBZ128rmk, X86_INS_VPMAXSB: vpmaxsb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSBZ128rmkz, X86_INS_VPMAXSB: vpmaxsb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSBZ128rr, X86_INS_VPMAXSB: vpmaxsb	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSBZ128rrk, X86_INS_VPMAXSB: vpmaxsb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSBZ128rrkz, X86_INS_VPMAXSB: vpmaxsb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSBZ256rm, X86_INS_VPMAXSB: vpmaxsb	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSBZ256rmk, X86_INS_VPMAXSB: vpmaxsb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSBZ256rmkz, X86_INS_VPMAXSB: vpmaxsb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSBZ256rr, X86_INS_VPMAXSB: vpmaxsb	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSBZ256rrk, X86_INS_VPMAXSB: vpmaxsb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSBZ256rrkz, X86_INS_VPMAXSB: vpmaxsb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSBZrm, X86_INS_VPMAXSB: vpmaxsb	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSBZrmk, X86_INS_VPMAXSB: vpmaxsb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSBZrmkz, X86_INS_VPMAXSB: vpmaxsb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSBZrr, X86_INS_VPMAXSB: vpmaxsb	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSBZrrk, X86_INS_VPMAXSB: vpmaxsb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSBZrrkz, X86_INS_VPMAXSB: vpmaxsb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSBrm, X86_INS_VPMAXSB: vpmaxsb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSBrr, X86_INS_VPMAXSB: vpmaxsb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDYrm, X86_INS_VPMAXSD: vpmaxsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDYrr, X86_INS_VPMAXSD: vpmaxsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZ128rm, X86_INS_VPMAXSD: vpmaxsd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZ128rmb, X86_INS_VPMAXSD: vpmaxsd	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZ128rmbk, X86_INS_VPMAXSD: vpmaxsd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZ128rmbkz, X86_INS_VPMAXSD: vpmaxsd	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZ128rmk, X86_INS_VPMAXSD: vpmaxsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZ128rmkz, X86_INS_VPMAXSD: vpmaxsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZ128rr, X86_INS_VPMAXSD: vpmaxsd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZ128rrk, X86_INS_VPMAXSD: vpmaxsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZ128rrkz, X86_INS_VPMAXSD: vpmaxsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZ256rm, X86_INS_VPMAXSD: vpmaxsd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZ256rmb, X86_INS_VPMAXSD: vpmaxsd	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZ256rmbk, X86_INS_VPMAXSD: vpmaxsd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZ256rmbkz, X86_INS_VPMAXSD: vpmaxsd	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZ256rmk, X86_INS_VPMAXSD: vpmaxsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZ256rmkz, X86_INS_VPMAXSD: vpmaxsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZ256rr, X86_INS_VPMAXSD: vpmaxsd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZ256rrk, X86_INS_VPMAXSD: vpmaxsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZ256rrkz, X86_INS_VPMAXSD: vpmaxsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZrm, X86_INS_VPMAXSD: vpmaxsd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZrmb, X86_INS_VPMAXSD: vpmaxsd	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZrmbk, X86_INS_VPMAXSD: vpmaxsd	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZrmbkz, X86_INS_VPMAXSD: vpmaxsd	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZrmk, X86_INS_VPMAXSD: vpmaxsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZrmkz, X86_INS_VPMAXSD: vpmaxsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZrr, X86_INS_VPMAXSD: vpmaxsd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZrrk, X86_INS_VPMAXSD: vpmaxsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDZrrkz, X86_INS_VPMAXSD: vpmaxsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDrm, X86_INS_VPMAXSD: vpmaxsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSDrr, X86_INS_VPMAXSD: vpmaxsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZ128rm, X86_INS_VPMAXSQ: vpmaxsq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZ128rmb, X86_INS_VPMAXSQ: vpmaxsq	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZ128rmbk, X86_INS_VPMAXSQ: vpmaxsq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZ128rmbkz, X86_INS_VPMAXSQ: vpmaxsq	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZ128rmk, X86_INS_VPMAXSQ: vpmaxsq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZ128rmkz, X86_INS_VPMAXSQ: vpmaxsq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZ128rr, X86_INS_VPMAXSQ: vpmaxsq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZ128rrk, X86_INS_VPMAXSQ: vpmaxsq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZ128rrkz, X86_INS_VPMAXSQ: vpmaxsq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZ256rm, X86_INS_VPMAXSQ: vpmaxsq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZ256rmb, X86_INS_VPMAXSQ: vpmaxsq	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZ256rmbk, X86_INS_VPMAXSQ: vpmaxsq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZ256rmbkz, X86_INS_VPMAXSQ: vpmaxsq	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZ256rmk, X86_INS_VPMAXSQ: vpmaxsq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZ256rmkz, X86_INS_VPMAXSQ: vpmaxsq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZ256rr, X86_INS_VPMAXSQ: vpmaxsq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZ256rrk, X86_INS_VPMAXSQ: vpmaxsq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZ256rrkz, X86_INS_VPMAXSQ: vpmaxsq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZrm, X86_INS_VPMAXSQ: vpmaxsq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZrmb, X86_INS_VPMAXSQ: vpmaxsq	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZrmbk, X86_INS_VPMAXSQ: vpmaxsq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZrmbkz, X86_INS_VPMAXSQ: vpmaxsq	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZrmk, X86_INS_VPMAXSQ: vpmaxsq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZrmkz, X86_INS_VPMAXSQ: vpmaxsq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZrr, X86_INS_VPMAXSQ: vpmaxsq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZrrk, X86_INS_VPMAXSQ: vpmaxsq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSQZrrkz, X86_INS_VPMAXSQ: vpmaxsq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSWYrm, X86_INS_VPMAXSW: vpmaxsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSWYrr, X86_INS_VPMAXSW: vpmaxsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSWZ128rm, X86_INS_VPMAXSW: vpmaxsw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSWZ128rmk, X86_INS_VPMAXSW: vpmaxsw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSWZ128rmkz, X86_INS_VPMAXSW: vpmaxsw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSWZ128rr, X86_INS_VPMAXSW: vpmaxsw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSWZ128rrk, X86_INS_VPMAXSW: vpmaxsw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSWZ128rrkz, X86_INS_VPMAXSW: vpmaxsw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSWZ256rm, X86_INS_VPMAXSW: vpmaxsw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSWZ256rmk, X86_INS_VPMAXSW: vpmaxsw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSWZ256rmkz, X86_INS_VPMAXSW: vpmaxsw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSWZ256rr, X86_INS_VPMAXSW: vpmaxsw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSWZ256rrk, X86_INS_VPMAXSW: vpmaxsw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSWZ256rrkz, X86_INS_VPMAXSW: vpmaxsw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSWZrm, X86_INS_VPMAXSW: vpmaxsw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSWZrmk, X86_INS_VPMAXSW: vpmaxsw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSWZrmkz, X86_INS_VPMAXSW: vpmaxsw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSWZrr, X86_INS_VPMAXSW: vpmaxsw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSWZrrk, X86_INS_VPMAXSW: vpmaxsw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSWZrrkz, X86_INS_VPMAXSW: vpmaxsw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSWrm, X86_INS_VPMAXSW: vpmaxsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXSWrr, X86_INS_VPMAXSW: vpmaxsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUBYrm, X86_INS_VPMAXUB: vpmaxub	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUBYrr, X86_INS_VPMAXUB: vpmaxub	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUBZ128rm, X86_INS_VPMAXUB: vpmaxub	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUBZ128rmk, X86_INS_VPMAXUB: vpmaxub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUBZ128rmkz, X86_INS_VPMAXUB: vpmaxub	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUBZ128rr, X86_INS_VPMAXUB: vpmaxub	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUBZ128rrk, X86_INS_VPMAXUB: vpmaxub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUBZ128rrkz, X86_INS_VPMAXUB: vpmaxub	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUBZ256rm, X86_INS_VPMAXUB: vpmaxub	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUBZ256rmk, X86_INS_VPMAXUB: vpmaxub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUBZ256rmkz, X86_INS_VPMAXUB: vpmaxub	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUBZ256rr, X86_INS_VPMAXUB: vpmaxub	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUBZ256rrk, X86_INS_VPMAXUB: vpmaxub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUBZ256rrkz, X86_INS_VPMAXUB: vpmaxub	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUBZrm, X86_INS_VPMAXUB: vpmaxub	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUBZrmk, X86_INS_VPMAXUB: vpmaxub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUBZrmkz, X86_INS_VPMAXUB: vpmaxub	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUBZrr, X86_INS_VPMAXUB: vpmaxub	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUBZrrk, X86_INS_VPMAXUB: vpmaxub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUBZrrkz, X86_INS_VPMAXUB: vpmaxub	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUBrm, X86_INS_VPMAXUB: vpmaxub	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUBrr, X86_INS_VPMAXUB: vpmaxub	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDYrm, X86_INS_VPMAXUD: vpmaxud	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDYrr, X86_INS_VPMAXUD: vpmaxud	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZ128rm, X86_INS_VPMAXUD: vpmaxud	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZ128rmb, X86_INS_VPMAXUD: vpmaxud	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZ128rmbk, X86_INS_VPMAXUD: vpmaxud	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZ128rmbkz, X86_INS_VPMAXUD: vpmaxud	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZ128rmk, X86_INS_VPMAXUD: vpmaxud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZ128rmkz, X86_INS_VPMAXUD: vpmaxud	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZ128rr, X86_INS_VPMAXUD: vpmaxud	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZ128rrk, X86_INS_VPMAXUD: vpmaxud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZ128rrkz, X86_INS_VPMAXUD: vpmaxud	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZ256rm, X86_INS_VPMAXUD: vpmaxud	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZ256rmb, X86_INS_VPMAXUD: vpmaxud	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZ256rmbk, X86_INS_VPMAXUD: vpmaxud	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZ256rmbkz, X86_INS_VPMAXUD: vpmaxud	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZ256rmk, X86_INS_VPMAXUD: vpmaxud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZ256rmkz, X86_INS_VPMAXUD: vpmaxud	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZ256rr, X86_INS_VPMAXUD: vpmaxud	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZ256rrk, X86_INS_VPMAXUD: vpmaxud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZ256rrkz, X86_INS_VPMAXUD: vpmaxud	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZrm, X86_INS_VPMAXUD: vpmaxud	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZrmb, X86_INS_VPMAXUD: vpmaxud	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZrmbk, X86_INS_VPMAXUD: vpmaxud	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZrmbkz, X86_INS_VPMAXUD: vpmaxud	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZrmk, X86_INS_VPMAXUD: vpmaxud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZrmkz, X86_INS_VPMAXUD: vpmaxud	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZrr, X86_INS_VPMAXUD: vpmaxud	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZrrk, X86_INS_VPMAXUD: vpmaxud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDZrrkz, X86_INS_VPMAXUD: vpmaxud	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDrm, X86_INS_VPMAXUD: vpmaxud	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUDrr, X86_INS_VPMAXUD: vpmaxud	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZ128rm, X86_INS_VPMAXUQ: vpmaxuq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZ128rmb, X86_INS_VPMAXUQ: vpmaxuq	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZ128rmbk, X86_INS_VPMAXUQ: vpmaxuq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZ128rmbkz, X86_INS_VPMAXUQ: vpmaxuq	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZ128rmk, X86_INS_VPMAXUQ: vpmaxuq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZ128rmkz, X86_INS_VPMAXUQ: vpmaxuq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZ128rr, X86_INS_VPMAXUQ: vpmaxuq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZ128rrk, X86_INS_VPMAXUQ: vpmaxuq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZ128rrkz, X86_INS_VPMAXUQ: vpmaxuq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZ256rm, X86_INS_VPMAXUQ: vpmaxuq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZ256rmb, X86_INS_VPMAXUQ: vpmaxuq	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZ256rmbk, X86_INS_VPMAXUQ: vpmaxuq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZ256rmbkz, X86_INS_VPMAXUQ: vpmaxuq	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZ256rmk, X86_INS_VPMAXUQ: vpmaxuq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZ256rmkz, X86_INS_VPMAXUQ: vpmaxuq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZ256rr, X86_INS_VPMAXUQ: vpmaxuq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZ256rrk, X86_INS_VPMAXUQ: vpmaxuq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZ256rrkz, X86_INS_VPMAXUQ: vpmaxuq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZrm, X86_INS_VPMAXUQ: vpmaxuq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZrmb, X86_INS_VPMAXUQ: vpmaxuq	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZrmbk, X86_INS_VPMAXUQ: vpmaxuq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZrmbkz, X86_INS_VPMAXUQ: vpmaxuq	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZrmk, X86_INS_VPMAXUQ: vpmaxuq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZrmkz, X86_INS_VPMAXUQ: vpmaxuq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZrr, X86_INS_VPMAXUQ: vpmaxuq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZrrk, X86_INS_VPMAXUQ: vpmaxuq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUQZrrkz, X86_INS_VPMAXUQ: vpmaxuq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUWYrm, X86_INS_VPMAXUW: vpmaxuw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUWYrr, X86_INS_VPMAXUW: vpmaxuw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUWZ128rm, X86_INS_VPMAXUW: vpmaxuw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUWZ128rmk, X86_INS_VPMAXUW: vpmaxuw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUWZ128rmkz, X86_INS_VPMAXUW: vpmaxuw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUWZ128rr, X86_INS_VPMAXUW: vpmaxuw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUWZ128rrk, X86_INS_VPMAXUW: vpmaxuw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUWZ128rrkz, X86_INS_VPMAXUW: vpmaxuw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUWZ256rm, X86_INS_VPMAXUW: vpmaxuw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUWZ256rmk, X86_INS_VPMAXUW: vpmaxuw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUWZ256rmkz, X86_INS_VPMAXUW: vpmaxuw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUWZ256rr, X86_INS_VPMAXUW: vpmaxuw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUWZ256rrk, X86_INS_VPMAXUW: vpmaxuw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUWZ256rrkz, X86_INS_VPMAXUW: vpmaxuw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUWZrm, X86_INS_VPMAXUW: vpmaxuw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUWZrmk, X86_INS_VPMAXUW: vpmaxuw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUWZrmkz, X86_INS_VPMAXUW: vpmaxuw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUWZrr, X86_INS_VPMAXUW: vpmaxuw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUWZrrk, X86_INS_VPMAXUW: vpmaxuw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUWZrrkz, X86_INS_VPMAXUW: vpmaxuw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUWrm, X86_INS_VPMAXUW: vpmaxuw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMAXUWrr, X86_INS_VPMAXUW: vpmaxuw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSBYrm, X86_INS_VPMINSB: vpminsb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSBYrr, X86_INS_VPMINSB: vpminsb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSBZ128rm, X86_INS_VPMINSB: vpminsb	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSBZ128rmk, X86_INS_VPMINSB: vpminsb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSBZ128rmkz, X86_INS_VPMINSB: vpminsb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSBZ128rr, X86_INS_VPMINSB: vpminsb	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSBZ128rrk, X86_INS_VPMINSB: vpminsb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSBZ128rrkz, X86_INS_VPMINSB: vpminsb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSBZ256rm, X86_INS_VPMINSB: vpminsb	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSBZ256rmk, X86_INS_VPMINSB: vpminsb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSBZ256rmkz, X86_INS_VPMINSB: vpminsb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSBZ256rr, X86_INS_VPMINSB: vpminsb	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSBZ256rrk, X86_INS_VPMINSB: vpminsb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSBZ256rrkz, X86_INS_VPMINSB: vpminsb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSBZrm, X86_INS_VPMINSB: vpminsb	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSBZrmk, X86_INS_VPMINSB: vpminsb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSBZrmkz, X86_INS_VPMINSB: vpminsb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSBZrr, X86_INS_VPMINSB: vpminsb	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSBZrrk, X86_INS_VPMINSB: vpminsb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSBZrrkz, X86_INS_VPMINSB: vpminsb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSBrm, X86_INS_VPMINSB: vpminsb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSBrr, X86_INS_VPMINSB: vpminsb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDYrm, X86_INS_VPMINSD: vpminsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDYrr, X86_INS_VPMINSD: vpminsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZ128rm, X86_INS_VPMINSD: vpminsd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZ128rmb, X86_INS_VPMINSD: vpminsd	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZ128rmbk, X86_INS_VPMINSD: vpminsd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZ128rmbkz, X86_INS_VPMINSD: vpminsd	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZ128rmk, X86_INS_VPMINSD: vpminsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZ128rmkz, X86_INS_VPMINSD: vpminsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZ128rr, X86_INS_VPMINSD: vpminsd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZ128rrk, X86_INS_VPMINSD: vpminsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZ128rrkz, X86_INS_VPMINSD: vpminsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZ256rm, X86_INS_VPMINSD: vpminsd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZ256rmb, X86_INS_VPMINSD: vpminsd	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZ256rmbk, X86_INS_VPMINSD: vpminsd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZ256rmbkz, X86_INS_VPMINSD: vpminsd	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZ256rmk, X86_INS_VPMINSD: vpminsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZ256rmkz, X86_INS_VPMINSD: vpminsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZ256rr, X86_INS_VPMINSD: vpminsd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZ256rrk, X86_INS_VPMINSD: vpminsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZ256rrkz, X86_INS_VPMINSD: vpminsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZrm, X86_INS_VPMINSD: vpminsd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZrmb, X86_INS_VPMINSD: vpminsd	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZrmbk, X86_INS_VPMINSD: vpminsd	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZrmbkz, X86_INS_VPMINSD: vpminsd	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZrmk, X86_INS_VPMINSD: vpminsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZrmkz, X86_INS_VPMINSD: vpminsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZrr, X86_INS_VPMINSD: vpminsd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZrrk, X86_INS_VPMINSD: vpminsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDZrrkz, X86_INS_VPMINSD: vpminsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDrm, X86_INS_VPMINSD: vpminsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSDrr, X86_INS_VPMINSD: vpminsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZ128rm, X86_INS_VPMINSQ: vpminsq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZ128rmb, X86_INS_VPMINSQ: vpminsq	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZ128rmbk, X86_INS_VPMINSQ: vpminsq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZ128rmbkz, X86_INS_VPMINSQ: vpminsq	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZ128rmk, X86_INS_VPMINSQ: vpminsq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZ128rmkz, X86_INS_VPMINSQ: vpminsq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZ128rr, X86_INS_VPMINSQ: vpminsq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZ128rrk, X86_INS_VPMINSQ: vpminsq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZ128rrkz, X86_INS_VPMINSQ: vpminsq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZ256rm, X86_INS_VPMINSQ: vpminsq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZ256rmb, X86_INS_VPMINSQ: vpminsq	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZ256rmbk, X86_INS_VPMINSQ: vpminsq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZ256rmbkz, X86_INS_VPMINSQ: vpminsq	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZ256rmk, X86_INS_VPMINSQ: vpminsq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZ256rmkz, X86_INS_VPMINSQ: vpminsq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZ256rr, X86_INS_VPMINSQ: vpminsq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZ256rrk, X86_INS_VPMINSQ: vpminsq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZ256rrkz, X86_INS_VPMINSQ: vpminsq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZrm, X86_INS_VPMINSQ: vpminsq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZrmb, X86_INS_VPMINSQ: vpminsq	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZrmbk, X86_INS_VPMINSQ: vpminsq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZrmbkz, X86_INS_VPMINSQ: vpminsq	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZrmk, X86_INS_VPMINSQ: vpminsq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZrmkz, X86_INS_VPMINSQ: vpminsq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZrr, X86_INS_VPMINSQ: vpminsq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZrrk, X86_INS_VPMINSQ: vpminsq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSQZrrkz, X86_INS_VPMINSQ: vpminsq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSWYrm, X86_INS_VPMINSW: vpminsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSWYrr, X86_INS_VPMINSW: vpminsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSWZ128rm, X86_INS_VPMINSW: vpminsw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSWZ128rmk, X86_INS_VPMINSW: vpminsw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSWZ128rmkz, X86_INS_VPMINSW: vpminsw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSWZ128rr, X86_INS_VPMINSW: vpminsw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSWZ128rrk, X86_INS_VPMINSW: vpminsw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSWZ128rrkz, X86_INS_VPMINSW: vpminsw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSWZ256rm, X86_INS_VPMINSW: vpminsw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSWZ256rmk, X86_INS_VPMINSW: vpminsw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSWZ256rmkz, X86_INS_VPMINSW: vpminsw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSWZ256rr, X86_INS_VPMINSW: vpminsw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSWZ256rrk, X86_INS_VPMINSW: vpminsw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSWZ256rrkz, X86_INS_VPMINSW: vpminsw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSWZrm, X86_INS_VPMINSW: vpminsw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSWZrmk, X86_INS_VPMINSW: vpminsw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSWZrmkz, X86_INS_VPMINSW: vpminsw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSWZrr, X86_INS_VPMINSW: vpminsw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSWZrrk, X86_INS_VPMINSW: vpminsw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSWZrrkz, X86_INS_VPMINSW: vpminsw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSWrm, X86_INS_VPMINSW: vpminsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINSWrr, X86_INS_VPMINSW: vpminsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUBYrm, X86_INS_VPMINUB: vpminub	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUBYrr, X86_INS_VPMINUB: vpminub	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUBZ128rm, X86_INS_VPMINUB: vpminub	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUBZ128rmk, X86_INS_VPMINUB: vpminub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUBZ128rmkz, X86_INS_VPMINUB: vpminub	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUBZ128rr, X86_INS_VPMINUB: vpminub	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUBZ128rrk, X86_INS_VPMINUB: vpminub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUBZ128rrkz, X86_INS_VPMINUB: vpminub	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUBZ256rm, X86_INS_VPMINUB: vpminub	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUBZ256rmk, X86_INS_VPMINUB: vpminub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUBZ256rmkz, X86_INS_VPMINUB: vpminub	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUBZ256rr, X86_INS_VPMINUB: vpminub	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUBZ256rrk, X86_INS_VPMINUB: vpminub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUBZ256rrkz, X86_INS_VPMINUB: vpminub	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUBZrm, X86_INS_VPMINUB: vpminub	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUBZrmk, X86_INS_VPMINUB: vpminub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUBZrmkz, X86_INS_VPMINUB: vpminub	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUBZrr, X86_INS_VPMINUB: vpminub	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUBZrrk, X86_INS_VPMINUB: vpminub	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUBZrrkz, X86_INS_VPMINUB: vpminub	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUBrm, X86_INS_VPMINUB: vpminub	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUBrr, X86_INS_VPMINUB: vpminub	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDYrm, X86_INS_VPMINUD: vpminud	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDYrr, X86_INS_VPMINUD: vpminud	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZ128rm, X86_INS_VPMINUD: vpminud	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZ128rmb, X86_INS_VPMINUD: vpminud	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZ128rmbk, X86_INS_VPMINUD: vpminud	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZ128rmbkz, X86_INS_VPMINUD: vpminud	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZ128rmk, X86_INS_VPMINUD: vpminud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZ128rmkz, X86_INS_VPMINUD: vpminud	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZ128rr, X86_INS_VPMINUD: vpminud	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZ128rrk, X86_INS_VPMINUD: vpminud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZ128rrkz, X86_INS_VPMINUD: vpminud	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZ256rm, X86_INS_VPMINUD: vpminud	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZ256rmb, X86_INS_VPMINUD: vpminud	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZ256rmbk, X86_INS_VPMINUD: vpminud	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZ256rmbkz, X86_INS_VPMINUD: vpminud	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZ256rmk, X86_INS_VPMINUD: vpminud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZ256rmkz, X86_INS_VPMINUD: vpminud	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZ256rr, X86_INS_VPMINUD: vpminud	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZ256rrk, X86_INS_VPMINUD: vpminud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZ256rrkz, X86_INS_VPMINUD: vpminud	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZrm, X86_INS_VPMINUD: vpminud	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZrmb, X86_INS_VPMINUD: vpminud	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZrmbk, X86_INS_VPMINUD: vpminud	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZrmbkz, X86_INS_VPMINUD: vpminud	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZrmk, X86_INS_VPMINUD: vpminud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZrmkz, X86_INS_VPMINUD: vpminud	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZrr, X86_INS_VPMINUD: vpminud	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZrrk, X86_INS_VPMINUD: vpminud	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDZrrkz, X86_INS_VPMINUD: vpminud	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDrm, X86_INS_VPMINUD: vpminud	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUDrr, X86_INS_VPMINUD: vpminud	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZ128rm, X86_INS_VPMINUQ: vpminuq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZ128rmb, X86_INS_VPMINUQ: vpminuq	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZ128rmbk, X86_INS_VPMINUQ: vpminuq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZ128rmbkz, X86_INS_VPMINUQ: vpminuq	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZ128rmk, X86_INS_VPMINUQ: vpminuq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZ128rmkz, X86_INS_VPMINUQ: vpminuq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZ128rr, X86_INS_VPMINUQ: vpminuq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZ128rrk, X86_INS_VPMINUQ: vpminuq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZ128rrkz, X86_INS_VPMINUQ: vpminuq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZ256rm, X86_INS_VPMINUQ: vpminuq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZ256rmb, X86_INS_VPMINUQ: vpminuq	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZ256rmbk, X86_INS_VPMINUQ: vpminuq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZ256rmbkz, X86_INS_VPMINUQ: vpminuq	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZ256rmk, X86_INS_VPMINUQ: vpminuq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZ256rmkz, X86_INS_VPMINUQ: vpminuq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZ256rr, X86_INS_VPMINUQ: vpminuq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZ256rrk, X86_INS_VPMINUQ: vpminuq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZ256rrkz, X86_INS_VPMINUQ: vpminuq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZrm, X86_INS_VPMINUQ: vpminuq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZrmb, X86_INS_VPMINUQ: vpminuq	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZrmbk, X86_INS_VPMINUQ: vpminuq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZrmbkz, X86_INS_VPMINUQ: vpminuq	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZrmk, X86_INS_VPMINUQ: vpminuq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZrmkz, X86_INS_VPMINUQ: vpminuq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZrr, X86_INS_VPMINUQ: vpminuq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZrrk, X86_INS_VPMINUQ: vpminuq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUQZrrkz, X86_INS_VPMINUQ: vpminuq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUWYrm, X86_INS_VPMINUW: vpminuw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUWYrr, X86_INS_VPMINUW: vpminuw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUWZ128rm, X86_INS_VPMINUW: vpminuw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUWZ128rmk, X86_INS_VPMINUW: vpminuw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUWZ128rmkz, X86_INS_VPMINUW: vpminuw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUWZ128rr, X86_INS_VPMINUW: vpminuw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUWZ128rrk, X86_INS_VPMINUW: vpminuw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUWZ128rrkz, X86_INS_VPMINUW: vpminuw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUWZ256rm, X86_INS_VPMINUW: vpminuw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUWZ256rmk, X86_INS_VPMINUW: vpminuw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUWZ256rmkz, X86_INS_VPMINUW: vpminuw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUWZ256rr, X86_INS_VPMINUW: vpminuw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUWZ256rrk, X86_INS_VPMINUW: vpminuw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUWZ256rrkz, X86_INS_VPMINUW: vpminuw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUWZrm, X86_INS_VPMINUW: vpminuw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUWZrmk, X86_INS_VPMINUW: vpminuw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUWZrmkz, X86_INS_VPMINUW: vpminuw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUWZrr, X86_INS_VPMINUW: vpminuw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUWZrrk, X86_INS_VPMINUW: vpminuw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUWZrrkz, X86_INS_VPMINUW: vpminuw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUWrm, X86_INS_VPMINUW: vpminuw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMINUWrr, X86_INS_VPMINUW: vpminuw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVDBmr, X86_INS_VPMOVDB: vpmovdb	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVDBmrk, X86_INS_VPMOVDB: vpmovdb	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVDBrr, X86_INS_VPMOVDB: vpmovdb	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVDBrrk, X86_INS_VPMOVDB: vpmovdb	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVDBrrkz, X86_INS_VPMOVDB: vpmovdb	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVDWmr, X86_INS_VPMOVDW: vpmovdw	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVDWmrk, X86_INS_VPMOVDW: vpmovdw	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVDWrr, X86_INS_VPMOVDW: vpmovdw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVDWrrk, X86_INS_VPMOVDW: vpmovdw	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVDWrrkz, X86_INS_VPMOVDW: vpmovdw	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVM2BZ128rr, X86_INS_VPMOVM2B: vpmovm2b	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVM2BZ256rr, X86_INS_VPMOVM2B: vpmovm2b	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVM2BZrr, X86_INS_VPMOVM2B: vpmovm2b	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVM2DZ128rr, X86_INS_VPMOVM2D: vpmovm2d	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_VPMOVM2DZ256rr, X86_INS_VPMOVM2D: vpmovm2d	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVM2DZrr, X86_INS_VPMOVM2D: vpmovm2d	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVM2QZ128rr, X86_INS_VPMOVM2Q: vpmovm2q	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_VPMOVM2QZ256rr, X86_INS_VPMOVM2Q: vpmovm2q	$dst, $src */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_VPMOVM2QZrr, X86_INS_VPMOVM2Q: vpmovm2q	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVM2WZ128rr, X86_INS_VPMOVM2W: vpmovm2w	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVM2WZ256rr, X86_INS_VPMOVM2W: vpmovm2w	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVM2WZrr, X86_INS_VPMOVM2W: vpmovm2w	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVMSKBYrr, X86_INS_VPMOVMSKB: vpmovmskb	$dst, $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVMSKBrr, X86_INS_VPMOVMSKB: vpmovmskb	$dst, $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVQBmr, X86_INS_VPMOVQB: vpmovqb	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVQBmrk, X86_INS_VPMOVQB: vpmovqb	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVQBrr, X86_INS_VPMOVQB: vpmovqb	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVQBrrk, X86_INS_VPMOVQB: vpmovqb	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVQBrrkz, X86_INS_VPMOVQB: vpmovqb	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVQDmr, X86_INS_VPMOVQD: vpmovqd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVQDmrk, X86_INS_VPMOVQD: vpmovqd	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVQDrr, X86_INS_VPMOVQD: vpmovqd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVQDrrk, X86_INS_VPMOVQD: vpmovqd	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVQDrrkz, X86_INS_VPMOVQD: vpmovqd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVQWmr, X86_INS_VPMOVQW: vpmovqw	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVQWmrk, X86_INS_VPMOVQW: vpmovqw	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVQWrr, X86_INS_VPMOVQW: vpmovqw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVQWrrk, X86_INS_VPMOVQW: vpmovqw	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVQWrrkz, X86_INS_VPMOVQW: vpmovqw	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSDBmr, X86_INS_VPMOVSDB: vpmovsdb	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSDBmrk, X86_INS_VPMOVSDB: vpmovsdb	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSDBrr, X86_INS_VPMOVSDB: vpmovsdb	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSDBrrk, X86_INS_VPMOVSDB: vpmovsdb	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSDBrrkz, X86_INS_VPMOVSDB: vpmovsdb	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSDWmr, X86_INS_VPMOVSDW: vpmovsdw	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSDWmrk, X86_INS_VPMOVSDW: vpmovsdw	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSDWrr, X86_INS_VPMOVSDW: vpmovsdw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSDWrrk, X86_INS_VPMOVSDW: vpmovsdw	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSDWrrkz, X86_INS_VPMOVSDW: vpmovsdw	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSQBmr, X86_INS_VPMOVSQB: vpmovsqb	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSQBmrk, X86_INS_VPMOVSQB: vpmovsqb	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSQBrr, X86_INS_VPMOVSQB: vpmovsqb	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSQBrrk, X86_INS_VPMOVSQB: vpmovsqb	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSQBrrkz, X86_INS_VPMOVSQB: vpmovsqb	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSQDmr, X86_INS_VPMOVSQD: vpmovsqd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSQDmrk, X86_INS_VPMOVSQD: vpmovsqd	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSQDrr, X86_INS_VPMOVSQD: vpmovsqd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSQDrrk, X86_INS_VPMOVSQD: vpmovsqd	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSQDrrkz, X86_INS_VPMOVSQD: vpmovsqd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSQWmr, X86_INS_VPMOVSQW: vpmovsqw	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSQWmrk, X86_INS_VPMOVSQW: vpmovsqw	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSQWrr, X86_INS_VPMOVSQW: vpmovsqw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSQWrrk, X86_INS_VPMOVSQW: vpmovsqw	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSQWrrkz, X86_INS_VPMOVSQW: vpmovsqw	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXBDYrm, X86_INS_VPMOVSXBD: vpmovsxbd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXBDYrr, X86_INS_VPMOVSXBD: vpmovsxbd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXBDZrm, X86_INS_VPMOVSXBD: vpmovsxbd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXBDZrmk, X86_INS_VPMOVSXBD: vpmovsxbd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXBDZrmkz, X86_INS_VPMOVSXBD: vpmovsxbd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXBDZrr, X86_INS_VPMOVSXBD: vpmovsxbd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXBDZrrk, X86_INS_VPMOVSXBD: vpmovsxbd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXBDZrrkz, X86_INS_VPMOVSXBD: vpmovsxbd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXBDrm, X86_INS_VPMOVSXBD: vpmovsxbd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXBDrr, X86_INS_VPMOVSXBD: vpmovsxbd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXBQYrm, X86_INS_VPMOVSXBQ: vpmovsxbq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXBQYrr, X86_INS_VPMOVSXBQ: vpmovsxbq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXBQZrm, X86_INS_VPMOVSXBQ: vpmovsxbq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXBQZrmk, X86_INS_VPMOVSXBQ: vpmovsxbq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXBQZrmkz, X86_INS_VPMOVSXBQ: vpmovsxbq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXBQZrr, X86_INS_VPMOVSXBQ: vpmovsxbq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXBQZrrk, X86_INS_VPMOVSXBQ: vpmovsxbq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXBQZrrkz, X86_INS_VPMOVSXBQ: vpmovsxbq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXBQrm, X86_INS_VPMOVSXBQ: vpmovsxbq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXBQrr, X86_INS_VPMOVSXBQ: vpmovsxbq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXBWYrm, X86_INS_VPMOVSXBW: vpmovsxbw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXBWYrr, X86_INS_VPMOVSXBW: vpmovsxbw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXBWrm, X86_INS_VPMOVSXBW: vpmovsxbw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXBWrr, X86_INS_VPMOVSXBW: vpmovsxbw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXDQYrm, X86_INS_VPMOVSXDQ: vpmovsxdq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXDQYrr, X86_INS_VPMOVSXDQ: vpmovsxdq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXDQZrm, X86_INS_VPMOVSXDQ: vpmovsxdq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXDQZrmk, X86_INS_VPMOVSXDQ: vpmovsxdq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXDQZrmkz, X86_INS_VPMOVSXDQ: vpmovsxdq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXDQZrr, X86_INS_VPMOVSXDQ: vpmovsxdq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXDQZrrk, X86_INS_VPMOVSXDQ: vpmovsxdq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXDQZrrkz, X86_INS_VPMOVSXDQ: vpmovsxdq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXDQrm, X86_INS_VPMOVSXDQ: vpmovsxdq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXDQrr, X86_INS_VPMOVSXDQ: vpmovsxdq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXWDYrm, X86_INS_VPMOVSXWD: vpmovsxwd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXWDYrr, X86_INS_VPMOVSXWD: vpmovsxwd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXWDZrm, X86_INS_VPMOVSXWD: vpmovsxwd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXWDZrmk, X86_INS_VPMOVSXWD: vpmovsxwd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXWDZrmkz, X86_INS_VPMOVSXWD: vpmovsxwd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXWDZrr, X86_INS_VPMOVSXWD: vpmovsxwd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXWDZrrk, X86_INS_VPMOVSXWD: vpmovsxwd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXWDZrrkz, X86_INS_VPMOVSXWD: vpmovsxwd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXWDrm, X86_INS_VPMOVSXWD: vpmovsxwd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXWDrr, X86_INS_VPMOVSXWD: vpmovsxwd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXWQYrm, X86_INS_VPMOVSXWQ: vpmovsxwq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXWQYrr, X86_INS_VPMOVSXWQ: vpmovsxwq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXWQZrm, X86_INS_VPMOVSXWQ: vpmovsxwq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXWQZrmk, X86_INS_VPMOVSXWQ: vpmovsxwq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXWQZrmkz, X86_INS_VPMOVSXWQ: vpmovsxwq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXWQZrr, X86_INS_VPMOVSXWQ: vpmovsxwq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXWQZrrk, X86_INS_VPMOVSXWQ: vpmovsxwq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXWQZrrkz, X86_INS_VPMOVSXWQ: vpmovsxwq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXWQrm, X86_INS_VPMOVSXWQ: vpmovsxwq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVSXWQrr, X86_INS_VPMOVSXWQ: vpmovsxwq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVUSDBmr, X86_INS_VPMOVUSDB: vpmovusdb	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVUSDBmrk, X86_INS_VPMOVUSDB: vpmovusdb	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVUSDBrr, X86_INS_VPMOVUSDB: vpmovusdb	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVUSDBrrk, X86_INS_VPMOVUSDB: vpmovusdb	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVUSDBrrkz, X86_INS_VPMOVUSDB: vpmovusdb	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVUSDWmr, X86_INS_VPMOVUSDW: vpmovusdw	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVUSDWmrk, X86_INS_VPMOVUSDW: vpmovusdw	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVUSDWrr, X86_INS_VPMOVUSDW: vpmovusdw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVUSDWrrk, X86_INS_VPMOVUSDW: vpmovusdw	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVUSDWrrkz, X86_INS_VPMOVUSDW: vpmovusdw	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVUSQBmr, X86_INS_VPMOVUSQB: vpmovusqb	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVUSQBmrk, X86_INS_VPMOVUSQB: vpmovusqb	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVUSQBrr, X86_INS_VPMOVUSQB: vpmovusqb	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVUSQBrrk, X86_INS_VPMOVUSQB: vpmovusqb	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVUSQBrrkz, X86_INS_VPMOVUSQB: vpmovusqb	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVUSQDmr, X86_INS_VPMOVUSQD: vpmovusqd	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVUSQDmrk, X86_INS_VPMOVUSQD: vpmovusqd	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVUSQDrr, X86_INS_VPMOVUSQD: vpmovusqd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVUSQDrrk, X86_INS_VPMOVUSQD: vpmovusqd	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVUSQDrrkz, X86_INS_VPMOVUSQD: vpmovusqd	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVUSQWmr, X86_INS_VPMOVUSQW: vpmovusqw	$dst, $src */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVUSQWmrk, X86_INS_VPMOVUSQW: vpmovusqw	{$src, $dst {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVUSQWrr, X86_INS_VPMOVUSQW: vpmovusqw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVUSQWrrk, X86_INS_VPMOVUSQW: vpmovusqw	{$src, ${dst} {${mask}}|${dst} {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVUSQWrrkz, X86_INS_VPMOVUSQW: vpmovusqw	{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXBDYrm, X86_INS_VPMOVZXBD: vpmovzxbd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXBDYrr, X86_INS_VPMOVZXBD: vpmovzxbd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXBDZrm, X86_INS_VPMOVZXBD: vpmovzxbd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXBDZrmk, X86_INS_VPMOVZXBD: vpmovzxbd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXBDZrmkz, X86_INS_VPMOVZXBD: vpmovzxbd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXBDZrr, X86_INS_VPMOVZXBD: vpmovzxbd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXBDZrrk, X86_INS_VPMOVZXBD: vpmovzxbd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXBDZrrkz, X86_INS_VPMOVZXBD: vpmovzxbd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXBDrm, X86_INS_VPMOVZXBD: vpmovzxbd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXBDrr, X86_INS_VPMOVZXBD: vpmovzxbd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXBQYrm, X86_INS_VPMOVZXBQ: vpmovzxbq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXBQYrr, X86_INS_VPMOVZXBQ: vpmovzxbq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXBQZrm, X86_INS_VPMOVZXBQ: vpmovzxbq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXBQZrmk, X86_INS_VPMOVZXBQ: vpmovzxbq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXBQZrmkz, X86_INS_VPMOVZXBQ: vpmovzxbq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXBQZrr, X86_INS_VPMOVZXBQ: vpmovzxbq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXBQZrrk, X86_INS_VPMOVZXBQ: vpmovzxbq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXBQZrrkz, X86_INS_VPMOVZXBQ: vpmovzxbq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXBQrm, X86_INS_VPMOVZXBQ: vpmovzxbq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXBQrr, X86_INS_VPMOVZXBQ: vpmovzxbq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXBWYrm, X86_INS_VPMOVZXBW: vpmovzxbw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXBWYrr, X86_INS_VPMOVZXBW: vpmovzxbw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXBWrm, X86_INS_VPMOVZXBW: vpmovzxbw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXBWrr, X86_INS_VPMOVZXBW: vpmovzxbw	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXDQYrm, X86_INS_VPMOVZXDQ: vpmovzxdq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXDQYrr, X86_INS_VPMOVZXDQ: vpmovzxdq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXDQZrm, X86_INS_VPMOVZXDQ: vpmovzxdq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXDQZrmk, X86_INS_VPMOVZXDQ: vpmovzxdq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXDQZrmkz, X86_INS_VPMOVZXDQ: vpmovzxdq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXDQZrr, X86_INS_VPMOVZXDQ: vpmovzxdq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXDQZrrk, X86_INS_VPMOVZXDQ: vpmovzxdq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXDQZrrkz, X86_INS_VPMOVZXDQ: vpmovzxdq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXDQrm, X86_INS_VPMOVZXDQ: vpmovzxdq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXDQrr, X86_INS_VPMOVZXDQ: vpmovzxdq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXWDYrm, X86_INS_VPMOVZXWD: vpmovzxwd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXWDYrr, X86_INS_VPMOVZXWD: vpmovzxwd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXWDZrm, X86_INS_VPMOVZXWD: vpmovzxwd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXWDZrmk, X86_INS_VPMOVZXWD: vpmovzxwd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXWDZrmkz, X86_INS_VPMOVZXWD: vpmovzxwd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXWDZrr, X86_INS_VPMOVZXWD: vpmovzxwd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXWDZrrk, X86_INS_VPMOVZXWD: vpmovzxwd	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXWDZrrkz, X86_INS_VPMOVZXWD: vpmovzxwd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXWDrm, X86_INS_VPMOVZXWD: vpmovzxwd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXWDrr, X86_INS_VPMOVZXWD: vpmovzxwd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXWQYrm, X86_INS_VPMOVZXWQ: vpmovzxwq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXWQYrr, X86_INS_VPMOVZXWQ: vpmovzxwq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXWQZrm, X86_INS_VPMOVZXWQ: vpmovzxwq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXWQZrmk, X86_INS_VPMOVZXWQ: vpmovzxwq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXWQZrmkz, X86_INS_VPMOVZXWQ: vpmovzxwq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXWQZrr, X86_INS_VPMOVZXWQ: vpmovzxwq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXWQZrrk, X86_INS_VPMOVZXWQ: vpmovzxwq	{$src, $dst {${mask}} |$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXWQZrrkz, X86_INS_VPMOVZXWQ: vpmovzxwq	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXWQrm, X86_INS_VPMOVZXWQ: vpmovzxwq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMOVZXWQrr, X86_INS_VPMOVZXWQ: vpmovzxwq	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULDQYrm, X86_INS_VPMULDQ: vpmuldq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULDQYrr, X86_INS_VPMULDQ: vpmuldq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULDQZrm, X86_INS_VPMULDQ: vpmuldq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULDQZrmb, X86_INS_VPMULDQ: vpmuldq	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULDQZrmbk, X86_INS_VPMULDQ: vpmuldq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULDQZrmbkz, X86_INS_VPMULDQ: vpmuldq	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULDQZrmk, X86_INS_VPMULDQ: vpmuldq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULDQZrmkz, X86_INS_VPMULDQ: vpmuldq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULDQZrr, X86_INS_VPMULDQ: vpmuldq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULDQZrrk, X86_INS_VPMULDQ: vpmuldq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULDQZrrkz, X86_INS_VPMULDQ: vpmuldq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULDQrm, X86_INS_VPMULDQ: vpmuldq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULDQrr, X86_INS_VPMULDQ: vpmuldq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULHRSWrm128, X86_INS_VPMULHRSW: vpmulhrsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULHRSWrm256, X86_INS_VPMULHRSW: vpmulhrsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULHRSWrr128, X86_INS_VPMULHRSW: vpmulhrsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULHRSWrr256, X86_INS_VPMULHRSW: vpmulhrsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULHUWYrm, X86_INS_VPMULHUW: vpmulhuw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULHUWYrr, X86_INS_VPMULHUW: vpmulhuw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULHUWrm, X86_INS_VPMULHUW: vpmulhuw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULHUWrr, X86_INS_VPMULHUW: vpmulhuw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULHWYrm, X86_INS_VPMULHW: vpmulhw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULHWYrr, X86_INS_VPMULHW: vpmulhw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULHWrm, X86_INS_VPMULHW: vpmulhw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULHWrr, X86_INS_VPMULHW: vpmulhw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDYrm, X86_INS_VPMULLD: vpmulld	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDYrr, X86_INS_VPMULLD: vpmulld	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZ128rm, X86_INS_VPMULLD: vpmulld	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZ128rmb, X86_INS_VPMULLD: vpmulld	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZ128rmbk, X86_INS_VPMULLD: vpmulld	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZ128rmbkz, X86_INS_VPMULLD: vpmulld	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZ128rmk, X86_INS_VPMULLD: vpmulld	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZ128rmkz, X86_INS_VPMULLD: vpmulld	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZ128rr, X86_INS_VPMULLD: vpmulld	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZ128rrk, X86_INS_VPMULLD: vpmulld	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZ128rrkz, X86_INS_VPMULLD: vpmulld	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZ256rm, X86_INS_VPMULLD: vpmulld	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZ256rmb, X86_INS_VPMULLD: vpmulld	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZ256rmbk, X86_INS_VPMULLD: vpmulld	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZ256rmbkz, X86_INS_VPMULLD: vpmulld	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZ256rmk, X86_INS_VPMULLD: vpmulld	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZ256rmkz, X86_INS_VPMULLD: vpmulld	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZ256rr, X86_INS_VPMULLD: vpmulld	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZ256rrk, X86_INS_VPMULLD: vpmulld	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZ256rrkz, X86_INS_VPMULLD: vpmulld	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZrm, X86_INS_VPMULLD: vpmulld	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZrmb, X86_INS_VPMULLD: vpmulld	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZrmbk, X86_INS_VPMULLD: vpmulld	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZrmbkz, X86_INS_VPMULLD: vpmulld	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZrmk, X86_INS_VPMULLD: vpmulld	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZrmkz, X86_INS_VPMULLD: vpmulld	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZrr, X86_INS_VPMULLD: vpmulld	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZrrk, X86_INS_VPMULLD: vpmulld	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDZrrkz, X86_INS_VPMULLD: vpmulld	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDrm, X86_INS_VPMULLD: vpmulld	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLDrr, X86_INS_VPMULLD: vpmulld	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZ128rm, X86_INS_VPMULLQ: vpmullq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZ128rmb, X86_INS_VPMULLQ: vpmullq	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZ128rmbk, X86_INS_VPMULLQ: vpmullq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZ128rmbkz, X86_INS_VPMULLQ: vpmullq	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZ128rmk, X86_INS_VPMULLQ: vpmullq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZ128rmkz, X86_INS_VPMULLQ: vpmullq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZ128rr, X86_INS_VPMULLQ: vpmullq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZ128rrk, X86_INS_VPMULLQ: vpmullq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZ128rrkz, X86_INS_VPMULLQ: vpmullq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZ256rm, X86_INS_VPMULLQ: vpmullq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZ256rmb, X86_INS_VPMULLQ: vpmullq	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZ256rmbk, X86_INS_VPMULLQ: vpmullq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZ256rmbkz, X86_INS_VPMULLQ: vpmullq	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZ256rmk, X86_INS_VPMULLQ: vpmullq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZ256rmkz, X86_INS_VPMULLQ: vpmullq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZ256rr, X86_INS_VPMULLQ: vpmullq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZ256rrk, X86_INS_VPMULLQ: vpmullq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZ256rrkz, X86_INS_VPMULLQ: vpmullq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZrm, X86_INS_VPMULLQ: vpmullq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZrmb, X86_INS_VPMULLQ: vpmullq	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZrmbk, X86_INS_VPMULLQ: vpmullq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZrmbkz, X86_INS_VPMULLQ: vpmullq	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZrmk, X86_INS_VPMULLQ: vpmullq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZrmkz, X86_INS_VPMULLQ: vpmullq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZrr, X86_INS_VPMULLQ: vpmullq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZrrk, X86_INS_VPMULLQ: vpmullq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLQZrrkz, X86_INS_VPMULLQ: vpmullq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLWYrm, X86_INS_VPMULLW: vpmullw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLWYrr, X86_INS_VPMULLW: vpmullw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLWZ128rm, X86_INS_VPMULLW: vpmullw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLWZ128rmk, X86_INS_VPMULLW: vpmullw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLWZ128rmkz, X86_INS_VPMULLW: vpmullw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLWZ128rr, X86_INS_VPMULLW: vpmullw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLWZ128rrk, X86_INS_VPMULLW: vpmullw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLWZ128rrkz, X86_INS_VPMULLW: vpmullw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLWZ256rm, X86_INS_VPMULLW: vpmullw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLWZ256rmk, X86_INS_VPMULLW: vpmullw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLWZ256rmkz, X86_INS_VPMULLW: vpmullw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLWZ256rr, X86_INS_VPMULLW: vpmullw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLWZ256rrk, X86_INS_VPMULLW: vpmullw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLWZ256rrkz, X86_INS_VPMULLW: vpmullw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLWZrm, X86_INS_VPMULLW: vpmullw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLWZrmk, X86_INS_VPMULLW: vpmullw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLWZrmkz, X86_INS_VPMULLW: vpmullw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLWZrr, X86_INS_VPMULLW: vpmullw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLWZrrk, X86_INS_VPMULLW: vpmullw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLWZrrkz, X86_INS_VPMULLW: vpmullw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLWrm, X86_INS_VPMULLW: vpmullw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULLWrr, X86_INS_VPMULLW: vpmullw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULUDQYrm, X86_INS_VPMULUDQ: vpmuludq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULUDQYrr, X86_INS_VPMULUDQ: vpmuludq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULUDQZrm, X86_INS_VPMULUDQ: vpmuludq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULUDQZrmb, X86_INS_VPMULUDQ: vpmuludq	{${src2}{1to8}, $src1, $dst|$dst, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULUDQZrmbk, X86_INS_VPMULUDQ: vpmuludq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULUDQZrmbkz, X86_INS_VPMULUDQ: vpmuludq	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULUDQZrmk, X86_INS_VPMULUDQ: vpmuludq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULUDQZrmkz, X86_INS_VPMULUDQ: vpmuludq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULUDQZrr, X86_INS_VPMULUDQ: vpmuludq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULUDQZrrk, X86_INS_VPMULUDQ: vpmuludq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULUDQZrrkz, X86_INS_VPMULUDQ: vpmuludq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULUDQrm, X86_INS_VPMULUDQ: vpmuludq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPMULUDQrr, X86_INS_VPMULUDQ: vpmuludq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZ128rm, X86_INS_VPORD: vpord	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZ128rmb, X86_INS_VPORD: vpord	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZ128rmbk, X86_INS_VPORD: vpord	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZ128rmbkz, X86_INS_VPORD: vpord	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZ128rmk, X86_INS_VPORD: vpord	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZ128rmkz, X86_INS_VPORD: vpord	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZ128rr, X86_INS_VPORD: vpord	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZ128rrk, X86_INS_VPORD: vpord	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZ128rrkz, X86_INS_VPORD: vpord	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZ256rm, X86_INS_VPORD: vpord	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZ256rmb, X86_INS_VPORD: vpord	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZ256rmbk, X86_INS_VPORD: vpord	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZ256rmbkz, X86_INS_VPORD: vpord	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZ256rmk, X86_INS_VPORD: vpord	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZ256rmkz, X86_INS_VPORD: vpord	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZ256rr, X86_INS_VPORD: vpord	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZ256rrk, X86_INS_VPORD: vpord	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZ256rrkz, X86_INS_VPORD: vpord	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZrm, X86_INS_VPORD: vpord	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZrmb, X86_INS_VPORD: vpord	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZrmbk, X86_INS_VPORD: vpord	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZrmbkz, X86_INS_VPORD: vpord	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZrmk, X86_INS_VPORD: vpord	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZrmkz, X86_INS_VPORD: vpord	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZrr, X86_INS_VPORD: vpord	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZrrk, X86_INS_VPORD: vpord	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORDZrrkz, X86_INS_VPORD: vpord	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZ128rm, X86_INS_VPORQ: vporq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZ128rmb, X86_INS_VPORQ: vporq	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZ128rmbk, X86_INS_VPORQ: vporq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZ128rmbkz, X86_INS_VPORQ: vporq	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZ128rmk, X86_INS_VPORQ: vporq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZ128rmkz, X86_INS_VPORQ: vporq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZ128rr, X86_INS_VPORQ: vporq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZ128rrk, X86_INS_VPORQ: vporq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZ128rrkz, X86_INS_VPORQ: vporq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZ256rm, X86_INS_VPORQ: vporq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZ256rmb, X86_INS_VPORQ: vporq	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZ256rmbk, X86_INS_VPORQ: vporq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZ256rmbkz, X86_INS_VPORQ: vporq	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZ256rmk, X86_INS_VPORQ: vporq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZ256rmkz, X86_INS_VPORQ: vporq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZ256rr, X86_INS_VPORQ: vporq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZ256rrk, X86_INS_VPORQ: vporq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZ256rrkz, X86_INS_VPORQ: vporq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZrm, X86_INS_VPORQ: vporq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZrmb, X86_INS_VPORQ: vporq	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZrmbk, X86_INS_VPORQ: vporq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZrmbkz, X86_INS_VPORQ: vporq	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZrmk, X86_INS_VPORQ: vporq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZrmkz, X86_INS_VPORQ: vporq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZrr, X86_INS_VPORQ: vporq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZrrk, X86_INS_VPORQ: vporq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORQZrrkz, X86_INS_VPORQ: vporq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORYrm, X86_INS_VPOR: vpor	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORYrr, X86_INS_VPOR: vpor	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORrm, X86_INS_VPOR: vpor	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPORrr, X86_INS_VPOR: vpor	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPPERMmr, X86_INS_VPPERM: vpperm	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPPERMrm, X86_INS_VPPERM: vpperm	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPPERMrr, X86_INS_VPPERM: vpperm	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPROTBmi, X86_INS_VPROTB: vprotb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPROTBmr, X86_INS_VPROTB: vprotb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPROTBri, X86_INS_VPROTB: vprotb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPROTBrm, X86_INS_VPROTB: vprotb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPROTBrr, X86_INS_VPROTB: vprotb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPROTDmi, X86_INS_VPROTD: vprotd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPROTDmr, X86_INS_VPROTD: vprotd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPROTDri, X86_INS_VPROTD: vprotd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPROTDrm, X86_INS_VPROTD: vprotd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPROTDrr, X86_INS_VPROTD: vprotd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPROTQmi, X86_INS_VPROTQ: vprotq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPROTQmr, X86_INS_VPROTQ: vprotq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPROTQri, X86_INS_VPROTQ: vprotq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPROTQrm, X86_INS_VPROTQ: vprotq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPROTQrr, X86_INS_VPROTQ: vprotq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPROTWmi, X86_INS_VPROTW: vprotw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPROTWmr, X86_INS_VPROTW: vprotw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPROTWri, X86_INS_VPROTW: vprotw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPROTWrm, X86_INS_VPROTW: vprotw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPROTWrr, X86_INS_VPROTW: vprotw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSADBWYrm, X86_INS_VPSADBW: vpsadbw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSADBWYrr, X86_INS_VPSADBW: vpsadbw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSADBWrm, X86_INS_VPSADBW: vpsadbw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSADBWrr, X86_INS_VPSADBW: vpsadbw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSCATTERDDZmr, X86_INS_VPSCATTERDD: vpscatterdd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSCATTERDQZmr, X86_INS_VPSCATTERDQ: vpscatterdq	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSCATTERQDZmr, X86_INS_VPSCATTERQD: vpscatterqd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSCATTERQQZmr, X86_INS_VPSCATTERQQ: vpscatterqq	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHABmr, X86_INS_VPSHAB: vpshab	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHABrm, X86_INS_VPSHAB: vpshab	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHABrr, X86_INS_VPSHAB: vpshab	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHADmr, X86_INS_VPSHAD: vpshad	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHADrm, X86_INS_VPSHAD: vpshad	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHADrr, X86_INS_VPSHAD: vpshad	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHAQmr, X86_INS_VPSHAQ: vpshaq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHAQrm, X86_INS_VPSHAQ: vpshaq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHAQrr, X86_INS_VPSHAQ: vpshaq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHAWmr, X86_INS_VPSHAW: vpshaw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHAWrm, X86_INS_VPSHAW: vpshaw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHAWrr, X86_INS_VPSHAW: vpshaw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHLBmr, X86_INS_VPSHLB: vpshlb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHLBrm, X86_INS_VPSHLB: vpshlb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHLBrr, X86_INS_VPSHLB: vpshlb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHLDmr, X86_INS_VPSHLD: vpshld	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHLDrm, X86_INS_VPSHLD: vpshld	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHLDrr, X86_INS_VPSHLD: vpshld	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHLQmr, X86_INS_VPSHLQ: vpshlq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHLQrm, X86_INS_VPSHLQ: vpshlq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHLQrr, X86_INS_VPSHLQ: vpshlq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHLWmr, X86_INS_VPSHLW: vpshlw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHLWrm, X86_INS_VPSHLW: vpshlw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHLWrr, X86_INS_VPSHLW: vpshlw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHUFBYrm, X86_INS_VPSHUFB: vpshufb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHUFBYrr, X86_INS_VPSHUFB: vpshufb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHUFBrm, X86_INS_VPSHUFB: vpshufb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHUFBrr, X86_INS_VPSHUFB: vpshufb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHUFDYmi, X86_INS_VPSHUFD: vpshufd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHUFDYri, X86_INS_VPSHUFD: vpshufd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHUFDZmi, X86_INS_VPSHUFD: vpshufd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHUFDZri, X86_INS_VPSHUFD: vpshufd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHUFDmi, X86_INS_VPSHUFD: vpshufd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHUFDri, X86_INS_VPSHUFD: vpshufd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHUFHWYmi, X86_INS_VPSHUFHW: vpshufhw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHUFHWYri, X86_INS_VPSHUFHW: vpshufhw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHUFHWmi, X86_INS_VPSHUFHW: vpshufhw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHUFHWri, X86_INS_VPSHUFHW: vpshufhw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHUFLWYmi, X86_INS_VPSHUFLW: vpshuflw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHUFLWYri, X86_INS_VPSHUFLW: vpshuflw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHUFLWmi, X86_INS_VPSHUFLW: vpshuflw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSHUFLWri, X86_INS_VPSHUFLW: vpshuflw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSIGNBYrm, X86_INS_VPSIGNB: vpsignb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSIGNBYrr, X86_INS_VPSIGNB: vpsignb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSIGNBrm, X86_INS_VPSIGNB: vpsignb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSIGNBrr, X86_INS_VPSIGNB: vpsignb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSIGNDYrm, X86_INS_VPSIGND: vpsignd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSIGNDYrr, X86_INS_VPSIGND: vpsignd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSIGNDrm, X86_INS_VPSIGND: vpsignd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSIGNDrr, X86_INS_VPSIGND: vpsignd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSIGNWYrm, X86_INS_VPSIGNW: vpsignw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSIGNWYrr, X86_INS_VPSIGNW: vpsignw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSIGNWrm, X86_INS_VPSIGNW: vpsignw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSIGNWrr, X86_INS_VPSIGNW: vpsignw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLDQYri, X86_INS_VPSLLDQ: vpslldq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLDQri, X86_INS_VPSLLDQ: vpslldq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLDYri, X86_INS_VPSLLD: vpslld	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLDYrm, X86_INS_VPSLLD: vpslld	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLDYrr, X86_INS_VPSLLD: vpslld	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLDZmi, X86_INS_VPSLLD: vpslld	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPSLLDZmik, X86_INS_VPSLLD: vpslld	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLDZmikz, X86_INS_VPSLLD: vpslld	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLDZri, X86_INS_VPSLLD: vpslld	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPSLLDZrik, X86_INS_VPSLLD: vpslld	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLDZrikz, X86_INS_VPSLLD: vpslld	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLDZrm, X86_INS_VPSLLD: vpslld	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLDZrmk, X86_INS_VPSLLD: vpslld	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLDZrmkz, X86_INS_VPSLLD: vpslld	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLDZrr, X86_INS_VPSLLD: vpslld	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLDZrrk, X86_INS_VPSLLD: vpslld	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLDZrrkz, X86_INS_VPSLLD: vpslld	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLDri, X86_INS_VPSLLD: vpslld	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLDrm, X86_INS_VPSLLD: vpslld	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLDrr, X86_INS_VPSLLD: vpslld	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLQYri, X86_INS_VPSLLQ: vpsllq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLQYrm, X86_INS_VPSLLQ: vpsllq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLQYrr, X86_INS_VPSLLQ: vpsllq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLQZmi, X86_INS_VPSLLQ: vpsllq	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPSLLQZmik, X86_INS_VPSLLQ: vpsllq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLQZmikz, X86_INS_VPSLLQ: vpsllq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLQZri, X86_INS_VPSLLQ: vpsllq	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPSLLQZrik, X86_INS_VPSLLQ: vpsllq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLQZrikz, X86_INS_VPSLLQ: vpsllq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLQZrm, X86_INS_VPSLLQ: vpsllq	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLQZrmk, X86_INS_VPSLLQ: vpsllq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLQZrmkz, X86_INS_VPSLLQ: vpsllq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLQZrr, X86_INS_VPSLLQ: vpsllq	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLQZrrk, X86_INS_VPSLLQ: vpsllq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLQZrrkz, X86_INS_VPSLLQ: vpsllq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLQri, X86_INS_VPSLLQ: vpsllq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLQrm, X86_INS_VPSLLQ: vpsllq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLQrr, X86_INS_VPSLLQ: vpsllq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLVDYrm, X86_INS_VPSLLVD: vpsllvd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLVDYrr, X86_INS_VPSLLVD: vpsllvd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLVDZrm, X86_INS_VPSLLVD: vpsllvd	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLVDZrmk, X86_INS_VPSLLVD: vpsllvd	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLVDZrmkz, X86_INS_VPSLLVD: vpsllvd	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLVDZrr, X86_INS_VPSLLVD: vpsllvd	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLVDZrrk, X86_INS_VPSLLVD: vpsllvd	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLVDZrrkz, X86_INS_VPSLLVD: vpsllvd	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLVDrm, X86_INS_VPSLLVD: vpsllvd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLVDrr, X86_INS_VPSLLVD: vpsllvd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLVQYrm, X86_INS_VPSLLVQ: vpsllvq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLVQYrr, X86_INS_VPSLLVQ: vpsllvq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLVQZrm, X86_INS_VPSLLVQ: vpsllvq	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLVQZrmk, X86_INS_VPSLLVQ: vpsllvq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLVQZrmkz, X86_INS_VPSLLVQ: vpsllvq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLVQZrr, X86_INS_VPSLLVQ: vpsllvq	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLVQZrrk, X86_INS_VPSLLVQ: vpsllvq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLVQZrrkz, X86_INS_VPSLLVQ: vpsllvq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLVQrm, X86_INS_VPSLLVQ: vpsllvq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLVQrr, X86_INS_VPSLLVQ: vpsllvq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLWYri, X86_INS_VPSLLW: vpsllw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLWYrm, X86_INS_VPSLLW: vpsllw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLWYrr, X86_INS_VPSLLW: vpsllw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLWri, X86_INS_VPSLLW: vpsllw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLWrm, X86_INS_VPSLLW: vpsllw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSLLWrr, X86_INS_VPSLLW: vpsllw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRADYri, X86_INS_VPSRAD: vpsrad	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRADYrm, X86_INS_VPSRAD: vpsrad	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRADYrr, X86_INS_VPSRAD: vpsrad	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRADZmi, X86_INS_VPSRAD: vpsrad	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPSRADZmik, X86_INS_VPSRAD: vpsrad	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRADZmikz, X86_INS_VPSRAD: vpsrad	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRADZri, X86_INS_VPSRAD: vpsrad	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPSRADZrik, X86_INS_VPSRAD: vpsrad	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRADZrikz, X86_INS_VPSRAD: vpsrad	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRADZrm, X86_INS_VPSRAD: vpsrad	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRADZrmk, X86_INS_VPSRAD: vpsrad	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRADZrmkz, X86_INS_VPSRAD: vpsrad	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRADZrr, X86_INS_VPSRAD: vpsrad	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRADZrrk, X86_INS_VPSRAD: vpsrad	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRADZrrkz, X86_INS_VPSRAD: vpsrad	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRADri, X86_INS_VPSRAD: vpsrad	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRADrm, X86_INS_VPSRAD: vpsrad	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRADrr, X86_INS_VPSRAD: vpsrad	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAQZmi, X86_INS_VPSRAQ: vpsraq	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPSRAQZmik, X86_INS_VPSRAQ: vpsraq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAQZmikz, X86_INS_VPSRAQ: vpsraq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAQZri, X86_INS_VPSRAQ: vpsraq	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPSRAQZrik, X86_INS_VPSRAQ: vpsraq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAQZrikz, X86_INS_VPSRAQ: vpsraq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAQZrm, X86_INS_VPSRAQ: vpsraq	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAQZrmk, X86_INS_VPSRAQ: vpsraq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAQZrmkz, X86_INS_VPSRAQ: vpsraq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAQZrr, X86_INS_VPSRAQ: vpsraq	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAQZrrk, X86_INS_VPSRAQ: vpsraq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAQZrrkz, X86_INS_VPSRAQ: vpsraq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAVDYrm, X86_INS_VPSRAVD: vpsravd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAVDYrr, X86_INS_VPSRAVD: vpsravd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAVDZrm, X86_INS_VPSRAVD: vpsravd	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAVDZrmk, X86_INS_VPSRAVD: vpsravd	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAVDZrmkz, X86_INS_VPSRAVD: vpsravd	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAVDZrr, X86_INS_VPSRAVD: vpsravd	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAVDZrrk, X86_INS_VPSRAVD: vpsravd	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAVDZrrkz, X86_INS_VPSRAVD: vpsravd	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAVDrm, X86_INS_VPSRAVD: vpsravd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAVDrr, X86_INS_VPSRAVD: vpsravd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAVQZrm, X86_INS_VPSRAVQ: vpsravq	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAVQZrmk, X86_INS_VPSRAVQ: vpsravq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAVQZrmkz, X86_INS_VPSRAVQ: vpsravq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAVQZrr, X86_INS_VPSRAVQ: vpsravq	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAVQZrrk, X86_INS_VPSRAVQ: vpsravq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAVQZrrkz, X86_INS_VPSRAVQ: vpsravq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAWYri, X86_INS_VPSRAW: vpsraw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAWYrm, X86_INS_VPSRAW: vpsraw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAWYrr, X86_INS_VPSRAW: vpsraw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAWri, X86_INS_VPSRAW: vpsraw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAWrm, X86_INS_VPSRAW: vpsraw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRAWrr, X86_INS_VPSRAW: vpsraw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLDQYri, X86_INS_VPSRLDQ: vpsrldq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLDQri, X86_INS_VPSRLDQ: vpsrldq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLDYri, X86_INS_VPSRLD: vpsrld	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLDYrm, X86_INS_VPSRLD: vpsrld	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLDYrr, X86_INS_VPSRLD: vpsrld	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLDZmi, X86_INS_VPSRLD: vpsrld	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPSRLDZmik, X86_INS_VPSRLD: vpsrld	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLDZmikz, X86_INS_VPSRLD: vpsrld	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLDZri, X86_INS_VPSRLD: vpsrld	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPSRLDZrik, X86_INS_VPSRLD: vpsrld	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLDZrikz, X86_INS_VPSRLD: vpsrld	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLDZrm, X86_INS_VPSRLD: vpsrld	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLDZrmk, X86_INS_VPSRLD: vpsrld	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLDZrmkz, X86_INS_VPSRLD: vpsrld	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLDZrr, X86_INS_VPSRLD: vpsrld	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLDZrrk, X86_INS_VPSRLD: vpsrld	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLDZrrkz, X86_INS_VPSRLD: vpsrld	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLDri, X86_INS_VPSRLD: vpsrld	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLDrm, X86_INS_VPSRLD: vpsrld	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLDrr, X86_INS_VPSRLD: vpsrld	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLQYri, X86_INS_VPSRLQ: vpsrlq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLQYrm, X86_INS_VPSRLQ: vpsrlq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLQYrr, X86_INS_VPSRLQ: vpsrlq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLQZmi, X86_INS_VPSRLQ: vpsrlq	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPSRLQZmik, X86_INS_VPSRLQ: vpsrlq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLQZmikz, X86_INS_VPSRLQ: vpsrlq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLQZri, X86_INS_VPSRLQ: vpsrlq	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VPSRLQZrik, X86_INS_VPSRLQ: vpsrlq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLQZrikz, X86_INS_VPSRLQ: vpsrlq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLQZrm, X86_INS_VPSRLQ: vpsrlq	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLQZrmk, X86_INS_VPSRLQ: vpsrlq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLQZrmkz, X86_INS_VPSRLQ: vpsrlq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLQZrr, X86_INS_VPSRLQ: vpsrlq	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLQZrrk, X86_INS_VPSRLQ: vpsrlq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLQZrrkz, X86_INS_VPSRLQ: vpsrlq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLQri, X86_INS_VPSRLQ: vpsrlq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLQrm, X86_INS_VPSRLQ: vpsrlq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLQrr, X86_INS_VPSRLQ: vpsrlq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLVDYrm, X86_INS_VPSRLVD: vpsrlvd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLVDYrr, X86_INS_VPSRLVD: vpsrlvd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLVDZrm, X86_INS_VPSRLVD: vpsrlvd	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLVDZrmk, X86_INS_VPSRLVD: vpsrlvd	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLVDZrmkz, X86_INS_VPSRLVD: vpsrlvd	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLVDZrr, X86_INS_VPSRLVD: vpsrlvd	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLVDZrrk, X86_INS_VPSRLVD: vpsrlvd	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLVDZrrkz, X86_INS_VPSRLVD: vpsrlvd	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLVDrm, X86_INS_VPSRLVD: vpsrlvd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLVDrr, X86_INS_VPSRLVD: vpsrlvd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLVQYrm, X86_INS_VPSRLVQ: vpsrlvq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLVQYrr, X86_INS_VPSRLVQ: vpsrlvq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLVQZrm, X86_INS_VPSRLVQ: vpsrlvq	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLVQZrmk, X86_INS_VPSRLVQ: vpsrlvq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLVQZrmkz, X86_INS_VPSRLVQ: vpsrlvq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLVQZrr, X86_INS_VPSRLVQ: vpsrlvq	$dst  , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLVQZrrk, X86_INS_VPSRLVQ: vpsrlvq	{$src2, $src1, $dst {${mask}} |$dst {${mask}} , $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLVQZrrkz, X86_INS_VPSRLVQ: vpsrlvq	{$src2, $src1, $dst {${mask}} {z} |$dst {${mask}} {z} , $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLVQrm, X86_INS_VPSRLVQ: vpsrlvq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLVQrr, X86_INS_VPSRLVQ: vpsrlvq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLWYri, X86_INS_VPSRLW: vpsrlw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLWYrm, X86_INS_VPSRLW: vpsrlw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLWYrr, X86_INS_VPSRLW: vpsrlw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLWri, X86_INS_VPSRLW: vpsrlw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLWrm, X86_INS_VPSRLW: vpsrlw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSRLWrr, X86_INS_VPSRLW: vpsrlw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBBYrm, X86_INS_VPSUBB: vpsubb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBBYrr, X86_INS_VPSUBB: vpsubb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBBZ128rm, X86_INS_VPSUBB: vpsubb	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBBZ128rmk, X86_INS_VPSUBB: vpsubb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBBZ128rmkz, X86_INS_VPSUBB: vpsubb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBBZ128rr, X86_INS_VPSUBB: vpsubb	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBBZ128rrk, X86_INS_VPSUBB: vpsubb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBBZ128rrkz, X86_INS_VPSUBB: vpsubb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBBZ256rm, X86_INS_VPSUBB: vpsubb	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBBZ256rmk, X86_INS_VPSUBB: vpsubb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBBZ256rmkz, X86_INS_VPSUBB: vpsubb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBBZ256rr, X86_INS_VPSUBB: vpsubb	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBBZ256rrk, X86_INS_VPSUBB: vpsubb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBBZ256rrkz, X86_INS_VPSUBB: vpsubb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBBZrm, X86_INS_VPSUBB: vpsubb	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBBZrmk, X86_INS_VPSUBB: vpsubb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBBZrmkz, X86_INS_VPSUBB: vpsubb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBBZrr, X86_INS_VPSUBB: vpsubb	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBBZrrk, X86_INS_VPSUBB: vpsubb	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBBZrrkz, X86_INS_VPSUBB: vpsubb	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBBrm, X86_INS_VPSUBB: vpsubb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBBrr, X86_INS_VPSUBB: vpsubb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDYrm, X86_INS_VPSUBD: vpsubd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDYrr, X86_INS_VPSUBD: vpsubd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZ128rm, X86_INS_VPSUBD: vpsubd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZ128rmb, X86_INS_VPSUBD: vpsubd	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZ128rmbk, X86_INS_VPSUBD: vpsubd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZ128rmbkz, X86_INS_VPSUBD: vpsubd	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZ128rmk, X86_INS_VPSUBD: vpsubd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZ128rmkz, X86_INS_VPSUBD: vpsubd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZ128rr, X86_INS_VPSUBD: vpsubd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZ128rrk, X86_INS_VPSUBD: vpsubd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZ128rrkz, X86_INS_VPSUBD: vpsubd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZ256rm, X86_INS_VPSUBD: vpsubd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZ256rmb, X86_INS_VPSUBD: vpsubd	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZ256rmbk, X86_INS_VPSUBD: vpsubd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZ256rmbkz, X86_INS_VPSUBD: vpsubd	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZ256rmk, X86_INS_VPSUBD: vpsubd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZ256rmkz, X86_INS_VPSUBD: vpsubd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZ256rr, X86_INS_VPSUBD: vpsubd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZ256rrk, X86_INS_VPSUBD: vpsubd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZ256rrkz, X86_INS_VPSUBD: vpsubd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZrm, X86_INS_VPSUBD: vpsubd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZrmb, X86_INS_VPSUBD: vpsubd	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZrmbk, X86_INS_VPSUBD: vpsubd	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZrmbkz, X86_INS_VPSUBD: vpsubd	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZrmk, X86_INS_VPSUBD: vpsubd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZrmkz, X86_INS_VPSUBD: vpsubd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZrr, X86_INS_VPSUBD: vpsubd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZrrk, X86_INS_VPSUBD: vpsubd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDZrrkz, X86_INS_VPSUBD: vpsubd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDrm, X86_INS_VPSUBD: vpsubd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBDrr, X86_INS_VPSUBD: vpsubd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQYrm, X86_INS_VPSUBQ: vpsubq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQYrr, X86_INS_VPSUBQ: vpsubq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZ128rm, X86_INS_VPSUBQ: vpsubq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZ128rmb, X86_INS_VPSUBQ: vpsubq	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZ128rmbk, X86_INS_VPSUBQ: vpsubq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZ128rmbkz, X86_INS_VPSUBQ: vpsubq	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZ128rmk, X86_INS_VPSUBQ: vpsubq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZ128rmkz, X86_INS_VPSUBQ: vpsubq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZ128rr, X86_INS_VPSUBQ: vpsubq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZ128rrk, X86_INS_VPSUBQ: vpsubq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZ128rrkz, X86_INS_VPSUBQ: vpsubq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZ256rm, X86_INS_VPSUBQ: vpsubq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZ256rmb, X86_INS_VPSUBQ: vpsubq	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZ256rmbk, X86_INS_VPSUBQ: vpsubq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZ256rmbkz, X86_INS_VPSUBQ: vpsubq	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZ256rmk, X86_INS_VPSUBQ: vpsubq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZ256rmkz, X86_INS_VPSUBQ: vpsubq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZ256rr, X86_INS_VPSUBQ: vpsubq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZ256rrk, X86_INS_VPSUBQ: vpsubq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZ256rrkz, X86_INS_VPSUBQ: vpsubq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZrm, X86_INS_VPSUBQ: vpsubq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZrmb, X86_INS_VPSUBQ: vpsubq	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZrmbk, X86_INS_VPSUBQ: vpsubq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZrmbkz, X86_INS_VPSUBQ: vpsubq	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZrmk, X86_INS_VPSUBQ: vpsubq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZrmkz, X86_INS_VPSUBQ: vpsubq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZrr, X86_INS_VPSUBQ: vpsubq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZrrk, X86_INS_VPSUBQ: vpsubq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQZrrkz, X86_INS_VPSUBQ: vpsubq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQrm, X86_INS_VPSUBQ: vpsubq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBQrr, X86_INS_VPSUBQ: vpsubq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBSBYrm, X86_INS_VPSUBSB: vpsubsb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBSBYrr, X86_INS_VPSUBSB: vpsubsb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBSBrm, X86_INS_VPSUBSB: vpsubsb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBSBrr, X86_INS_VPSUBSB: vpsubsb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBSWYrm, X86_INS_VPSUBSW: vpsubsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBSWYrr, X86_INS_VPSUBSW: vpsubsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBSWrm, X86_INS_VPSUBSW: vpsubsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBSWrr, X86_INS_VPSUBSW: vpsubsw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBUSBYrm, X86_INS_VPSUBUSB: vpsubusb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBUSBYrr, X86_INS_VPSUBUSB: vpsubusb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBUSBrm, X86_INS_VPSUBUSB: vpsubusb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBUSBrr, X86_INS_VPSUBUSB: vpsubusb	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBUSWYrm, X86_INS_VPSUBUSW: vpsubusw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBUSWYrr, X86_INS_VPSUBUSW: vpsubusw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBUSWrm, X86_INS_VPSUBUSW: vpsubusw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBUSWrr, X86_INS_VPSUBUSW: vpsubusw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBWYrm, X86_INS_VPSUBW: vpsubw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBWYrr, X86_INS_VPSUBW: vpsubw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBWZ128rm, X86_INS_VPSUBW: vpsubw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBWZ128rmk, X86_INS_VPSUBW: vpsubw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBWZ128rmkz, X86_INS_VPSUBW: vpsubw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBWZ128rr, X86_INS_VPSUBW: vpsubw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBWZ128rrk, X86_INS_VPSUBW: vpsubw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBWZ128rrkz, X86_INS_VPSUBW: vpsubw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBWZ256rm, X86_INS_VPSUBW: vpsubw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBWZ256rmk, X86_INS_VPSUBW: vpsubw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBWZ256rmkz, X86_INS_VPSUBW: vpsubw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBWZ256rr, X86_INS_VPSUBW: vpsubw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBWZ256rrk, X86_INS_VPSUBW: vpsubw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBWZ256rrkz, X86_INS_VPSUBW: vpsubw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBWZrm, X86_INS_VPSUBW: vpsubw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBWZrmk, X86_INS_VPSUBW: vpsubw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBWZrmkz, X86_INS_VPSUBW: vpsubw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBWZrr, X86_INS_VPSUBW: vpsubw	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBWZrrk, X86_INS_VPSUBW: vpsubw	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBWZrrkz, X86_INS_VPSUBW: vpsubw	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBWrm, X86_INS_VPSUBW: vpsubw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPSUBWrr, X86_INS_VPSUBW: vpsubw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPTESTMDZrm, X86_INS_VPTESTMD: vptestmd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPTESTMDZrr, X86_INS_VPTESTMD: vptestmd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPTESTMQZrm, X86_INS_VPTESTMQ: vptestmq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPTESTMQZrr, X86_INS_VPTESTMQ: vptestmq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPTESTNMDZrm, X86_INS_VPTESTNMD: vptestnmd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPTESTNMDZrr, X86_INS_VPTESTNMD: vptestnmd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPTESTNMQZrm, X86_INS_VPTESTNMQ: vptestnmq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPTESTNMQZrr, X86_INS_VPTESTNMQ: vptestnmq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPTESTYrm, X86_INS_VPTEST: vptest	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPTESTYrr, X86_INS_VPTEST: vptest	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPTESTrm, X86_INS_VPTEST: vptest	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPTESTrr, X86_INS_VPTEST: vptest	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKHBWYrm, X86_INS_VPUNPCKHBW: vpunpckhbw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKHBWYrr, X86_INS_VPUNPCKHBW: vpunpckhbw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKHBWrm, X86_INS_VPUNPCKHBW: vpunpckhbw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKHBWrr, X86_INS_VPUNPCKHBW: vpunpckhbw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKHDQYrm, X86_INS_VPUNPCKHDQ: vpunpckhdq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKHDQYrr, X86_INS_VPUNPCKHDQ: vpunpckhdq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKHDQZrm, X86_INS_VPUNPCKHDQ: vpunpckhdq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKHDQZrr, X86_INS_VPUNPCKHDQ: vpunpckhdq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKHDQrm, X86_INS_VPUNPCKHDQ: vpunpckhdq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKHDQrr, X86_INS_VPUNPCKHDQ: vpunpckhdq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKHQDQYrm, X86_INS_VPUNPCKHQDQ: vpunpckhqdq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKHQDQYrr, X86_INS_VPUNPCKHQDQ: vpunpckhqdq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKHQDQZrm, X86_INS_VPUNPCKHQDQ: vpunpckhqdq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKHQDQZrr, X86_INS_VPUNPCKHQDQ: vpunpckhqdq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKHQDQrm, X86_INS_VPUNPCKHQDQ: vpunpckhqdq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKHQDQrr, X86_INS_VPUNPCKHQDQ: vpunpckhqdq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKHWDYrm, X86_INS_VPUNPCKHWD: vpunpckhwd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKHWDYrr, X86_INS_VPUNPCKHWD: vpunpckhwd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKHWDrm, X86_INS_VPUNPCKHWD: vpunpckhwd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKHWDrr, X86_INS_VPUNPCKHWD: vpunpckhwd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKLBWYrm, X86_INS_VPUNPCKLBW: vpunpcklbw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKLBWYrr, X86_INS_VPUNPCKLBW: vpunpcklbw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKLBWrm, X86_INS_VPUNPCKLBW: vpunpcklbw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKLBWrr, X86_INS_VPUNPCKLBW: vpunpcklbw	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKLDQYrm, X86_INS_VPUNPCKLDQ: vpunpckldq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKLDQYrr, X86_INS_VPUNPCKLDQ: vpunpckldq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKLDQZrm, X86_INS_VPUNPCKLDQ: vpunpckldq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKLDQZrr, X86_INS_VPUNPCKLDQ: vpunpckldq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKLDQrm, X86_INS_VPUNPCKLDQ: vpunpckldq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKLDQrr, X86_INS_VPUNPCKLDQ: vpunpckldq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKLQDQYrm, X86_INS_VPUNPCKLQDQ: vpunpcklqdq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKLQDQYrr, X86_INS_VPUNPCKLQDQ: vpunpcklqdq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKLQDQZrm, X86_INS_VPUNPCKLQDQ: vpunpcklqdq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKLQDQZrr, X86_INS_VPUNPCKLQDQ: vpunpcklqdq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKLQDQrm, X86_INS_VPUNPCKLQDQ: vpunpcklqdq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKLQDQrr, X86_INS_VPUNPCKLQDQ: vpunpcklqdq	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKLWDYrm, X86_INS_VPUNPCKLWD: vpunpcklwd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKLWDYrr, X86_INS_VPUNPCKLWD: vpunpcklwd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKLWDrm, X86_INS_VPUNPCKLWD: vpunpcklwd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPUNPCKLWDrr, X86_INS_VPUNPCKLWD: vpunpcklwd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZ128rm, X86_INS_VPXORD: vpxord	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZ128rmb, X86_INS_VPXORD: vpxord	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZ128rmbk, X86_INS_VPXORD: vpxord	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZ128rmbkz, X86_INS_VPXORD: vpxord	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZ128rmk, X86_INS_VPXORD: vpxord	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZ128rmkz, X86_INS_VPXORD: vpxord	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZ128rr, X86_INS_VPXORD: vpxord	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZ128rrk, X86_INS_VPXORD: vpxord	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZ128rrkz, X86_INS_VPXORD: vpxord	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZ256rm, X86_INS_VPXORD: vpxord	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZ256rmb, X86_INS_VPXORD: vpxord	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZ256rmbk, X86_INS_VPXORD: vpxord	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZ256rmbkz, X86_INS_VPXORD: vpxord	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZ256rmk, X86_INS_VPXORD: vpxord	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZ256rmkz, X86_INS_VPXORD: vpxord	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZ256rr, X86_INS_VPXORD: vpxord	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZ256rrk, X86_INS_VPXORD: vpxord	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZ256rrkz, X86_INS_VPXORD: vpxord	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZrm, X86_INS_VPXORD: vpxord	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZrmb, X86_INS_VPXORD: vpxord	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZrmbk, X86_INS_VPXORD: vpxord	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZrmbkz, X86_INS_VPXORD: vpxord	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZrmk, X86_INS_VPXORD: vpxord	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZrmkz, X86_INS_VPXORD: vpxord	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZrr, X86_INS_VPXORD: vpxord	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZrrk, X86_INS_VPXORD: vpxord	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORDZrrkz, X86_INS_VPXORD: vpxord	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZ128rm, X86_INS_VPXORQ: vpxorq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZ128rmb, X86_INS_VPXORQ: vpxorq	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZ128rmbk, X86_INS_VPXORQ: vpxorq	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZ128rmbkz, X86_INS_VPXORQ: vpxorq	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZ128rmk, X86_INS_VPXORQ: vpxorq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZ128rmkz, X86_INS_VPXORQ: vpxorq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZ128rr, X86_INS_VPXORQ: vpxorq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZ128rrk, X86_INS_VPXORQ: vpxorq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZ128rrkz, X86_INS_VPXORQ: vpxorq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZ256rm, X86_INS_VPXORQ: vpxorq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZ256rmb, X86_INS_VPXORQ: vpxorq	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZ256rmbk, X86_INS_VPXORQ: vpxorq	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZ256rmbkz, X86_INS_VPXORQ: vpxorq	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZ256rmk, X86_INS_VPXORQ: vpxorq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZ256rmkz, X86_INS_VPXORQ: vpxorq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZ256rr, X86_INS_VPXORQ: vpxorq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZ256rrk, X86_INS_VPXORQ: vpxorq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZ256rrkz, X86_INS_VPXORQ: vpxorq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZrm, X86_INS_VPXORQ: vpxorq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZrmb, X86_INS_VPXORQ: vpxorq	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZrmbk, X86_INS_VPXORQ: vpxorq	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZrmbkz, X86_INS_VPXORQ: vpxorq	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZrmk, X86_INS_VPXORQ: vpxorq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZrmkz, X86_INS_VPXORQ: vpxorq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZrr, X86_INS_VPXORQ: vpxorq	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZrrk, X86_INS_VPXORQ: vpxorq	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORQZrrkz, X86_INS_VPXORQ: vpxorq	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORYrm, X86_INS_VPXOR: vpxor	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORYrr, X86_INS_VPXOR: vpxor	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORrm, X86_INS_VPXOR: vpxor	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VPXORrr, X86_INS_VPXOR: vpxor	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZ128m, X86_INS_VRCP14PD: vrcp14pd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZ128mb, X86_INS_VRCP14PD: vrcp14pd	{${src}{1to2}, $dst |$dst , ${src}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZ128mbk, X86_INS_VRCP14PD: vrcp14pd	{${src}{1to2}, $dst {${mask}}|$dst {${mask}}, ${src}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZ128mbkz, X86_INS_VRCP14PD: vrcp14pd	{${src}{1to2}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZ128mk, X86_INS_VRCP14PD: vrcp14pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZ128mkz, X86_INS_VRCP14PD: vrcp14pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZ128r, X86_INS_VRCP14PD: vrcp14pd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZ128rk, X86_INS_VRCP14PD: vrcp14pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZ128rkz, X86_INS_VRCP14PD: vrcp14pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZ256m, X86_INS_VRCP14PD: vrcp14pd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZ256mb, X86_INS_VRCP14PD: vrcp14pd	{${src}{1to4}, $dst |$dst , ${src}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZ256mbk, X86_INS_VRCP14PD: vrcp14pd	{${src}{1to4}, $dst {${mask}}|$dst {${mask}}, ${src}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZ256mbkz, X86_INS_VRCP14PD: vrcp14pd	{${src}{1to4}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZ256mk, X86_INS_VRCP14PD: vrcp14pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZ256mkz, X86_INS_VRCP14PD: vrcp14pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZ256r, X86_INS_VRCP14PD: vrcp14pd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZ256rk, X86_INS_VRCP14PD: vrcp14pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZ256rkz, X86_INS_VRCP14PD: vrcp14pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZm, X86_INS_VRCP14PD: vrcp14pd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZmb, X86_INS_VRCP14PD: vrcp14pd	{${src}{1to8}, $dst |$dst , ${src}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZmbk, X86_INS_VRCP14PD: vrcp14pd	{${src}{1to8}, $dst {${mask}}|$dst {${mask}}, ${src}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZmbkz, X86_INS_VRCP14PD: vrcp14pd	{${src}{1to8}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZmk, X86_INS_VRCP14PD: vrcp14pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZmkz, X86_INS_VRCP14PD: vrcp14pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZr, X86_INS_VRCP14PD: vrcp14pd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZrk, X86_INS_VRCP14PD: vrcp14pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PDZrkz, X86_INS_VRCP14PD: vrcp14pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZ128m, X86_INS_VRCP14PS: vrcp14ps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZ128mb, X86_INS_VRCP14PS: vrcp14ps	{${src}{1to4}, $dst |$dst , ${src}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZ128mbk, X86_INS_VRCP14PS: vrcp14ps	{${src}{1to4}, $dst {${mask}}|$dst {${mask}}, ${src}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZ128mbkz, X86_INS_VRCP14PS: vrcp14ps	{${src}{1to4}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZ128mk, X86_INS_VRCP14PS: vrcp14ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZ128mkz, X86_INS_VRCP14PS: vrcp14ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZ128r, X86_INS_VRCP14PS: vrcp14ps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZ128rk, X86_INS_VRCP14PS: vrcp14ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZ128rkz, X86_INS_VRCP14PS: vrcp14ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZ256m, X86_INS_VRCP14PS: vrcp14ps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZ256mb, X86_INS_VRCP14PS: vrcp14ps	{${src}{1to8}, $dst |$dst , ${src}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZ256mbk, X86_INS_VRCP14PS: vrcp14ps	{${src}{1to8}, $dst {${mask}}|$dst {${mask}}, ${src}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZ256mbkz, X86_INS_VRCP14PS: vrcp14ps	{${src}{1to8}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZ256mk, X86_INS_VRCP14PS: vrcp14ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZ256mkz, X86_INS_VRCP14PS: vrcp14ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZ256r, X86_INS_VRCP14PS: vrcp14ps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZ256rk, X86_INS_VRCP14PS: vrcp14ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZ256rkz, X86_INS_VRCP14PS: vrcp14ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZm, X86_INS_VRCP14PS: vrcp14ps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZmb, X86_INS_VRCP14PS: vrcp14ps	{${src}{1to16}, $dst |$dst , ${src}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZmbk, X86_INS_VRCP14PS: vrcp14ps	{${src}{1to16}, $dst {${mask}}|$dst {${mask}}, ${src}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZmbkz, X86_INS_VRCP14PS: vrcp14ps	{${src}{1to16}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZmk, X86_INS_VRCP14PS: vrcp14ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZmkz, X86_INS_VRCP14PS: vrcp14ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZr, X86_INS_VRCP14PS: vrcp14ps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZrk, X86_INS_VRCP14PS: vrcp14ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14PSZrkz, X86_INS_VRCP14PS: vrcp14ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14SDrm, X86_INS_VRCP14SD: vrcp14sd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14SDrr, X86_INS_VRCP14SD: vrcp14sd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14SSrm, X86_INS_VRCP14SS: vrcp14ss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP14SSrr, X86_INS_VRCP14SS: vrcp14ss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28PDm, X86_INS_VRCP28PD: vrcp28pd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28PDmb, X86_INS_VRCP28PD: vrcp28pd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28PDmbk, X86_INS_VRCP28PD: vrcp28pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28PDmbkz, X86_INS_VRCP28PD: vrcp28pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28PDmk, X86_INS_VRCP28PD: vrcp28pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28PDmkz, X86_INS_VRCP28PD: vrcp28pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28PDr, X86_INS_VRCP28PD: vrcp28pd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28PDrb, X86_INS_VRCP28PD: vrcp28pd	{$src, $dst {sae}|$dst {sae}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28PDrbk, X86_INS_VRCP28PD: vrcp28pd	{$src, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28PDrbkz, X86_INS_VRCP28PD: vrcp28pd	{$src, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28PDrk, X86_INS_VRCP28PD: vrcp28pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28PDrkz, X86_INS_VRCP28PD: vrcp28pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28PSm, X86_INS_VRCP28PS: vrcp28ps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28PSmb, X86_INS_VRCP28PS: vrcp28ps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28PSmbk, X86_INS_VRCP28PS: vrcp28ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28PSmbkz, X86_INS_VRCP28PS: vrcp28ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28PSmk, X86_INS_VRCP28PS: vrcp28ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28PSmkz, X86_INS_VRCP28PS: vrcp28ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28PSr, X86_INS_VRCP28PS: vrcp28ps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28PSrb, X86_INS_VRCP28PS: vrcp28ps	{$src, $dst {sae}|$dst {sae}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28PSrbk, X86_INS_VRCP28PS: vrcp28ps	{$src, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28PSrbkz, X86_INS_VRCP28PS: vrcp28ps	{$src, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28PSrk, X86_INS_VRCP28PS: vrcp28ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28PSrkz, X86_INS_VRCP28PS: vrcp28ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28SDm, X86_INS_VRCP28SD: vrcp28sd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28SDmk, X86_INS_VRCP28SD: vrcp28sd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28SDmkz, X86_INS_VRCP28SD: vrcp28sd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28SDr, X86_INS_VRCP28SD: vrcp28sd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28SDrb, X86_INS_VRCP28SD: vrcp28sd	{$src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28SDrbk, X86_INS_VRCP28SD: vrcp28sd	{$src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28SDrbkz, X86_INS_VRCP28SD: vrcp28sd	{$src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28SDrk, X86_INS_VRCP28SD: vrcp28sd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28SDrkz, X86_INS_VRCP28SD: vrcp28sd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28SSm, X86_INS_VRCP28SS: vrcp28ss	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28SSmk, X86_INS_VRCP28SS: vrcp28ss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28SSmkz, X86_INS_VRCP28SS: vrcp28ss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28SSr, X86_INS_VRCP28SS: vrcp28ss	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28SSrb, X86_INS_VRCP28SS: vrcp28ss	{$src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28SSrbk, X86_INS_VRCP28SS: vrcp28ss	{$src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28SSrbkz, X86_INS_VRCP28SS: vrcp28ss	{$src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28SSrk, X86_INS_VRCP28SS: vrcp28ss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRCP28SSrkz, X86_INS_VRCP28SS: vrcp28ss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRCPPSYm, X86_INS_VRCPPS: vrcpps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCPPSYm_Int, X86_INS_VRCPPS: vrcpps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCPPSYr, X86_INS_VRCPPS: vrcpps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCPPSYr_Int, X86_INS_VRCPPS: vrcpps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCPPSm, X86_INS_VRCPPS: vrcpps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCPPSm_Int, X86_INS_VRCPPS: vrcpps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCPPSr, X86_INS_VRCPPS: vrcpps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCPPSr_Int, X86_INS_VRCPPS: vrcpps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCPSSm, X86_INS_VRCPSS: vrcpss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRCPSSm_Int, X86_INS_VRCPSS: vrcpss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRCPSSr, X86_INS_VRCPSS: vrcpss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRNDSCALEPDZm, X86_INS_VRNDSCALEPD: vrndscalepd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRNDSCALEPDZr, X86_INS_VRNDSCALEPD: vrndscalepd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRNDSCALEPSZm, X86_INS_VRNDSCALEPS: vrndscaleps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRNDSCALEPSZr, X86_INS_VRNDSCALEPS: vrndscaleps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRNDSCALESDm, X86_INS_VRNDSCALESD: vrndscalesd	$dst , $src1, $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VRNDSCALESDmk, X86_INS_VRNDSCALESD: vrndscalesd	{$src3, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRNDSCALESDmkz, X86_INS_VRNDSCALESD: vrndscalesd	{$src3, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $src3} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRNDSCALESDr, X86_INS_VRNDSCALESD: vrndscalesd	$dst , $src1, $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VRNDSCALESDrb, X86_INS_VRNDSCALESD: vrndscalesd	{$src3, $src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2, $src3} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRNDSCALESDrbk, X86_INS_VRNDSCALESD: vrndscalesd	{$src3, $src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRNDSCALESDrbkz, X86_INS_VRNDSCALESD: vrndscalesd	{$src3, $src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2, $src3} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRNDSCALESDrk, X86_INS_VRNDSCALESD: vrndscalesd	{$src3, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRNDSCALESDrkz, X86_INS_VRNDSCALESD: vrndscalesd	{$src3, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $src3} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRNDSCALESSm, X86_INS_VRNDSCALESS: vrndscaless	$dst , $src1, $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VRNDSCALESSmk, X86_INS_VRNDSCALESS: vrndscaless	{$src3, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRNDSCALESSmkz, X86_INS_VRNDSCALESS: vrndscaless	{$src3, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $src3} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRNDSCALESSr, X86_INS_VRNDSCALESS: vrndscaless	$dst , $src1, $src2, $src3 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VRNDSCALESSrb, X86_INS_VRNDSCALESS: vrndscaless	{$src3, $src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2, $src3} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRNDSCALESSrbk, X86_INS_VRNDSCALESS: vrndscaless	{$src3, $src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRNDSCALESSrbkz, X86_INS_VRNDSCALESS: vrndscaless	{$src3, $src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2, $src3} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRNDSCALESSrk, X86_INS_VRNDSCALESS: vrndscaless	{$src3, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $src3} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRNDSCALESSrkz, X86_INS_VRNDSCALESS: vrndscaless	{$src3, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $src3} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VROUNDPDm, X86_INS_VROUNDPD: vroundpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VROUNDPDr, X86_INS_VROUNDPD: vroundpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VROUNDPSm, X86_INS_VROUNDPS: vroundps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VROUNDPSr, X86_INS_VROUNDPS: vroundps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VROUNDSDm, X86_INS_VROUNDSD: vroundsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VROUNDSDr, X86_INS_VROUNDSD: vroundsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VROUNDSDr_Int, X86_INS_VROUNDSD: vroundsd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VROUNDSSm, X86_INS_VROUNDSS: vroundss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VROUNDSSr, X86_INS_VROUNDSS: vroundss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VROUNDSSr_Int, X86_INS_VROUNDSS: vroundss	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VROUNDYPDm, X86_INS_VROUNDPD: vroundpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VROUNDYPDr, X86_INS_VROUNDPD: vroundpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VROUNDYPSm, X86_INS_VROUNDPS: vroundps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VROUNDYPSr, X86_INS_VROUNDPS: vroundps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZ128m, X86_INS_VRSQRT14PD: vrsqrt14pd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZ128mb, X86_INS_VRSQRT14PD: vrsqrt14pd	{${src}{1to2}, $dst |$dst , ${src}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZ128mbk, X86_INS_VRSQRT14PD: vrsqrt14pd	{${src}{1to2}, $dst {${mask}}|$dst {${mask}}, ${src}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZ128mbkz, X86_INS_VRSQRT14PD: vrsqrt14pd	{${src}{1to2}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZ128mk, X86_INS_VRSQRT14PD: vrsqrt14pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZ128mkz, X86_INS_VRSQRT14PD: vrsqrt14pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZ128r, X86_INS_VRSQRT14PD: vrsqrt14pd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZ128rk, X86_INS_VRSQRT14PD: vrsqrt14pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZ128rkz, X86_INS_VRSQRT14PD: vrsqrt14pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZ256m, X86_INS_VRSQRT14PD: vrsqrt14pd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZ256mb, X86_INS_VRSQRT14PD: vrsqrt14pd	{${src}{1to4}, $dst |$dst , ${src}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZ256mbk, X86_INS_VRSQRT14PD: vrsqrt14pd	{${src}{1to4}, $dst {${mask}}|$dst {${mask}}, ${src}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZ256mbkz, X86_INS_VRSQRT14PD: vrsqrt14pd	{${src}{1to4}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZ256mk, X86_INS_VRSQRT14PD: vrsqrt14pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZ256mkz, X86_INS_VRSQRT14PD: vrsqrt14pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZ256r, X86_INS_VRSQRT14PD: vrsqrt14pd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZ256rk, X86_INS_VRSQRT14PD: vrsqrt14pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZ256rkz, X86_INS_VRSQRT14PD: vrsqrt14pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZm, X86_INS_VRSQRT14PD: vrsqrt14pd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZmb, X86_INS_VRSQRT14PD: vrsqrt14pd	{${src}{1to8}, $dst |$dst , ${src}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZmbk, X86_INS_VRSQRT14PD: vrsqrt14pd	{${src}{1to8}, $dst {${mask}}|$dst {${mask}}, ${src}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZmbkz, X86_INS_VRSQRT14PD: vrsqrt14pd	{${src}{1to8}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZmk, X86_INS_VRSQRT14PD: vrsqrt14pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZmkz, X86_INS_VRSQRT14PD: vrsqrt14pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZr, X86_INS_VRSQRT14PD: vrsqrt14pd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZrk, X86_INS_VRSQRT14PD: vrsqrt14pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PDZrkz, X86_INS_VRSQRT14PD: vrsqrt14pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZ128m, X86_INS_VRSQRT14PS: vrsqrt14ps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZ128mb, X86_INS_VRSQRT14PS: vrsqrt14ps	{${src}{1to4}, $dst |$dst , ${src}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZ128mbk, X86_INS_VRSQRT14PS: vrsqrt14ps	{${src}{1to4}, $dst {${mask}}|$dst {${mask}}, ${src}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZ128mbkz, X86_INS_VRSQRT14PS: vrsqrt14ps	{${src}{1to4}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZ128mk, X86_INS_VRSQRT14PS: vrsqrt14ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZ128mkz, X86_INS_VRSQRT14PS: vrsqrt14ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZ128r, X86_INS_VRSQRT14PS: vrsqrt14ps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZ128rk, X86_INS_VRSQRT14PS: vrsqrt14ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZ128rkz, X86_INS_VRSQRT14PS: vrsqrt14ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZ256m, X86_INS_VRSQRT14PS: vrsqrt14ps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZ256mb, X86_INS_VRSQRT14PS: vrsqrt14ps	{${src}{1to8}, $dst |$dst , ${src}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZ256mbk, X86_INS_VRSQRT14PS: vrsqrt14ps	{${src}{1to8}, $dst {${mask}}|$dst {${mask}}, ${src}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZ256mbkz, X86_INS_VRSQRT14PS: vrsqrt14ps	{${src}{1to8}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZ256mk, X86_INS_VRSQRT14PS: vrsqrt14ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZ256mkz, X86_INS_VRSQRT14PS: vrsqrt14ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZ256r, X86_INS_VRSQRT14PS: vrsqrt14ps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZ256rk, X86_INS_VRSQRT14PS: vrsqrt14ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZ256rkz, X86_INS_VRSQRT14PS: vrsqrt14ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZm, X86_INS_VRSQRT14PS: vrsqrt14ps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZmb, X86_INS_VRSQRT14PS: vrsqrt14ps	{${src}{1to16}, $dst |$dst , ${src}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZmbk, X86_INS_VRSQRT14PS: vrsqrt14ps	{${src}{1to16}, $dst {${mask}}|$dst {${mask}}, ${src}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZmbkz, X86_INS_VRSQRT14PS: vrsqrt14ps	{${src}{1to16}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZmk, X86_INS_VRSQRT14PS: vrsqrt14ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZmkz, X86_INS_VRSQRT14PS: vrsqrt14ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZr, X86_INS_VRSQRT14PS: vrsqrt14ps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZrk, X86_INS_VRSQRT14PS: vrsqrt14ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14PSZrkz, X86_INS_VRSQRT14PS: vrsqrt14ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14SDrm, X86_INS_VRSQRT14SD: vrsqrt14sd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14SDrr, X86_INS_VRSQRT14SD: vrsqrt14sd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14SSrm, X86_INS_VRSQRT14SS: vrsqrt14ss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT14SSrr, X86_INS_VRSQRT14SS: vrsqrt14ss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28PDm, X86_INS_VRSQRT28PD: vrsqrt28pd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28PDmb, X86_INS_VRSQRT28PD: vrsqrt28pd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28PDmbk, X86_INS_VRSQRT28PD: vrsqrt28pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28PDmbkz, X86_INS_VRSQRT28PD: vrsqrt28pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28PDmk, X86_INS_VRSQRT28PD: vrsqrt28pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28PDmkz, X86_INS_VRSQRT28PD: vrsqrt28pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28PDr, X86_INS_VRSQRT28PD: vrsqrt28pd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28PDrb, X86_INS_VRSQRT28PD: vrsqrt28pd	{$src, $dst {sae}|$dst {sae}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28PDrbk, X86_INS_VRSQRT28PD: vrsqrt28pd	{$src, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28PDrbkz, X86_INS_VRSQRT28PD: vrsqrt28pd	{$src, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28PDrk, X86_INS_VRSQRT28PD: vrsqrt28pd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28PDrkz, X86_INS_VRSQRT28PD: vrsqrt28pd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28PSm, X86_INS_VRSQRT28PS: vrsqrt28ps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28PSmb, X86_INS_VRSQRT28PS: vrsqrt28ps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28PSmbk, X86_INS_VRSQRT28PS: vrsqrt28ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28PSmbkz, X86_INS_VRSQRT28PS: vrsqrt28ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28PSmk, X86_INS_VRSQRT28PS: vrsqrt28ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28PSmkz, X86_INS_VRSQRT28PS: vrsqrt28ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28PSr, X86_INS_VRSQRT28PS: vrsqrt28ps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28PSrb, X86_INS_VRSQRT28PS: vrsqrt28ps	{$src, $dst {sae}|$dst {sae}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28PSrbk, X86_INS_VRSQRT28PS: vrsqrt28ps	{$src, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28PSrbkz, X86_INS_VRSQRT28PS: vrsqrt28ps	{$src, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28PSrk, X86_INS_VRSQRT28PS: vrsqrt28ps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28PSrkz, X86_INS_VRSQRT28PS: vrsqrt28ps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28SDm, X86_INS_VRSQRT28SD: vrsqrt28sd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28SDmk, X86_INS_VRSQRT28SD: vrsqrt28sd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28SDmkz, X86_INS_VRSQRT28SD: vrsqrt28sd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28SDr, X86_INS_VRSQRT28SD: vrsqrt28sd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28SDrb, X86_INS_VRSQRT28SD: vrsqrt28sd	{$src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28SDrbk, X86_INS_VRSQRT28SD: vrsqrt28sd	{$src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28SDrbkz, X86_INS_VRSQRT28SD: vrsqrt28sd	{$src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28SDrk, X86_INS_VRSQRT28SD: vrsqrt28sd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28SDrkz, X86_INS_VRSQRT28SD: vrsqrt28sd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28SSm, X86_INS_VRSQRT28SS: vrsqrt28ss	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28SSmk, X86_INS_VRSQRT28SS: vrsqrt28ss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28SSmkz, X86_INS_VRSQRT28SS: vrsqrt28ss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28SSr, X86_INS_VRSQRT28SS: vrsqrt28ss	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28SSrb, X86_INS_VRSQRT28SS: vrsqrt28ss	{$src2, $src1, $dst {sae}|$dst {sae}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28SSrbk, X86_INS_VRSQRT28SS: vrsqrt28ss	{$src2, $src1, $dst {${mask}}{sae}|$dst {${mask}}{sae}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28SSrbkz, X86_INS_VRSQRT28SS: vrsqrt28ss	{$src2, $src1, $dst {${mask}} {z}{sae}|$dst {${mask}} {z}{sae}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28SSrk, X86_INS_VRSQRT28SS: vrsqrt28ss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRT28SSrkz, X86_INS_VRSQRT28SS: vrsqrt28ss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRTPSYm, X86_INS_VRSQRTPS: vrsqrtps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRTPSYm_Int, X86_INS_VRSQRTPS: vrsqrtps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRTPSYr, X86_INS_VRSQRTPS: vrsqrtps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRTPSYr_Int, X86_INS_VRSQRTPS: vrsqrtps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRTPSm, X86_INS_VRSQRTPS: vrsqrtps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRTPSm_Int, X86_INS_VRSQRTPS: vrsqrtps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRTPSr, X86_INS_VRSQRTPS: vrsqrtps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRTPSr_Int, X86_INS_VRSQRTPS: vrsqrtps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRTSSm, X86_INS_VRSQRTSS: vrsqrtss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRTSSm_Int, X86_INS_VRSQRTSS: vrsqrtss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VRSQRTSSr, X86_INS_VRSQRTSS: vrsqrtss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSCATTERDPDZmr, X86_INS_VSCATTERDPD: vscatterdpd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSCATTERDPSZmr, X86_INS_VSCATTERDPS: vscatterdps	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSCATTERPF0DPDm, X86_INS_VSCATTERPF0DPD: vscatterpf0dpd	{$src {${mask}}|{${mask}}, $src} */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_VSCATTERPF0DPSm, X86_INS_VSCATTERPF0DPS: vscatterpf0dps	{$src {${mask}}|{${mask}}, $src} */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_VSCATTERPF0QPDm, X86_INS_VSCATTERPF0QPD: vscatterpf0qpd	{$src {${mask}}|{${mask}}, $src} */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_VSCATTERPF0QPSm, X86_INS_VSCATTERPF0QPS: vscatterpf0qps	{$src {${mask}}|{${mask}}, $src} */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_VSCATTERPF1DPDm, X86_INS_VSCATTERPF1DPD: vscatterpf1dpd	{$src {${mask}}|{${mask}}, $src} */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_VSCATTERPF1DPSm, X86_INS_VSCATTERPF1DPS: vscatterpf1dps	{$src {${mask}}|{${mask}}, $src} */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_VSCATTERPF1QPDm, X86_INS_VSCATTERPF1QPD: vscatterpf1qpd	{$src {${mask}}|{${mask}}, $src} */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_VSCATTERPF1QPSm, X86_INS_VSCATTERPF1QPS: vscatterpf1qps	{$src {${mask}}|{${mask}}, $src} */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_VSCATTERQPDZmr, X86_INS_VSCATTERQPD: vscatterqpd	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSCATTERQPSZmr, X86_INS_VSCATTERQPS: vscatterqps	{$src2, ${dst} {${mask}}|${dst} {${mask}}, $src2} */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSHUFPDYrmi, X86_INS_VSHUFPD: vshufpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSHUFPDYrri, X86_INS_VSHUFPD: vshufpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSHUFPDZrmi, X86_INS_VSHUFPD: vshufpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSHUFPDZrri, X86_INS_VSHUFPD: vshufpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSHUFPDrmi, X86_INS_VSHUFPD: vshufpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSHUFPDrri, X86_INS_VSHUFPD: vshufpd	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSHUFPSYrmi, X86_INS_VSHUFPS: vshufps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSHUFPSYrri, X86_INS_VSHUFPS: vshufps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSHUFPSZrmi, X86_INS_VSHUFPS: vshufps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSHUFPSZrri, X86_INS_VSHUFPS: vshufps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSHUFPSrmi, X86_INS_VSHUFPS: vshufps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSHUFPSrri, X86_INS_VSHUFPS: vshufps	$dst, $src1, $src2, $src3 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDYm, X86_INS_VSQRTPD: vsqrtpd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDYr, X86_INS_VSQRTPD: vsqrtpd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZ128m, X86_INS_VSQRTPD: vsqrtpd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZ128mb, X86_INS_VSQRTPD: vsqrtpd	{${src}{1to2}, $dst |$dst , ${src}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZ128mbk, X86_INS_VSQRTPD: vsqrtpd	{${src}{1to2}, $dst {${mask}}|$dst {${mask}}, ${src}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZ128mbkz, X86_INS_VSQRTPD: vsqrtpd	{${src}{1to2}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZ128mk, X86_INS_VSQRTPD: vsqrtpd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZ128mkz, X86_INS_VSQRTPD: vsqrtpd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZ128r, X86_INS_VSQRTPD: vsqrtpd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZ128rk, X86_INS_VSQRTPD: vsqrtpd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZ128rkz, X86_INS_VSQRTPD: vsqrtpd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZ256m, X86_INS_VSQRTPD: vsqrtpd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZ256mb, X86_INS_VSQRTPD: vsqrtpd	{${src}{1to4}, $dst |$dst , ${src}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZ256mbk, X86_INS_VSQRTPD: vsqrtpd	{${src}{1to4}, $dst {${mask}}|$dst {${mask}}, ${src}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZ256mbkz, X86_INS_VSQRTPD: vsqrtpd	{${src}{1to4}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZ256mk, X86_INS_VSQRTPD: vsqrtpd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZ256mkz, X86_INS_VSQRTPD: vsqrtpd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZ256r, X86_INS_VSQRTPD: vsqrtpd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZ256rk, X86_INS_VSQRTPD: vsqrtpd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZ256rkz, X86_INS_VSQRTPD: vsqrtpd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZm, X86_INS_VSQRTPD: vsqrtpd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZmb, X86_INS_VSQRTPD: vsqrtpd	{${src}{1to8}, $dst |$dst , ${src}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZmbk, X86_INS_VSQRTPD: vsqrtpd	{${src}{1to8}, $dst {${mask}}|$dst {${mask}}, ${src}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZmbkz, X86_INS_VSQRTPD: vsqrtpd	{${src}{1to8}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZmk, X86_INS_VSQRTPD: vsqrtpd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZmkz, X86_INS_VSQRTPD: vsqrtpd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZr, X86_INS_VSQRTPD: vsqrtpd	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZrk, X86_INS_VSQRTPD: vsqrtpd	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDZrkz, X86_INS_VSQRTPD: vsqrtpd	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDm, X86_INS_VSQRTPD: vsqrtpd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPDr, X86_INS_VSQRTPD: vsqrtpd	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSYm, X86_INS_VSQRTPS: vsqrtps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSYr, X86_INS_VSQRTPS: vsqrtps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZ128m, X86_INS_VSQRTPS: vsqrtps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZ128mb, X86_INS_VSQRTPS: vsqrtps	{${src}{1to4}, $dst |$dst , ${src}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZ128mbk, X86_INS_VSQRTPS: vsqrtps	{${src}{1to4}, $dst {${mask}}|$dst {${mask}}, ${src}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZ128mbkz, X86_INS_VSQRTPS: vsqrtps	{${src}{1to4}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZ128mk, X86_INS_VSQRTPS: vsqrtps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZ128mkz, X86_INS_VSQRTPS: vsqrtps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZ128r, X86_INS_VSQRTPS: vsqrtps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZ128rk, X86_INS_VSQRTPS: vsqrtps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZ128rkz, X86_INS_VSQRTPS: vsqrtps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZ256m, X86_INS_VSQRTPS: vsqrtps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZ256mb, X86_INS_VSQRTPS: vsqrtps	{${src}{1to8}, $dst |$dst , ${src}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZ256mbk, X86_INS_VSQRTPS: vsqrtps	{${src}{1to8}, $dst {${mask}}|$dst {${mask}}, ${src}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZ256mbkz, X86_INS_VSQRTPS: vsqrtps	{${src}{1to8}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZ256mk, X86_INS_VSQRTPS: vsqrtps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZ256mkz, X86_INS_VSQRTPS: vsqrtps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZ256r, X86_INS_VSQRTPS: vsqrtps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZ256rk, X86_INS_VSQRTPS: vsqrtps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZ256rkz, X86_INS_VSQRTPS: vsqrtps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZm, X86_INS_VSQRTPS: vsqrtps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZmb, X86_INS_VSQRTPS: vsqrtps	{${src}{1to16}, $dst |$dst , ${src}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZmbk, X86_INS_VSQRTPS: vsqrtps	{${src}{1to16}, $dst {${mask}}|$dst {${mask}}, ${src}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZmbkz, X86_INS_VSQRTPS: vsqrtps	{${src}{1to16}, $dst {${mask}} {z}|$dst {${mask}} {z}, ${src}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZmk, X86_INS_VSQRTPS: vsqrtps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZmkz, X86_INS_VSQRTPS: vsqrtps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZr, X86_INS_VSQRTPS: vsqrtps	$dst , $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZrk, X86_INS_VSQRTPS: vsqrtps	{$src, $dst {${mask}}|$dst {${mask}}, $src} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSZrkz, X86_INS_VSQRTPS: vsqrtps	{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSm, X86_INS_VSQRTPS: vsqrtps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTPSr, X86_INS_VSQRTPS: vsqrtps	$dst, $src */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTSDZm, X86_INS_VSQRTSD: vsqrtsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTSDZm_Int, X86_INS_VSQRTSD: vsqrtsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTSDZr, X86_INS_VSQRTSD: vsqrtsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTSDZr_Int, X86_INS_VSQRTSD: vsqrtsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTSDm, X86_INS_VSQRTSD: vsqrtsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTSDm_Int, X86_INS_VSQRTSD: vsqrtsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTSDr, X86_INS_VSQRTSD: vsqrtsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTSSZm, X86_INS_VSQRTSS: vsqrtss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTSSZm_Int, X86_INS_VSQRTSS: vsqrtss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTSSZr, X86_INS_VSQRTSS: vsqrtss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTSSZr_Int, X86_INS_VSQRTSS: vsqrtss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTSSm, X86_INS_VSQRTSS: vsqrtss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTSSm_Int, X86_INS_VSQRTSS: vsqrtss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSQRTSSr, X86_INS_VSQRTSS: vsqrtss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSTMXCSR, X86_INS_VSTMXCSR: vstmxcsr	$dst */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDYrm, X86_INS_VSUBPD: vsubpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDYrr, X86_INS_VSUBPD: vsubpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZ128rm, X86_INS_VSUBPD: vsubpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZ128rmb, X86_INS_VSUBPD: vsubpd	{${src2}{1to2}, $src1, $dst |$dst , $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZ128rmbk, X86_INS_VSUBPD: vsubpd	{${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZ128rmbkz, X86_INS_VSUBPD: vsubpd	{${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to2}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZ128rmk, X86_INS_VSUBPD: vsubpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZ128rmkz, X86_INS_VSUBPD: vsubpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZ128rr, X86_INS_VSUBPD: vsubpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZ128rrk, X86_INS_VSUBPD: vsubpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZ128rrkz, X86_INS_VSUBPD: vsubpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZ256rm, X86_INS_VSUBPD: vsubpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZ256rmb, X86_INS_VSUBPD: vsubpd	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZ256rmbk, X86_INS_VSUBPD: vsubpd	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZ256rmbkz, X86_INS_VSUBPD: vsubpd	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZ256rmk, X86_INS_VSUBPD: vsubpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZ256rmkz, X86_INS_VSUBPD: vsubpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZ256rr, X86_INS_VSUBPD: vsubpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZ256rrk, X86_INS_VSUBPD: vsubpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZ256rrkz, X86_INS_VSUBPD: vsubpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZrb, X86_INS_VSUBPD: vsubpd	$dst , $src1, $src2, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VSUBPDZrbk, X86_INS_VSUBPD: vsubpd	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZrbkz, X86_INS_VSUBPD: vsubpd	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZrm, X86_INS_VSUBPD: vsubpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZrmb, X86_INS_VSUBPD: vsubpd	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZrmbk, X86_INS_VSUBPD: vsubpd	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZrmbkz, X86_INS_VSUBPD: vsubpd	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZrmk, X86_INS_VSUBPD: vsubpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZrmkz, X86_INS_VSUBPD: vsubpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZrr, X86_INS_VSUBPD: vsubpd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZrrk, X86_INS_VSUBPD: vsubpd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDZrrkz, X86_INS_VSUBPD: vsubpd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDrm, X86_INS_VSUBPD: vsubpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPDrr, X86_INS_VSUBPD: vsubpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSYrm, X86_INS_VSUBPS: vsubps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSYrr, X86_INS_VSUBPS: vsubps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZ128rm, X86_INS_VSUBPS: vsubps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZ128rmb, X86_INS_VSUBPS: vsubps	{${src2}{1to4}, $src1, $dst |$dst , $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZ128rmbk, X86_INS_VSUBPS: vsubps	{${src2}{1to4}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZ128rmbkz, X86_INS_VSUBPS: vsubps	{${src2}{1to4}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to4}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZ128rmk, X86_INS_VSUBPS: vsubps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZ128rmkz, X86_INS_VSUBPS: vsubps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZ128rr, X86_INS_VSUBPS: vsubps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZ128rrk, X86_INS_VSUBPS: vsubps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZ128rrkz, X86_INS_VSUBPS: vsubps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZ256rm, X86_INS_VSUBPS: vsubps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZ256rmb, X86_INS_VSUBPS: vsubps	{${src2}{1to8}, $src1, $dst |$dst , $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZ256rmbk, X86_INS_VSUBPS: vsubps	{${src2}{1to8}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZ256rmbkz, X86_INS_VSUBPS: vsubps	{${src2}{1to8}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to8}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZ256rmk, X86_INS_VSUBPS: vsubps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZ256rmkz, X86_INS_VSUBPS: vsubps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZ256rr, X86_INS_VSUBPS: vsubps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZ256rrk, X86_INS_VSUBPS: vsubps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZ256rrkz, X86_INS_VSUBPS: vsubps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZrb, X86_INS_VSUBPS: vsubps	$dst , $src1, $src2, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VSUBPSZrbk, X86_INS_VSUBPS: vsubps	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZrbkz, X86_INS_VSUBPS: vsubps	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZrm, X86_INS_VSUBPS: vsubps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZrmb, X86_INS_VSUBPS: vsubps	{${src2}{1to16}, $src1, $dst |$dst , $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZrmbk, X86_INS_VSUBPS: vsubps	{${src2}{1to16}, $src1, $dst {${mask}}|$dst {${mask}}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZrmbkz, X86_INS_VSUBPS: vsubps	{${src2}{1to16}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, ${src2}{1to16}} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZrmk, X86_INS_VSUBPS: vsubps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZrmkz, X86_INS_VSUBPS: vsubps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZrr, X86_INS_VSUBPS: vsubps	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZrrk, X86_INS_VSUBPS: vsubps	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSZrrkz, X86_INS_VSUBPS: vsubps	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSrm, X86_INS_VSUBPS: vsubps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBPSrr, X86_INS_VSUBPS: vsubps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSDZrm, X86_INS_VSUBSD: vsubsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSDZrm_Int, X86_INS_VSUBSD: vsubsd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSDZrm_Intk, X86_INS_VSUBSD: vsubsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSDZrm_Intkz, X86_INS_VSUBSD: vsubsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSDZrr, X86_INS_VSUBSD: vsubsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSDZrr_Int, X86_INS_VSUBSD: vsubsd	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSDZrr_Intk, X86_INS_VSUBSD: vsubsd	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSDZrr_Intkz, X86_INS_VSUBSD: vsubsd	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSDZrrb, X86_INS_VSUBSD: vsubsd	$dst , $src1, $src2, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VSUBSDZrrbk, X86_INS_VSUBSD: vsubsd	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSDZrrbkz, X86_INS_VSUBSD: vsubsd	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSDrm, X86_INS_VSUBSD: vsubsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSDrm_Int, X86_INS_VSUBSD: vsubsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSDrr, X86_INS_VSUBSD: vsubsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSDrr_Int, X86_INS_VSUBSD: vsubsd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSSZrm, X86_INS_VSUBSS: vsubss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSSZrm_Int, X86_INS_VSUBSS: vsubss	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSSZrm_Intk, X86_INS_VSUBSS: vsubss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSSZrm_Intkz, X86_INS_VSUBSS: vsubss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSSZrr, X86_INS_VSUBSS: vsubss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSSZrr_Int, X86_INS_VSUBSS: vsubss	$dst , $src1, $src2 */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSSZrr_Intk, X86_INS_VSUBSS: vsubss	{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSSZrr_Intkz, X86_INS_VSUBSS: vsubss	{$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSSZrrb, X86_INS_VSUBSS: vsubss	$dst , $src1, $src2, $rc */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, CS_OP_READ, CS_OP_NOREG, 0 }
+},
+{	/* X86_VSUBSSZrrbk, X86_INS_VSUBSS: vsubss	{$rc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSSZrrbkz, X86_INS_VSUBSS: vsubss	{$rc, $src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $src1, $src2, $rc} */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSSrm, X86_INS_VSUBSS: vsubss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSSrm_Int, X86_INS_VSUBSS: vsubss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSSrr, X86_INS_VSUBSS: vsubss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VSUBSSrr_Int, X86_INS_VSUBSS: vsubss	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VTESTPDYrm, X86_INS_VTESTPD: vtestpd	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VTESTPDYrr, X86_INS_VTESTPD: vtestpd	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VTESTPDrm, X86_INS_VTESTPD: vtestpd	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VTESTPDrr, X86_INS_VTESTPD: vtestpd	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VTESTPSYrm, X86_INS_VTESTPS: vtestps	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VTESTPSYrr, X86_INS_VTESTPS: vtestps	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VTESTPSrm, X86_INS_VTESTPS: vtestps	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VTESTPSrr, X86_INS_VTESTPS: vtestps	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUCOMISDZrm, X86_INS_VUCOMISD: vucomisd	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUCOMISDZrr, X86_INS_VUCOMISD: vucomisd	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUCOMISDrm, X86_INS_VUCOMISD: vucomisd	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUCOMISDrr, X86_INS_VUCOMISD: vucomisd	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUCOMISSZrm, X86_INS_VUCOMISS: vucomiss	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUCOMISSZrr, X86_INS_VUCOMISS: vucomiss	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUCOMISSrm, X86_INS_VUCOMISS: vucomiss	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUCOMISSrr, X86_INS_VUCOMISS: vucomiss	$src1, $src2 */
+	0,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUNPCKHPDYrm, X86_INS_VUNPCKHPD: vunpckhpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUNPCKHPDYrr, X86_INS_VUNPCKHPD: vunpckhpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUNPCKHPDZrm, X86_INS_VUNPCKHPD: vunpckhpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUNPCKHPDZrr, X86_INS_VUNPCKHPD: vunpckhpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUNPCKHPDrm, X86_INS_VUNPCKHPD: vunpckhpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUNPCKHPDrr, X86_INS_VUNPCKHPD: vunpckhpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUNPCKHPSYrm, X86_INS_VUNPCKHPS: vunpckhps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUNPCKHPSYrr, X86_INS_VUNPCKHPS: vunpckhps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUNPCKHPSZrm, X86_INS_VUNPCKHPS: vunpckhps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUNPCKHPSZrr, X86_INS_VUNPCKHPS: vunpckhps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUNPCKHPSrm, X86_INS_VUNPCKHPS: vunpckhps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUNPCKHPSrr, X86_INS_VUNPCKHPS: vunpckhps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUNPCKLPDYrm, X86_INS_VUNPCKLPD: vunpcklpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUNPCKLPDYrr, X86_INS_VUNPCKLPD: vunpcklpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUNPCKLPDZrm, X86_INS_VUNPCKLPD: vunpcklpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUNPCKLPDZrr, X86_INS_VUNPCKLPD: vunpcklpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUNPCKLPDrm, X86_INS_VUNPCKLPD: vunpcklpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUNPCKLPDrr, X86_INS_VUNPCKLPD: vunpcklpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUNPCKLPSYrm, X86_INS_VUNPCKLPS: vunpcklps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUNPCKLPSYrr, X86_INS_VUNPCKLPS: vunpcklps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUNPCKLPSZrm, X86_INS_VUNPCKLPS: vunpcklps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUNPCKLPSZrr, X86_INS_VUNPCKLPS: vunpcklps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUNPCKLPSrm, X86_INS_VUNPCKLPS: vunpcklps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VUNPCKLPSrr, X86_INS_VUNPCKLPS: vunpcklps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VXORPDYrm, X86_INS_VXORPD: vxorpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VXORPDYrr, X86_INS_VXORPD: vxorpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VXORPDrm, X86_INS_VXORPD: vxorpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VXORPDrr, X86_INS_VXORPD: vxorpd	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VXORPSYrm, X86_INS_VXORPS: vxorps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VXORPSYrr, X86_INS_VXORPS: vxorps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VXORPSrm, X86_INS_VXORPS: vxorps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VXORPSrr, X86_INS_VXORPS: vxorps	$dst, $src1, $src2 */
+	0,
+	{ CS_OP_WRITE, CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_VZEROALL, X86_INS_VZEROALL: vzeroall */
+	0,
+	{ 0 }
+},
+{	/* X86_VZEROUPPER, X86_INS_VZEROUPPER: vzeroupper */
+	0,
+	{ 0 }
+},
+{	/* X86_WAIT, X86_INS_WAIT: wait */
+	0,
+	{ 0 }
+},
+{	/* X86_WBINVD, X86_INS_WBINVD: wbinvd */
+	0,
+	{ 0 }
+},
+{	/* X86_WRFSBASE, X86_INS_WRFSBASE: wrfsbase{l}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_WRFSBASE64, X86_INS_WRFSBASE: wrfsbase{q}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_WRGSBASE, X86_INS_WRGSBASE: wrgsbase{l}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_WRGSBASE64, X86_INS_WRGSBASE: wrgsbase{q}	$src */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_WRMSR, X86_INS_WRMSR: wrmsr */
+	0,
+	{ 0 }
+},
+{	/* X86_XABORT, X86_INS_XABORT: xabort	$imm */
+	0,
+	{ 0 }
+},
+{	/* X86_XACQUIRE_PREFIX, X86_INS_XACQUIRE: xacquire */
+	0,
+	{ 0 }
+},
+{	/* X86_XADD16rm, X86_INS_XADD: xadd{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_XADD16rr, X86_INS_XADD: xadd{w}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_XADD32rm, X86_INS_XADD: xadd{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_XADD32rr, X86_INS_XADD: xadd{l}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_XADD64rm, X86_INS_XADD: xadd{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_XADD64rr, X86_INS_XADD: xadd{q}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_XADD8rm, X86_INS_XADD: xadd{b}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_READ, CS_OP_READ, 0 }
+},
+{	/* X86_XADD8rr, X86_INS_XADD: xadd{b}	$dst, $src */
+	X86_EFLAGS_MODIFY_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_MODIFY_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_MODIFY_CF,
+	{ CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_XBEGIN_2, X86_INS_XBEGIN: xbegin	$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_XBEGIN_4, X86_INS_XBEGIN: xbegin	$dst */
+	0,
+	{ 0 }
+},
+{	/* X86_XCHG16ar, X86_INS_XCHG: xchg{w}	ax, $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_XCHG16rm, X86_INS_XCHG: xchg{w}	$ptr, $val */
+	0,
+	{ CS_OP_READ, CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_XCHG16rr, X86_INS_XCHG: xchg{w}	$src, $val */
+	0,
+	{ CS_OP_READ, CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_XCHG32ar, X86_INS_XCHG: xchg{l}	eax, $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_XCHG32ar64, X86_INS_XCHG: xchg{l}	eax, $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_XCHG32rm, X86_INS_XCHG: xchg{l}	$ptr, $val */
+	0,
+	{ CS_OP_READ, CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_XCHG32rr, X86_INS_XCHG: xchg{l}	$src, $val */
+	0,
+	{ CS_OP_READ, CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_XCHG64ar, X86_INS_XCHG: xchg{q}	rax, $src */
+	0,
+	{ CS_OP_NOREG, CS_OP_READ, 0 }
+},
+{	/* X86_XCHG64rm, X86_INS_XCHG: xchg{q}	$ptr, $val */
+	0,
+	{ CS_OP_READ, CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_XCHG64rr, X86_INS_XCHG: xchg{q}	$src, $val */
+	0,
+	{ CS_OP_READ, CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_XCHG8rm, X86_INS_XCHG: xchg{b}	$ptr, $val */
+	0,
+	{ CS_OP_READ, CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_XCHG8rr, X86_INS_XCHG: xchg{b}	$src, $val */
+	0,
+	{ CS_OP_READ, CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_XCH_F, X86_INS_FXCH: fxch	$op */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_XCRYPTCBC, X86_INS_XCRYPTCBC: xcryptcbc */
+	0,
+	{ 0 }
+},
+{	/* X86_XCRYPTCFB, X86_INS_XCRYPTCFB: xcryptcfb */
+	0,
+	{ 0 }
+},
+{	/* X86_XCRYPTCTR, X86_INS_XCRYPTCTR: xcryptctr */
+	0,
+	{ 0 }
+},
+{	/* X86_XCRYPTECB, X86_INS_XCRYPTECB: xcryptecb */
+	0,
+	{ 0 }
+},
+{	/* X86_XCRYPTOFB, X86_INS_XCRYPTOFB: xcryptofb */
+	0,
+	{ 0 }
+},
+{	/* X86_XEND, X86_INS_XEND: xend */
+	0,
+	{ 0 }
+},
+{	/* X86_XGETBV, X86_INS_XGETBV: xgetbv */
+	0,
+	{ 0 }
+},
+{	/* X86_XLAT, X86_INS_XLATB: xlatb */
+	0,
+	{ 0 }
+},
+{	/* X86_XOR16i16, X86_INS_XOR: xor{w}	ax, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ 0 }
+},
+{	/* X86_XOR16mi, X86_INS_XOR: xor{w}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_XOR16mi8, X86_INS_XOR: xor{w}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_XOR16mr, X86_INS_XOR: xor{w}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_XOR16ri, X86_INS_XOR: xor{w}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_XOR16ri8, X86_INS_XOR: xor{w}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_XOR16rm, X86_INS_XOR: xor{w}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_XOR16rr, X86_INS_XOR: xor{w}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_XOR16rr_REV, X86_INS_XOR: xor{w}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_XOR32i32, X86_INS_XOR: xor{l}	eax, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ 0 }
+},
+{	/* X86_XOR32mi, X86_INS_XOR: xor{l}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_XOR32mi8, X86_INS_XOR: xor{l}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_XOR32mr, X86_INS_XOR: xor{l}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_XOR32ri, X86_INS_XOR: xor{l}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_XOR32ri8, X86_INS_XOR: xor{l}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_XOR32rm, X86_INS_XOR: xor{l}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_XOR32rr, X86_INS_XOR: xor{l}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_XOR32rr_REV, X86_INS_XOR: xor{l}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_XOR64i32, X86_INS_XOR: xor{q}	rax, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ 0 }
+},
+{	/* X86_XOR64mi32, X86_INS_XOR: xor{q}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_XOR64mi8, X86_INS_XOR: xor{q}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_XOR64mr, X86_INS_XOR: xor{q}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_XOR64ri32, X86_INS_XOR: xor{q}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_XOR64ri8, X86_INS_XOR: xor{q}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_XOR64rm, X86_INS_XOR: xor{q}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_XOR64rr, X86_INS_XOR: xor{q}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_XOR64rr_REV, X86_INS_XOR: xor{q}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_XOR8i8, X86_INS_XOR: xor{b}	al, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ 0 }
+},
+{	/* X86_XOR8mi, X86_INS_XOR: xor{b}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_XOR8mi8, X86_INS_XOR: xor{b}	$dst, $src */
+	X86_REG_EFLAGS,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_XOR8mr, X86_INS_XOR: xor{b}	$dst, $src */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_XOR8ri, X86_INS_XOR: xor{b}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_XOR8ri8, X86_INS_XOR: xor{b}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, 0 }
+},
+{	/* X86_XOR8rm, X86_INS_XOR: xor{b}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_XOR8rr, X86_INS_XOR: xor{b}	$src1, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_XOR8rr_REV, X86_INS_XOR: xor{b}	$dst, $src2 */
+	X86_EFLAGS_RESET_OF | X86_EFLAGS_MODIFY_SF | X86_EFLAGS_MODIFY_ZF | X86_EFLAGS_UNDEFINED_AF | X86_EFLAGS_MODIFY_PF | X86_EFLAGS_RESET_CF,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_XORPDrm, X86_INS_XORPD: xorpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_XORPDrr, X86_INS_XORPD: xorpd	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_XORPSrm, X86_INS_XORPS: xorps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_XORPSrr, X86_INS_XORPS: xorps	$dst, $src2 */
+	0,
+	{ CS_OP_READ | CS_OP_WRITE, CS_OP_READ, 0 }
+},
+{	/* X86_XRELEASE_PREFIX, X86_INS_XRELEASE: xrelease */
+	0,
+	{ 0 }
+},
+{	/* X86_XRSTOR, X86_INS_XRSTOR: xrstor	$dst */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_XRSTOR64, X86_INS_XRSTOR64: xrstor64	$dst */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_XRSTORS, X86_INS_XRSTORS: xrstors	$dst */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_XRSTORS64, X86_INS_XRSTORS64: xrstors64	$dst */
+	0,
+	{ CS_OP_READ, 0 }
+},
+{	/* X86_XSAVE, X86_INS_XSAVE: xsave	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_XSAVE64, X86_INS_XSAVE64: xsave64	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_XSAVEC, X86_INS_XSAVEC: xsavec	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_XSAVEC64, X86_INS_XSAVEC64: xsavec64	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_XSAVEOPT, X86_INS_XSAVEOPT: xsaveopt	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_XSAVEOPT64, X86_INS_XSAVEOPT64: xsaveopt64	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_XSAVES, X86_INS_XSAVES: xsaves	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_XSAVES64, X86_INS_XSAVES64: xsaves64	$dst */
+	0,
+	{ CS_OP_WRITE, 0 }
+},
+{	/* X86_XSETBV, X86_INS_XSETBV: xsetbv */
+	0,
+	{ 0 }
+},
+{	/* X86_XSHA1, X86_INS_XSHA1: xsha1 */
+	0,
+	{ 0 }
+},
+{	/* X86_XSHA256, X86_INS_XSHA256: xsha256 */
+	0,
+	{ 0 }
+},
+{	/* X86_XSTORE, X86_INS_XSTORE: xstore */
+	0,
+	{ 0 }
+},
+{	/* X86_XTEST, X86_INS_XTEST: xtest */
+	0,
+	{ 0 }
+},
+{	/* X86_fdisi8087_nop, X86_INS_FDISI8087_NOP: fdisi8087_nop */
+	0,
+	{ 0 }
+},
+{	/* X86_feni8087_nop, X86_INS_FENI8087_NOP: feni8087_nop */
+	0,
+	{ 0 }
+},