tests: update Mips modes to CS_MODE_MIPS32 & CS_MODE_MIPS64

test2
Nguyen Anh Quynh 10 years ago
parent d3f0373ed1
commit 84df600944
  1. 2
      include/capstone.h
  2. 4
      tests/test.c
  3. 4
      tests/test_detail.c
  4. 4
      tests/test_iter.c
  5. 4
      tests/test_mips.c

@ -86,7 +86,7 @@ typedef enum cs_mode {
CS_MODE_MIPS32R6 = 1 << 6, // Mips32r6 ISA
CS_MODE_MIPSGP64 = 1 << 7, // General Purpose Registers are 64-bit wide (MIPS arch)
CS_MODE_V9 = 1 << 4, // SparcV9 mode (Sparc architecture)
CS_MODE_BIG_ENDIAN = 1 << 31 // big endian mode
CS_MODE_BIG_ENDIAN = 1 << 31, // big endian mode
CS_MODE_MIPS32 = CS_MODE_32, // Mips32 ISA
CS_MODE_MIPS64 = CS_MODE_64, // Mips64 ISA.
} cs_mode;

@ -139,14 +139,14 @@ static void test()
},
{
CS_ARCH_MIPS,
(cs_mode)(CS_MODE_32 + CS_MODE_BIG_ENDIAN),
(cs_mode)(CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN),
(unsigned char*)MIPS_CODE,
sizeof(MIPS_CODE) - 1,
"MIPS-32 (Big-endian)"
},
{
CS_ARCH_MIPS,
(cs_mode)(CS_MODE_64 + CS_MODE_LITTLE_ENDIAN),
(cs_mode)(CS_MODE_MIPS64 + CS_MODE_LITTLE_ENDIAN),
(unsigned char*)MIPS_CODE2,
sizeof(MIPS_CODE2) - 1,
"MIPS-64-EL (Little-endian)"

@ -139,14 +139,14 @@ static void test()
},
{
CS_ARCH_MIPS,
(cs_mode)(CS_MODE_32 + CS_MODE_BIG_ENDIAN),
(cs_mode)(CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN),
(unsigned char *)MIPS_CODE,
sizeof(MIPS_CODE) - 1,
"MIPS-32 (Big-endian)"
},
{
CS_ARCH_MIPS,
(cs_mode)(CS_MODE_64 + CS_MODE_LITTLE_ENDIAN),
(cs_mode)(CS_MODE_MIPS64 + CS_MODE_LITTLE_ENDIAN),
(unsigned char *)MIPS_CODE2,
sizeof(MIPS_CODE2) - 1,
"MIPS-64-EL (Little-endian)"

@ -122,14 +122,14 @@ static void test()
},
{
CS_ARCH_MIPS,
(cs_mode)(CS_MODE_32 + CS_MODE_BIG_ENDIAN),
(cs_mode)(CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN),
(unsigned char *)MIPS_CODE,
sizeof(MIPS_CODE) - 1,
"MIPS-32 (Big-endian)"
},
{
CS_ARCH_MIPS,
(cs_mode)(CS_MODE_64 + CS_MODE_LITTLE_ENDIAN),
(cs_mode)(CS_MODE_MIPS64 + CS_MODE_LITTLE_ENDIAN),
(unsigned char *)MIPS_CODE2,
sizeof(MIPS_CODE2) - 1,
"MIPS-64-EL (Little-endian)"

@ -86,14 +86,14 @@ static void test()
struct platform platforms[] = {
{
CS_ARCH_MIPS,
(cs_mode)(CS_MODE_32 + CS_MODE_BIG_ENDIAN),
(cs_mode)(CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN),
(unsigned char *)MIPS_CODE,
sizeof(MIPS_CODE) - 1,
"MIPS-32 (Big-endian)"
},
{
CS_ARCH_MIPS,
(cs_mode)(CS_MODE_64 + CS_MODE_LITTLE_ENDIAN),
(cs_mode)(CS_MODE_MIPS64 + CS_MODE_LITTLE_ENDIAN),
(unsigned char *)MIPS_CODE2,
sizeof(MIPS_CODE2) - 1,
"MIPS-64-EL (Little-endian)"

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