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Merge branch 'arm64_reg_access' of https://github.com/pranith/capstone into pranith-arm64_reg_access

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test2
Nguyen Anh Quynh 9 years ago
parent 3722c74f69 653827bf5a
commit 6de6425072
8 changed files with 16387 additions and 9310 deletions
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  1. 299
      arch/AArch64/AArch64InstPrinter.c
  2. 9381
      arch/AArch64/AArch64Mapping.c
  3. 6
      arch/AArch64/AArch64Mapping.h
  4. 9308
      arch/AArch64/AArch64MappingInsnOp.inc
  5. 3
      arch/AArch64/AArch64Module.c
  6. 6657
      arch/AArch64/ARMMappingInsnOp.inc
  7. 5
      include/capstone/arm64.h
  8. 38
      tests/test_arm64.c

299
arch/AArch64/AArch64InstPrinter.c
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@ -45,6 +45,20 @@ static char *printAliasInstr(MCInst *MI, SStream *OS, void *info);
static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI);
static void printShifter(MCInst *MI, unsigned OpNum, SStream *O);
static cs_ac_type get_op_access(cs_struct *h, unsigned int id, unsigned int index)
{
#ifndef CAPSTONE_DIET
cs_ac_type *arr = arm64_get_op_access(h, id);
if (arr[index] == CS_AC_IGNORE)
return 0;
return arr[index];
#else
return 0;
#endif
}
static void set_mem_access(MCInst *MI, bool status)
{
MI->csh->doing_mem = status;
@ -53,6 +67,12 @@ static void set_mem_access(MCInst *MI, bool status)
return;
if (status) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_MEM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.base = ARM64_REG_INVALID;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.index = ARM64_REG_INVALID;
@ -116,9 +136,20 @@ void AArch64_printInst(MCInst *MI, SStream *O, void *Info)
getRegisterName(getWRegFromXReg(MCOperand_getReg(Op1)), AArch64_NoRegAltName));
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0);
MI->flat_insn->detail->arm64.op_count++;
#ifndef CAPSTONE_DIET
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = getWRegFromXReg(MCOperand_getReg(Op1));
MI->flat_insn->detail->arm64.op_count++;
@ -170,12 +201,28 @@ void AArch64_printInst(MCInst *MI, SStream *O, void *Info)
MCInst_setOpcodePub(MI, AArch64_map_insn(AsmMnemonic));
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0);
MI->flat_insn->detail->arm64.op_count++;
#ifndef CAPSTONE_DIET
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op1);
MI->flat_insn->detail->arm64.op_count++;
#ifndef CAPSTONE_DIET
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = shift;
MI->flat_insn->detail->arm64.op_count++;
@ -197,15 +244,36 @@ void AArch64_printInst(MCInst *MI, SStream *O, void *Info)
MCInst_setOpcodePub(MI, AArch64_map_insn(IsSigned ? "sbfiz" : "ubfiz"));
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0);
MI->flat_insn->detail->arm64.op_count++;
#ifndef CAPSTONE_DIET
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op1);
MI->flat_insn->detail->arm64.op_count++;
#ifndef CAPSTONE_DIET
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (Is64Bit ? 64 : 32) - (int)MCOperand_getImm(Op2);
MI->flat_insn->detail->arm64.op_count++;
#ifndef CAPSTONE_DIET
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int)MCOperand_getImm(Op3) + 1;
MI->flat_insn->detail->arm64.op_count++;
@ -225,15 +293,36 @@ void AArch64_printInst(MCInst *MI, SStream *O, void *Info)
MCInst_setOpcodePub(MI, AArch64_map_insn(IsSigned ? "sbfx" : "ubfx"));
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0);
MI->flat_insn->detail->arm64.op_count++;
#ifndef CAPSTONE_DIET
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op1);
MI->flat_insn->detail->arm64.op_count++;
#ifndef CAPSTONE_DIET
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int)MCOperand_getImm(Op2);
MI->flat_insn->detail->arm64.op_count++;
#ifndef CAPSTONE_DIET
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int)MCOperand_getImm(Op3) - (int)MCOperand_getImm(Op2) + 1;
MI->flat_insn->detail->arm64.op_count++;
@ -263,15 +352,36 @@ void AArch64_printInst(MCInst *MI, SStream *O, void *Info)
MCInst_setOpcodePub(MI, AArch64_map_insn("bfi"));
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0);
MI->flat_insn->detail->arm64.op_count++;
#ifndef CAPSTONE_DIET
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op2);
MI->flat_insn->detail->arm64.op_count++;
#ifndef CAPSTONE_DIET
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = LSB;
MI->flat_insn->detail->arm64.op_count++;
#ifndef CAPSTONE_DIET
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Width;
MI->flat_insn->detail->arm64.op_count++;
@ -292,15 +402,36 @@ void AArch64_printInst(MCInst *MI, SStream *O, void *Info)
MCInst_setOpcodePub(MI, AArch64_map_insn("bfxil"));
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0);
MI->flat_insn->detail->arm64.op_count++;
#ifndef CAPSTONE_DIET
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op2);
MI->flat_insn->detail->arm64.op_count++;
#ifndef CAPSTONE_DIET
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = LSB;
MI->flat_insn->detail->arm64.op_count++;
#ifndef CAPSTONE_DIET
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Width;
MI->flat_insn->detail->arm64.op_count++;
@ -565,6 +696,12 @@ static bool printSysAlias(MCInst *MI, SStream *O)
MCInst_setOpcodePub(MI, insn_id);
SStream_concat0(O, Asm);
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_SYS;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].sys = op_ic + op_dc + op_at + op_tlbi;
MI->flat_insn->detail->arm64.op_count++;
@ -574,6 +711,12 @@ static bool printSysAlias(MCInst *MI, SStream *O)
unsigned Reg = MCOperand_getReg(MCInst_getOperand(MI, 4));
SStream_concat(O, ", %s", getRegisterName(Reg, AArch64_NoRegAltName));
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Reg;
MI->flat_insn->detail->arm64.op_count++;
@ -600,6 +743,12 @@ static void printOperand(MCInst *MI, unsigned OpNo, SStream *O)
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.index = Reg;
}
} else {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Reg;
MI->flat_insn->detail->arm64.op_count++;
@ -622,6 +771,12 @@ static void printOperand(MCInst *MI, unsigned OpNo, SStream *O)
if (MI->csh->doing_mem) {
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = (int32_t)imm;
} else {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = imm;
MI->flat_insn->detail->arm64.op_count++;
@ -635,6 +790,12 @@ static void printHexImm(MCInst *MI, unsigned OpNo, SStream *O)
MCOperand *Op = MCInst_getOperand(MI, OpNo);
SStream_concat(O, "#%#llx", MCOperand_getImm(Op));
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int)MCOperand_getImm(Op);
MI->flat_insn->detail->arm64.op_count++;
@ -651,6 +812,12 @@ static void printPostIncOperand(MCInst *MI, unsigned OpNo,
if (Reg == AArch64_XZR) {
printInt32Bang(O, Imm);
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Imm;
MI->flat_insn->detail->arm64.op_count++;
@ -658,6 +825,12 @@ static void printPostIncOperand(MCInst *MI, unsigned OpNo,
} else {
SStream_concat0(O, getRegisterName(Reg, AArch64_NoRegAltName));
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Reg;
MI->flat_insn->detail->arm64.op_count++;
@ -679,6 +852,12 @@ static void printVRegOperand(MCInst *MI, unsigned OpNo, SStream *O)
unsigned Reg = MCOperand_getReg(Op);
SStream_concat0(O, getRegisterName(Reg, AArch64_vreg));
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = AArch64_map_vregister(Reg);
MI->flat_insn->detail->arm64.op_count++;
@ -691,6 +870,12 @@ static void printSysCROperand(MCInst *MI, unsigned OpNo, SStream *O)
//assert(Op.isImm() && "System instruction C[nm] operands must be immediates!");
SStream_concat(O, "c%u", MCOperand_getImm(Op));
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_CIMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int)MCOperand_getImm(Op);
MI->flat_insn->detail->arm64.op_count++;
@ -708,6 +893,12 @@ static void printAddSubImm(MCInst *MI, unsigned OpNum, SStream *O)
printInt32Bang(O, Val);
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Val;
MI->flat_insn->detail->arm64.op_count++;
@ -726,6 +917,12 @@ static void printLogicalImm32(MCInst *MI, unsigned OpNum, SStream *O)
printUInt32Bang(O, (int)Val);
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int)Val;
MI->flat_insn->detail->arm64.op_count++;
@ -754,6 +951,12 @@ static void printLogicalImm64(MCInst *MI, unsigned OpNum, SStream *O)
}
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int)Val;
MI->flat_insn->detail->arm64.op_count++;
@ -801,6 +1004,12 @@ static void printShiftedRegister(MCInst *MI, unsigned OpNum, SStream *O)
{
SStream_concat0(O, getRegisterName(MCOperand_getReg(MCInst_getOperand(MI, OpNum)), AArch64_NoRegAltName));
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
MI->flat_insn->detail->arm64.op_count++;
@ -887,6 +1096,12 @@ static void printExtendedRegister(MCInst *MI, unsigned OpNum, SStream *O)
SStream_concat0(O, getRegisterName(Reg, AArch64_NoRegAltName));
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Reg;
MI->flat_insn->detail->arm64.op_count++;
@ -981,6 +1196,12 @@ static void printImmScale(MCInst *MI, unsigned OpNum, SStream *O, int Scale)
if (MI->csh->doing_mem) {
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = (int)val;
} else {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int)val;
MI->flat_insn->detail->arm64.op_count++;
@ -999,6 +1220,12 @@ static void printUImm12Offset(MCInst *MI, unsigned OpNum, unsigned Scale, SStrea
if (MI->csh->doing_mem) {
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = (int)val;
} else {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int)val;
MI->flat_insn->detail->arm64.op_count++;
@ -1029,6 +1256,12 @@ static void printPrefetchOp(MCInst *MI, unsigned OpNum, SStream *O)
} else {
printInt32Bang(O, prfop);
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = prfop;
MI->flat_insn->detail->arm64.op_count++;
@ -1044,6 +1277,12 @@ static void printFPImmOperand(MCInst *MI, unsigned OpNum, SStream *O)
// 8 decimal places are enough to perfectly represent permitted floats.
SStream_concat(O, "#%.8f", FPImm);
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_FP;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].fp = FPImm;
MI->flat_insn->detail->arm64.op_count++;
@ -1135,6 +1374,12 @@ static void printVectorList(MCInst *MI, unsigned OpNum, SStream *O, char *Layout
if (i + 1 != NumRegs)
SStream_concat0(O, ", ");
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = AArch64_map_vregister(Reg);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].vas = vas;
@ -1251,6 +1496,12 @@ static void printAlignedLabel(MCInst *MI, unsigned OpNum, SStream *O)
uint64_t imm = (MCOperand_getImm(Op) * 4) + MI->address;
printUInt64Bang(O, imm);
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = imm;
MI->flat_insn->detail->arm64.op_count++;
@ -1273,6 +1524,12 @@ static void printAdrpLabel(MCInst *MI, unsigned OpNum, SStream *O)
SStream_concat(O, "#%"PRIu64, imm);
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = imm;
MI->flat_insn->detail->arm64.op_count++;
@ -1296,6 +1553,12 @@ static void printBarrierOption(MCInst *MI, unsigned OpNo, SStream *O)
if (Valid) {
SStream_concat0(O, Name);
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_BARRIER;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].barrier = Val;
MI->flat_insn->detail->arm64.op_count++;
@ -1303,6 +1566,12 @@ static void printBarrierOption(MCInst *MI, unsigned OpNo, SStream *O)
} else {
printUInt32Bang(O, Val);
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Val;
MI->flat_insn->detail->arm64.op_count++;
@ -1319,6 +1588,12 @@ static void printMRSSystemRegister(MCInst *MI, unsigned OpNo, SStream *O)
SStream_concat0(O, Name);
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG_MRS;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Val;
MI->flat_insn->detail->arm64.op_count++;
@ -1334,6 +1609,12 @@ static void printMSRSystemRegister(MCInst *MI, unsigned OpNo, SStream *O)
SStream_concat0(O, Name);
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG_MSR;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Val;
MI->flat_insn->detail->arm64.op_count++;
@ -1350,12 +1631,24 @@ static void printSystemPStateField(MCInst *MI, unsigned OpNo, SStream *O)
if (Valid) {
SStream_concat0(O, Name);
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_PSTATE;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].pstate = Val;
MI->flat_insn->detail->arm64.op_count++;
}
} else {
printInt32Bang(O, Val);
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Val;
MI->flat_insn->detail->arm64.op_count++;
@ -1368,6 +1661,12 @@ static void printSIMDType10Operand(MCInst *MI, unsigned OpNo, SStream *O)
uint64_t Val = AArch64_AM_decodeAdvSIMDModImmType10(RawVal);
SStream_concat(O, "#%#016llx", Val);
if (MI->csh->detail) {
#ifndef CAPSTONE_DIET
uint8_t access;
access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
MI->ac_idx++;
#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int)Val;
MI->flat_insn->detail->arm64.op_count++;

9381
arch/AArch64/AArch64Mapping.c
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File diff suppressed because it is too large Load Diff

6
arch/AArch64/AArch64Mapping.h
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@ -32,4 +32,10 @@ void arm64_op_addFP(MCInst *MI, float fp);
void arm64_op_addImm(MCInst *MI, int64_t imm);
cs_ac_type *arm64_get_op_access(cs_struct *h, unsigned int id);
void AArch64_reg_access(const cs_insn *insn,
cs_regs regs_read, uint8_t *regs_read_count,
cs_regs regs_write, uint8_t *regs_write_count);
#endif

9308
arch/AArch64/AArch64MappingInsnOp.inc
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File diff suppressed because it is too large Load Diff

3
arch/AArch64/AArch64Module.c
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@ -29,6 +29,9 @@ static cs_err init(cs_struct *ud)
ud->insn_name = AArch64_insn_name;
ud->group_name = AArch64_group_name;
ud->post_printer = AArch64_post_printer;
#ifndef CAPSTONE_DIET
ud->reg_access = AArch64_reg_access;
#endif
return CS_ERR_OK;
}

6657
arch/AArch64/ARMMappingInsnOp.inc
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File diff suppressed because it is too large Load Diff

5
include/capstone/arm64.h
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@ -372,6 +372,11 @@ typedef struct cs_arm64_op {
arm64_prefetch_op prefetch; // PRFM operation.
arm64_barrier_op barrier; // Memory barrier operation (ISB/DMB/DSB instructions).
};
// How is this operand accessed? (READ, WRITE or READ|WRITE)
// This field is combined of cs_ac_type.
// NOTE: this field is irrelevant if engine is compiled in DIET mode.
cs_ac_type access;
} cs_arm64_op;
// Instruction structure

38
tests/test_arm64.c
Unescape View File

@ -33,6 +33,8 @@ static void print_insn_detail(cs_insn *ins)
{
cs_arm64 *arm64;
int i;
cs_regs regs_read, regs_write;
uint8_t regs_read_count, regs_write_count;
// detail can be NULL if SKIPDATA option is turned ON
if (ins->detail == NULL)
@ -89,6 +91,21 @@ static void print_insn_detail(cs_insn *ins)
break;
}
uint8_t access = op->access;
switch(access) {
default:
break;
case CS_AC_READ:
printf("\t\toperands[%u].access: READ\n", i);
break;
case CS_AC_WRITE:
printf("\t\toperands[%u].access: WRITE\n", i);
break;
case CS_AC_READ | CS_AC_WRITE:
printf("\t\toperands[%u].access: READ | WRITE\n", i);
break;
}
if (op->shift.type != ARM64_SFT_INVALID &&
op->shift.value)
printf("\t\t\tShift: type = %u, value = %u\n",
@ -116,6 +133,27 @@ static void print_insn_detail(cs_insn *ins)
if (arm64->cc)
printf("\tCode-condition: %u\n", arm64->cc);
// Print out all registers accessed by this instruction (either implicit or explicit)
if (!cs_regs_access(handle, ins,
regs_read, &regs_read_count,
regs_write, &regs_write_count)) {
if (regs_read_count) {
printf("\tRegisters read:");
for(i = 0; i < regs_read_count; i++) {
printf(" %s", cs_reg_name(handle, regs_read[i]));
}
printf("\n");
}
if (regs_write_count) {
printf("\tRegisters modified:");
for(i = 0; i < regs_write_count; i++) {
printf(" %s", cs_reg_name(handle, regs_write[i]));
}
printf("\n");
}
}
printf("\n");
}

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