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Merge branch 'next' of https://github.com/aquynh/capstone into next

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test2
Nguyen Anh Quynh 10 years ago
parent b0cc71da59 8d2f38beed
commit 5be2592a57
28 changed files with 4069 additions and 565 deletions
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  1. 3
      .gitignore
  2. 75
      bindings/ocaml/capstone.ml
  3. 112
      bindings/ocaml/ocaml.c
  4. 65
      bindings/ocaml/test.ml
  5. 94
      bindings/ocaml/test_arm.ml
  6. 92
      bindings/ocaml/test_arm64.ml
  7. 66
      bindings/ocaml/test_detail.ml
  8. 75
      bindings/ocaml/test_mips.ml
  9. 74
      bindings/ocaml/test_ppc.ml
  10. 74
      bindings/ocaml/test_sparc.ml
  11. 75
      bindings/ocaml/test_systemz.ml
  12. 144
      bindings/ocaml/test_x86.ml
  13. 72
      bindings/ocaml/test_xcore.ml
  14. 2472
      xcode/Capstone.xcodeproj/project.pbxproj
  15. 7
      xcode/Capstone.xcodeproj/project.xcworkspace/contents.xcworkspacedata
  16. 86
      xcode/Capstone.xcodeproj/xcuserdata/felix.xcuserdatad/xcschemes/test.xcscheme
  17. 86
      xcode/Capstone.xcodeproj/xcuserdata/felix.xcuserdatad/xcschemes/test_arm.xcscheme
  18. 86
      xcode/Capstone.xcodeproj/xcuserdata/felix.xcuserdatad/xcschemes/test_arm64.xcscheme
  19. 86
      xcode/Capstone.xcodeproj/xcuserdata/felix.xcuserdatad/xcschemes/test_detail.xcscheme
  20. 86
      xcode/Capstone.xcodeproj/xcuserdata/felix.xcuserdatad/xcschemes/test_mips.xcscheme
  21. 86
      xcode/Capstone.xcodeproj/xcuserdata/felix.xcuserdatad/xcschemes/test_ppc.xcscheme
  22. 86
      xcode/Capstone.xcodeproj/xcuserdata/felix.xcuserdatad/xcschemes/test_skipdata.xcscheme
  23. 86
      xcode/Capstone.xcodeproj/xcuserdata/felix.xcuserdatad/xcschemes/test_sparc.xcscheme
  24. 86
      xcode/Capstone.xcodeproj/xcuserdata/felix.xcuserdatad/xcschemes/test_systemz.xcscheme
  25. 86
      xcode/Capstone.xcodeproj/xcuserdata/felix.xcuserdatad/xcschemes/test_x86.xcscheme
  26. 86
      xcode/Capstone.xcodeproj/xcuserdata/felix.xcuserdatad/xcschemes/test_xcore.xcscheme
  27. 162
      xcode/Capstone.xcodeproj/xcuserdata/felix.xcuserdatad/xcschemes/xcschememanagement.plist
  28. 26
      xcode/README.md

3
.gitignore vendored
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@ -79,6 +79,9 @@ ipch/
*.suo
*.user
# Xcode
xcode/Capstone.xcodeproj/xcuserdata
# suite/
test_arm_regression
test_arm_regression.o

75
bindings/ocaml/capstone.ml
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@ -47,13 +47,12 @@ type opt_type =
| CS_OPT_SKIPDATA_SETUP (* Setup user-defined function for SKIPDATA option *)
type opt_value =
| CS_OPT_OFF (* Turn OFF an option - default option of CS_OPT_DETAIL, CS_OPT_SKIPDATA. *)
| CS_OPT_ON (* Turn ON an option (CS_OPT_DETAIL, CS_OPT_SKIPDATA). *)
| CS_OPT_SYNTAX_DEFAULT (* Default asm syntax (CS_OPT_SYNTAX). *)
| CS_OPT_SYNTAX_INTEL (* X86 Intel asm syntax - default on X86 (CS_OPT_SYNTAX). *)
| CS_OPT_SYNTAX_ATT (* X86 ATT asm syntax (CS_OPT_SYNTAX). *)
| CS_OPT_SYNTAX_NOREGNAME (* Prints register name with only number (CS_OPT_SYNTAX) *)
let _CS_OPT_OFF = 0L;; (* Turn OFF an option - default option of CS_OPT_DETAIL, CS_OPT_SKIPDATA. *)
let _CS_OPT_ON = 3L;; (* Turn ON an option (CS_OPT_DETAIL, CS_OPT_SKIPDATA). *)
let _CS_OPT_SYNTAX_DEFAULT = 0L;; (* Default asm syntax (CS_OPT_SYNTAX). *)
let _CS_OPT_SYNTAX_INTEL = 1L;; (* X86 Intel asm syntax - default on X86 (CS_OPT_SYNTAX). *)
let _CS_OPT_SYNTAX_ATT = 2L;; (* X86 ATT asm syntax (CS_OPT_SYNTAX). *)
let _CS_OPT_SYNTAX_NOREGNAME = 3L;; (* Prints register name with only number (CS_OPT_SYNTAX) *)
type cs_arch =
@ -67,6 +66,11 @@ type cs_arch =
| CS_INFO_XCORE of cs_xcore
type csh = {
h: Int64.t;
a: arch;
}
type cs_insn0 = {
id: int;
address: int;
@ -80,13 +84,48 @@ type cs_insn0 = {
arch: cs_arch;
}
external cs_open: arch -> mode list -> Int64.t option = "ocaml_cs_open"
external _cs_open: arch -> mode list -> Int64.t option = "ocaml_open"
external cs_disasm_quick: arch -> mode list -> string -> Int64.t -> Int64.t -> cs_insn0 list = "ocaml_cs_disasm"
external _cs_disasm_internal: arch -> Int64.t -> string -> Int64.t -> Int64.t -> cs_insn0 list = "ocaml_cs_disasm_internal"
external cs_reg_name: Int64.t -> int -> string = "ocaml_register_name"
external cs_insn_name: Int64.t -> int -> string = "ocaml_instruction_name"
external cs_group_name: Int64.t -> int -> string = "ocaml_group_name"
external _cs_reg_name: Int64.t -> int -> string = "ocaml_register_name"
external _cs_insn_name: Int64.t -> int -> string = "ocaml_instruction_name"
external _cs_group_name: Int64.t -> int -> string = "ocaml_group_name"
external cs_version: unit -> int = "ocaml_version"
external _cs_option: Int64.t -> opt_type -> Int64.t -> int = "ocaml_option"
external _cs_close: Int64.t -> int = "ocaml_close"
let cs_open _arch _mode: csh = (
let _handle = _cs_open _arch _mode in (
match _handle with
| None -> { h = 0L; a = _arch }
| Some v -> { h = v; a = _arch }
);
);;
let cs_close handle = (
_cs_close handle.h;
)
let cs_option handle opt value = (
_cs_option handle.h opt value;
);;
let cs_disasm handle code address count = (
_cs_disasm_internal handle.a handle.h code address count;
);;
let cs_reg_name handle id = (
_cs_reg_name handle.h id;
);;
let cs_insn_name handle id = (
_cs_insn_name handle.h id;
);;
let cs_group_name handle id = (
_cs_group_name handle.h id;
);;
class cs_insn c a =
let csh = c in
@ -105,7 +144,9 @@ class cs_insn c a =
method regs_write = regs_write;
method groups = groups;
method arch = arch;
method insn_name = cs_insn_name csh id;
method reg_name id = _cs_reg_name csh.h id;
method insn_name id = _cs_insn_name csh.h id;
method group_name id = _cs_group_name csh.h id;
end;;
let cs_insn_group handle insn group_id =
@ -120,16 +161,10 @@ let cs_reg_write handle insn reg_id =
class cs a m =
let mode = m and arch = a in
let csh = cs_open arch mode in
let handle = cs_open arch mode in
object
val handle = match csh with
| None -> failwith "impossible to open an handle"
| Some v -> v
method get_csh = handle
method disasm code offset count =
let insns = (_cs_disasm_internal arch handle code offset count) in
let insns = (_cs_disasm_internal arch handle.h code offset count) in
List.map (fun x -> new cs_insn handle x) insns;
end;;

112
bindings/ocaml/ocaml.c
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@ -63,38 +63,46 @@ CAMLprim value _cs_disasm(cs_arch arch, csh handle, const uint8_t * code, size_t
Store_field(rec_insn, 5, caml_copy_string(insn[j-1].op_str));
// copy read registers
lcount = (insn[j-1]).detail->regs_read_count;
if (lcount) {
array = caml_alloc(lcount, 0);
for (i = 0; i < lcount; i++) {
Store_field(array, i, Val_int(insn[j-1].detail->regs_read[i]));
}
if (insn[0].detail) {
lcount = (insn[j-1]).detail->regs_read_count;
if (lcount) {
array = caml_alloc(lcount, 0);
for (i = 0; i < lcount; i++) {
Store_field(array, i, Val_int(insn[j-1].detail->regs_read[i]));
}
} else
array = Atom(0); // empty list
} else
array = Atom(0); // empty list
Store_field(rec_insn, 6, array);
lcount = (insn[j-1]).detail->regs_write_count;
if (lcount) {
array = caml_alloc(lcount, 0);
for (i = 0; i < lcount; i++) {
Store_field(array, i, Val_int(insn[j-1].detail->regs_write[i]));
}
if (insn[0].detail) {
lcount = (insn[j-1]).detail->regs_write_count;
if (lcount) {
array = caml_alloc(lcount, 0);
for (i = 0; i < lcount; i++) {
Store_field(array, i, Val_int(insn[j-1].detail->regs_write[i]));
}
} else
array = Atom(0); // empty list
} else
array = Atom(0); // empty list
Store_field(rec_insn, 7, array);
lcount = (insn[j-1]).detail->groups_count;
if (lcount) {
array = caml_alloc(lcount, 0);
for (i = 0; i < lcount; i++) {
Store_field(array, i, Val_int(insn[j-1].detail->groups[i]));
}
if (insn[0].detail) {
lcount = (insn[j-1]).detail->groups_count;
if (lcount) {
array = caml_alloc(lcount, 0);
for (i = 0; i < lcount; i++) {
Store_field(array, i, Val_int(insn[j-1].detail->groups[i]));
}
} else
array = Atom(0); // empty list
} else
array = Atom(0); // empty list
Store_field(rec_insn, 8, array);
if(insn[j-1].detail) {
if (insn[j-1].detail) {
switch(arch) {
case CS_ARCH_ARM:
arch_info = caml_alloc(1, 0);
@ -319,7 +327,7 @@ CAMLprim value _cs_disasm(cs_arch arch, csh handle, const uint8_t * code, size_t
// fill opcode
lcount = list_count(insn[j-1].detail->x86.opcode, ARR_SIZE(insn[j-1].detail->x86.opcode));
if(lcount) {
if (lcount) {
array = caml_alloc(lcount, 0);
for (i = 0; i < lcount; i++) {
Store_field(array, i, Val_int(insn[j-1].detail->x86.opcode[i]));
@ -701,9 +709,6 @@ CAMLprim value ocaml_cs_disasm(value _arch, value _mode, value _code, value _add
return Val_emptylist;
}
if (cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON) != CS_ERR_OK)
CAMLreturn(Val_int(0));
code = (uint8_t *)String_val(_code);
code_len = caml_string_length(_code);
addr = Int64_val(_addr);
@ -731,7 +736,7 @@ CAMLprim value ocaml_cs_disasm_internal(value _arch, value _handle, value _code,
CAMLreturn(_cs_disasm(arch, handle, code, code_len, addr, count));
}
CAMLprim value ocaml_cs_open(value _arch, value _mode)
CAMLprim value ocaml_open(value _arch, value _mode)
{
CAMLparam2(_arch, _mode);
CAMLlocal2(list, head);
@ -827,42 +832,77 @@ CAMLprim value ocaml_cs_open(value _arch, value _mode)
if (cs_open(arch, mode, &handle) != 0)
CAMLreturn(Val_int(0));
if (cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON) != 0)
CAMLreturn(Val_int(0));
CAMLlocal1(result);
result = caml_alloc(1, 0);
Store_field(result, 0, caml_copy_int64(handle));
CAMLreturn(result);
}
CAMLprim value ocaml_option(value _handle, value _opt, value _value)
{
CAMLparam3(_handle, _opt, _value);
cs_opt_type opt;
int err;
switch (Int_val(_opt)) {
case 0:
opt = CS_OPT_SYNTAX;
break;
case 1:
opt = CS_OPT_DETAIL;
break;
case 2:
opt = CS_OPT_MODE;
break;
case 3:
opt = CS_OPT_MEM;
break;
case 4:
opt = CS_OPT_SKIPDATA;
break;
case 5:
opt = CS_OPT_SKIPDATA_SETUP;
break;
default:
caml_invalid_argument("Invalid option");
CAMLreturn(Val_int(CS_ERR_OPTION));
}
err = cs_option(Int64_val(_handle), opt, Int64_val(_value));
CAMLreturn(Val_int(err));
}
CAMLprim value ocaml_register_name(value _handle, value _reg)
{
const char *name = cs_reg_name(Int64_val(_handle), Int_val(_reg));
if(!name) {
if (!name) {
caml_invalid_argument("invalid reg_id");
name = "invalid";
}
return caml_copy_string(name);
}
CAMLprim value ocaml_instruction_name(value _handle, value _insn)
{
const char *name = cs_insn_name(Int64_val(_handle), Int_val(_insn));
if(!name) {
if (!name) {
caml_invalid_argument("invalid insn_id");
name = "invalid";
}
return caml_copy_string(name);
}
CAMLprim value ocaml_group_name(value _handle, value _insn)
{
const char *name = cs_group_name(Int64_val(_handle), Int_val(_insn));
if(!name) {
if (!name) {
caml_invalid_argument("invalid insn_id");
name = "invalid";
}
return caml_copy_string(name);
}
@ -871,3 +911,13 @@ CAMLprim value ocaml_version(void)
int version = cs_version(NULL, NULL);
return Val_int(version);
}
CAMLprim value ocaml_close(value _handle)
{
CAMLparam1(_handle);
csh h;
h = Int64_val(_handle);
CAMLreturn(Val_int(cs_close(&h)));
}

65
bindings/ocaml/test.ml
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@ -22,23 +22,23 @@ let _SYSZ_CODE = "\xed\x00\x00\x00\x00\x1a\x5a\x0f\x1f\xff\xc2\x09\x80\x00\x00\x
let _XCORE_CODE = "\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10";;
let all_tests = [
(CS_ARCH_X86, [CS_MODE_16], _X86_CODE16, "X86 16bit (Intel syntax)", 0);
(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32bit (ATT syntax)", 0);
(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32 (Intel syntax)", 0);
(CS_ARCH_X86, [CS_MODE_64], _X86_CODE64, "X86 64 (Intel syntax)", 0);
(CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE, "ARM", 0);
(CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE2, "ARM: Cortex-A15 + NEON", 0);
(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE, "THUMB", 0);
(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE2, "THUMB-2", 0);
(CS_ARCH_ARM64, [CS_MODE_ARM], _ARM64_CODE, "ARM-64", 0);
(CS_ARCH_MIPS, [CS_MODE_32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)", 0);
(CS_ARCH_MIPS, [CS_MODE_64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)", 0);
(CS_ARCH_PPC, [CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64", 0);
(CS_ARCH_PPC, [CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64, print register with number only", 0);
(CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN], _SPARC_CODE, "Sparc", 0);
(CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN; CS_MODE_V9], _SPARCV9_CODE, "SparcV9", 0);
(CS_ARCH_SYSZ, [CS_MODE_LITTLE_ENDIAN], _SYSZ_CODE, "SystemZ", 0);
(CS_ARCH_XCORE, [CS_MODE_LITTLE_ENDIAN], _XCORE_CODE, "XCore", 0);
(CS_ARCH_X86, [CS_MODE_16], _X86_CODE16, "X86 16bit (Intel syntax)", 0L);
(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32bit (ATT syntax)", _CS_OPT_SYNTAX_ATT);
(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32 (Intel syntax)", 0L);
(CS_ARCH_X86, [CS_MODE_64], _X86_CODE64, "X86 64 (Intel syntax)", 0L);
(CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE, "ARM", 0L);
(CS_ARCH_ARM, [CS_MODE_ARM], _ARM_CODE2, "ARM: Cortex-A15 + NEON", 0L);
(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE, "THUMB", 0L);
(CS_ARCH_ARM, [CS_MODE_THUMB], _THUMB_CODE2, "THUMB-2", 0L);
(CS_ARCH_ARM64, [CS_MODE_ARM], _ARM64_CODE, "ARM-64", 0L);
(CS_ARCH_MIPS, [CS_MODE_32; CS_MODE_BIG_ENDIAN], _MIPS_CODE, "MIPS-32 (Big-endian)", 0L);
(CS_ARCH_MIPS, [CS_MODE_64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)", 0L);
(CS_ARCH_PPC, [CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64", 0L);
(CS_ARCH_PPC, [CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64, print register with number only", 0L);
(CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN], _SPARC_CODE, "Sparc", 0L);
(CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN; CS_MODE_V9], _SPARCV9_CODE, "SparcV9", 0L);
(CS_ARCH_SYSZ, [CS_MODE_LITTLE_ENDIAN], _SYSZ_CODE, "SystemZ", 0L);
(CS_ARCH_XCORE, [CS_MODE_LITTLE_ENDIAN], _XCORE_CODE, "XCore", 0L);
];;
@ -47,26 +47,21 @@ let print_insn insn =
let print_arch x =
let (arch, mode, code, comment, syntax) = x in
let insns = cs_disasm_quick arch mode code 0x1000L 0L in
let handle = cs_open arch mode in (
if syntax != 0L then (
let err = cs_option handle CS_OPT_SYNTAX syntax in
match err with
| _ -> ();
);
let insns = cs_disasm handle code 0x1000L 0L in (
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter print_insn insns;;
List.iter print_arch all_tests;;
let print_insn_cls insn =
printf "0x%x\t%s\t%s\n" insn#address insn#mnemonic insn#op_str;;
let print_arch_cls x =
let (arch, mode, code, comment, syntax) = x in (
let d = new cs arch mode in
let insns = d#disasm code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter print_insn_cls insns;
List.iter print_insn insns;
);
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
);;
List.iter print_arch_cls all_tests;;
List.iter print_arch all_tests;;

94
bindings/ocaml/test_arm.ml
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@ -29,19 +29,19 @@ let all_tests = [
];;
let print_op csh i op =
let print_op handle i op =
( match op.value with
| ARM_OP_INVALID _ -> (); (* this would never happens *)
| ARM_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name csh reg);
| ARM_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
| ARM_OP_CIMM imm -> printf "\t\top[%d]: C-IMM = %u\n" i imm;
| ARM_OP_PIMM imm -> printf "\t\top[%d]: P-IMM = %u\n" i imm;
| ARM_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
| ARM_OP_FP fp -> printf "\t\top[%d]: FP = %f\n" i fp;
| ARM_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
if mem.base != 0 then
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name csh mem.base);
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
if mem.index != 0 then
printf "\t\t\toperands[%u].mem.index: REG = %s\n" i (cs_reg_name csh mem.index);
printf "\t\t\toperands[%u].mem.index: REG = %s\n" i (cs_reg_name handle mem.index);
if mem.scale != 1 then
printf "\t\t\toperands[%u].mem.scale: %d\n" i mem.scale;
if mem.disp != 0 then
@ -56,68 +56,48 @@ let print_op csh i op =
();;
let print_detail csh arch =
match arch with
| CS_INFO_ARM64 _ -> ();
| CS_INFO_X86 _ -> ();
| CS_INFO_MIPS _ -> ();
| CS_INFO_PPC _ -> ();
| CS_INFO_SPARC _ -> ();
| CS_INFO_SYSZ _ -> ();
| CS_INFO_XCORE _ -> ();
| CS_INFO_ARM arm ->
if arm.cc != _ARM_CC_AL && arm.cc != _ARM_CC_INVALID then
printf "\tCode condition: %u\n" arm.cc;
if arm.update_flags then
printf "\tUpdate-flags: True\n";
if arm.writeback then
printf "\tWriteback: True\n";
(* print all operands info (type & value) *)
if (Array.length arm.operands) > 0 then (
printf "\top_count: %d\n" (Array.length arm.operands);
Array.iteri (print_op csh) arm.operands;
);
printf "\n";;
let print_detail handle insn =
match insn.arch with
| CS_INFO_ARM arm -> (
if arm.cc != _ARM_CC_AL && arm.cc != _ARM_CC_INVALID then
printf "\tCode condition: %u\n" arm.cc;
if arm.update_flags then
printf "\tUpdate-flags: True\n";
if arm.writeback then
printf "\tWriteback: True\n";
(* print all operands info (type & value) *)
if (Array.length arm.operands) > 0 then (
printf "\top_count: %d\n" (Array.length arm.operands);
Array.iteri (print_op handle) arm.operands;
);
printf "\n";
);
| _ -> ();
;;
let print_insn mode insn =
let print_insn handle insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
let csh = cs_open CS_ARCH_ARM mode in
match csh with
| None -> ()
| Some v -> print_detail v insn.arch
print_detail handle insn
let print_arch x =
let (arch, mode, code, comment) = x in
let insns = cs_disasm_quick arch mode code 0x1000L 0L in
let handle = cs_open arch mode in
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn mode) insns;;
List.iter (print_insn handle) insns;
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
;;
List.iter print_arch all_tests;;
(* all below code use OO class of Capstone *)
let print_insn_cls csh insn =
printf "0x%x\t%s\t%s\n" insn#address insn#mnemonic insn#op_str;
print_detail csh insn#arch;;
let print_arch_cls x =
let (arch, mode, code, comment) = x in (
let d = new cs arch mode in
let insns = d#disasm code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn_cls d#get_csh) insns;
);;
List.iter print_arch_cls all_tests;;

92
bindings/ocaml/test_arm64.ml
Unescape View File

@ -21,18 +21,18 @@ let all_tests = [
(CS_ARCH_ARM64, [CS_MODE_ARM], _ARM64_CODE, "ARM-64");
];;
let print_op csh i op =
let print_op handle i op =
( match op.value with
| ARM64_OP_INVALID _ -> (); (* this would never happens *)
| ARM64_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name csh reg);
| ARM64_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
| ARM64_OP_CIMM imm -> printf "\t\top[%d]: C-IMM = %u\n" i imm;
| ARM64_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
| ARM64_OP_FP fp -> printf "\t\top[%d]: FP = %f\n" i fp;
| ARM64_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
if mem.base != 0 then
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name csh mem.base);
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
if mem.index != 0 then
printf "\t\t\toperands[%u].mem.index: REG = %s\n" i (cs_reg_name csh mem.index);
printf "\t\t\toperands[%u].mem.index: REG = %s\n" i (cs_reg_name handle mem.index);
if mem.disp != 0 then
printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
);
@ -53,67 +53,49 @@ let print_op csh i op =
();;
let print_detail csh arch =
match arch with
| CS_INFO_ARM _ -> ();
| CS_INFO_MIPS _ -> ();
| CS_INFO_PPC _ -> ();
| CS_INFO_X86 _ -> ();
| CS_INFO_SPARC _ -> ();
| CS_INFO_SYSZ _ -> ();
| CS_INFO_XCORE _ -> ();
| CS_INFO_ARM64 arm64 ->
if arm64.cc != _ARM64_CC_AL && arm64.cc != _ARM64_CC_INVALID then
printf "\tCode condition: %u\n" arm64.cc;
if arm64.update_flags then
printf "\tUpdate-flags: True\n";
if arm64.writeback then
printf "\tWriteback: True\n";
(* print all operands info (type & value) *)
if (Array.length arm64.operands) > 0 then (
printf "\top_count: %d\n" (Array.length arm64.operands);
Array.iteri (print_op csh) arm64.operands;
);
printf "\n";;
let print_detail handle insn =
match insn.arch with
| CS_INFO_ARM64 arm64 -> (
if arm64.cc != _ARM64_CC_AL && arm64.cc != _ARM64_CC_INVALID then
printf "\tCode condition: %u\n" arm64.cc;
if arm64.update_flags then
printf "\tUpdate-flags: True\n";
if arm64.writeback then
printf "\tWriteback: True\n";
(* print all operands info (type & value) *)
if (Array.length arm64.operands) > 0 then (
printf "\top_count: %d\n" (Array.length arm64.operands);
Array.iteri (print_op handle) arm64.operands;
);
printf "\n";
)
| _ -> ();
;;
let print_insn mode insn =
let print_insn handle insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
let csh = cs_open CS_ARCH_ARM64 mode in
match csh with
| None -> ()
| Some v -> print_detail v insn.arch
print_detail handle insn
let print_arch x =
let (arch, mode, code, comment) = x in
let insns = cs_disasm_quick arch mode code 0x1000L 0L in
let handle = cs_open arch mode in
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn mode) insns;;
List.iter (print_insn handle) insns;
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
;;
List.iter print_arch all_tests;;
(* all below code use OO class of Capstone *)
let print_insn_cls csh insn =
printf "0x%x\t%s\t%s\n" insn#address insn#mnemonic insn#op_str;
print_detail csh insn#arch;;
let print_arch_cls x =
let (arch, mode, code, comment) = x in (
let d = new cs arch mode in
let insns = d#disasm code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn_cls d#get_csh) insns;
);;
List.iter print_arch_cls all_tests;;

66
bindings/ocaml/test_detail.ml
Unescape View File

@ -41,17 +41,17 @@ let all_tests = [
];;
let print_detail csh insn =
let print_detail handle insn =
(* print immediate operands *)
if (Array.length insn.regs_read) > 0 then begin
printf "\tImplicit registers read: ";
Array.iter (fun x -> printf "%s "(cs_reg_name csh x)) insn.regs_read;
Array.iter (fun x -> printf "%s "(cs_reg_name handle x)) insn.regs_read;
printf "\n";
end;
if (Array.length insn.regs_write) > 0 then begin
printf "\tImplicit registers written: ";
Array.iter (fun x -> printf "%s "(cs_reg_name csh x)) insn.regs_write;
Array.iter (fun x -> printf "%s "(cs_reg_name handle x)) insn.regs_write;
printf "\n";
end;
@ -63,61 +63,25 @@ let print_detail csh insn =
printf "\n";;
let print_insn mode arch insn =
let print_insn handle insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
let csh = cs_open arch mode in
match csh with
| None -> ()
| Some v -> print_detail v insn
print_detail handle insn
let print_arch x =
let (arch, mode, code, comment, syntax) = x in
let insns = cs_disasm_quick arch mode code 0x1000L 0L in
let handle = cs_open arch mode in
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn mode arch) insns;;
List.iter (print_insn handle) insns;
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
;;
List.iter print_arch all_tests;;
(* all below code use OO class of Capstone *)
let print_detail_cls arch csh insn =
(* print immediate operands *)
if (Array.length insn#regs_read) > 0 then begin
printf "\tImplicit registers read: ";
Array.iter (fun x -> printf "%s "(cs_reg_name csh x)) insn#regs_read;
printf "\n";
end;
if (Array.length insn#regs_write) > 0 then begin
printf "\tImplicit registers written: ";
Array.iter (fun x -> printf "%s "(cs_reg_name csh x)) insn#regs_write;
printf "\n";
end;
if (Array.length insn#groups) > 0 then begin
printf "\tThis instruction belongs to groups: ";
Array.iter (printf "%u ") insn#groups;
printf "\n";
end;
printf "\n";;
let print_insn_cls arch csh insn =
printf "0x%x\t%s\t%s\n" insn#address insn#mnemonic insn#op_str;
print_detail_cls arch csh insn;;
let print_arch_cls x =
let (arch, mode, code, comment, syntax) = x in
let d = new cs arch mode in
let insns = d#disasm code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn_cls arch (d#get_csh)) insns;
();;
List.iter print_arch_cls all_tests;;

75
bindings/ocaml/test_mips.ml
Unescape View File

@ -22,75 +22,54 @@ let all_tests = [
(CS_ARCH_MIPS, [CS_MODE_64; CS_MODE_LITTLE_ENDIAN], _MIPS_CODE2, "MIPS-64-EL (Little-endian)");
];;
let print_op csh i op =
let print_op handle i op =
( match op.value with
| MIPS_OP_INVALID _ -> (); (* this would never happens *)
| MIPS_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name csh reg);
| MIPS_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
| MIPS_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
| MIPS_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
if mem.base != 0 then
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name csh mem.base);
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
if mem.disp != 0 then
printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
);
);
();;
let print_detail csh arch =
match arch with
| CS_INFO_ARM _ -> ();
| CS_INFO_ARM64 _ -> ();
| CS_INFO_PPC _ -> ();
| CS_INFO_X86 _ -> ();
| CS_INFO_SPARC _ -> ();
| CS_INFO_SYSZ _ -> ();
| CS_INFO_XCORE _ -> ();
| CS_INFO_MIPS mips ->
(* print all operands info (type & value) *)
if (Array.length mips.operands) > 0 then (
printf "\top_count: %d\n" (Array.length mips.operands);
Array.iteri (print_op csh) mips.operands;
);
printf "\n";;
let print_detail handle insn =
match insn.arch with
| CS_INFO_MIPS mips -> (
(* print all operands info (type & value) *)
if (Array.length mips.operands) > 0 then (
printf "\top_count: %d\n" (Array.length mips.operands);
Array.iteri (print_op handle) mips.operands;
);
printf "\n";
);
| _ -> ();
;;
let print_insn mode insn =
let print_insn handle insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
let csh = cs_open CS_ARCH_MIPS mode in
match csh with
| None -> ()
| Some v -> print_detail v insn.arch
print_detail handle insn
let print_arch x =
let (arch, mode, code, comment) = x in
let insns = cs_disasm_quick arch mode code 0x1000L 0L in
let handle = cs_open arch mode in
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn mode) insns;;
List.iter (print_insn handle) insns;
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
;;
List.iter print_arch all_tests;;
(* all below code use OO class of Capstone *)
let print_insn_cls csh insn =
printf "0x%x\t%s\t%s\n" insn#address insn#mnemonic insn#op_str;
print_detail csh insn#arch;;
let print_arch_cls x =
let (arch, mode, code, comment) = x in (
let d = new cs arch mode in
let insns = d#disasm code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn_cls d#get_csh) insns;
);;
List.iter print_arch_cls all_tests;;

74
bindings/ocaml/test_ppc.ml
Unescape View File

@ -20,14 +20,14 @@ let all_tests = [
(CS_ARCH_PPC, [CS_MODE_32; CS_MODE_BIG_ENDIAN], _PPC_CODE, "PPC-64");
];;
let print_op csh i op =
let print_op handle i op =
( match op.value with
| PPC_OP_INVALID _ -> (); (* this would never happens *)
| PPC_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name csh reg);
| PPC_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
| PPC_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
| PPC_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
if mem.base != 0 then
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name csh mem.base);
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
if mem.disp != 0 then
printf "\t\t\toperands[%u].mem.disp: 0x%x\n" i mem.disp;
);
@ -35,59 +35,39 @@ let print_op csh i op =
();;
let print_detail csh arch =
match arch with
| CS_INFO_ARM _ -> ();
| CS_INFO_ARM64 _ -> ();
| CS_INFO_MIPS _ -> ();
| CS_INFO_X86 _ -> ();
| CS_INFO_SPARC _ -> ();
| CS_INFO_SYSZ _ -> ();
| CS_INFO_XCORE _ -> ();
| CS_INFO_PPC ppc ->
(* print all operands info (type & value) *)
if (Array.length ppc.operands) > 0 then (
printf "\top_count: %d\n" (Array.length ppc.operands);
Array.iteri (print_op csh) ppc.operands;
);
printf "\n";;
let print_detail handle insn =
match insn.arch with
| CS_INFO_PPC ppc -> (
(* print all operands info (type & value) *)
if (Array.length ppc.operands) > 0 then (
printf "\top_count: %d\n" (Array.length ppc.operands);
Array.iteri (print_op handle) ppc.operands;
);
printf "\n";
);
| _ -> ();
;;
let print_insn mode insn =
let print_insn handle insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
let csh = cs_open CS_ARCH_PPC mode in
match csh with
| None -> ()
| Some v -> print_detail v insn.arch
print_detail handle insn
let print_arch x =
let (arch, mode, code, comment) = x in
let insns = cs_disasm_quick arch mode code 0x1000L 0L in
let handle = cs_open arch mode in
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn mode) insns;;
List.iter (print_insn handle) insns;
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
;;
List.iter print_arch all_tests;;
(* all below code use OO class of Capstone *)
let print_insn_cls csh insn =
printf "0x%x\t%s\t%s\n" insn#address insn#mnemonic insn#op_str;
print_detail csh insn#arch;;
let print_arch_cls x =
let (arch, mode, code, comment) = x in (
let d = new cs arch mode in
let insns = d#disasm code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn_cls d#get_csh) insns;
);;
List.iter print_arch_cls all_tests;;

74
bindings/ocaml/test_sparc.ml
Unescape View File

@ -23,14 +23,14 @@ let all_tests = [
(CS_ARCH_SPARC, [CS_MODE_BIG_ENDIAN; CS_MODE_V9], _SPARCV9_CODE, "SparcV9");
];;
let print_op csh i op =
let print_op handle i op =
( match op.value with
| SPARC_OP_INVALID _ -> (); (* this would never happens *)
| SPARC_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name csh reg);
| SPARC_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
| SPARC_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
| SPARC_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
if mem.base != 0 then
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name csh mem.base);
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
if mem.index != 0 then
printf "\t\t\toperands[%u].mem.index: 0x%x\n" i mem.index;
if mem.disp != 0 then
@ -41,59 +41,39 @@ let print_op csh i op =
();;
let print_detail csh arch =
match arch with
| CS_INFO_ARM _ -> ();
| CS_INFO_ARM64 _ -> ();
| CS_INFO_MIPS _ -> ();
| CS_INFO_X86 _ -> ();
| CS_INFO_PPC _ -> ();
| CS_INFO_SYSZ _ -> ();
| CS_INFO_XCORE _ -> ();
| CS_INFO_SPARC sparc ->
(* print all operands info (type & value) *)
if (Array.length sparc.operands) > 0 then (
printf "\top_count: %d\n" (Array.length sparc.operands);
Array.iteri (print_op csh) sparc.operands;
);
printf "\n";;
let print_detail handle insn =
match insn.arch with
| CS_INFO_SPARC sparc -> (
(* print all operands info (type & value) *)
if (Array.length sparc.operands) > 0 then (
printf "\top_count: %d\n" (Array.length sparc.operands);
Array.iteri (print_op handle) sparc.operands;
);
printf "\n";
);
| _ -> ();
;;
let print_insn mode insn =
let print_insn handle insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
let csh = cs_open CS_ARCH_SPARC mode in
match csh with
| None -> ()
| Some v -> print_detail v insn.arch
print_detail handle insn
let print_arch x =
let (arch, mode, code, comment) = x in
let insns = cs_disasm_quick arch mode code 0x1000L 0L in
let handle = cs_open arch mode in
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn mode) insns;;
List.iter (print_insn handle) insns;
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
;;
List.iter print_arch all_tests;;
(* all below code use OO class of Capstone *)
let print_insn_cls csh insn =
printf "0x%x\t%s\t%s\n" insn#address insn#mnemonic insn#op_str;
print_detail csh insn#arch;;
let print_arch_cls x =
let (arch, mode, code, comment) = x in (
let d = new cs arch mode in
let insns = d#disasm code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn_cls d#get_csh) insns;
);;
List.iter print_arch_cls all_tests;;

75
bindings/ocaml/test_systemz.ml
Unescape View File

@ -22,15 +22,15 @@ let all_tests = [
(CS_ARCH_SYSZ, [CS_MODE_LITTLE_ENDIAN], _SYSZ_CODE, "SystemZ");
];;
let print_op csh i op =
let print_op handle i op =
( match op.value with
| SYSZ_OP_INVALID _ -> (); (* this would never happens *)
| SYSZ_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name csh reg);
| SYSZ_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
| SYSZ_OP_ACREG reg -> printf "\t\top[%d]: ACREG = %u\n" i reg;
| SYSZ_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
| SYSZ_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
if mem.base != 0 then
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name csh mem.base);
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
if mem.index != 0 then
printf "\t\t\toperands[%u].mem.index: 0x%x\n" i mem.index;
if mem.length != 0L then
@ -39,63 +39,42 @@ let print_op csh i op =
printf "\t\t\toperands[%u].mem.disp: 0x%Lx\n" i mem.disp;
);
);
();;
let print_detail csh arch =
match arch with
| CS_INFO_ARM _ -> ();
| CS_INFO_ARM64 _ -> ();
| CS_INFO_MIPS _ -> ();
| CS_INFO_X86 _ -> ();
| CS_INFO_PPC _ -> ();
| CS_INFO_SPARC _ -> ();
| CS_INFO_XCORE _ -> ();
| CS_INFO_SYSZ sysz ->
(* print all operands info (type & value) *)
if (Array.length sysz.operands) > 0 then (
printf "\top_count: %d\n" (Array.length sysz.operands);
Array.iteri (print_op csh) sysz.operands;
);
printf "\n";;
let print_detail handle insn =
match insn.arch with
| CS_INFO_SYSZ sysz -> (
(* print all operands info (type & value) *)
if (Array.length sysz.operands) > 0 then (
printf "\top_count: %d\n" (Array.length sysz.operands);
Array.iteri (print_op handle) sysz.operands;
);
printf "\n";
);
| _ -> ();
;;
let print_insn mode insn =
let print_insn handle insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
let csh = cs_open CS_ARCH_SYSZ mode in
match csh with
| None -> ()
| Some v -> print_detail v insn.arch
print_detail handle insn
let print_arch x =
let (arch, mode, code, comment) = x in
let insns = cs_disasm_quick arch mode code 0x1000L 0L in
let handle = cs_open arch mode in
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn mode) insns;;
List.iter (print_insn handle) insns;
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
;;
List.iter print_arch all_tests;;
(* all below code use OO class of Capstone *)
let print_insn_cls csh insn =
printf "0x%x\t%s\t%s\n" insn#address insn#mnemonic insn#op_str;
print_detail csh insn#arch;;
let print_arch_cls x =
let (arch, mode, code, comment) = x in (
let d = new cs arch mode in
let insns = d#disasm code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn_cls d#get_csh) insns;
);;
List.iter print_arch_cls all_tests;;

144
bindings/ocaml/test_x86.ml
Unescape View File

@ -21,23 +21,23 @@ let _X86_CODE64 = "\x55\x48\x8b\x05\xb8\x13\x00\x00";;
let all_tests = [
(CS_ARCH_X86, [CS_MODE_16], _X86_CODE16, "X86 16bit (Intel syntax)", 0);
(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32bit (ATT syntax)", 0);
(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32 (Intel syntax)", 0);
(CS_ARCH_X86, [CS_MODE_64], _X86_CODE64, "X86 64 (Intel syntax)", 0);
(CS_ARCH_X86, [CS_MODE_16], _X86_CODE16, "X86 16bit (Intel syntax)", 0L);
(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32bit (ATT syntax)", _CS_OPT_SYNTAX_ATT);
(CS_ARCH_X86, [CS_MODE_32], _X86_CODE32, "X86 32 (Intel syntax)", 0L);
(CS_ARCH_X86, [CS_MODE_64], _X86_CODE64, "X86 64 (Intel syntax)", 0L);
];;
let print_op csh i op =
let print_op handle i op =
( match op.value with
| X86_OP_INVALID _ -> (); (* this would never happens *)
| X86_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name csh reg);
| X86_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
| X86_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
| X86_OP_FP fp -> printf "\t\top[%d]: FP = %f\n" i fp;
| X86_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
if mem.base != 0 then
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name csh mem.base);
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
if mem.index != 0 then
printf "\t\t\toperands[%u].mem.index: REG = %s\n" i (cs_reg_name csh mem.index);
printf "\t\t\toperands[%u].mem.index: REG = %s\n" i (cs_reg_name handle mem.index);
if mem.scale != 1 then
printf "\t\t\toperands[%u].mem.scale: %d\n" i mem.scale;
if mem.disp != 0 then
@ -47,88 +47,72 @@ let print_op csh i op =
();;
let print_detail mode csh arch =
match arch with
| CS_INFO_ARM64 _ -> ();
| CS_INFO_ARM _ -> ();
| CS_INFO_MIPS _ -> ();
| CS_INFO_PPC _ -> ();
| CS_INFO_SPARC _ -> ();
| CS_INFO_SYSZ _ -> ();
| CS_INFO_XCORE _ -> ();
| CS_INFO_X86 x86 ->
print_string_hex "\tPrefix: " x86.prefix;
(* print instruction's opcode *)
print_string_hex "\tOpcode: " x86.opcode;
(* print operand's size, address size, displacement size & immediate size *)
printf "\taddr_size: %u\n" x86.addr_size;
(* print modRM byte *)
printf "\tmodrm: 0x%x\n" x86.modrm;
(* print displacement value *)
if x86.disp != 0 then
printf "\tdisp: 0x%x\n" x86.disp;
(* SIB is invalid in 16-bit mode *)
if not (List.mem CS_MODE_16 mode) then (
(* print SIB byte *)
printf "\tsib: 0x%x\n" x86.sib;
(* print sib index/scale/base (if applicable) *)
if x86.sib_index != _X86_REG_INVALID then
printf "\tsib_index: %s, sib_scale: %u, sib_base: %s\n"
(cs_reg_name csh x86.sib_index)
x86.sib_scale
(cs_reg_name csh x86.sib_base);
);
let print_detail handle mode insn =
match insn.arch with
| CS_INFO_X86 x86 -> (
print_string_hex "\tPrefix: " x86.prefix;
(* print instruction's opcode *)
print_string_hex "\tOpcode: " x86.opcode;
(* print operand's size, address size, displacement size & immediate size *)
printf "\taddr_size: %u\n" x86.addr_size;
(* print modRM byte *)
printf "\tmodrm: 0x%x\n" x86.modrm;
(* print displacement value *)
if x86.disp != 0 then
printf "\tdisp: 0x%x\n" x86.disp;
(* print all operands info (type & value) *)
if (Array.length x86.operands) > 0 then (
printf "\top_count: %d\n" (Array.length x86.operands);
Array.iteri (print_op csh) x86.operands;
(* SIB is invalid in 16-bit mode *)
if not (List.mem CS_MODE_16 mode) then (
(* print SIB byte *)
printf "\tsib: 0x%x\n" x86.sib;
(* print sib index/scale/base (if applicable) *)
if x86.sib_index != _X86_REG_INVALID then
printf "\tsib_index: %s, sib_scale: %u, sib_base: %s\n"
(cs_reg_name handle x86.sib_index)
x86.sib_scale
(cs_reg_name handle x86.sib_base);
);
(* print all operands info (type & value) *)
if (Array.length x86.operands) > 0 then (
printf "\top_count: %d\n" (Array.length x86.operands);
Array.iteri (print_op handle) x86.operands;
);
printf "\n";
);
printf "\n";;
| _ -> ();
;;
let print_insn mode insn =
let print_insn handle mode insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
let csh = cs_open CS_ARCH_X86 mode in
match csh with
| None -> ()
| Some v -> print_detail mode v insn.arch
print_detail handle mode insn
let print_arch x =
let (arch, mode, code, comment, syntax) = x in
let insns = cs_disasm_quick arch mode code 0x1000L 0L in
let handle = cs_open arch mode in (
if syntax != 0L then (
let err = cs_option handle CS_OPT_SYNTAX syntax in
match err with
| _ -> ();
);
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in (
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn mode) insns;;
List.iter print_arch all_tests;;
(* all below code use OO class of Capstone *)
let print_insn_cls mode csh insn =
printf "0x%x\t%s\t%s\n" insn#address insn#mnemonic insn#op_str;
print_string_hex "\tbytes: " insn#bytes;
print_detail mode csh insn#arch;;
let print_arch_cls x =
let (arch, mode, code, comment, syntax) = x in (
let d = new cs arch mode in
let insns = d#disasm code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn_cls mode d#get_csh) insns;
List.iter (print_insn handle mode) insns;
);
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
);;
List.iter print_arch_cls all_tests;;
List.iter print_arch all_tests;;

72
bindings/ocaml/test_xcore.ml
Unescape View File

@ -20,14 +20,14 @@ let all_tests = [
(CS_ARCH_XCORE, [CS_MODE_LITTLE_ENDIAN], _XCORE_CODE, "XCore");
];;
let print_op csh i op =
let print_op handle i op =
( match op.value with
| XCORE_OP_INVALID _ -> (); (* this would never happens *)
| XCORE_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name csh reg);
| XCORE_OP_REG reg -> printf "\t\top[%d]: REG = %s\n" i (cs_reg_name handle reg);
| XCORE_OP_IMM imm -> printf "\t\top[%d]: IMM = 0x%x\n" i imm;
| XCORE_OP_MEM mem -> ( printf "\t\top[%d]: MEM\n" i;
if mem.base != 0 then
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name csh mem.base);
printf "\t\t\toperands[%u].mem.base: REG = %s\n" i (cs_reg_name handle mem.base);
if mem.index != 0 then
printf "\t\t\toperands[%u].mem.index: 0x%x\n" i mem.index;
if mem.disp != 0 then
@ -40,59 +40,39 @@ let print_op csh i op =
();;
let print_detail csh arch =
match arch with
| CS_INFO_ARM _ -> ();
| CS_INFO_ARM64 _ -> ();
| CS_INFO_MIPS _ -> ();
| CS_INFO_X86 _ -> ();
| CS_INFO_PPC _ -> ();
| CS_INFO_SPARC _ -> ();
| CS_INFO_SYSZ _ -> ();
let print_detail handle insn =
match insn.arch with
| CS_INFO_XCORE xcore -> (
(* print all operands info (type & value) *)
if (Array.length xcore.operands) > 0 then (
printf "\top_count: %d\n" (Array.length xcore.operands);
Array.iteri (print_op csh) xcore.operands;
);
printf "\n";
);;
(* print all operands info (type & value) *)
if (Array.length xcore.operands) > 0 then (
printf "\top_count: %d\n" (Array.length xcore.operands);
Array.iteri (print_op handle) xcore.operands;
);
printf "\n";
);
| _ -> ();
;;
let print_insn mode insn =
let print_insn handle insn =
printf "0x%x\t%s\t%s\n" insn.address insn.mnemonic insn.op_str;
let csh = cs_open CS_ARCH_XCORE mode in
match csh with
| None -> ()
| Some v -> print_detail v insn.arch
print_detail handle insn
let print_arch x =
let (arch, mode, code, comment) = x in
let insns = cs_disasm_quick arch mode code 0x1000L 0L in
let handle = cs_open arch mode in
let err = cs_option handle CS_OPT_DETAIL _CS_OPT_ON in
match err with
| _ -> ();
let insns = cs_disasm handle code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn mode) insns;;
List.iter (print_insn handle) insns;
match cs_close handle with
| 0 -> ();
| _ -> printf "Failed to close handle";
;;
List.iter print_arch all_tests;;
(* all below code use OO class of Capstone *)
let print_insn_cls csh insn =
printf "0x%x\t%s\t%s\n" insn#address insn#mnemonic insn#op_str;
print_detail csh insn#arch;;
let print_arch_cls x =
let (arch, mode, code, comment) = x in (
let d = new cs arch mode in
let insns = d#disasm code 0x1000L 0L in
printf "*************\n";
printf "Platform: %s\n" comment;
List.iter (print_insn_cls d#get_csh) insns;
);;
List.iter print_arch_cls all_tests;;

2472
xcode/Capstone.xcodeproj/project.pbxproj
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7
xcode/Capstone.xcodeproj/project.xcworkspace/contents.xcworkspacedata generated
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@ -0,0 +1,7 @@
<?xml version="1.0" encoding="UTF-8"?>
<Workspace
version = "1.0">
<FileRef
location = "self:Capstone.xcodeproj">
</FileRef>
</Workspace>

86
xcode/Capstone.xcodeproj/xcuserdata/felix.xcuserdatad/xcschemes/test.xcscheme
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@ -0,0 +1,86 @@
<?xml version="1.0" encoding="UTF-8"?>
<Scheme
LastUpgradeVersion = "0610"
version = "1.3">
<BuildAction
parallelizeBuildables = "YES"
buildImplicitDependencies = "YES">
<BuildActionEntries>
<BuildActionEntry
buildForTesting = "YES"
buildForRunning = "YES"
buildForProfiling = "YES"
buildForArchiving = "YES"
buildForAnalyzing = "YES">
<BuildableReference
BuildableIdentifier = "primary"
BlueprintIdentifier = "DC474E6319DDEA5F00BCA449"
BuildableName = "test"
BlueprintName = "test"
ReferencedContainer = "container:Capstone.xcodeproj">
</BuildableReference>
</BuildActionEntry>
</BuildActionEntries>
</BuildAction>
<TestAction
selectedDebuggerIdentifier = "Xcode.DebuggerFoundation.Debugger.LLDB"
selectedLauncherIdentifier = "Xcode.DebuggerFoundation.Launcher.LLDB"
shouldUseLaunchSchemeArgsEnv = "YES"
buildConfiguration = "Debug">
<Testables>
</Testables>
<MacroExpansion>
<BuildableReference
BuildableIdentifier = "primary"
BlueprintIdentifier = "DC474E6319DDEA5F00BCA449"
BuildableName = "test"
BlueprintName = "test"
ReferencedContainer = "container:Capstone.xcodeproj">
</BuildableReference>
</MacroExpansion>
</TestAction>
<LaunchAction
selectedDebuggerIdentifier = "Xcode.DebuggerFoundation.Debugger.LLDB"
selectedLauncherIdentifier = "Xcode.DebuggerFoundation.Launcher.LLDB"
launchStyle = "0"
useCustomWorkingDirectory = "NO"
buildConfiguration = "Debug"
ignoresPersistentStateOnLaunch = "NO"
debugDocumentVersioning = "YES"
allowLocationSimulation = "YES">
<BuildableProductRunnable>
<BuildableReference
BuildableIdentifier = "primary"
BlueprintIdentifier = "DC474E6319DDEA5F00BCA449"
BuildableName = "test"
BlueprintName = "test"
ReferencedContainer = "container:Capstone.xcodeproj">
</BuildableReference>
</BuildableProductRunnable>
<AdditionalOptions>
</AdditionalOptions>
</LaunchAction>
<ProfileAction
shouldUseLaunchSchemeArgsEnv = "YES"
savedToolIdentifier = ""
useCustomWorkingDirectory = "NO"
buildConfiguration = "Release"
debugDocumentVersioning = "YES">
<BuildableProductRunnable>
<BuildableReference
BuildableIdentifier = "primary"
BlueprintIdentifier = "DC474E6319DDEA5F00BCA449"
BuildableName = "test"
BlueprintName = "test"
ReferencedContainer = "container:Capstone.xcodeproj">
</BuildableReference>
</BuildableProductRunnable>
</ProfileAction>
<AnalyzeAction
buildConfiguration = "Debug">
</AnalyzeAction>
<ArchiveAction
buildConfiguration = "Release"
revealArchiveInOrganizer = "YES">
</ArchiveAction>
</Scheme>

86
xcode/Capstone.xcodeproj/xcuserdata/felix.xcuserdatad/xcschemes/test_arm.xcscheme
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@ -0,0 +1,86 @@
<?xml version="1.0" encoding="UTF-8"?>
<Scheme
LastUpgradeVersion = "0610"
version = "1.3">
<BuildAction
parallelizeBuildables = "YES"
buildImplicitDependencies = "YES">
<BuildActionEntries>
<BuildActionEntry
buildForTesting = "YES"
buildForRunning = "YES"
buildForProfiling = "YES"
buildForArchiving = "YES"
buildForAnalyzing = "YES">
<BuildableReference
BuildableIdentifier = "primary"
BlueprintIdentifier = "DC474E8519DDEAA200BCA449"
BuildableName = "test_arm"
BlueprintName = "test_arm"
ReferencedContainer = "container:Capstone.xcodeproj">
</BuildableReference>
</BuildActionEntry>
</BuildActionEntries>
</BuildAction>
<TestAction
selectedDebuggerIdentifier = "Xcode.DebuggerFoundation.Debugger.LLDB"
selectedLauncherIdentifier = "Xcode.DebuggerFoundation.Launcher.LLDB"
shouldUseLaunchSchemeArgsEnv = "YES"
buildConfiguration = "Debug">
<Testables>
</Testables>
<MacroExpansion>
<BuildableReference
BuildableIdentifier = "primary"
BlueprintIdentifier = "DC474E8519DDEAA200BCA449"
BuildableName = "test_arm"
BlueprintName = "test_arm"
ReferencedContainer = "container:Capstone.xcodeproj">
</BuildableReference>
</MacroExpansion>
</TestAction>
<LaunchAction
selectedDebuggerIdentifier = "Xcode.DebuggerFoundation.Debugger.LLDB"
selectedLauncherIdentifier = "Xcode.DebuggerFoundation.Launcher.LLDB"
launchStyle = "0"
useCustomWorkingDirectory = "NO"
buildConfiguration = "Debug"
ignoresPersistentStateOnLaunch = "NO"
debugDocumentVersioning = "YES"
allowLocationSimulation = "YES">
<BuildableProductRunnable>
<BuildableReference
BuildableIdentifier = "primary"
BlueprintIdentifier = "DC474E8519DDEAA200BCA449"
BuildableName = "test_arm"
BlueprintName = "test_arm"
ReferencedContainer = "container:Capstone.xcodeproj">
</BuildableReference>
</BuildableProductRunnable>
<AdditionalOptions>
</AdditionalOptions>
</LaunchAction>
<ProfileAction
shouldUseLaunchSchemeArgsEnv = "YES"
savedToolIdentifier = ""
useCustomWorkingDirectory = "NO"
buildConfiguration = "Release"
debugDocumentVersioning = "YES">
<BuildableProductRunnable>
<BuildableReference
BuildableIdentifier = "primary"
BlueprintIdentifier = "DC474E8519DDEAA200BCA449"
BuildableName = "test_arm"
BlueprintName = "test_arm"
ReferencedContainer = "container:Capstone.xcodeproj">
</BuildableReference>
</BuildableProductRunnable>
</ProfileAction>
<AnalyzeAction
buildConfiguration = "Debug">
</AnalyzeAction>
<ArchiveAction
buildConfiguration = "Release"
revealArchiveInOrganizer = "YES">
</ArchiveAction>
</Scheme>

86
xcode/Capstone.xcodeproj/xcuserdata/felix.xcuserdatad/xcschemes/test_arm64.xcscheme
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@ -0,0 +1,86 @@
<?xml version="1.0" encoding="UTF-8"?>
<Scheme
LastUpgradeVersion = "0610"
version = "1.3">
<BuildAction
parallelizeBuildables = "YES"
buildImplicitDependencies = "YES">
<BuildActionEntries>
<BuildActionEntry
buildForTesting = "YES"
buildForRunning = "YES"
buildForProfiling = "YES"
buildForArchiving = "YES"
buildForAnalyzing = "YES">
<BuildableReference
BuildableIdentifier = "primary"
BlueprintIdentifier = "DC474EE919DDEAE400BCA449"
BuildableName = "test_arm64"
BlueprintName = "test_arm64"
ReferencedContainer = "container:Capstone.xcodeproj">
</BuildableReference>
</BuildActionEntry>
</BuildActionEntries>
</BuildAction>
<TestAction
selectedDebuggerIdentifier = "Xcode.DebuggerFoundation.Debugger.LLDB"
selectedLauncherIdentifier = "Xcode.DebuggerFoundation.Launcher.LLDB"
shouldUseLaunchSchemeArgsEnv = "YES"
buildConfiguration = "Debug">
<Testables>
</Testables>
<MacroExpansion>
<BuildableReference
BuildableIdentifier = "primary"
BlueprintIdentifier = "DC474EE919DDEAE400BCA449"
BuildableName = "test_arm64"
BlueprintName = "test_arm64"
ReferencedContainer = "container:Capstone.xcodeproj">
</BuildableReference>
</MacroExpansion>
</TestAction>
<LaunchAction
selectedDebuggerIdentifier = "Xcode.DebuggerFoundation.Debugger.LLDB"
selectedLauncherIdentifier = "Xcode.DebuggerFoundation.Launcher.LLDB"
launchStyle = "0"
useCustomWorkingDirectory = "NO"
buildConfiguration = "Debug"
ignoresPersistentStateOnLaunch = "NO"
debugDocumentVersioning = "YES"
allowLocationSimulation = "YES">
<BuildableProductRunnable>
<BuildableReference
BuildableIdentifier = "primary"
BlueprintIdentifier = "DC474EE919DDEAE400BCA449"
BuildableName = "test_arm64"
BlueprintName = "test_arm64"
ReferencedContainer = "container:Capstone.xcodeproj">
</BuildableReference>
</BuildableProductRunnable>
<AdditionalOptions>
</AdditionalOptions>
</LaunchAction>
<ProfileAction
shouldUseLaunchSchemeArgsEnv = "YES"
savedToolIdentifier = ""
useCustomWorkingDirectory = "NO"
buildConfiguration = "Release"
debugDocumentVersioning = "YES">
<BuildableProductRunnable>
<BuildableReference
BuildableIdentifier = "primary"
BlueprintIdentifier = "DC474EE919DDEAE400BCA449"
BuildableName = "test_arm64"
BlueprintName = "test_arm64"
ReferencedContainer = "container:Capstone.xcodeproj">
</BuildableReference>
</BuildableProductRunnable>
</ProfileAction>
<AnalyzeAction
buildConfiguration = "Debug">
</AnalyzeAction>
<ArchiveAction
buildConfiguration = "Release"
revealArchiveInOrganizer = "YES">
</ArchiveAction>
</Scheme>

86
xcode/Capstone.xcodeproj/xcuserdata/felix.xcuserdatad/xcschemes/test_detail.xcscheme
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@ -0,0 +1,86 @@
<?xml version="1.0" encoding="UTF-8"?>
<Scheme
LastUpgradeVersion = "0610"
version = "1.3">
<BuildAction
parallelizeBuildables = "YES"
buildImplicitDependencies = "YES">
<BuildActionEntries>
<BuildActionEntry
buildForTesting = "YES"
buildForRunning = "YES"
buildForProfiling = "YES"
buildForArchiving = "YES"
buildForAnalyzing = "YES">
<BuildableReference
BuildableIdentifier = "primary"
BlueprintIdentifier = "DC474E9019DDEAA700BCA449"
BuildableName = "test_detail"
BlueprintName = "test_detail"
ReferencedContainer = "container:Capstone.xcodeproj">
</BuildableReference>
</BuildActionEntry>
</BuildActionEntries>
</BuildAction>
<TestAction
selectedDebuggerIdentifier = "Xcode.DebuggerFoundation.Debugger.LLDB"
selectedLauncherIdentifier = "Xcode.DebuggerFoundation.Launcher.LLDB"
shouldUseLaunchSchemeArgsEnv = "YES"
buildConfiguration = "Debug">
<Testables>
</Testables>
<MacroExpansion>
<BuildableReference
BuildableIdentifier = "primary"
BlueprintIdentifier = "DC474E9019DDEAA700BCA449"
BuildableName = "test_detail"
BlueprintName = "test_detail"
ReferencedContainer = "container:Capstone.xcodeproj">
</BuildableReference>
</MacroExpansion>
</TestAction>
<LaunchAction
selectedDebuggerIdentifier = "Xcode.DebuggerFoundation.Debugger.LLDB"
selectedLauncherIdentifier = "Xcode.DebuggerFoundation.Launcher.LLDB"
launchStyle = "0"
useCustomWorkingDirectory = "NO"
buildConfiguration = "Debug"
ignoresPersistentStateOnLaunch = "NO"
debugDocumentVersioning = "YES"
allowLocationSimulation = "YES">
<BuildableProductRunnable>
<BuildableReference
BuildableIdentifier = "primary"
BlueprintIdentifier = "DC474E9019DDEAA700BCA449"
BuildableName = "test_detail"
BlueprintName = "test_detail"
ReferencedContainer = "container:Capstone.xcodeproj">
</BuildableReference>
</BuildableProductRunnable>
<AdditionalOptions>
</AdditionalOptions>
</LaunchAction>
<ProfileAction
shouldUseLaunchSchemeArgsEnv = "YES"
savedToolIdentifier = ""
useCustomWorkingDirectory = "NO"
buildConfiguration = "Release"
debugDocumentVersioning = "YES">
<BuildableProductRunnable>
<BuildableReference
BuildableIdentifier = "primary"
BlueprintIdentifier = "DC474E9019DDEAA700BCA449"
BuildableName = "test_detail"
BlueprintName = "test_detail"
ReferencedContainer = "container:Capstone.xcodeproj">
</BuildableReference>
</BuildableProductRunnable>
</ProfileAction>
<AnalyzeAction
buildConfiguration = "Debug">
</AnalyzeAction>
<ArchiveAction
buildConfiguration = "Release"
revealArchiveInOrganizer = "YES">
</ArchiveAction>
</Scheme>

86
xcode/Capstone.xcodeproj/xcuserdata/felix.xcuserdatad/xcschemes/test_mips.xcscheme
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@ -0,0 +1,86 @@
<?xml version="1.0" encoding="UTF-8"?>
<Scheme
LastUpgradeVersion = "0610"
version = "1.3">
<BuildAction
parallelizeBuildables = "YES"
buildImplicitDependencies = "YES">
<BuildActionEntries>
<BuildActionEntry
buildForTesting = "YES"
buildForRunning = "YES"
buildForProfiling = "YES"
buildForArchiving = "YES"
buildForAnalyzing = "YES">
<BuildableReference
BuildableIdentifier = "primary"
BlueprintIdentifier = "DC474E9B19DDEAAC00BCA449"
BuildableName = "test_mips"
BlueprintName = "test_mips"
ReferencedContainer = "container:Capstone.xcodeproj">
</BuildableReference>
</BuildActionEntry>
</BuildActionEntries>
</BuildAction>
<TestAction
selectedDebuggerIdentifier = "Xcode.DebuggerFoundation.Debugger.LLDB"
selectedLauncherIdentifier = "Xcode.DebuggerFoundation.Launcher.LLDB"
shouldUseLaunchSchemeArgsEnv = "YES"
buildConfiguration = "Debug">
<Testables>
</Testables>
<MacroExpansion>
<BuildableReference
BuildableIdentifier = "primary"
BlueprintIdentifier = "DC474E9B19DDEAAC00BCA449"
BuildableName = "test_mips"
BlueprintName = "test_mips"
ReferencedContainer = "container:Capstone.xcodeproj">
</BuildableReference>
</MacroExpansion>
</TestAction>
<LaunchAction
selectedDebuggerIdentifier = "Xcode.DebuggerFoundation.Debugger.LLDB"
selectedLauncherIdentifier = "Xcode.DebuggerFoundation.Launcher.LLDB"
launchStyle = "0"
useCustomWorkingDirectory = "NO"
buildConfiguration = "Debug"
ignoresPersistentStateOnLaunch = "NO"
debugDocumentVersioning = "YES"
allowLocationSimulation = "YES">
<BuildableProductRunnable>
<BuildableReference
BuildableIdentifier = "primary"
BlueprintIdentifier = "DC474E9B19DDEAAC00BCA449"
BuildableName = "test_mips"
BlueprintName = "test_mips"
ReferencedContainer = "container:Capstone.xcodeproj">
</BuildableReference>
</BuildableProductRunnable>
<AdditionalOptions>
</AdditionalOptions>
</LaunchAction>
<ProfileAction
shouldUseLaunchSchemeArgsEnv = "YES"
savedToolIdentifier = ""
useCustomWorkingDirectory = "NO"
buildConfiguration = "Release"
debugDocumentVersioning = "YES">
<BuildableProductRunnable>
<BuildableReference
BuildableIdentifier = "primary"
BlueprintIdentifier = "DC474E9B19DDEAAC00BCA449"
BuildableName = "test_mips"
BlueprintName = "test_mips"
ReferencedContainer = "container:Capstone.xcodeproj">
</BuildableReference>
</BuildableProductRunnable>
</ProfileAction>
<AnalyzeAction
buildConfiguration = "Debug">
</AnalyzeAction>
<ArchiveAction
buildConfiguration = "Release"
revealArchiveInOrganizer = "YES">
</ArchiveAction>
</Scheme>

86
xcode/Capstone.xcodeproj/xcuserdata/felix.xcuserdatad/xcschemes/test_ppc.xcscheme
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@ -0,0 +1,86 @@
<?xml version="1.0" encoding="UTF-8"?>
<Scheme
LastUpgradeVersion = "0610"
version = "1.3">
<BuildAction
parallelizeBuildables = "YES"
buildImplicitDependencies = "YES">
<BuildActionEntries>
<BuildActionEntry
buildForTesting = "YES"
buildForRunning = "YES"
buildForProfiling = "YES"
buildForArchiving = "YES"
buildForAnalyzing = "YES">
<BuildableReference
BuildableIdentifier = "primary"
BlueprintIdentifier = "DC474EA619DDEAB000BCA449"
BuildableName = "test_ppc"
BlueprintName = "test_ppc"
ReferencedContainer = "container:Capstone.xcodeproj">
</BuildableReference>
</BuildActionEntry>
</BuildActionEntries>
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86
xcode/Capstone.xcodeproj/xcuserdata/felix.xcuserdatad/xcschemes/test_x86.xcscheme
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86
xcode/Capstone.xcodeproj/xcuserdata/felix.xcuserdatad/xcschemes/test_xcore.xcscheme
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xcode/README.md
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Xcode Project for Capstone
================================================================================
The *Capstone.xcodeproj* project is an Xcode project that mimicks the Visual
Studio solution for Capstone. It embeds nicely into Xcode workspaces. It has 13
targets, two of which are the most likely to be of interest:
* CapstoneStatic, producing `libcapstone.a`, Capstone as a static library;
* CapstoneDynamic, producing `libcapstone.dylib`, Capstone as a shared library;
* test, test_arm, test_arm64, test_detail, test_mips, test_ppc, test_skipdata,
test_sparc, test_systemz, test_xcore, testing all the things.
The project is configured to include all targets and use the system
implementations of `malloc`, `calloc`, `realloc`, `free` and `vsnprintf`. This
can be modified by editing the *Preprocessor Macros* build setting of either
CapstoneStatic or CapstoneDynamic, whichever you plan to use. These settings are
all at the target level: no specific overrides were used at the project level.
### A Word of Warning: Static vs. Shared Library
There is a bug in how Xcode handles static libraries and dynamic libraries of
the same name. Currently, if you integrate the Capstone project in a workspace
and both the static *and* the dynamic libraries are built, if you try to link
against either, you will *always* link against the dynamic one. To work around
this issue, you can avoid building the dynamic library if you don't plan to use
it, or you could change the *Product Name* build setting of either.
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