diff --git a/arch/ARM/ARMInstPrinter.c b/arch/ARM/ARMInstPrinter.c
index 7d861620..cae15702 100644
--- a/arch/ARM/ARMInstPrinter.c
+++ b/arch/ARM/ARMInstPrinter.c
@@ -121,20 +121,18 @@ static void printModImmOperand(MCInst *MI, unsigned OpNum, SStream *O);
 
 static void printInstSyncBOption(MCInst *MI, unsigned OpNum, SStream *O);
 
+#ifndef CAPSTONE_DIET
 // copy & normalize access info
 static uint8_t get_op_access(cs_struct *h, unsigned int id, unsigned int index)
 {
-#ifndef CAPSTONE_DIET
 	uint8_t *arr = ARM_get_op_access(h, id);
 
 	if (arr[index] == CS_AC_IGNORE)
 		return 0;
 
 	return arr[index];
-#else
-	return 0;
-#endif
 }
+#endif
 
 static void set_mem_access(MCInst *MI, bool status)
 {
diff --git a/arch/X86/X86Mapping.c b/arch/X86/X86Mapping.c
index e5508aca..b28491a0 100644
--- a/arch/X86/X86Mapping.c
+++ b/arch/X86/X86Mapping.c
@@ -2289,6 +2289,7 @@ static insn_map insns[] = {	// reduce x86 instructions
 };
 #endif
 
+#ifndef CAPSTONE_DIET
 // replace r1 = r2
 static void arr_replace(uint16_t *arr, uint8_t max, x86_reg r1, x86_reg r2)
 {
@@ -2301,6 +2302,7 @@ static void arr_replace(uint16_t *arr, uint8_t max, x86_reg r1, x86_reg r2)
 		}
 	}
 }
+#endif
 
 // given internal insn id, return public instruction info
 void X86_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
@@ -2922,6 +2924,7 @@ static bool valid_repe(cs_struct *h, unsigned int opcode)
 	return false;
 }
 
+#ifndef CAPSTONE_DIET
 // add *CX register to regs_read[] & regs_write[]
 static void add_cx(MCInst *MI)
 {
@@ -2942,6 +2945,7 @@ static void add_cx(MCInst *MI)
 		MI->flat_insn->detail->regs_write_count++;
 	}
 }
+#endif
 
 // return true if we patch the mnemonic
 bool X86_lockrep(MCInst *MI, SStream *O)