From 3caf837c9a39850b6e4afecc49d20388c2aafabb Mon Sep 17 00:00:00 2001
From: Nguyen Anh Quynh <aquynh@gmail.com>
Date: Thu, 27 Nov 2014 14:34:40 +0800
Subject: [PATCH] arm: alias LDR instruction with operands '[sp], 4' to POP.
 suggested by Pancake

---
 arch/ARM/ARMInstPrinter.c | 30 +++++++++++++++++-------------
 1 file changed, 17 insertions(+), 13 deletions(-)

diff --git a/arch/ARM/ARMInstPrinter.c b/arch/ARM/ARMInstPrinter.c
index 960ea43f..d02e9f7d 100644
--- a/arch/ARM/ARMInstPrinter.c
+++ b/arch/ARM/ARMInstPrinter.c
@@ -469,20 +469,24 @@ void ARM_printInst(MCInst *MI, SStream *O, void *Info)
 						break;
 
 		case ARM_LDR_POST_IMM:
-						if (MCOperand_getReg(MCInst_getOperand(MI, 2)) == ARM_SP &&
-								MCOperand_getImm(MCInst_getOperand(MI, 4)) == 4) {
-							SStream_concat0(O, "pop");
-							MCInst_setOpcodePub(MI, ARM_INS_POP);
-							printPredicateOperand(MI, 5, O);
-							SStream_concat0(O, "\t{");
-							printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, 0)));
-							if (MI->csh->detail) {
-								MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG;
-								MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, 0));
-								MI->flat_insn->detail->arm.op_count++;
+						if (MCOperand_getReg(MCInst_getOperand(MI, 2)) == ARM_SP) {
+							MCOperand *MO2 = MCInst_getOperand(MI, 4);
+							if ((getAM2Op((unsigned int)MCOperand_getImm(MO2)) == ARM_AM_add &&
+										getAM2Offset((unsigned int)MCOperand_getImm(MO2)) == 4) ||
+									MCOperand_getImm(MO2) == 4) {
+								SStream_concat0(O, "pop");
+								MCInst_setOpcodePub(MI, ARM_INS_POP);
+								printPredicateOperand(MI, 5, O);
+								SStream_concat0(O, "\t{");
+								printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, 0)));
+								if (MI->csh->detail) {
+									MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG;
+									MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, 0));
+									MI->flat_insn->detail->arm.op_count++;
+								}
+								SStream_concat0(O, "}");
+								return;
 							}
-							SStream_concat0(O, "}");
-							return;
 						}
 						break;