_v3_old
Nguyen Anh Quynh 10 years ago
commit 344d5e250a
  1. 2
      arch/AArch64/AArch64Disassembler.c
  2. 3
      arch/ARM/ARMDisassembler.c
  3. 31
      arch/ARM/ARMInstPrinter.c
  4. 8
      arch/PowerPC/PPCInstPrinter.c
  5. 9
      arch/PowerPC/PPCMapping.c

@ -224,7 +224,7 @@ static DecodeStatus _getInstruction(cs_struct *ud, MCInst *MI,
{
uint32_t insn;
DecodeStatus result;
int i;
size_t i;
if (code_len < 4) {
// not enough data

@ -687,7 +687,7 @@ static DecodeStatus _Thumb_getInstruction(cs_struct *ud, MCInst *MI, const uint8
bool InITBlock;
unsigned Firstcond, Mask;
uint32_t NEONLdStInsn, insn32, NEONDataInsn, NEONCryptoInsn, NEONv8Insn;
int i;
size_t i;
// We want to read exactly 2 bytes of data.
if (code_len < 2)
@ -695,7 +695,6 @@ static DecodeStatus _Thumb_getInstruction(cs_struct *ud, MCInst *MI, const uint8
return MCDisassembler_Fail;
ud->ITBlock.size = 0;
if (MI->flat_insn->detail) {
memset(&MI->flat_insn->detail->arm, 0, sizeof(cs_arm));
for (i = 0; i < ARR_SIZE(MI->flat_insn->detail->arm.operands); i++)

@ -469,20 +469,24 @@ void ARM_printInst(MCInst *MI, SStream *O, void *Info)
break;
case ARM_LDR_POST_IMM:
if (MCOperand_getReg(MCInst_getOperand(MI, 2)) == ARM_SP &&
MCOperand_getImm(MCInst_getOperand(MI, 4)) == 4) {
SStream_concat0(O, "pop");
MCInst_setOpcodePub(MI, ARM_INS_POP);
printPredicateOperand(MI, 5, O);
SStream_concat0(O, "\t{");
printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, 0)));
if (MI->csh->detail) {
MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG;
MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, 0));
MI->flat_insn->detail->arm.op_count++;
if (MCOperand_getReg(MCInst_getOperand(MI, 2)) == ARM_SP) {
MCOperand *MO2 = MCInst_getOperand(MI, 4);
if ((getAM2Op((unsigned int)MCOperand_getImm(MO2)) == ARM_AM_add &&
getAM2Offset((unsigned int)MCOperand_getImm(MO2)) == 4) ||
MCOperand_getImm(MO2) == 4) {
SStream_concat0(O, "pop");
MCInst_setOpcodePub(MI, ARM_INS_POP);
printPredicateOperand(MI, 5, O);
SStream_concat0(O, "\t{");
printRegName(MI->csh, O, MCOperand_getReg(MCInst_getOperand(MI, 0)));
if (MI->csh->detail) {
MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_REG;
MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, 0));
MI->flat_insn->detail->arm.op_count++;
}
SStream_concat0(O, "}");
return;
}
SStream_concat0(O, "}");
return;
}
break;
@ -650,6 +654,7 @@ static void printOperand(MCInst *MI, unsigned OpNo, SStream *O)
case ARM_INS_ORR:
case ARM_INS_EOR:
case ARM_INS_BIC:
case ARM_INS_MVN:
// do not print number in negative form
if (imm >= 0 && imm <= HEX_THRESHOLD)
SStream_concat(O, "#%u", imm);

@ -112,6 +112,14 @@ void PPC_printInst(MCInst *MI, SStream *O, void *Info)
else
SStream_concat(O, ", %u", (unsigned int)SH);
if (MI->csh->detail) {
cs_ppc *ppc = &MI->flat_insn->detail->ppc;
ppc->operands[ppc->op_count].type = PPC_OP_IMM;
ppc->operands[ppc->op_count].imm = SH;
++ppc->op_count;
}
return;
}
}

@ -8089,7 +8089,8 @@ static struct ppc_alias alias_insn_name_maps[] = {
// given alias mnemonic, return instruction ID & CC
bool PPC_alias_insn(const char *name, struct ppc_alias *alias)
{
int i;
size_t i;
int x;
for(i = 0; i < ARR_SIZE(alias_insn_name_maps); i++) {
if (!strcmp(name, alias_insn_name_maps[i].mnem)) {
@ -8100,9 +8101,9 @@ bool PPC_alias_insn(const char *name, struct ppc_alias *alias)
}
// not really an alias insn
i = name2id(&insn_name_maps[1], ARR_SIZE(insn_name_maps) - 1, name);
if (i != -1) {
alias->id = insn_name_maps[i].id;
x = name2id(&insn_name_maps[1], ARR_SIZE(insn_name_maps) - 1, name);
if (x != -1) {
alias->id = insn_name_maps[x].id;
alias->cc = PPC_BC_INVALID;
return true;
}

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