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@ -4720,43 +4720,43 @@ |
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{ |
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{ |
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Mips_JALR, MIPS_INS_JALR, |
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Mips_JALR, MIPS_INS_JALR, |
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#ifndef CAPSTONE_DIET |
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#ifndef CAPSTONE_DIET |
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{ 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, 0 }, 0, 0 |
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{ 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_NOTINMICROMIPS, MIPS_GRP_CALL, 0 }, 0, 0 |
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#endif |
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#endif |
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}, |
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}, |
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{ |
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{ |
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Mips_JALR16_MM, MIPS_INS_JALR, |
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Mips_JALR16_MM, MIPS_INS_JALR, |
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#ifndef CAPSTONE_DIET |
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#ifndef CAPSTONE_DIET |
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{ 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 |
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{ 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, MIPS_GRP_CALL, 0 }, 0, 0 |
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#endif |
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#endif |
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}, |
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}, |
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{ |
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{ |
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Mips_JALR64, MIPS_INS_JALR, |
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Mips_JALR64, MIPS_INS_JALR, |
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#ifndef CAPSTONE_DIET |
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#ifndef CAPSTONE_DIET |
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{ 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 |
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{ 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_STDENC, MIPS_GRP_CALL, 0 }, 0, 0 |
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#endif |
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#endif |
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}, |
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}, |
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{ |
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{ |
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Mips_JALRS16_MM, MIPS_INS_JALRS16, |
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Mips_JALRS16_MM, MIPS_INS_JALRS16, |
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#ifndef CAPSTONE_DIET |
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#ifndef CAPSTONE_DIET |
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{ 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 |
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{ 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, MIPS_GRP_CALL, 0 }, 0, 0 |
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#endif |
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#endif |
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}, |
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}, |
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{ |
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{ |
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Mips_JALRS_MM, MIPS_INS_JALRS, |
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Mips_JALRS_MM, MIPS_INS_JALRS, |
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#ifndef CAPSTONE_DIET |
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#ifndef CAPSTONE_DIET |
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{ 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 |
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{ 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, MIPS_GRP_CALL, 0 }, 0, 0 |
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#endif |
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#endif |
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}, |
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}, |
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{ |
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{ |
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Mips_JALR_HB, MIPS_INS_JALR_HB, |
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Mips_JALR_HB, MIPS_INS_JALR_HB, |
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#ifndef CAPSTONE_DIET |
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#ifndef CAPSTONE_DIET |
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{ 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, 0 }, 0, 1 |
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{ 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_MIPS32, MIPS_GRP_CALL, 0 }, 0, 1 |
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#endif |
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#endif |
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}, |
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}, |
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{ |
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{ |
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Mips_JALR_MM, MIPS_INS_JALR, |
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Mips_JALR_MM, MIPS_INS_JALR, |
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#ifndef CAPSTONE_DIET |
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#ifndef CAPSTONE_DIET |
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{ 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 |
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{ 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MICROMIPS, MIPS_GRP_CALL, 0 }, 0, 0 |
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#endif |
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#endif |
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}, |
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}, |
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{ |
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{ |
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@ -4876,7 +4876,7 @@ |
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{ |
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{ |
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Mips_JumpLinkReg16, MIPS_INS_JALRC, |
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Mips_JumpLinkReg16, MIPS_INS_JALRC, |
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#ifndef CAPSTONE_DIET |
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#ifndef CAPSTONE_DIET |
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{ 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MIPS16MODE, 0 }, 0, 0 |
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{ 0 }, { MIPS_REG_RA, 0 }, { MIPS_GRP_MIPS16MODE, MIPS_GRP_CALL, 0 }, 0, 0 |
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#endif |
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#endif |
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}, |
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}, |
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{ |
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{ |
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@ -8812,13 +8812,13 @@ |
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{ |
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{ |
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Mips_SYSCALL, MIPS_INS_SYSCALL, |
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Mips_SYSCALL, MIPS_INS_SYSCALL, |
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#ifndef CAPSTONE_DIET |
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#ifndef CAPSTONE_DIET |
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{ 0 }, { 0 }, { MIPS_GRP_STDENC, 0 }, 0, 0 |
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{ 0 }, { 0 }, { MIPS_GRP_STDENC, MIPS_GRP_INT, 0 }, 0, 0 |
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#endif |
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#endif |
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}, |
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}, |
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{ |
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{ |
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Mips_SYSCALL_MM, MIPS_INS_SYSCALL, |
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Mips_SYSCALL_MM, MIPS_INS_SYSCALL, |
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#ifndef CAPSTONE_DIET |
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#ifndef CAPSTONE_DIET |
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{ 0 }, { 0 }, { MIPS_GRP_MICROMIPS, 0 }, 0, 0 |
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{ 0 }, { 0 }, { MIPS_GRP_MICROMIPS, MIPS_GRP_INT, 0 }, 0, 0 |
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#endif |
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#endif |
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}, |
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}, |
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{ |
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{ |
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