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@ -313,15 +313,12 @@ void ARM_printInst(MCInst *MI, SStream *O, void *Info) |
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case 4: SStream_concat0(O, "sev"); pubOpcode = ARM_INS_SEV; break; |
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case 5: |
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// FIXME: HasV80Ops becomes a mode
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//if ((ARM_getFeatureBits(MI->csh->mode) & ARM_HasV8Ops)) {
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// SStream_concat0(O, "sevl");
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// break;
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//}
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if ((ARM_getFeatureBits(MI->csh->mode) & ARM_HasV8Ops)) { |
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SStream_concat0(O, "sevl"); |
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pubOpcode = ARM_INS_SEVL; |
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break; |
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} |
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// Fallthrough for non-v8
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SStream_concat0(O, "sevl"); |
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pubOpcode = ARM_INS_SEVL; |
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break; |
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default: |
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// Anything else should just print normally.
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printInstruction(MI, O, MRI); |
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@ -1163,10 +1160,8 @@ static void printBitfieldInvMaskImmOperand(MCInst *MI, unsigned OpNum, SStream * |
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static void printMemBOption(MCInst *MI, unsigned OpNum, SStream *O) |
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{ |
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unsigned val = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); |
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// FIXME: HasV80Ops becomes a mode
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// SStream_concat0(O, ARM_MB_MemBOptToString(val,
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// ARM_getFeatureBits(MI->csh->mode) & ARM_HasV8Ops));
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SStream_concat0(O, ARM_MB_MemBOptToString(val, true)); |
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SStream_concat0(O, ARM_MB_MemBOptToString(val, |
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ARM_getFeatureBits(MI->csh->mode) & ARM_HasV8Ops)); |
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} |
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void printInstSyncBOption(MCInst *MI, unsigned OpNum, SStream *O) |
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