arm: support V8 as a mode for A32 encodings

test2
Nguyen Anh Quynh 10 years ago
parent 05bd294920
commit 2593e22932
  1. 3
      arch/ARM/ARMDisassembler.c
  2. 19
      arch/ARM/ARMInstPrinter.c
  3. 2
      arch/ARM/ARMModule.c

@ -374,7 +374,8 @@ uint64_t ARM_getFeatureBits(unsigned int mode)
// FIXME: no Armv8 support?
//Bits -= ARM_HasV7Ops;
//Bits &= ~ARM_FeatureMP;
//Bits &= ~ARM_HasV8Ops;
if ((mode & CS_MODE_V8) == 0)
Bits &= ~ARM_HasV8Ops;
//Bits &= ~ARM_HasV6Ops;
if ((mode & CS_MODE_MCLASS) == 0)

@ -313,15 +313,12 @@ void ARM_printInst(MCInst *MI, SStream *O, void *Info)
case 4: SStream_concat0(O, "sev"); pubOpcode = ARM_INS_SEV; break;
case 5:
// FIXME: HasV80Ops becomes a mode
//if ((ARM_getFeatureBits(MI->csh->mode) & ARM_HasV8Ops)) {
// SStream_concat0(O, "sevl");
// break;
//}
if ((ARM_getFeatureBits(MI->csh->mode) & ARM_HasV8Ops)) {
SStream_concat0(O, "sevl");
pubOpcode = ARM_INS_SEVL;
break;
}
// Fallthrough for non-v8
SStream_concat0(O, "sevl");
pubOpcode = ARM_INS_SEVL;
break;
default:
// Anything else should just print normally.
printInstruction(MI, O, MRI);
@ -1163,10 +1160,8 @@ static void printBitfieldInvMaskImmOperand(MCInst *MI, unsigned OpNum, SStream *
static void printMemBOption(MCInst *MI, unsigned OpNum, SStream *O)
{
unsigned val = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
// FIXME: HasV80Ops becomes a mode
// SStream_concat0(O, ARM_MB_MemBOptToString(val,
// ARM_getFeatureBits(MI->csh->mode) & ARM_HasV8Ops));
SStream_concat0(O, ARM_MB_MemBOptToString(val, true));
SStream_concat0(O, ARM_MB_MemBOptToString(val,
ARM_getFeatureBits(MI->csh->mode) & ARM_HasV8Ops));
}
void printInstSyncBOption(MCInst *MI, unsigned OpNum, SStream *O)

@ -14,7 +14,7 @@ static cs_err init(cs_struct *ud)
MCRegisterInfo *mri;
// verify if requested mode is valid
if (ud->mode & ~(CS_MODE_LITTLE_ENDIAN | CS_MODE_ARM |
if (ud->mode & ~(CS_MODE_LITTLE_ENDIAN | CS_MODE_ARM | CS_MODE_V8 |
CS_MODE_MCLASS | CS_MODE_THUMB | CS_MODE_BIG_ENDIAN))
return CS_ERR_MODE;

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