diff --git a/bindings/java/capstone/Mips_const.java b/bindings/java/capstone/Mips_const.java index b44ba68f..e13e3c02 100644 --- a/bindings/java/capstone/Mips_const.java +++ b/bindings/java/capstone/Mips_const.java @@ -15,152 +15,153 @@ public class Mips_const { public static final int MIPS_REG_INVALID = 0; // General purpose registers - public static final int MIPS_REG_0 = 1; - public static final int MIPS_REG_1 = 2; - public static final int MIPS_REG_2 = 3; - public static final int MIPS_REG_3 = 4; - public static final int MIPS_REG_4 = 5; - public static final int MIPS_REG_5 = 6; - public static final int MIPS_REG_6 = 7; - public static final int MIPS_REG_7 = 8; - public static final int MIPS_REG_8 = 9; - public static final int MIPS_REG_9 = 10; - public static final int MIPS_REG_10 = 11; - public static final int MIPS_REG_11 = 12; - public static final int MIPS_REG_12 = 13; - public static final int MIPS_REG_13 = 14; - public static final int MIPS_REG_14 = 15; - public static final int MIPS_REG_15 = 16; - public static final int MIPS_REG_16 = 17; - public static final int MIPS_REG_17 = 18; - public static final int MIPS_REG_18 = 19; - public static final int MIPS_REG_19 = 20; - public static final int MIPS_REG_20 = 21; - public static final int MIPS_REG_21 = 22; - public static final int MIPS_REG_22 = 23; - public static final int MIPS_REG_23 = 24; - public static final int MIPS_REG_24 = 25; - public static final int MIPS_REG_25 = 26; - public static final int MIPS_REG_26 = 27; - public static final int MIPS_REG_27 = 28; - public static final int MIPS_REG_28 = 29; - public static final int MIPS_REG_29 = 30; - public static final int MIPS_REG_30 = 31; - public static final int MIPS_REG_31 = 32; + public static final int MIPS_REG_PC = 1; + public static final int MIPS_REG_0 = 2; + public static final int MIPS_REG_1 = 3; + public static final int MIPS_REG_2 = 4; + public static final int MIPS_REG_3 = 5; + public static final int MIPS_REG_4 = 6; + public static final int MIPS_REG_5 = 7; + public static final int MIPS_REG_6 = 8; + public static final int MIPS_REG_7 = 9; + public static final int MIPS_REG_8 = 10; + public static final int MIPS_REG_9 = 11; + public static final int MIPS_REG_10 = 12; + public static final int MIPS_REG_11 = 13; + public static final int MIPS_REG_12 = 14; + public static final int MIPS_REG_13 = 15; + public static final int MIPS_REG_14 = 16; + public static final int MIPS_REG_15 = 17; + public static final int MIPS_REG_16 = 18; + public static final int MIPS_REG_17 = 19; + public static final int MIPS_REG_18 = 20; + public static final int MIPS_REG_19 = 21; + public static final int MIPS_REG_20 = 22; + public static final int MIPS_REG_21 = 23; + public static final int MIPS_REG_22 = 24; + public static final int MIPS_REG_23 = 25; + public static final int MIPS_REG_24 = 26; + public static final int MIPS_REG_25 = 27; + public static final int MIPS_REG_26 = 28; + public static final int MIPS_REG_27 = 29; + public static final int MIPS_REG_28 = 30; + public static final int MIPS_REG_29 = 31; + public static final int MIPS_REG_30 = 32; + public static final int MIPS_REG_31 = 33; // DSP registers - public static final int MIPS_REG_DSPCCOND = 33; - public static final int MIPS_REG_DSPCARRY = 34; - public static final int MIPS_REG_DSPEFI = 35; - public static final int MIPS_REG_DSPOUTFLAG = 36; - public static final int MIPS_REG_DSPOUTFLAG16_19 = 37; - public static final int MIPS_REG_DSPOUTFLAG20 = 38; - public static final int MIPS_REG_DSPOUTFLAG21 = 39; - public static final int MIPS_REG_DSPOUTFLAG22 = 40; - public static final int MIPS_REG_DSPOUTFLAG23 = 41; - public static final int MIPS_REG_DSPPOS = 42; - public static final int MIPS_REG_DSPSCOUNT = 43; + public static final int MIPS_REG_DSPCCOND = 34; + public static final int MIPS_REG_DSPCARRY = 35; + public static final int MIPS_REG_DSPEFI = 36; + public static final int MIPS_REG_DSPOUTFLAG = 37; + public static final int MIPS_REG_DSPOUTFLAG16_19 = 38; + public static final int MIPS_REG_DSPOUTFLAG20 = 39; + public static final int MIPS_REG_DSPOUTFLAG21 = 40; + public static final int MIPS_REG_DSPOUTFLAG22 = 41; + public static final int MIPS_REG_DSPOUTFLAG23 = 42; + public static final int MIPS_REG_DSPPOS = 43; + public static final int MIPS_REG_DSPSCOUNT = 44; // ACC registers - public static final int MIPS_REG_AC0 = 44; - public static final int MIPS_REG_AC1 = 45; - public static final int MIPS_REG_AC2 = 46; - public static final int MIPS_REG_AC3 = 47; + public static final int MIPS_REG_AC0 = 45; + public static final int MIPS_REG_AC1 = 46; + public static final int MIPS_REG_AC2 = 47; + public static final int MIPS_REG_AC3 = 48; // COP registers - public static final int MIPS_REG_CC0 = 48; - public static final int MIPS_REG_CC1 = 49; - public static final int MIPS_REG_CC2 = 50; - public static final int MIPS_REG_CC3 = 51; - public static final int MIPS_REG_CC4 = 52; - public static final int MIPS_REG_CC5 = 53; - public static final int MIPS_REG_CC6 = 54; - public static final int MIPS_REG_CC7 = 55; + public static final int MIPS_REG_CC0 = 49; + public static final int MIPS_REG_CC1 = 50; + public static final int MIPS_REG_CC2 = 51; + public static final int MIPS_REG_CC3 = 52; + public static final int MIPS_REG_CC4 = 53; + public static final int MIPS_REG_CC5 = 54; + public static final int MIPS_REG_CC6 = 55; + public static final int MIPS_REG_CC7 = 56; // FPU registers - public static final int MIPS_REG_F0 = 56; - public static final int MIPS_REG_F1 = 57; - public static final int MIPS_REG_F2 = 58; - public static final int MIPS_REG_F3 = 59; - public static final int MIPS_REG_F4 = 60; - public static final int MIPS_REG_F5 = 61; - public static final int MIPS_REG_F6 = 62; - public static final int MIPS_REG_F7 = 63; - public static final int MIPS_REG_F8 = 64; - public static final int MIPS_REG_F9 = 65; - public static final int MIPS_REG_F10 = 66; - public static final int MIPS_REG_F11 = 67; - public static final int MIPS_REG_F12 = 68; - public static final int MIPS_REG_F13 = 69; - public static final int MIPS_REG_F14 = 70; - public static final int MIPS_REG_F15 = 71; - public static final int MIPS_REG_F16 = 72; - public static final int MIPS_REG_F17 = 73; - public static final int MIPS_REG_F18 = 74; - public static final int MIPS_REG_F19 = 75; - public static final int MIPS_REG_F20 = 76; - public static final int MIPS_REG_F21 = 77; - public static final int MIPS_REG_F22 = 78; - public static final int MIPS_REG_F23 = 79; - public static final int MIPS_REG_F24 = 80; - public static final int MIPS_REG_F25 = 81; - public static final int MIPS_REG_F26 = 82; - public static final int MIPS_REG_F27 = 83; - public static final int MIPS_REG_F28 = 84; - public static final int MIPS_REG_F29 = 85; - public static final int MIPS_REG_F30 = 86; - public static final int MIPS_REG_F31 = 87; - public static final int MIPS_REG_FCC0 = 88; - public static final int MIPS_REG_FCC1 = 89; - public static final int MIPS_REG_FCC2 = 90; - public static final int MIPS_REG_FCC3 = 91; - public static final int MIPS_REG_FCC4 = 92; - public static final int MIPS_REG_FCC5 = 93; - public static final int MIPS_REG_FCC6 = 94; - public static final int MIPS_REG_FCC7 = 95; + public static final int MIPS_REG_F0 = 57; + public static final int MIPS_REG_F1 = 58; + public static final int MIPS_REG_F2 = 59; + public static final int MIPS_REG_F3 = 60; + public static final int MIPS_REG_F4 = 61; + public static final int MIPS_REG_F5 = 62; + public static final int MIPS_REG_F6 = 63; + public static final int MIPS_REG_F7 = 64; + public static final int MIPS_REG_F8 = 65; + public static final int MIPS_REG_F9 = 66; + public static final int MIPS_REG_F10 = 67; + public static final int MIPS_REG_F11 = 68; + public static final int MIPS_REG_F12 = 69; + public static final int MIPS_REG_F13 = 70; + public static final int MIPS_REG_F14 = 71; + public static final int MIPS_REG_F15 = 72; + public static final int MIPS_REG_F16 = 73; + public static final int MIPS_REG_F17 = 74; + public static final int MIPS_REG_F18 = 75; + public static final int MIPS_REG_F19 = 76; + public static final int MIPS_REG_F20 = 77; + public static final int MIPS_REG_F21 = 78; + public static final int MIPS_REG_F22 = 79; + public static final int MIPS_REG_F23 = 80; + public static final int MIPS_REG_F24 = 81; + public static final int MIPS_REG_F25 = 82; + public static final int MIPS_REG_F26 = 83; + public static final int MIPS_REG_F27 = 84; + public static final int MIPS_REG_F28 = 85; + public static final int MIPS_REG_F29 = 86; + public static final int MIPS_REG_F30 = 87; + public static final int MIPS_REG_F31 = 88; + public static final int MIPS_REG_FCC0 = 89; + public static final int MIPS_REG_FCC1 = 90; + public static final int MIPS_REG_FCC2 = 91; + public static final int MIPS_REG_FCC3 = 92; + public static final int MIPS_REG_FCC4 = 93; + public static final int MIPS_REG_FCC5 = 94; + public static final int MIPS_REG_FCC6 = 95; + public static final int MIPS_REG_FCC7 = 96; // AFPR128 - public static final int MIPS_REG_W0 = 96; - public static final int MIPS_REG_W1 = 97; - public static final int MIPS_REG_W2 = 98; - public static final int MIPS_REG_W3 = 99; - public static final int MIPS_REG_W4 = 100; - public static final int MIPS_REG_W5 = 101; - public static final int MIPS_REG_W6 = 102; - public static final int MIPS_REG_W7 = 103; - public static final int MIPS_REG_W8 = 104; - public static final int MIPS_REG_W9 = 105; - public static final int MIPS_REG_W10 = 106; - public static final int MIPS_REG_W11 = 107; - public static final int MIPS_REG_W12 = 108; - public static final int MIPS_REG_W13 = 109; - public static final int MIPS_REG_W14 = 110; - public static final int MIPS_REG_W15 = 111; - public static final int MIPS_REG_W16 = 112; - public static final int MIPS_REG_W17 = 113; - public static final int MIPS_REG_W18 = 114; - public static final int MIPS_REG_W19 = 115; - public static final int MIPS_REG_W20 = 116; - public static final int MIPS_REG_W21 = 117; - public static final int MIPS_REG_W22 = 118; - public static final int MIPS_REG_W23 = 119; - public static final int MIPS_REG_W24 = 120; - public static final int MIPS_REG_W25 = 121; - public static final int MIPS_REG_W26 = 122; - public static final int MIPS_REG_W27 = 123; - public static final int MIPS_REG_W28 = 124; - public static final int MIPS_REG_W29 = 125; - public static final int MIPS_REG_W30 = 126; - public static final int MIPS_REG_W31 = 127; - public static final int MIPS_REG_HI = 128; - public static final int MIPS_REG_LO = 129; - public static final int MIPS_REG_P0 = 130; - public static final int MIPS_REG_P1 = 131; - public static final int MIPS_REG_P2 = 132; - public static final int MIPS_REG_MPL0 = 133; - public static final int MIPS_REG_MPL1 = 134; - public static final int MIPS_REG_MPL2 = 135; - public static final int MIPS_REG_ENDING = 136; + public static final int MIPS_REG_W0 = 97; + public static final int MIPS_REG_W1 = 98; + public static final int MIPS_REG_W2 = 99; + public static final int MIPS_REG_W3 = 100; + public static final int MIPS_REG_W4 = 101; + public static final int MIPS_REG_W5 = 102; + public static final int MIPS_REG_W6 = 103; + public static final int MIPS_REG_W7 = 104; + public static final int MIPS_REG_W8 = 105; + public static final int MIPS_REG_W9 = 106; + public static final int MIPS_REG_W10 = 107; + public static final int MIPS_REG_W11 = 108; + public static final int MIPS_REG_W12 = 109; + public static final int MIPS_REG_W13 = 110; + public static final int MIPS_REG_W14 = 111; + public static final int MIPS_REG_W15 = 112; + public static final int MIPS_REG_W16 = 113; + public static final int MIPS_REG_W17 = 114; + public static final int MIPS_REG_W18 = 115; + public static final int MIPS_REG_W19 = 116; + public static final int MIPS_REG_W20 = 117; + public static final int MIPS_REG_W21 = 118; + public static final int MIPS_REG_W22 = 119; + public static final int MIPS_REG_W23 = 120; + public static final int MIPS_REG_W24 = 121; + public static final int MIPS_REG_W25 = 122; + public static final int MIPS_REG_W26 = 123; + public static final int MIPS_REG_W27 = 124; + public static final int MIPS_REG_W28 = 125; + public static final int MIPS_REG_W29 = 126; + public static final int MIPS_REG_W30 = 127; + public static final int MIPS_REG_W31 = 128; + public static final int MIPS_REG_HI = 129; + public static final int MIPS_REG_LO = 130; + public static final int MIPS_REG_P0 = 131; + public static final int MIPS_REG_P1 = 132; + public static final int MIPS_REG_P2 = 133; + public static final int MIPS_REG_MPL0 = 134; + public static final int MIPS_REG_MPL1 = 135; + public static final int MIPS_REG_MPL2 = 136; + public static final int MIPS_REG_ENDING = 137; public static final int MIPS_REG_ZERO = MIPS_REG_0; public static final int MIPS_REG_AT = MIPS_REG_1; public static final int MIPS_REG_V0 = MIPS_REG_2; @@ -209,593 +210,633 @@ public class Mips_const { public static final int MIPS_INS_ABSQ_S = 1; public static final int MIPS_INS_ADD = 2; public static final int MIPS_INS_ADDIUPC = 3; - public static final int MIPS_INS_ADDQH = 4; - public static final int MIPS_INS_ADDQH_R = 5; - public static final int MIPS_INS_ADDQ = 6; - public static final int MIPS_INS_ADDQ_S = 7; - public static final int MIPS_INS_ADDSC = 8; - public static final int MIPS_INS_ADDS_A = 9; - public static final int MIPS_INS_ADDS_S = 10; - public static final int MIPS_INS_ADDS_U = 11; - public static final int MIPS_INS_ADDUH = 12; - public static final int MIPS_INS_ADDUH_R = 13; - public static final int MIPS_INS_ADDU = 14; - public static final int MIPS_INS_ADDU_S = 15; - public static final int MIPS_INS_ADDVI = 16; - public static final int MIPS_INS_ADDV = 17; - public static final int MIPS_INS_ADDWC = 18; - public static final int MIPS_INS_ADD_A = 19; - public static final int MIPS_INS_ADDI = 20; - public static final int MIPS_INS_ADDIU = 21; - public static final int MIPS_INS_ALIGN = 22; - public static final int MIPS_INS_ALUIPC = 23; - public static final int MIPS_INS_AND = 24; - public static final int MIPS_INS_ANDI = 25; - public static final int MIPS_INS_APPEND = 26; - public static final int MIPS_INS_ASUB_S = 27; - public static final int MIPS_INS_ASUB_U = 28; - public static final int MIPS_INS_AUI = 29; - public static final int MIPS_INS_AUIPC = 30; - public static final int MIPS_INS_AVER_S = 31; - public static final int MIPS_INS_AVER_U = 32; - public static final int MIPS_INS_AVE_S = 33; - public static final int MIPS_INS_AVE_U = 34; - public static final int MIPS_INS_BADDU = 35; - public static final int MIPS_INS_BAL = 36; - public static final int MIPS_INS_BALC = 37; - public static final int MIPS_INS_BALIGN = 38; - public static final int MIPS_INS_BC = 39; - public static final int MIPS_INS_BC0F = 40; - public static final int MIPS_INS_BC0FL = 41; - public static final int MIPS_INS_BC0T = 42; - public static final int MIPS_INS_BC0TL = 43; - public static final int MIPS_INS_BC1EQZ = 44; - public static final int MIPS_INS_BC1F = 45; - public static final int MIPS_INS_BC1FL = 46; - public static final int MIPS_INS_BC1NEZ = 47; - public static final int MIPS_INS_BC1T = 48; - public static final int MIPS_INS_BC1TL = 49; - public static final int MIPS_INS_BC2EQZ = 50; - public static final int MIPS_INS_BC2F = 51; - public static final int MIPS_INS_BC2FL = 52; - public static final int MIPS_INS_BC2NEZ = 53; - public static final int MIPS_INS_BC2T = 54; - public static final int MIPS_INS_BC2TL = 55; - public static final int MIPS_INS_BC3F = 56; - public static final int MIPS_INS_BC3FL = 57; - public static final int MIPS_INS_BC3T = 58; - public static final int MIPS_INS_BC3TL = 59; - public static final int MIPS_INS_BCLRI = 60; - public static final int MIPS_INS_BCLR = 61; - public static final int MIPS_INS_BEQ = 62; - public static final int MIPS_INS_BEQC = 63; - public static final int MIPS_INS_BEQL = 64; - public static final int MIPS_INS_BEQZALC = 65; - public static final int MIPS_INS_BEQZC = 66; - public static final int MIPS_INS_BGEC = 67; - public static final int MIPS_INS_BGEUC = 68; - public static final int MIPS_INS_BGEZ = 69; - public static final int MIPS_INS_BGEZAL = 70; - public static final int MIPS_INS_BGEZALC = 71; - public static final int MIPS_INS_BGEZALL = 72; - public static final int MIPS_INS_BGEZALS = 73; - public static final int MIPS_INS_BGEZC = 74; - public static final int MIPS_INS_BGEZL = 75; - public static final int MIPS_INS_BGTZ = 76; - public static final int MIPS_INS_BGTZALC = 77; - public static final int MIPS_INS_BGTZC = 78; - public static final int MIPS_INS_BGTZL = 79; - public static final int MIPS_INS_BINSLI = 80; - public static final int MIPS_INS_BINSL = 81; - public static final int MIPS_INS_BINSRI = 82; - public static final int MIPS_INS_BINSR = 83; - public static final int MIPS_INS_BITREV = 84; - public static final int MIPS_INS_BITSWAP = 85; - public static final int MIPS_INS_BLEZ = 86; - public static final int MIPS_INS_BLEZALC = 87; - public static final int MIPS_INS_BLEZC = 88; - public static final int MIPS_INS_BLEZL = 89; - public static final int MIPS_INS_BLTC = 90; - public static final int MIPS_INS_BLTUC = 91; - public static final int MIPS_INS_BLTZ = 92; - public static final int MIPS_INS_BLTZAL = 93; - public static final int MIPS_INS_BLTZALC = 94; - public static final int MIPS_INS_BLTZALL = 95; - public static final int MIPS_INS_BLTZALS = 96; - public static final int MIPS_INS_BLTZC = 97; - public static final int MIPS_INS_BLTZL = 98; - public static final int MIPS_INS_BMNZI = 99; - public static final int MIPS_INS_BMNZ = 100; - public static final int MIPS_INS_BMZI = 101; - public static final int MIPS_INS_BMZ = 102; - public static final int MIPS_INS_BNE = 103; - public static final int MIPS_INS_BNEC = 104; - public static final int MIPS_INS_BNEGI = 105; - public static final int MIPS_INS_BNEG = 106; - public static final int MIPS_INS_BNEL = 107; - public static final int MIPS_INS_BNEZALC = 108; - public static final int MIPS_INS_BNEZC = 109; - public static final int MIPS_INS_BNVC = 110; - public static final int MIPS_INS_BNZ = 111; - public static final int MIPS_INS_BOVC = 112; - public static final int MIPS_INS_BPOSGE32 = 113; - public static final int MIPS_INS_BREAK = 114; - public static final int MIPS_INS_BSELI = 115; - public static final int MIPS_INS_BSEL = 116; - public static final int MIPS_INS_BSETI = 117; - public static final int MIPS_INS_BSET = 118; - public static final int MIPS_INS_BZ = 119; - public static final int MIPS_INS_BEQZ = 120; - public static final int MIPS_INS_B = 121; - public static final int MIPS_INS_BNEZ = 122; - public static final int MIPS_INS_BTEQZ = 123; - public static final int MIPS_INS_BTNEZ = 124; - public static final int MIPS_INS_CACHE = 125; - public static final int MIPS_INS_CEIL = 126; - public static final int MIPS_INS_CEQI = 127; - public static final int MIPS_INS_CEQ = 128; - public static final int MIPS_INS_CFC1 = 129; - public static final int MIPS_INS_CFCMSA = 130; - public static final int MIPS_INS_CINS = 131; - public static final int MIPS_INS_CINS32 = 132; - public static final int MIPS_INS_CLASS = 133; - public static final int MIPS_INS_CLEI_S = 134; - public static final int MIPS_INS_CLEI_U = 135; - public static final int MIPS_INS_CLE_S = 136; - public static final int MIPS_INS_CLE_U = 137; - public static final int MIPS_INS_CLO = 138; - public static final int MIPS_INS_CLTI_S = 139; - public static final int MIPS_INS_CLTI_U = 140; - public static final int MIPS_INS_CLT_S = 141; - public static final int MIPS_INS_CLT_U = 142; - public static final int MIPS_INS_CLZ = 143; - public static final int MIPS_INS_CMPGDU = 144; - public static final int MIPS_INS_CMPGU = 145; - public static final int MIPS_INS_CMPU = 146; - public static final int MIPS_INS_CMP = 147; - public static final int MIPS_INS_COPY_S = 148; - public static final int MIPS_INS_COPY_U = 149; - public static final int MIPS_INS_CTC1 = 150; - public static final int MIPS_INS_CTCMSA = 151; - public static final int MIPS_INS_CVT = 152; - public static final int MIPS_INS_C = 153; - public static final int MIPS_INS_CMPI = 154; - public static final int MIPS_INS_DADD = 155; - public static final int MIPS_INS_DADDI = 156; - public static final int MIPS_INS_DADDIU = 157; - public static final int MIPS_INS_DADDU = 158; - public static final int MIPS_INS_DAHI = 159; - public static final int MIPS_INS_DALIGN = 160; - public static final int MIPS_INS_DATI = 161; - public static final int MIPS_INS_DAUI = 162; - public static final int MIPS_INS_DBITSWAP = 163; - public static final int MIPS_INS_DCLO = 164; - public static final int MIPS_INS_DCLZ = 165; - public static final int MIPS_INS_DDIV = 166; - public static final int MIPS_INS_DDIVU = 167; - public static final int MIPS_INS_DERET = 168; - public static final int MIPS_INS_DEXT = 169; - public static final int MIPS_INS_DEXTM = 170; - public static final int MIPS_INS_DEXTU = 171; - public static final int MIPS_INS_DI = 172; - public static final int MIPS_INS_DINS = 173; - public static final int MIPS_INS_DINSM = 174; - public static final int MIPS_INS_DINSU = 175; - public static final int MIPS_INS_DIV = 176; - public static final int MIPS_INS_DIVU = 177; - public static final int MIPS_INS_DIV_S = 178; - public static final int MIPS_INS_DIV_U = 179; - public static final int MIPS_INS_DLSA = 180; - public static final int MIPS_INS_DMFC0 = 181; - public static final int MIPS_INS_DMFC1 = 182; - public static final int MIPS_INS_DMFC2 = 183; - public static final int MIPS_INS_DMOD = 184; - public static final int MIPS_INS_DMODU = 185; - public static final int MIPS_INS_DMTC0 = 186; - public static final int MIPS_INS_DMTC1 = 187; - public static final int MIPS_INS_DMTC2 = 188; - public static final int MIPS_INS_DMUH = 189; - public static final int MIPS_INS_DMUHU = 190; - public static final int MIPS_INS_DMUL = 191; - public static final int MIPS_INS_DMULT = 192; - public static final int MIPS_INS_DMULTU = 193; - public static final int MIPS_INS_DMULU = 194; - public static final int MIPS_INS_DOTP_S = 195; - public static final int MIPS_INS_DOTP_U = 196; - public static final int MIPS_INS_DPADD_S = 197; - public static final int MIPS_INS_DPADD_U = 198; - public static final int MIPS_INS_DPAQX_SA = 199; - public static final int MIPS_INS_DPAQX_S = 200; - public static final int MIPS_INS_DPAQ_SA = 201; - public static final int MIPS_INS_DPAQ_S = 202; - public static final int MIPS_INS_DPAU = 203; - public static final int MIPS_INS_DPAX = 204; - public static final int MIPS_INS_DPA = 205; - public static final int MIPS_INS_DPOP = 206; - public static final int MIPS_INS_DPSQX_SA = 207; - public static final int MIPS_INS_DPSQX_S = 208; - public static final int MIPS_INS_DPSQ_SA = 209; - public static final int MIPS_INS_DPSQ_S = 210; - public static final int MIPS_INS_DPSUB_S = 211; - public static final int MIPS_INS_DPSUB_U = 212; - public static final int MIPS_INS_DPSU = 213; - public static final int MIPS_INS_DPSX = 214; - public static final int MIPS_INS_DPS = 215; - public static final int MIPS_INS_DROTR = 216; - public static final int MIPS_INS_DROTR32 = 217; - public static final int MIPS_INS_DROTRV = 218; - public static final int MIPS_INS_DSBH = 219; - public static final int MIPS_INS_DSHD = 220; - public static final int MIPS_INS_DSLL = 221; - public static final int MIPS_INS_DSLL32 = 222; - public static final int MIPS_INS_DSLLV = 223; - public static final int MIPS_INS_DSRA = 224; - public static final int MIPS_INS_DSRA32 = 225; - public static final int MIPS_INS_DSRAV = 226; - public static final int MIPS_INS_DSRL = 227; - public static final int MIPS_INS_DSRL32 = 228; - public static final int MIPS_INS_DSRLV = 229; - public static final int MIPS_INS_DSUB = 230; - public static final int MIPS_INS_DSUBU = 231; - public static final int MIPS_INS_EHB = 232; - public static final int MIPS_INS_EI = 233; - public static final int MIPS_INS_ERET = 234; - public static final int MIPS_INS_EXT = 235; - public static final int MIPS_INS_EXTP = 236; - public static final int MIPS_INS_EXTPDP = 237; - public static final int MIPS_INS_EXTPDPV = 238; - public static final int MIPS_INS_EXTPV = 239; - public static final int MIPS_INS_EXTRV_RS = 240; - public static final int MIPS_INS_EXTRV_R = 241; - public static final int MIPS_INS_EXTRV_S = 242; - public static final int MIPS_INS_EXTRV = 243; - public static final int MIPS_INS_EXTR_RS = 244; - public static final int MIPS_INS_EXTR_R = 245; - public static final int MIPS_INS_EXTR_S = 246; - public static final int MIPS_INS_EXTR = 247; - public static final int MIPS_INS_EXTS = 248; - public static final int MIPS_INS_EXTS32 = 249; - public static final int MIPS_INS_ABS = 250; - public static final int MIPS_INS_FADD = 251; - public static final int MIPS_INS_FCAF = 252; - public static final int MIPS_INS_FCEQ = 253; - public static final int MIPS_INS_FCLASS = 254; - public static final int MIPS_INS_FCLE = 255; - public static final int MIPS_INS_FCLT = 256; - public static final int MIPS_INS_FCNE = 257; - public static final int MIPS_INS_FCOR = 258; - public static final int MIPS_INS_FCUEQ = 259; - public static final int MIPS_INS_FCULE = 260; - public static final int MIPS_INS_FCULT = 261; - public static final int MIPS_INS_FCUNE = 262; - public static final int MIPS_INS_FCUN = 263; - public static final int MIPS_INS_FDIV = 264; - public static final int MIPS_INS_FEXDO = 265; - public static final int MIPS_INS_FEXP2 = 266; - public static final int MIPS_INS_FEXUPL = 267; - public static final int MIPS_INS_FEXUPR = 268; - public static final int MIPS_INS_FFINT_S = 269; - public static final int MIPS_INS_FFINT_U = 270; - public static final int MIPS_INS_FFQL = 271; - public static final int MIPS_INS_FFQR = 272; - public static final int MIPS_INS_FILL = 273; - public static final int MIPS_INS_FLOG2 = 274; - public static final int MIPS_INS_FLOOR = 275; - public static final int MIPS_INS_FMADD = 276; - public static final int MIPS_INS_FMAX_A = 277; - public static final int MIPS_INS_FMAX = 278; - public static final int MIPS_INS_FMIN_A = 279; - public static final int MIPS_INS_FMIN = 280; - public static final int MIPS_INS_MOV = 281; - public static final int MIPS_INS_FMSUB = 282; - public static final int MIPS_INS_FMUL = 283; - public static final int MIPS_INS_MUL = 284; - public static final int MIPS_INS_NEG = 285; - public static final int MIPS_INS_FRCP = 286; - public static final int MIPS_INS_FRINT = 287; - public static final int MIPS_INS_FRSQRT = 288; - public static final int MIPS_INS_FSAF = 289; - public static final int MIPS_INS_FSEQ = 290; - public static final int MIPS_INS_FSLE = 291; - public static final int MIPS_INS_FSLT = 292; - public static final int MIPS_INS_FSNE = 293; - public static final int MIPS_INS_FSOR = 294; - public static final int MIPS_INS_FSQRT = 295; - public static final int MIPS_INS_SQRT = 296; - public static final int MIPS_INS_FSUB = 297; - public static final int MIPS_INS_SUB = 298; - public static final int MIPS_INS_FSUEQ = 299; - public static final int MIPS_INS_FSULE = 300; - public static final int MIPS_INS_FSULT = 301; - public static final int MIPS_INS_FSUNE = 302; - public static final int MIPS_INS_FSUN = 303; - public static final int MIPS_INS_FTINT_S = 304; - public static final int MIPS_INS_FTINT_U = 305; - public static final int MIPS_INS_FTQ = 306; - public static final int MIPS_INS_FTRUNC_S = 307; - public static final int MIPS_INS_FTRUNC_U = 308; - public static final int MIPS_INS_HADD_S = 309; - public static final int MIPS_INS_HADD_U = 310; - public static final int MIPS_INS_HSUB_S = 311; - public static final int MIPS_INS_HSUB_U = 312; - public static final int MIPS_INS_ILVEV = 313; - public static final int MIPS_INS_ILVL = 314; - public static final int MIPS_INS_ILVOD = 315; - public static final int MIPS_INS_ILVR = 316; - public static final int MIPS_INS_INS = 317; - public static final int MIPS_INS_INSERT = 318; - public static final int MIPS_INS_INSV = 319; - public static final int MIPS_INS_INSVE = 320; - public static final int MIPS_INS_J = 321; - public static final int MIPS_INS_JAL = 322; - public static final int MIPS_INS_JALR = 323; - public static final int MIPS_INS_JALRS = 324; - public static final int MIPS_INS_JALS = 325; - public static final int MIPS_INS_JALX = 326; - public static final int MIPS_INS_JIALC = 327; - public static final int MIPS_INS_JIC = 328; - public static final int MIPS_INS_JR = 329; - public static final int MIPS_INS_JRADDIUSP = 330; - public static final int MIPS_INS_JRC = 331; - public static final int MIPS_INS_JALRC = 332; - public static final int MIPS_INS_LB = 333; - public static final int MIPS_INS_LBUX = 334; - public static final int MIPS_INS_LBU = 335; - public static final int MIPS_INS_LD = 336; - public static final int MIPS_INS_LDC1 = 337; - public static final int MIPS_INS_LDC2 = 338; - public static final int MIPS_INS_LDC3 = 339; - public static final int MIPS_INS_LDI = 340; - public static final int MIPS_INS_LDL = 341; - public static final int MIPS_INS_LDPC = 342; - public static final int MIPS_INS_LDR = 343; - public static final int MIPS_INS_LDXC1 = 344; - public static final int MIPS_INS_LH = 345; - public static final int MIPS_INS_LHX = 346; - public static final int MIPS_INS_LHU = 347; - public static final int MIPS_INS_LL = 348; - public static final int MIPS_INS_LLD = 349; - public static final int MIPS_INS_LSA = 350; - public static final int MIPS_INS_LUXC1 = 351; - public static final int MIPS_INS_LUI = 352; - public static final int MIPS_INS_LW = 353; - public static final int MIPS_INS_LWC1 = 354; - public static final int MIPS_INS_LWC2 = 355; - public static final int MIPS_INS_LWC3 = 356; - public static final int MIPS_INS_LWL = 357; - public static final int MIPS_INS_LWPC = 358; - public static final int MIPS_INS_LWR = 359; - public static final int MIPS_INS_LWUPC = 360; - public static final int MIPS_INS_LWU = 361; - public static final int MIPS_INS_LWX = 362; - public static final int MIPS_INS_LWXC1 = 363; - public static final int MIPS_INS_LI = 364; - public static final int MIPS_INS_MADD = 365; - public static final int MIPS_INS_MADDF = 366; - public static final int MIPS_INS_MADDR_Q = 367; - public static final int MIPS_INS_MADDU = 368; - public static final int MIPS_INS_MADDV = 369; - public static final int MIPS_INS_MADD_Q = 370; - public static final int MIPS_INS_MAQ_SA = 371; - public static final int MIPS_INS_MAQ_S = 372; - public static final int MIPS_INS_MAXA = 373; - public static final int MIPS_INS_MAXI_S = 374; - public static final int MIPS_INS_MAXI_U = 375; - public static final int MIPS_INS_MAX_A = 376; - public static final int MIPS_INS_MAX = 377; - public static final int MIPS_INS_MAX_S = 378; - public static final int MIPS_INS_MAX_U = 379; - public static final int MIPS_INS_MFC0 = 380; - public static final int MIPS_INS_MFC1 = 381; - public static final int MIPS_INS_MFC2 = 382; - public static final int MIPS_INS_MFHC1 = 383; - public static final int MIPS_INS_MFHI = 384; - public static final int MIPS_INS_MFLO = 385; - public static final int MIPS_INS_MINA = 386; - public static final int MIPS_INS_MINI_S = 387; - public static final int MIPS_INS_MINI_U = 388; - public static final int MIPS_INS_MIN_A = 389; - public static final int MIPS_INS_MIN = 390; - public static final int MIPS_INS_MIN_S = 391; - public static final int MIPS_INS_MIN_U = 392; - public static final int MIPS_INS_MOD = 393; - public static final int MIPS_INS_MODSUB = 394; - public static final int MIPS_INS_MODU = 395; - public static final int MIPS_INS_MOD_S = 396; - public static final int MIPS_INS_MOD_U = 397; - public static final int MIPS_INS_MOVE = 398; - public static final int MIPS_INS_MOVF = 399; - public static final int MIPS_INS_MOVN = 400; - public static final int MIPS_INS_MOVT = 401; - public static final int MIPS_INS_MOVZ = 402; - public static final int MIPS_INS_MSUB = 403; - public static final int MIPS_INS_MSUBF = 404; - public static final int MIPS_INS_MSUBR_Q = 405; - public static final int MIPS_INS_MSUBU = 406; - public static final int MIPS_INS_MSUBV = 407; - public static final int MIPS_INS_MSUB_Q = 408; - public static final int MIPS_INS_MTC0 = 409; - public static final int MIPS_INS_MTC1 = 410; - public static final int MIPS_INS_MTC2 = 411; - public static final int MIPS_INS_MTHC1 = 412; - public static final int MIPS_INS_MTHI = 413; - public static final int MIPS_INS_MTHLIP = 414; - public static final int MIPS_INS_MTLO = 415; - public static final int MIPS_INS_MTM0 = 416; - public static final int MIPS_INS_MTM1 = 417; - public static final int MIPS_INS_MTM2 = 418; - public static final int MIPS_INS_MTP0 = 419; - public static final int MIPS_INS_MTP1 = 420; - public static final int MIPS_INS_MTP2 = 421; - public static final int MIPS_INS_MUH = 422; - public static final int MIPS_INS_MUHU = 423; - public static final int MIPS_INS_MULEQ_S = 424; - public static final int MIPS_INS_MULEU_S = 425; - public static final int MIPS_INS_MULQ_RS = 426; - public static final int MIPS_INS_MULQ_S = 427; - public static final int MIPS_INS_MULR_Q = 428; - public static final int MIPS_INS_MULSAQ_S = 429; - public static final int MIPS_INS_MULSA = 430; - public static final int MIPS_INS_MULT = 431; - public static final int MIPS_INS_MULTU = 432; - public static final int MIPS_INS_MULU = 433; - public static final int MIPS_INS_MULV = 434; - public static final int MIPS_INS_MUL_Q = 435; - public static final int MIPS_INS_MUL_S = 436; - public static final int MIPS_INS_NLOC = 437; - public static final int MIPS_INS_NLZC = 438; - public static final int MIPS_INS_NMADD = 439; - public static final int MIPS_INS_NMSUB = 440; - public static final int MIPS_INS_NOR = 441; - public static final int MIPS_INS_NORI = 442; - public static final int MIPS_INS_NOT = 443; - public static final int MIPS_INS_OR = 444; - public static final int MIPS_INS_ORI = 445; - public static final int MIPS_INS_PACKRL = 446; - public static final int MIPS_INS_PAUSE = 447; - public static final int MIPS_INS_PCKEV = 448; - public static final int MIPS_INS_PCKOD = 449; - public static final int MIPS_INS_PCNT = 450; - public static final int MIPS_INS_PICK = 451; - public static final int MIPS_INS_POP = 452; - public static final int MIPS_INS_PRECEQU = 453; - public static final int MIPS_INS_PRECEQ = 454; - public static final int MIPS_INS_PRECEU = 455; - public static final int MIPS_INS_PRECRQU_S = 456; - public static final int MIPS_INS_PRECRQ = 457; - public static final int MIPS_INS_PRECRQ_RS = 458; - public static final int MIPS_INS_PRECR = 459; - public static final int MIPS_INS_PRECR_SRA = 460; - public static final int MIPS_INS_PRECR_SRA_R = 461; - public static final int MIPS_INS_PREF = 462; - public static final int MIPS_INS_PREPEND = 463; - public static final int MIPS_INS_RADDU = 464; - public static final int MIPS_INS_RDDSP = 465; - public static final int MIPS_INS_RDHWR = 466; - public static final int MIPS_INS_REPLV = 467; - public static final int MIPS_INS_REPL = 468; - public static final int MIPS_INS_RINT = 469; - public static final int MIPS_INS_ROTR = 470; - public static final int MIPS_INS_ROTRV = 471; - public static final int MIPS_INS_ROUND = 472; - public static final int MIPS_INS_SAT_S = 473; - public static final int MIPS_INS_SAT_U = 474; - public static final int MIPS_INS_SB = 475; - public static final int MIPS_INS_SC = 476; - public static final int MIPS_INS_SCD = 477; - public static final int MIPS_INS_SD = 478; - public static final int MIPS_INS_SDBBP = 479; - public static final int MIPS_INS_SDC1 = 480; - public static final int MIPS_INS_SDC2 = 481; - public static final int MIPS_INS_SDC3 = 482; - public static final int MIPS_INS_SDL = 483; - public static final int MIPS_INS_SDR = 484; - public static final int MIPS_INS_SDXC1 = 485; - public static final int MIPS_INS_SEB = 486; - public static final int MIPS_INS_SEH = 487; - public static final int MIPS_INS_SELEQZ = 488; - public static final int MIPS_INS_SELNEZ = 489; - public static final int MIPS_INS_SEL = 490; - public static final int MIPS_INS_SEQ = 491; - public static final int MIPS_INS_SEQI = 492; - public static final int MIPS_INS_SH = 493; - public static final int MIPS_INS_SHF = 494; - public static final int MIPS_INS_SHILO = 495; - public static final int MIPS_INS_SHILOV = 496; - public static final int MIPS_INS_SHLLV = 497; - public static final int MIPS_INS_SHLLV_S = 498; - public static final int MIPS_INS_SHLL = 499; - public static final int MIPS_INS_SHLL_S = 500; - public static final int MIPS_INS_SHRAV = 501; - public static final int MIPS_INS_SHRAV_R = 502; - public static final int MIPS_INS_SHRA = 503; - public static final int MIPS_INS_SHRA_R = 504; - public static final int MIPS_INS_SHRLV = 505; - public static final int MIPS_INS_SHRL = 506; - public static final int MIPS_INS_SLDI = 507; - public static final int MIPS_INS_SLD = 508; - public static final int MIPS_INS_SLL = 509; - public static final int MIPS_INS_SLLI = 510; - public static final int MIPS_INS_SLLV = 511; - public static final int MIPS_INS_SLT = 512; - public static final int MIPS_INS_SLTI = 513; - public static final int MIPS_INS_SLTIU = 514; - public static final int MIPS_INS_SLTU = 515; - public static final int MIPS_INS_SNE = 516; - public static final int MIPS_INS_SNEI = 517; - public static final int MIPS_INS_SPLATI = 518; - public static final int MIPS_INS_SPLAT = 519; - public static final int MIPS_INS_SRA = 520; - public static final int MIPS_INS_SRAI = 521; - public static final int MIPS_INS_SRARI = 522; - public static final int MIPS_INS_SRAR = 523; - public static final int MIPS_INS_SRAV = 524; - public static final int MIPS_INS_SRL = 525; - public static final int MIPS_INS_SRLI = 526; - public static final int MIPS_INS_SRLRI = 527; - public static final int MIPS_INS_SRLR = 528; - public static final int MIPS_INS_SRLV = 529; - public static final int MIPS_INS_SSNOP = 530; - public static final int MIPS_INS_ST = 531; - public static final int MIPS_INS_SUBQH = 532; - public static final int MIPS_INS_SUBQH_R = 533; - public static final int MIPS_INS_SUBQ = 534; - public static final int MIPS_INS_SUBQ_S = 535; - public static final int MIPS_INS_SUBSUS_U = 536; - public static final int MIPS_INS_SUBSUU_S = 537; - public static final int MIPS_INS_SUBS_S = 538; - public static final int MIPS_INS_SUBS_U = 539; - public static final int MIPS_INS_SUBUH = 540; - public static final int MIPS_INS_SUBUH_R = 541; - public static final int MIPS_INS_SUBU = 542; - public static final int MIPS_INS_SUBU_S = 543; - public static final int MIPS_INS_SUBVI = 544; - public static final int MIPS_INS_SUBV = 545; - public static final int MIPS_INS_SUXC1 = 546; - public static final int MIPS_INS_SW = 547; - public static final int MIPS_INS_SWC1 = 548; - public static final int MIPS_INS_SWC2 = 549; - public static final int MIPS_INS_SWC3 = 550; - public static final int MIPS_INS_SWL = 551; - public static final int MIPS_INS_SWR = 552; - public static final int MIPS_INS_SWXC1 = 553; - public static final int MIPS_INS_SYNC = 554; - public static final int MIPS_INS_SYSCALL = 555; - public static final int MIPS_INS_TEQ = 556; - public static final int MIPS_INS_TEQI = 557; - public static final int MIPS_INS_TGE = 558; - public static final int MIPS_INS_TGEI = 559; - public static final int MIPS_INS_TGEIU = 560; - public static final int MIPS_INS_TGEU = 561; - public static final int MIPS_INS_TLBP = 562; - public static final int MIPS_INS_TLBR = 563; - public static final int MIPS_INS_TLBWI = 564; - public static final int MIPS_INS_TLBWR = 565; - public static final int MIPS_INS_TLT = 566; - public static final int MIPS_INS_TLTI = 567; - public static final int MIPS_INS_TLTIU = 568; - public static final int MIPS_INS_TLTU = 569; - public static final int MIPS_INS_TNE = 570; - public static final int MIPS_INS_TNEI = 571; - public static final int MIPS_INS_TRUNC = 572; - public static final int MIPS_INS_V3MULU = 573; - public static final int MIPS_INS_VMM0 = 574; - public static final int MIPS_INS_VMULU = 575; - public static final int MIPS_INS_VSHF = 576; - public static final int MIPS_INS_WAIT = 577; - public static final int MIPS_INS_WRDSP = 578; - public static final int MIPS_INS_WSBH = 579; - public static final int MIPS_INS_XOR = 580; - public static final int MIPS_INS_XORI = 581; + public static final int MIPS_INS_ADDIUR1SP = 4; + public static final int MIPS_INS_ADDIUR2 = 5; + public static final int MIPS_INS_ADDIUS5 = 6; + public static final int MIPS_INS_ADDIUSP = 7; + public static final int MIPS_INS_ADDQH = 8; + public static final int MIPS_INS_ADDQH_R = 9; + public static final int MIPS_INS_ADDQ = 10; + public static final int MIPS_INS_ADDQ_S = 11; + public static final int MIPS_INS_ADDSC = 12; + public static final int MIPS_INS_ADDS_A = 13; + public static final int MIPS_INS_ADDS_S = 14; + public static final int MIPS_INS_ADDS_U = 15; + public static final int MIPS_INS_ADDU16 = 16; + public static final int MIPS_INS_ADDUH = 17; + public static final int MIPS_INS_ADDUH_R = 18; + public static final int MIPS_INS_ADDU = 19; + public static final int MIPS_INS_ADDU_S = 20; + public static final int MIPS_INS_ADDVI = 21; + public static final int MIPS_INS_ADDV = 22; + public static final int MIPS_INS_ADDWC = 23; + public static final int MIPS_INS_ADD_A = 24; + public static final int MIPS_INS_ADDI = 25; + public static final int MIPS_INS_ADDIU = 26; + public static final int MIPS_INS_ALIGN = 27; + public static final int MIPS_INS_ALUIPC = 28; + public static final int MIPS_INS_AND = 29; + public static final int MIPS_INS_AND16 = 30; + public static final int MIPS_INS_ANDI16 = 31; + public static final int MIPS_INS_ANDI = 32; + public static final int MIPS_INS_APPEND = 33; + public static final int MIPS_INS_ASUB_S = 34; + public static final int MIPS_INS_ASUB_U = 35; + public static final int MIPS_INS_AUI = 36; + public static final int MIPS_INS_AUIPC = 37; + public static final int MIPS_INS_AVER_S = 38; + public static final int MIPS_INS_AVER_U = 39; + public static final int MIPS_INS_AVE_S = 40; + public static final int MIPS_INS_AVE_U = 41; + public static final int MIPS_INS_B16 = 42; + public static final int MIPS_INS_BADDU = 43; + public static final int MIPS_INS_BAL = 44; + public static final int MIPS_INS_BALC = 45; + public static final int MIPS_INS_BALIGN = 46; + public static final int MIPS_INS_BBIT0 = 47; + public static final int MIPS_INS_BBIT032 = 48; + public static final int MIPS_INS_BBIT1 = 49; + public static final int MIPS_INS_BBIT132 = 50; + public static final int MIPS_INS_BC = 51; + public static final int MIPS_INS_BC0F = 52; + public static final int MIPS_INS_BC0FL = 53; + public static final int MIPS_INS_BC0T = 54; + public static final int MIPS_INS_BC0TL = 55; + public static final int MIPS_INS_BC1EQZ = 56; + public static final int MIPS_INS_BC1F = 57; + public static final int MIPS_INS_BC1FL = 58; + public static final int MIPS_INS_BC1NEZ = 59; + public static final int MIPS_INS_BC1T = 60; + public static final int MIPS_INS_BC1TL = 61; + public static final int MIPS_INS_BC2EQZ = 62; + public static final int MIPS_INS_BC2F = 63; + public static final int MIPS_INS_BC2FL = 64; + public static final int MIPS_INS_BC2NEZ = 65; + public static final int MIPS_INS_BC2T = 66; + public static final int MIPS_INS_BC2TL = 67; + public static final int MIPS_INS_BC3F = 68; + public static final int MIPS_INS_BC3FL = 69; + public static final int MIPS_INS_BC3T = 70; + public static final int MIPS_INS_BC3TL = 71; + public static final int MIPS_INS_BCLRI = 72; + public static final int MIPS_INS_BCLR = 73; + public static final int MIPS_INS_BEQ = 74; + public static final int MIPS_INS_BEQC = 75; + public static final int MIPS_INS_BEQL = 76; + public static final int MIPS_INS_BEQZ16 = 77; + public static final int MIPS_INS_BEQZALC = 78; + public static final int MIPS_INS_BEQZC = 79; + public static final int MIPS_INS_BGEC = 80; + public static final int MIPS_INS_BGEUC = 81; + public static final int MIPS_INS_BGEZ = 82; + public static final int MIPS_INS_BGEZAL = 83; + public static final int MIPS_INS_BGEZALC = 84; + public static final int MIPS_INS_BGEZALL = 85; + public static final int MIPS_INS_BGEZALS = 86; + public static final int MIPS_INS_BGEZC = 87; + public static final int MIPS_INS_BGEZL = 88; + public static final int MIPS_INS_BGTZ = 89; + public static final int MIPS_INS_BGTZALC = 90; + public static final int MIPS_INS_BGTZC = 91; + public static final int MIPS_INS_BGTZL = 92; + public static final int MIPS_INS_BINSLI = 93; + public static final int MIPS_INS_BINSL = 94; + public static final int MIPS_INS_BINSRI = 95; + public static final int MIPS_INS_BINSR = 96; + public static final int MIPS_INS_BITREV = 97; + public static final int MIPS_INS_BITSWAP = 98; + public static final int MIPS_INS_BLEZ = 99; + public static final int MIPS_INS_BLEZALC = 100; + public static final int MIPS_INS_BLEZC = 101; + public static final int MIPS_INS_BLEZL = 102; + public static final int MIPS_INS_BLTC = 103; + public static final int MIPS_INS_BLTUC = 104; + public static final int MIPS_INS_BLTZ = 105; + public static final int MIPS_INS_BLTZAL = 106; + public static final int MIPS_INS_BLTZALC = 107; + public static final int MIPS_INS_BLTZALL = 108; + public static final int MIPS_INS_BLTZALS = 109; + public static final int MIPS_INS_BLTZC = 110; + public static final int MIPS_INS_BLTZL = 111; + public static final int MIPS_INS_BMNZI = 112; + public static final int MIPS_INS_BMNZ = 113; + public static final int MIPS_INS_BMZI = 114; + public static final int MIPS_INS_BMZ = 115; + public static final int MIPS_INS_BNE = 116; + public static final int MIPS_INS_BNEC = 117; + public static final int MIPS_INS_BNEGI = 118; + public static final int MIPS_INS_BNEG = 119; + public static final int MIPS_INS_BNEL = 120; + public static final int MIPS_INS_BNEZ16 = 121; + public static final int MIPS_INS_BNEZALC = 122; + public static final int MIPS_INS_BNEZC = 123; + public static final int MIPS_INS_BNVC = 124; + public static final int MIPS_INS_BNZ = 125; + public static final int MIPS_INS_BOVC = 126; + public static final int MIPS_INS_BPOSGE32 = 127; + public static final int MIPS_INS_BREAK = 128; + public static final int MIPS_INS_BREAK16 = 129; + public static final int MIPS_INS_BSELI = 130; + public static final int MIPS_INS_BSEL = 131; + public static final int MIPS_INS_BSETI = 132; + public static final int MIPS_INS_BSET = 133; + public static final int MIPS_INS_BZ = 134; + public static final int MIPS_INS_BEQZ = 135; + public static final int MIPS_INS_B = 136; + public static final int MIPS_INS_BNEZ = 137; + public static final int MIPS_INS_BTEQZ = 138; + public static final int MIPS_INS_BTNEZ = 139; + public static final int MIPS_INS_CACHE = 140; + public static final int MIPS_INS_CEIL = 141; + public static final int MIPS_INS_CEQI = 142; + public static final int MIPS_INS_CEQ = 143; + public static final int MIPS_INS_CFC1 = 144; + public static final int MIPS_INS_CFCMSA = 145; + public static final int MIPS_INS_CINS = 146; + public static final int MIPS_INS_CINS32 = 147; + public static final int MIPS_INS_CLASS = 148; + public static final int MIPS_INS_CLEI_S = 149; + public static final int MIPS_INS_CLEI_U = 150; + public static final int MIPS_INS_CLE_S = 151; + public static final int MIPS_INS_CLE_U = 152; + public static final int MIPS_INS_CLO = 153; + public static final int MIPS_INS_CLTI_S = 154; + public static final int MIPS_INS_CLTI_U = 155; + public static final int MIPS_INS_CLT_S = 156; + public static final int MIPS_INS_CLT_U = 157; + public static final int MIPS_INS_CLZ = 158; + public static final int MIPS_INS_CMPGDU = 159; + public static final int MIPS_INS_CMPGU = 160; + public static final int MIPS_INS_CMPU = 161; + public static final int MIPS_INS_CMP = 162; + public static final int MIPS_INS_COPY_S = 163; + public static final int MIPS_INS_COPY_U = 164; + public static final int MIPS_INS_CTC1 = 165; + public static final int MIPS_INS_CTCMSA = 166; + public static final int MIPS_INS_CVT = 167; + public static final int MIPS_INS_C = 168; + public static final int MIPS_INS_CMPI = 169; + public static final int MIPS_INS_DADD = 170; + public static final int MIPS_INS_DADDI = 171; + public static final int MIPS_INS_DADDIU = 172; + public static final int MIPS_INS_DADDU = 173; + public static final int MIPS_INS_DAHI = 174; + public static final int MIPS_INS_DALIGN = 175; + public static final int MIPS_INS_DATI = 176; + public static final int MIPS_INS_DAUI = 177; + public static final int MIPS_INS_DBITSWAP = 178; + public static final int MIPS_INS_DCLO = 179; + public static final int MIPS_INS_DCLZ = 180; + public static final int MIPS_INS_DDIV = 181; + public static final int MIPS_INS_DDIVU = 182; + public static final int MIPS_INS_DERET = 183; + public static final int MIPS_INS_DEXT = 184; + public static final int MIPS_INS_DEXTM = 185; + public static final int MIPS_INS_DEXTU = 186; + public static final int MIPS_INS_DI = 187; + public static final int MIPS_INS_DINS = 188; + public static final int MIPS_INS_DINSM = 189; + public static final int MIPS_INS_DINSU = 190; + public static final int MIPS_INS_DIV = 191; + public static final int MIPS_INS_DIVU = 192; + public static final int MIPS_INS_DIV_S = 193; + public static final int MIPS_INS_DIV_U = 194; + public static final int MIPS_INS_DLSA = 195; + public static final int MIPS_INS_DMFC0 = 196; + public static final int MIPS_INS_DMFC1 = 197; + public static final int MIPS_INS_DMFC2 = 198; + public static final int MIPS_INS_DMOD = 199; + public static final int MIPS_INS_DMODU = 200; + public static final int MIPS_INS_DMTC0 = 201; + public static final int MIPS_INS_DMTC1 = 202; + public static final int MIPS_INS_DMTC2 = 203; + public static final int MIPS_INS_DMUH = 204; + public static final int MIPS_INS_DMUHU = 205; + public static final int MIPS_INS_DMUL = 206; + public static final int MIPS_INS_DMULT = 207; + public static final int MIPS_INS_DMULTU = 208; + public static final int MIPS_INS_DMULU = 209; + public static final int MIPS_INS_DOTP_S = 210; + public static final int MIPS_INS_DOTP_U = 211; + public static final int MIPS_INS_DPADD_S = 212; + public static final int MIPS_INS_DPADD_U = 213; + public static final int MIPS_INS_DPAQX_SA = 214; + public static final int MIPS_INS_DPAQX_S = 215; + public static final int MIPS_INS_DPAQ_SA = 216; + public static final int MIPS_INS_DPAQ_S = 217; + public static final int MIPS_INS_DPAU = 218; + public static final int MIPS_INS_DPAX = 219; + public static final int MIPS_INS_DPA = 220; + public static final int MIPS_INS_DPOP = 221; + public static final int MIPS_INS_DPSQX_SA = 222; + public static final int MIPS_INS_DPSQX_S = 223; + public static final int MIPS_INS_DPSQ_SA = 224; + public static final int MIPS_INS_DPSQ_S = 225; + public static final int MIPS_INS_DPSUB_S = 226; + public static final int MIPS_INS_DPSUB_U = 227; + public static final int MIPS_INS_DPSU = 228; + public static final int MIPS_INS_DPSX = 229; + public static final int MIPS_INS_DPS = 230; + public static final int MIPS_INS_DROTR = 231; + public static final int MIPS_INS_DROTR32 = 232; + public static final int MIPS_INS_DROTRV = 233; + public static final int MIPS_INS_DSBH = 234; + public static final int MIPS_INS_DSHD = 235; + public static final int MIPS_INS_DSLL = 236; + public static final int MIPS_INS_DSLL32 = 237; + public static final int MIPS_INS_DSLLV = 238; + public static final int MIPS_INS_DSRA = 239; + public static final int MIPS_INS_DSRA32 = 240; + public static final int MIPS_INS_DSRAV = 241; + public static final int MIPS_INS_DSRL = 242; + public static final int MIPS_INS_DSRL32 = 243; + public static final int MIPS_INS_DSRLV = 244; + public static final int MIPS_INS_DSUB = 245; + public static final int MIPS_INS_DSUBU = 246; + public static final int MIPS_INS_EHB = 247; + public static final int MIPS_INS_EI = 248; + public static final int MIPS_INS_ERET = 249; + public static final int MIPS_INS_EXT = 250; + public static final int MIPS_INS_EXTP = 251; + public static final int MIPS_INS_EXTPDP = 252; + public static final int MIPS_INS_EXTPDPV = 253; + public static final int MIPS_INS_EXTPV = 254; + public static final int MIPS_INS_EXTRV_RS = 255; + public static final int MIPS_INS_EXTRV_R = 256; + public static final int MIPS_INS_EXTRV_S = 257; + public static final int MIPS_INS_EXTRV = 258; + public static final int MIPS_INS_EXTR_RS = 259; + public static final int MIPS_INS_EXTR_R = 260; + public static final int MIPS_INS_EXTR_S = 261; + public static final int MIPS_INS_EXTR = 262; + public static final int MIPS_INS_EXTS = 263; + public static final int MIPS_INS_EXTS32 = 264; + public static final int MIPS_INS_ABS = 265; + public static final int MIPS_INS_FADD = 266; + public static final int MIPS_INS_FCAF = 267; + public static final int MIPS_INS_FCEQ = 268; + public static final int MIPS_INS_FCLASS = 269; + public static final int MIPS_INS_FCLE = 270; + public static final int MIPS_INS_FCLT = 271; + public static final int MIPS_INS_FCNE = 272; + public static final int MIPS_INS_FCOR = 273; + public static final int MIPS_INS_FCUEQ = 274; + public static final int MIPS_INS_FCULE = 275; + public static final int MIPS_INS_FCULT = 276; + public static final int MIPS_INS_FCUNE = 277; + public static final int MIPS_INS_FCUN = 278; + public static final int MIPS_INS_FDIV = 279; + public static final int MIPS_INS_FEXDO = 280; + public static final int MIPS_INS_FEXP2 = 281; + public static final int MIPS_INS_FEXUPL = 282; + public static final int MIPS_INS_FEXUPR = 283; + public static final int MIPS_INS_FFINT_S = 284; + public static final int MIPS_INS_FFINT_U = 285; + public static final int MIPS_INS_FFQL = 286; + public static final int MIPS_INS_FFQR = 287; + public static final int MIPS_INS_FILL = 288; + public static final int MIPS_INS_FLOG2 = 289; + public static final int MIPS_INS_FLOOR = 290; + public static final int MIPS_INS_FMADD = 291; + public static final int MIPS_INS_FMAX_A = 292; + public static final int MIPS_INS_FMAX = 293; + public static final int MIPS_INS_FMIN_A = 294; + public static final int MIPS_INS_FMIN = 295; + public static final int MIPS_INS_MOV = 296; + public static final int MIPS_INS_FMSUB = 297; + public static final int MIPS_INS_FMUL = 298; + public static final int MIPS_INS_MUL = 299; + public static final int MIPS_INS_NEG = 300; + public static final int MIPS_INS_FRCP = 301; + public static final int MIPS_INS_FRINT = 302; + public static final int MIPS_INS_FRSQRT = 303; + public static final int MIPS_INS_FSAF = 304; + public static final int MIPS_INS_FSEQ = 305; + public static final int MIPS_INS_FSLE = 306; + public static final int MIPS_INS_FSLT = 307; + public static final int MIPS_INS_FSNE = 308; + public static final int MIPS_INS_FSOR = 309; + public static final int MIPS_INS_FSQRT = 310; + public static final int MIPS_INS_SQRT = 311; + public static final int MIPS_INS_FSUB = 312; + public static final int MIPS_INS_SUB = 313; + public static final int MIPS_INS_FSUEQ = 314; + public static final int MIPS_INS_FSULE = 315; + public static final int MIPS_INS_FSULT = 316; + public static final int MIPS_INS_FSUNE = 317; + public static final int MIPS_INS_FSUN = 318; + public static final int MIPS_INS_FTINT_S = 319; + public static final int MIPS_INS_FTINT_U = 320; + public static final int MIPS_INS_FTQ = 321; + public static final int MIPS_INS_FTRUNC_S = 322; + public static final int MIPS_INS_FTRUNC_U = 323; + public static final int MIPS_INS_HADD_S = 324; + public static final int MIPS_INS_HADD_U = 325; + public static final int MIPS_INS_HSUB_S = 326; + public static final int MIPS_INS_HSUB_U = 327; + public static final int MIPS_INS_ILVEV = 328; + public static final int MIPS_INS_ILVL = 329; + public static final int MIPS_INS_ILVOD = 330; + public static final int MIPS_INS_ILVR = 331; + public static final int MIPS_INS_INS = 332; + public static final int MIPS_INS_INSERT = 333; + public static final int MIPS_INS_INSV = 334; + public static final int MIPS_INS_INSVE = 335; + public static final int MIPS_INS_J = 336; + public static final int MIPS_INS_JAL = 337; + public static final int MIPS_INS_JALR = 338; + public static final int MIPS_INS_JALRS16 = 339; + public static final int MIPS_INS_JALRS = 340; + public static final int MIPS_INS_JALS = 341; + public static final int MIPS_INS_JALX = 342; + public static final int MIPS_INS_JIALC = 343; + public static final int MIPS_INS_JIC = 344; + public static final int MIPS_INS_JR = 345; + public static final int MIPS_INS_JR16 = 346; + public static final int MIPS_INS_JRADDIUSP = 347; + public static final int MIPS_INS_JRC = 348; + public static final int MIPS_INS_JALRC = 349; + public static final int MIPS_INS_LB = 350; + public static final int MIPS_INS_LBU16 = 351; + public static final int MIPS_INS_LBUX = 352; + public static final int MIPS_INS_LBU = 353; + public static final int MIPS_INS_LD = 354; + public static final int MIPS_INS_LDC1 = 355; + public static final int MIPS_INS_LDC2 = 356; + public static final int MIPS_INS_LDC3 = 357; + public static final int MIPS_INS_LDI = 358; + public static final int MIPS_INS_LDL = 359; + public static final int MIPS_INS_LDPC = 360; + public static final int MIPS_INS_LDR = 361; + public static final int MIPS_INS_LDXC1 = 362; + public static final int MIPS_INS_LH = 363; + public static final int MIPS_INS_LHU16 = 364; + public static final int MIPS_INS_LHX = 365; + public static final int MIPS_INS_LHU = 366; + public static final int MIPS_INS_LI16 = 367; + public static final int MIPS_INS_LL = 368; + public static final int MIPS_INS_LLD = 369; + public static final int MIPS_INS_LSA = 370; + public static final int MIPS_INS_LUXC1 = 371; + public static final int MIPS_INS_LUI = 372; + public static final int MIPS_INS_LW = 373; + public static final int MIPS_INS_LW16 = 374; + public static final int MIPS_INS_LWC1 = 375; + public static final int MIPS_INS_LWC2 = 376; + public static final int MIPS_INS_LWC3 = 377; + public static final int MIPS_INS_LWL = 378; + public static final int MIPS_INS_LWM16 = 379; + public static final int MIPS_INS_LWM32 = 380; + public static final int MIPS_INS_LWPC = 381; + public static final int MIPS_INS_LWP = 382; + public static final int MIPS_INS_LWR = 383; + public static final int MIPS_INS_LWUPC = 384; + public static final int MIPS_INS_LWU = 385; + public static final int MIPS_INS_LWX = 386; + public static final int MIPS_INS_LWXC1 = 387; + public static final int MIPS_INS_LWXS = 388; + public static final int MIPS_INS_LI = 389; + public static final int MIPS_INS_MADD = 390; + public static final int MIPS_INS_MADDF = 391; + public static final int MIPS_INS_MADDR_Q = 392; + public static final int MIPS_INS_MADDU = 393; + public static final int MIPS_INS_MADDV = 394; + public static final int MIPS_INS_MADD_Q = 395; + public static final int MIPS_INS_MAQ_SA = 396; + public static final int MIPS_INS_MAQ_S = 397; + public static final int MIPS_INS_MAXA = 398; + public static final int MIPS_INS_MAXI_S = 399; + public static final int MIPS_INS_MAXI_U = 400; + public static final int MIPS_INS_MAX_A = 401; + public static final int MIPS_INS_MAX = 402; + public static final int MIPS_INS_MAX_S = 403; + public static final int MIPS_INS_MAX_U = 404; + public static final int MIPS_INS_MFC0 = 405; + public static final int MIPS_INS_MFC1 = 406; + public static final int MIPS_INS_MFC2 = 407; + public static final int MIPS_INS_MFHC1 = 408; + public static final int MIPS_INS_MFHI = 409; + public static final int MIPS_INS_MFLO = 410; + public static final int MIPS_INS_MINA = 411; + public static final int MIPS_INS_MINI_S = 412; + public static final int MIPS_INS_MINI_U = 413; + public static final int MIPS_INS_MIN_A = 414; + public static final int MIPS_INS_MIN = 415; + public static final int MIPS_INS_MIN_S = 416; + public static final int MIPS_INS_MIN_U = 417; + public static final int MIPS_INS_MOD = 418; + public static final int MIPS_INS_MODSUB = 419; + public static final int MIPS_INS_MODU = 420; + public static final int MIPS_INS_MOD_S = 421; + public static final int MIPS_INS_MOD_U = 422; + public static final int MIPS_INS_MOVE = 423; + public static final int MIPS_INS_MOVEP = 424; + public static final int MIPS_INS_MOVF = 425; + public static final int MIPS_INS_MOVN = 426; + public static final int MIPS_INS_MOVT = 427; + public static final int MIPS_INS_MOVZ = 428; + public static final int MIPS_INS_MSUB = 429; + public static final int MIPS_INS_MSUBF = 430; + public static final int MIPS_INS_MSUBR_Q = 431; + public static final int MIPS_INS_MSUBU = 432; + public static final int MIPS_INS_MSUBV = 433; + public static final int MIPS_INS_MSUB_Q = 434; + public static final int MIPS_INS_MTC0 = 435; + public static final int MIPS_INS_MTC1 = 436; + public static final int MIPS_INS_MTC2 = 437; + public static final int MIPS_INS_MTHC1 = 438; + public static final int MIPS_INS_MTHI = 439; + public static final int MIPS_INS_MTHLIP = 440; + public static final int MIPS_INS_MTLO = 441; + public static final int MIPS_INS_MTM0 = 442; + public static final int MIPS_INS_MTM1 = 443; + public static final int MIPS_INS_MTM2 = 444; + public static final int MIPS_INS_MTP0 = 445; + public static final int MIPS_INS_MTP1 = 446; + public static final int MIPS_INS_MTP2 = 447; + public static final int MIPS_INS_MUH = 448; + public static final int MIPS_INS_MUHU = 449; + public static final int MIPS_INS_MULEQ_S = 450; + public static final int MIPS_INS_MULEU_S = 451; + public static final int MIPS_INS_MULQ_RS = 452; + public static final int MIPS_INS_MULQ_S = 453; + public static final int MIPS_INS_MULR_Q = 454; + public static final int MIPS_INS_MULSAQ_S = 455; + public static final int MIPS_INS_MULSA = 456; + public static final int MIPS_INS_MULT = 457; + public static final int MIPS_INS_MULTU = 458; + public static final int MIPS_INS_MULU = 459; + public static final int MIPS_INS_MULV = 460; + public static final int MIPS_INS_MUL_Q = 461; + public static final int MIPS_INS_MUL_S = 462; + public static final int MIPS_INS_NLOC = 463; + public static final int MIPS_INS_NLZC = 464; + public static final int MIPS_INS_NMADD = 465; + public static final int MIPS_INS_NMSUB = 466; + public static final int MIPS_INS_NOR = 467; + public static final int MIPS_INS_NORI = 468; + public static final int MIPS_INS_NOT16 = 469; + public static final int MIPS_INS_NOT = 470; + public static final int MIPS_INS_OR = 471; + public static final int MIPS_INS_OR16 = 472; + public static final int MIPS_INS_ORI = 473; + public static final int MIPS_INS_PACKRL = 474; + public static final int MIPS_INS_PAUSE = 475; + public static final int MIPS_INS_PCKEV = 476; + public static final int MIPS_INS_PCKOD = 477; + public static final int MIPS_INS_PCNT = 478; + public static final int MIPS_INS_PICK = 479; + public static final int MIPS_INS_POP = 480; + public static final int MIPS_INS_PRECEQU = 481; + public static final int MIPS_INS_PRECEQ = 482; + public static final int MIPS_INS_PRECEU = 483; + public static final int MIPS_INS_PRECRQU_S = 484; + public static final int MIPS_INS_PRECRQ = 485; + public static final int MIPS_INS_PRECRQ_RS = 486; + public static final int MIPS_INS_PRECR = 487; + public static final int MIPS_INS_PRECR_SRA = 488; + public static final int MIPS_INS_PRECR_SRA_R = 489; + public static final int MIPS_INS_PREF = 490; + public static final int MIPS_INS_PREPEND = 491; + public static final int MIPS_INS_RADDU = 492; + public static final int MIPS_INS_RDDSP = 493; + public static final int MIPS_INS_RDHWR = 494; + public static final int MIPS_INS_REPLV = 495; + public static final int MIPS_INS_REPL = 496; + public static final int MIPS_INS_RINT = 497; + public static final int MIPS_INS_ROTR = 498; + public static final int MIPS_INS_ROTRV = 499; + public static final int MIPS_INS_ROUND = 500; + public static final int MIPS_INS_SAT_S = 501; + public static final int MIPS_INS_SAT_U = 502; + public static final int MIPS_INS_SB = 503; + public static final int MIPS_INS_SB16 = 504; + public static final int MIPS_INS_SC = 505; + public static final int MIPS_INS_SCD = 506; + public static final int MIPS_INS_SD = 507; + public static final int MIPS_INS_SDBBP = 508; + public static final int MIPS_INS_SDBBP16 = 509; + public static final int MIPS_INS_SDC1 = 510; + public static final int MIPS_INS_SDC2 = 511; + public static final int MIPS_INS_SDC3 = 512; + public static final int MIPS_INS_SDL = 513; + public static final int MIPS_INS_SDR = 514; + public static final int MIPS_INS_SDXC1 = 515; + public static final int MIPS_INS_SEB = 516; + public static final int MIPS_INS_SEH = 517; + public static final int MIPS_INS_SELEQZ = 518; + public static final int MIPS_INS_SELNEZ = 519; + public static final int MIPS_INS_SEL = 520; + public static final int MIPS_INS_SEQ = 521; + public static final int MIPS_INS_SEQI = 522; + public static final int MIPS_INS_SH = 523; + public static final int MIPS_INS_SH16 = 524; + public static final int MIPS_INS_SHF = 525; + public static final int MIPS_INS_SHILO = 526; + public static final int MIPS_INS_SHILOV = 527; + public static final int MIPS_INS_SHLLV = 528; + public static final int MIPS_INS_SHLLV_S = 529; + public static final int MIPS_INS_SHLL = 530; + public static final int MIPS_INS_SHLL_S = 531; + public static final int MIPS_INS_SHRAV = 532; + public static final int MIPS_INS_SHRAV_R = 533; + public static final int MIPS_INS_SHRA = 534; + public static final int MIPS_INS_SHRA_R = 535; + public static final int MIPS_INS_SHRLV = 536; + public static final int MIPS_INS_SHRL = 537; + public static final int MIPS_INS_SLDI = 538; + public static final int MIPS_INS_SLD = 539; + public static final int MIPS_INS_SLL = 540; + public static final int MIPS_INS_SLL16 = 541; + public static final int MIPS_INS_SLLI = 542; + public static final int MIPS_INS_SLLV = 543; + public static final int MIPS_INS_SLT = 544; + public static final int MIPS_INS_SLTI = 545; + public static final int MIPS_INS_SLTIU = 546; + public static final int MIPS_INS_SLTU = 547; + public static final int MIPS_INS_SNE = 548; + public static final int MIPS_INS_SNEI = 549; + public static final int MIPS_INS_SPLATI = 550; + public static final int MIPS_INS_SPLAT = 551; + public static final int MIPS_INS_SRA = 552; + public static final int MIPS_INS_SRAI = 553; + public static final int MIPS_INS_SRARI = 554; + public static final int MIPS_INS_SRAR = 555; + public static final int MIPS_INS_SRAV = 556; + public static final int MIPS_INS_SRL = 557; + public static final int MIPS_INS_SRL16 = 558; + public static final int MIPS_INS_SRLI = 559; + public static final int MIPS_INS_SRLRI = 560; + public static final int MIPS_INS_SRLR = 561; + public static final int MIPS_INS_SRLV = 562; + public static final int MIPS_INS_SSNOP = 563; + public static final int MIPS_INS_ST = 564; + public static final int MIPS_INS_SUBQH = 565; + public static final int MIPS_INS_SUBQH_R = 566; + public static final int MIPS_INS_SUBQ = 567; + public static final int MIPS_INS_SUBQ_S = 568; + public static final int MIPS_INS_SUBSUS_U = 569; + public static final int MIPS_INS_SUBSUU_S = 570; + public static final int MIPS_INS_SUBS_S = 571; + public static final int MIPS_INS_SUBS_U = 572; + public static final int MIPS_INS_SUBU16 = 573; + public static final int MIPS_INS_SUBUH = 574; + public static final int MIPS_INS_SUBUH_R = 575; + public static final int MIPS_INS_SUBU = 576; + public static final int MIPS_INS_SUBU_S = 577; + public static final int MIPS_INS_SUBVI = 578; + public static final int MIPS_INS_SUBV = 579; + public static final int MIPS_INS_SUXC1 = 580; + public static final int MIPS_INS_SW = 581; + public static final int MIPS_INS_SW16 = 582; + public static final int MIPS_INS_SWC1 = 583; + public static final int MIPS_INS_SWC2 = 584; + public static final int MIPS_INS_SWC3 = 585; + public static final int MIPS_INS_SWL = 586; + public static final int MIPS_INS_SWM16 = 587; + public static final int MIPS_INS_SWM32 = 588; + public static final int MIPS_INS_SWP = 589; + public static final int MIPS_INS_SWR = 590; + public static final int MIPS_INS_SWXC1 = 591; + public static final int MIPS_INS_SYNC = 592; + public static final int MIPS_INS_SYNCI = 593; + public static final int MIPS_INS_SYSCALL = 594; + public static final int MIPS_INS_TEQ = 595; + public static final int MIPS_INS_TEQI = 596; + public static final int MIPS_INS_TGE = 597; + public static final int MIPS_INS_TGEI = 598; + public static final int MIPS_INS_TGEIU = 599; + public static final int MIPS_INS_TGEU = 600; + public static final int MIPS_INS_TLBP = 601; + public static final int MIPS_INS_TLBR = 602; + public static final int MIPS_INS_TLBWI = 603; + public static final int MIPS_INS_TLBWR = 604; + public static final int MIPS_INS_TLT = 605; + public static final int MIPS_INS_TLTI = 606; + public static final int MIPS_INS_TLTIU = 607; + public static final int MIPS_INS_TLTU = 608; + public static final int MIPS_INS_TNE = 609; + public static final int MIPS_INS_TNEI = 610; + public static final int MIPS_INS_TRUNC = 611; + public static final int MIPS_INS_V3MULU = 612; + public static final int MIPS_INS_VMM0 = 613; + public static final int MIPS_INS_VMULU = 614; + public static final int MIPS_INS_VSHF = 615; + public static final int MIPS_INS_WAIT = 616; + public static final int MIPS_INS_WRDSP = 617; + public static final int MIPS_INS_WSBH = 618; + public static final int MIPS_INS_XOR = 619; + public static final int MIPS_INS_XOR16 = 620; + public static final int MIPS_INS_XORI = 621; // some alias instructions - public static final int MIPS_INS_NOP = 582; - public static final int MIPS_INS_NEGU = 583; + public static final int MIPS_INS_NOP = 622; + public static final int MIPS_INS_NEGU = 623; // special instructions - public static final int MIPS_INS_JALR_HB = 584; - public static final int MIPS_INS_JR_HB = 585; - public static final int MIPS_INS_ENDING = 586; + public static final int MIPS_INS_JALR_HB = 624; + public static final int MIPS_INS_JR_HB = 625; + public static final int MIPS_INS_ENDING = 626; // Group of MIPS instructions diff --git a/bindings/ocaml/mips_const.ml b/bindings/ocaml/mips_const.ml index b7ae2506..9186154a 100644 --- a/bindings/ocaml/mips_const.ml +++ b/bindings/ocaml/mips_const.ml @@ -12,152 +12,153 @@ let _MIPS_OP_MEM = 3;; let _MIPS_REG_INVALID = 0;; (* General purpose registers *) -let _MIPS_REG_0 = 1;; -let _MIPS_REG_1 = 2;; -let _MIPS_REG_2 = 3;; -let _MIPS_REG_3 = 4;; -let _MIPS_REG_4 = 5;; -let _MIPS_REG_5 = 6;; -let _MIPS_REG_6 = 7;; -let _MIPS_REG_7 = 8;; -let _MIPS_REG_8 = 9;; -let _MIPS_REG_9 = 10;; -let _MIPS_REG_10 = 11;; -let _MIPS_REG_11 = 12;; -let _MIPS_REG_12 = 13;; -let _MIPS_REG_13 = 14;; -let _MIPS_REG_14 = 15;; -let _MIPS_REG_15 = 16;; -let _MIPS_REG_16 = 17;; -let _MIPS_REG_17 = 18;; -let _MIPS_REG_18 = 19;; -let _MIPS_REG_19 = 20;; -let _MIPS_REG_20 = 21;; -let _MIPS_REG_21 = 22;; -let _MIPS_REG_22 = 23;; -let _MIPS_REG_23 = 24;; -let _MIPS_REG_24 = 25;; -let _MIPS_REG_25 = 26;; -let _MIPS_REG_26 = 27;; -let _MIPS_REG_27 = 28;; -let _MIPS_REG_28 = 29;; -let _MIPS_REG_29 = 30;; -let _MIPS_REG_30 = 31;; -let _MIPS_REG_31 = 32;; +let _MIPS_REG_PC = 1;; +let _MIPS_REG_0 = 2;; +let _MIPS_REG_1 = 3;; +let _MIPS_REG_2 = 4;; +let _MIPS_REG_3 = 5;; +let _MIPS_REG_4 = 6;; +let _MIPS_REG_5 = 7;; +let _MIPS_REG_6 = 8;; +let _MIPS_REG_7 = 9;; +let _MIPS_REG_8 = 10;; +let _MIPS_REG_9 = 11;; +let _MIPS_REG_10 = 12;; +let _MIPS_REG_11 = 13;; +let _MIPS_REG_12 = 14;; +let _MIPS_REG_13 = 15;; +let _MIPS_REG_14 = 16;; +let _MIPS_REG_15 = 17;; +let _MIPS_REG_16 = 18;; +let _MIPS_REG_17 = 19;; +let _MIPS_REG_18 = 20;; +let _MIPS_REG_19 = 21;; +let _MIPS_REG_20 = 22;; +let _MIPS_REG_21 = 23;; +let _MIPS_REG_22 = 24;; +let _MIPS_REG_23 = 25;; +let _MIPS_REG_24 = 26;; +let _MIPS_REG_25 = 27;; +let _MIPS_REG_26 = 28;; +let _MIPS_REG_27 = 29;; +let _MIPS_REG_28 = 30;; +let _MIPS_REG_29 = 31;; +let _MIPS_REG_30 = 32;; +let _MIPS_REG_31 = 33;; (* DSP registers *) -let _MIPS_REG_DSPCCOND = 33;; -let _MIPS_REG_DSPCARRY = 34;; -let _MIPS_REG_DSPEFI = 35;; -let _MIPS_REG_DSPOUTFLAG = 36;; -let _MIPS_REG_DSPOUTFLAG16_19 = 37;; -let _MIPS_REG_DSPOUTFLAG20 = 38;; -let _MIPS_REG_DSPOUTFLAG21 = 39;; -let _MIPS_REG_DSPOUTFLAG22 = 40;; -let _MIPS_REG_DSPOUTFLAG23 = 41;; -let _MIPS_REG_DSPPOS = 42;; -let _MIPS_REG_DSPSCOUNT = 43;; +let _MIPS_REG_DSPCCOND = 34;; +let _MIPS_REG_DSPCARRY = 35;; +let _MIPS_REG_DSPEFI = 36;; +let _MIPS_REG_DSPOUTFLAG = 37;; +let _MIPS_REG_DSPOUTFLAG16_19 = 38;; +let _MIPS_REG_DSPOUTFLAG20 = 39;; +let _MIPS_REG_DSPOUTFLAG21 = 40;; +let _MIPS_REG_DSPOUTFLAG22 = 41;; +let _MIPS_REG_DSPOUTFLAG23 = 42;; +let _MIPS_REG_DSPPOS = 43;; +let _MIPS_REG_DSPSCOUNT = 44;; (* ACC registers *) -let _MIPS_REG_AC0 = 44;; -let _MIPS_REG_AC1 = 45;; -let _MIPS_REG_AC2 = 46;; -let _MIPS_REG_AC3 = 47;; +let _MIPS_REG_AC0 = 45;; +let _MIPS_REG_AC1 = 46;; +let _MIPS_REG_AC2 = 47;; +let _MIPS_REG_AC3 = 48;; (* COP registers *) -let _MIPS_REG_CC0 = 48;; -let _MIPS_REG_CC1 = 49;; -let _MIPS_REG_CC2 = 50;; -let _MIPS_REG_CC3 = 51;; -let _MIPS_REG_CC4 = 52;; -let _MIPS_REG_CC5 = 53;; -let _MIPS_REG_CC6 = 54;; -let _MIPS_REG_CC7 = 55;; +let _MIPS_REG_CC0 = 49;; +let _MIPS_REG_CC1 = 50;; +let _MIPS_REG_CC2 = 51;; +let _MIPS_REG_CC3 = 52;; +let _MIPS_REG_CC4 = 53;; +let _MIPS_REG_CC5 = 54;; +let _MIPS_REG_CC6 = 55;; +let _MIPS_REG_CC7 = 56;; (* FPU registers *) -let _MIPS_REG_F0 = 56;; -let _MIPS_REG_F1 = 57;; -let _MIPS_REG_F2 = 58;; -let _MIPS_REG_F3 = 59;; -let _MIPS_REG_F4 = 60;; -let _MIPS_REG_F5 = 61;; -let _MIPS_REG_F6 = 62;; -let _MIPS_REG_F7 = 63;; -let _MIPS_REG_F8 = 64;; -let _MIPS_REG_F9 = 65;; -let _MIPS_REG_F10 = 66;; -let _MIPS_REG_F11 = 67;; -let _MIPS_REG_F12 = 68;; -let _MIPS_REG_F13 = 69;; -let _MIPS_REG_F14 = 70;; -let _MIPS_REG_F15 = 71;; -let _MIPS_REG_F16 = 72;; -let _MIPS_REG_F17 = 73;; -let _MIPS_REG_F18 = 74;; -let _MIPS_REG_F19 = 75;; -let _MIPS_REG_F20 = 76;; -let _MIPS_REG_F21 = 77;; -let _MIPS_REG_F22 = 78;; -let _MIPS_REG_F23 = 79;; -let _MIPS_REG_F24 = 80;; -let _MIPS_REG_F25 = 81;; -let _MIPS_REG_F26 = 82;; -let _MIPS_REG_F27 = 83;; -let _MIPS_REG_F28 = 84;; -let _MIPS_REG_F29 = 85;; -let _MIPS_REG_F30 = 86;; -let _MIPS_REG_F31 = 87;; -let _MIPS_REG_FCC0 = 88;; -let _MIPS_REG_FCC1 = 89;; -let _MIPS_REG_FCC2 = 90;; -let _MIPS_REG_FCC3 = 91;; -let _MIPS_REG_FCC4 = 92;; -let _MIPS_REG_FCC5 = 93;; -let _MIPS_REG_FCC6 = 94;; -let _MIPS_REG_FCC7 = 95;; +let _MIPS_REG_F0 = 57;; +let _MIPS_REG_F1 = 58;; +let _MIPS_REG_F2 = 59;; +let _MIPS_REG_F3 = 60;; +let _MIPS_REG_F4 = 61;; +let _MIPS_REG_F5 = 62;; +let _MIPS_REG_F6 = 63;; +let _MIPS_REG_F7 = 64;; +let _MIPS_REG_F8 = 65;; +let _MIPS_REG_F9 = 66;; +let _MIPS_REG_F10 = 67;; +let _MIPS_REG_F11 = 68;; +let _MIPS_REG_F12 = 69;; +let _MIPS_REG_F13 = 70;; +let _MIPS_REG_F14 = 71;; +let _MIPS_REG_F15 = 72;; +let _MIPS_REG_F16 = 73;; +let _MIPS_REG_F17 = 74;; +let _MIPS_REG_F18 = 75;; +let _MIPS_REG_F19 = 76;; +let _MIPS_REG_F20 = 77;; +let _MIPS_REG_F21 = 78;; +let _MIPS_REG_F22 = 79;; +let _MIPS_REG_F23 = 80;; +let _MIPS_REG_F24 = 81;; +let _MIPS_REG_F25 = 82;; +let _MIPS_REG_F26 = 83;; +let _MIPS_REG_F27 = 84;; +let _MIPS_REG_F28 = 85;; +let _MIPS_REG_F29 = 86;; +let _MIPS_REG_F30 = 87;; +let _MIPS_REG_F31 = 88;; +let _MIPS_REG_FCC0 = 89;; +let _MIPS_REG_FCC1 = 90;; +let _MIPS_REG_FCC2 = 91;; +let _MIPS_REG_FCC3 = 92;; +let _MIPS_REG_FCC4 = 93;; +let _MIPS_REG_FCC5 = 94;; +let _MIPS_REG_FCC6 = 95;; +let _MIPS_REG_FCC7 = 96;; (* AFPR128 *) -let _MIPS_REG_W0 = 96;; -let _MIPS_REG_W1 = 97;; -let _MIPS_REG_W2 = 98;; -let _MIPS_REG_W3 = 99;; -let _MIPS_REG_W4 = 100;; -let _MIPS_REG_W5 = 101;; -let _MIPS_REG_W6 = 102;; -let _MIPS_REG_W7 = 103;; -let _MIPS_REG_W8 = 104;; -let _MIPS_REG_W9 = 105;; -let _MIPS_REG_W10 = 106;; -let _MIPS_REG_W11 = 107;; -let _MIPS_REG_W12 = 108;; -let _MIPS_REG_W13 = 109;; -let _MIPS_REG_W14 = 110;; -let _MIPS_REG_W15 = 111;; -let _MIPS_REG_W16 = 112;; -let _MIPS_REG_W17 = 113;; -let _MIPS_REG_W18 = 114;; -let _MIPS_REG_W19 = 115;; -let _MIPS_REG_W20 = 116;; -let _MIPS_REG_W21 = 117;; -let _MIPS_REG_W22 = 118;; -let _MIPS_REG_W23 = 119;; -let _MIPS_REG_W24 = 120;; -let _MIPS_REG_W25 = 121;; -let _MIPS_REG_W26 = 122;; -let _MIPS_REG_W27 = 123;; -let _MIPS_REG_W28 = 124;; -let _MIPS_REG_W29 = 125;; -let _MIPS_REG_W30 = 126;; -let _MIPS_REG_W31 = 127;; -let _MIPS_REG_HI = 128;; -let _MIPS_REG_LO = 129;; -let _MIPS_REG_P0 = 130;; -let _MIPS_REG_P1 = 131;; -let _MIPS_REG_P2 = 132;; -let _MIPS_REG_MPL0 = 133;; -let _MIPS_REG_MPL1 = 134;; -let _MIPS_REG_MPL2 = 135;; -let _MIPS_REG_ENDING = 136;; +let _MIPS_REG_W0 = 97;; +let _MIPS_REG_W1 = 98;; +let _MIPS_REG_W2 = 99;; +let _MIPS_REG_W3 = 100;; +let _MIPS_REG_W4 = 101;; +let _MIPS_REG_W5 = 102;; +let _MIPS_REG_W6 = 103;; +let _MIPS_REG_W7 = 104;; +let _MIPS_REG_W8 = 105;; +let _MIPS_REG_W9 = 106;; +let _MIPS_REG_W10 = 107;; +let _MIPS_REG_W11 = 108;; +let _MIPS_REG_W12 = 109;; +let _MIPS_REG_W13 = 110;; +let _MIPS_REG_W14 = 111;; +let _MIPS_REG_W15 = 112;; +let _MIPS_REG_W16 = 113;; +let _MIPS_REG_W17 = 114;; +let _MIPS_REG_W18 = 115;; +let _MIPS_REG_W19 = 116;; +let _MIPS_REG_W20 = 117;; +let _MIPS_REG_W21 = 118;; +let _MIPS_REG_W22 = 119;; +let _MIPS_REG_W23 = 120;; +let _MIPS_REG_W24 = 121;; +let _MIPS_REG_W25 = 122;; +let _MIPS_REG_W26 = 123;; +let _MIPS_REG_W27 = 124;; +let _MIPS_REG_W28 = 125;; +let _MIPS_REG_W29 = 126;; +let _MIPS_REG_W30 = 127;; +let _MIPS_REG_W31 = 128;; +let _MIPS_REG_HI = 129;; +let _MIPS_REG_LO = 130;; +let _MIPS_REG_P0 = 131;; +let _MIPS_REG_P1 = 132;; +let _MIPS_REG_P2 = 133;; +let _MIPS_REG_MPL0 = 134;; +let _MIPS_REG_MPL1 = 135;; +let _MIPS_REG_MPL2 = 136;; +let _MIPS_REG_ENDING = 137;; let _MIPS_REG_ZERO = _MIPS_REG_0;; let _MIPS_REG_AT = _MIPS_REG_1;; let _MIPS_REG_V0 = _MIPS_REG_2;; @@ -206,593 +207,633 @@ let _MIPS_INS_INVALID = 0;; let _MIPS_INS_ABSQ_S = 1;; let _MIPS_INS_ADD = 2;; let _MIPS_INS_ADDIUPC = 3;; -let _MIPS_INS_ADDQH = 4;; -let _MIPS_INS_ADDQH_R = 5;; -let _MIPS_INS_ADDQ = 6;; -let _MIPS_INS_ADDQ_S = 7;; -let _MIPS_INS_ADDSC = 8;; -let _MIPS_INS_ADDS_A = 9;; -let _MIPS_INS_ADDS_S = 10;; -let _MIPS_INS_ADDS_U = 11;; -let _MIPS_INS_ADDUH = 12;; -let _MIPS_INS_ADDUH_R = 13;; -let _MIPS_INS_ADDU = 14;; -let _MIPS_INS_ADDU_S = 15;; -let _MIPS_INS_ADDVI = 16;; -let _MIPS_INS_ADDV = 17;; -let _MIPS_INS_ADDWC = 18;; -let _MIPS_INS_ADD_A = 19;; -let _MIPS_INS_ADDI = 20;; -let _MIPS_INS_ADDIU = 21;; -let _MIPS_INS_ALIGN = 22;; -let _MIPS_INS_ALUIPC = 23;; -let _MIPS_INS_AND = 24;; -let _MIPS_INS_ANDI = 25;; -let _MIPS_INS_APPEND = 26;; -let _MIPS_INS_ASUB_S = 27;; -let _MIPS_INS_ASUB_U = 28;; -let _MIPS_INS_AUI = 29;; -let _MIPS_INS_AUIPC = 30;; -let _MIPS_INS_AVER_S = 31;; -let _MIPS_INS_AVER_U = 32;; -let _MIPS_INS_AVE_S = 33;; -let _MIPS_INS_AVE_U = 34;; -let _MIPS_INS_BADDU = 35;; -let _MIPS_INS_BAL = 36;; -let _MIPS_INS_BALC = 37;; -let _MIPS_INS_BALIGN = 38;; -let _MIPS_INS_BC = 39;; -let _MIPS_INS_BC0F = 40;; -let _MIPS_INS_BC0FL = 41;; -let _MIPS_INS_BC0T = 42;; -let _MIPS_INS_BC0TL = 43;; -let _MIPS_INS_BC1EQZ = 44;; -let _MIPS_INS_BC1F = 45;; -let _MIPS_INS_BC1FL = 46;; -let _MIPS_INS_BC1NEZ = 47;; -let _MIPS_INS_BC1T = 48;; -let _MIPS_INS_BC1TL = 49;; -let _MIPS_INS_BC2EQZ = 50;; -let _MIPS_INS_BC2F = 51;; -let _MIPS_INS_BC2FL = 52;; -let _MIPS_INS_BC2NEZ = 53;; -let _MIPS_INS_BC2T = 54;; -let _MIPS_INS_BC2TL = 55;; -let _MIPS_INS_BC3F = 56;; -let _MIPS_INS_BC3FL = 57;; -let _MIPS_INS_BC3T = 58;; -let _MIPS_INS_BC3TL = 59;; -let _MIPS_INS_BCLRI = 60;; -let _MIPS_INS_BCLR = 61;; -let _MIPS_INS_BEQ = 62;; -let _MIPS_INS_BEQC = 63;; -let _MIPS_INS_BEQL = 64;; -let _MIPS_INS_BEQZALC = 65;; -let _MIPS_INS_BEQZC = 66;; -let _MIPS_INS_BGEC = 67;; -let _MIPS_INS_BGEUC = 68;; -let _MIPS_INS_BGEZ = 69;; -let _MIPS_INS_BGEZAL = 70;; -let _MIPS_INS_BGEZALC = 71;; -let _MIPS_INS_BGEZALL = 72;; -let _MIPS_INS_BGEZALS = 73;; -let _MIPS_INS_BGEZC = 74;; -let _MIPS_INS_BGEZL = 75;; -let _MIPS_INS_BGTZ = 76;; -let _MIPS_INS_BGTZALC = 77;; -let _MIPS_INS_BGTZC = 78;; -let _MIPS_INS_BGTZL = 79;; -let _MIPS_INS_BINSLI = 80;; -let _MIPS_INS_BINSL = 81;; -let _MIPS_INS_BINSRI = 82;; -let _MIPS_INS_BINSR = 83;; -let _MIPS_INS_BITREV = 84;; -let _MIPS_INS_BITSWAP = 85;; -let _MIPS_INS_BLEZ = 86;; -let _MIPS_INS_BLEZALC = 87;; -let _MIPS_INS_BLEZC = 88;; -let _MIPS_INS_BLEZL = 89;; -let _MIPS_INS_BLTC = 90;; -let _MIPS_INS_BLTUC = 91;; -let _MIPS_INS_BLTZ = 92;; -let _MIPS_INS_BLTZAL = 93;; -let _MIPS_INS_BLTZALC = 94;; -let _MIPS_INS_BLTZALL = 95;; -let _MIPS_INS_BLTZALS = 96;; -let _MIPS_INS_BLTZC = 97;; -let _MIPS_INS_BLTZL = 98;; -let _MIPS_INS_BMNZI = 99;; -let _MIPS_INS_BMNZ = 100;; -let _MIPS_INS_BMZI = 101;; -let _MIPS_INS_BMZ = 102;; -let _MIPS_INS_BNE = 103;; -let _MIPS_INS_BNEC = 104;; -let _MIPS_INS_BNEGI = 105;; -let _MIPS_INS_BNEG = 106;; -let _MIPS_INS_BNEL = 107;; -let _MIPS_INS_BNEZALC = 108;; -let _MIPS_INS_BNEZC = 109;; -let _MIPS_INS_BNVC = 110;; -let _MIPS_INS_BNZ = 111;; -let _MIPS_INS_BOVC = 112;; -let _MIPS_INS_BPOSGE32 = 113;; -let _MIPS_INS_BREAK = 114;; -let _MIPS_INS_BSELI = 115;; -let _MIPS_INS_BSEL = 116;; -let _MIPS_INS_BSETI = 117;; -let _MIPS_INS_BSET = 118;; -let _MIPS_INS_BZ = 119;; -let _MIPS_INS_BEQZ = 120;; -let _MIPS_INS_B = 121;; -let _MIPS_INS_BNEZ = 122;; -let _MIPS_INS_BTEQZ = 123;; -let _MIPS_INS_BTNEZ = 124;; -let _MIPS_INS_CACHE = 125;; -let _MIPS_INS_CEIL = 126;; -let _MIPS_INS_CEQI = 127;; -let _MIPS_INS_CEQ = 128;; -let _MIPS_INS_CFC1 = 129;; -let _MIPS_INS_CFCMSA = 130;; -let _MIPS_INS_CINS = 131;; -let _MIPS_INS_CINS32 = 132;; -let _MIPS_INS_CLASS = 133;; -let _MIPS_INS_CLEI_S = 134;; -let _MIPS_INS_CLEI_U = 135;; -let _MIPS_INS_CLE_S = 136;; -let _MIPS_INS_CLE_U = 137;; -let _MIPS_INS_CLO = 138;; -let _MIPS_INS_CLTI_S = 139;; -let _MIPS_INS_CLTI_U = 140;; -let _MIPS_INS_CLT_S = 141;; -let _MIPS_INS_CLT_U = 142;; -let _MIPS_INS_CLZ = 143;; -let _MIPS_INS_CMPGDU = 144;; -let _MIPS_INS_CMPGU = 145;; -let _MIPS_INS_CMPU = 146;; -let _MIPS_INS_CMP = 147;; -let _MIPS_INS_COPY_S = 148;; -let _MIPS_INS_COPY_U = 149;; -let _MIPS_INS_CTC1 = 150;; -let _MIPS_INS_CTCMSA = 151;; -let _MIPS_INS_CVT = 152;; -let _MIPS_INS_C = 153;; -let _MIPS_INS_CMPI = 154;; -let _MIPS_INS_DADD = 155;; -let _MIPS_INS_DADDI = 156;; -let _MIPS_INS_DADDIU = 157;; -let _MIPS_INS_DADDU = 158;; -let _MIPS_INS_DAHI = 159;; -let _MIPS_INS_DALIGN = 160;; -let _MIPS_INS_DATI = 161;; -let _MIPS_INS_DAUI = 162;; -let _MIPS_INS_DBITSWAP = 163;; -let _MIPS_INS_DCLO = 164;; -let _MIPS_INS_DCLZ = 165;; -let _MIPS_INS_DDIV = 166;; -let _MIPS_INS_DDIVU = 167;; -let _MIPS_INS_DERET = 168;; -let _MIPS_INS_DEXT = 169;; -let _MIPS_INS_DEXTM = 170;; -let _MIPS_INS_DEXTU = 171;; -let _MIPS_INS_DI = 172;; -let _MIPS_INS_DINS = 173;; -let _MIPS_INS_DINSM = 174;; -let _MIPS_INS_DINSU = 175;; -let _MIPS_INS_DIV = 176;; -let _MIPS_INS_DIVU = 177;; -let _MIPS_INS_DIV_S = 178;; -let _MIPS_INS_DIV_U = 179;; -let _MIPS_INS_DLSA = 180;; -let _MIPS_INS_DMFC0 = 181;; -let _MIPS_INS_DMFC1 = 182;; -let _MIPS_INS_DMFC2 = 183;; -let _MIPS_INS_DMOD = 184;; -let _MIPS_INS_DMODU = 185;; -let _MIPS_INS_DMTC0 = 186;; -let _MIPS_INS_DMTC1 = 187;; -let _MIPS_INS_DMTC2 = 188;; -let _MIPS_INS_DMUH = 189;; -let _MIPS_INS_DMUHU = 190;; -let _MIPS_INS_DMUL = 191;; -let _MIPS_INS_DMULT = 192;; -let _MIPS_INS_DMULTU = 193;; -let _MIPS_INS_DMULU = 194;; -let _MIPS_INS_DOTP_S = 195;; -let _MIPS_INS_DOTP_U = 196;; -let _MIPS_INS_DPADD_S = 197;; -let _MIPS_INS_DPADD_U = 198;; -let _MIPS_INS_DPAQX_SA = 199;; -let _MIPS_INS_DPAQX_S = 200;; -let _MIPS_INS_DPAQ_SA = 201;; -let _MIPS_INS_DPAQ_S = 202;; -let _MIPS_INS_DPAU = 203;; -let _MIPS_INS_DPAX = 204;; -let _MIPS_INS_DPA = 205;; -let _MIPS_INS_DPOP = 206;; -let _MIPS_INS_DPSQX_SA = 207;; -let _MIPS_INS_DPSQX_S = 208;; -let _MIPS_INS_DPSQ_SA = 209;; -let _MIPS_INS_DPSQ_S = 210;; -let _MIPS_INS_DPSUB_S = 211;; -let _MIPS_INS_DPSUB_U = 212;; -let _MIPS_INS_DPSU = 213;; -let _MIPS_INS_DPSX = 214;; -let _MIPS_INS_DPS = 215;; -let _MIPS_INS_DROTR = 216;; -let _MIPS_INS_DROTR32 = 217;; -let _MIPS_INS_DROTRV = 218;; -let _MIPS_INS_DSBH = 219;; -let _MIPS_INS_DSHD = 220;; -let _MIPS_INS_DSLL = 221;; -let _MIPS_INS_DSLL32 = 222;; -let _MIPS_INS_DSLLV = 223;; -let _MIPS_INS_DSRA = 224;; -let _MIPS_INS_DSRA32 = 225;; -let _MIPS_INS_DSRAV = 226;; -let _MIPS_INS_DSRL = 227;; -let _MIPS_INS_DSRL32 = 228;; -let _MIPS_INS_DSRLV = 229;; -let _MIPS_INS_DSUB = 230;; -let _MIPS_INS_DSUBU = 231;; -let _MIPS_INS_EHB = 232;; -let _MIPS_INS_EI = 233;; -let _MIPS_INS_ERET = 234;; -let _MIPS_INS_EXT = 235;; -let _MIPS_INS_EXTP = 236;; -let _MIPS_INS_EXTPDP = 237;; -let _MIPS_INS_EXTPDPV = 238;; -let _MIPS_INS_EXTPV = 239;; -let _MIPS_INS_EXTRV_RS = 240;; -let _MIPS_INS_EXTRV_R = 241;; -let _MIPS_INS_EXTRV_S = 242;; -let _MIPS_INS_EXTRV = 243;; -let _MIPS_INS_EXTR_RS = 244;; -let _MIPS_INS_EXTR_R = 245;; -let _MIPS_INS_EXTR_S = 246;; -let _MIPS_INS_EXTR = 247;; -let _MIPS_INS_EXTS = 248;; -let _MIPS_INS_EXTS32 = 249;; -let _MIPS_INS_ABS = 250;; -let _MIPS_INS_FADD = 251;; -let _MIPS_INS_FCAF = 252;; -let _MIPS_INS_FCEQ = 253;; -let _MIPS_INS_FCLASS = 254;; -let _MIPS_INS_FCLE = 255;; -let _MIPS_INS_FCLT = 256;; -let _MIPS_INS_FCNE = 257;; -let _MIPS_INS_FCOR = 258;; -let _MIPS_INS_FCUEQ = 259;; -let _MIPS_INS_FCULE = 260;; -let _MIPS_INS_FCULT = 261;; -let _MIPS_INS_FCUNE = 262;; -let _MIPS_INS_FCUN = 263;; -let _MIPS_INS_FDIV = 264;; -let _MIPS_INS_FEXDO = 265;; -let _MIPS_INS_FEXP2 = 266;; -let _MIPS_INS_FEXUPL = 267;; -let _MIPS_INS_FEXUPR = 268;; -let _MIPS_INS_FFINT_S = 269;; -let _MIPS_INS_FFINT_U = 270;; -let _MIPS_INS_FFQL = 271;; -let _MIPS_INS_FFQR = 272;; -let _MIPS_INS_FILL = 273;; -let _MIPS_INS_FLOG2 = 274;; -let _MIPS_INS_FLOOR = 275;; -let _MIPS_INS_FMADD = 276;; -let _MIPS_INS_FMAX_A = 277;; -let _MIPS_INS_FMAX = 278;; -let _MIPS_INS_FMIN_A = 279;; -let _MIPS_INS_FMIN = 280;; -let _MIPS_INS_MOV = 281;; -let _MIPS_INS_FMSUB = 282;; -let _MIPS_INS_FMUL = 283;; -let _MIPS_INS_MUL = 284;; -let _MIPS_INS_NEG = 285;; -let _MIPS_INS_FRCP = 286;; -let _MIPS_INS_FRINT = 287;; -let _MIPS_INS_FRSQRT = 288;; -let _MIPS_INS_FSAF = 289;; -let _MIPS_INS_FSEQ = 290;; -let _MIPS_INS_FSLE = 291;; -let _MIPS_INS_FSLT = 292;; -let _MIPS_INS_FSNE = 293;; -let _MIPS_INS_FSOR = 294;; -let _MIPS_INS_FSQRT = 295;; -let _MIPS_INS_SQRT = 296;; -let _MIPS_INS_FSUB = 297;; -let _MIPS_INS_SUB = 298;; -let _MIPS_INS_FSUEQ = 299;; -let _MIPS_INS_FSULE = 300;; -let _MIPS_INS_FSULT = 301;; -let _MIPS_INS_FSUNE = 302;; -let _MIPS_INS_FSUN = 303;; -let _MIPS_INS_FTINT_S = 304;; -let _MIPS_INS_FTINT_U = 305;; -let _MIPS_INS_FTQ = 306;; -let _MIPS_INS_FTRUNC_S = 307;; -let _MIPS_INS_FTRUNC_U = 308;; -let _MIPS_INS_HADD_S = 309;; -let _MIPS_INS_HADD_U = 310;; -let _MIPS_INS_HSUB_S = 311;; -let _MIPS_INS_HSUB_U = 312;; -let _MIPS_INS_ILVEV = 313;; -let _MIPS_INS_ILVL = 314;; -let _MIPS_INS_ILVOD = 315;; -let _MIPS_INS_ILVR = 316;; -let _MIPS_INS_INS = 317;; -let _MIPS_INS_INSERT = 318;; -let _MIPS_INS_INSV = 319;; -let _MIPS_INS_INSVE = 320;; -let _MIPS_INS_J = 321;; -let _MIPS_INS_JAL = 322;; -let _MIPS_INS_JALR = 323;; -let _MIPS_INS_JALRS = 324;; -let _MIPS_INS_JALS = 325;; -let _MIPS_INS_JALX = 326;; -let _MIPS_INS_JIALC = 327;; -let _MIPS_INS_JIC = 328;; -let _MIPS_INS_JR = 329;; -let _MIPS_INS_JRADDIUSP = 330;; -let _MIPS_INS_JRC = 331;; -let _MIPS_INS_JALRC = 332;; -let _MIPS_INS_LB = 333;; -let _MIPS_INS_LBUX = 334;; -let _MIPS_INS_LBU = 335;; -let _MIPS_INS_LD = 336;; -let _MIPS_INS_LDC1 = 337;; -let _MIPS_INS_LDC2 = 338;; -let _MIPS_INS_LDC3 = 339;; -let _MIPS_INS_LDI = 340;; -let _MIPS_INS_LDL = 341;; -let _MIPS_INS_LDPC = 342;; -let _MIPS_INS_LDR = 343;; -let _MIPS_INS_LDXC1 = 344;; -let _MIPS_INS_LH = 345;; -let _MIPS_INS_LHX = 346;; -let _MIPS_INS_LHU = 347;; -let _MIPS_INS_LL = 348;; -let _MIPS_INS_LLD = 349;; -let _MIPS_INS_LSA = 350;; -let _MIPS_INS_LUXC1 = 351;; -let _MIPS_INS_LUI = 352;; -let _MIPS_INS_LW = 353;; -let _MIPS_INS_LWC1 = 354;; -let _MIPS_INS_LWC2 = 355;; -let _MIPS_INS_LWC3 = 356;; -let _MIPS_INS_LWL = 357;; -let _MIPS_INS_LWPC = 358;; -let _MIPS_INS_LWR = 359;; -let _MIPS_INS_LWUPC = 360;; -let _MIPS_INS_LWU = 361;; -let _MIPS_INS_LWX = 362;; -let _MIPS_INS_LWXC1 = 363;; -let _MIPS_INS_LI = 364;; -let _MIPS_INS_MADD = 365;; -let _MIPS_INS_MADDF = 366;; -let _MIPS_INS_MADDR_Q = 367;; -let _MIPS_INS_MADDU = 368;; -let _MIPS_INS_MADDV = 369;; -let _MIPS_INS_MADD_Q = 370;; -let _MIPS_INS_MAQ_SA = 371;; -let _MIPS_INS_MAQ_S = 372;; -let _MIPS_INS_MAXA = 373;; -let _MIPS_INS_MAXI_S = 374;; -let _MIPS_INS_MAXI_U = 375;; -let _MIPS_INS_MAX_A = 376;; -let _MIPS_INS_MAX = 377;; -let _MIPS_INS_MAX_S = 378;; -let _MIPS_INS_MAX_U = 379;; -let _MIPS_INS_MFC0 = 380;; -let _MIPS_INS_MFC1 = 381;; -let _MIPS_INS_MFC2 = 382;; -let _MIPS_INS_MFHC1 = 383;; -let _MIPS_INS_MFHI = 384;; -let _MIPS_INS_MFLO = 385;; -let _MIPS_INS_MINA = 386;; -let _MIPS_INS_MINI_S = 387;; -let _MIPS_INS_MINI_U = 388;; -let _MIPS_INS_MIN_A = 389;; -let _MIPS_INS_MIN = 390;; -let _MIPS_INS_MIN_S = 391;; -let _MIPS_INS_MIN_U = 392;; -let _MIPS_INS_MOD = 393;; -let _MIPS_INS_MODSUB = 394;; -let _MIPS_INS_MODU = 395;; -let _MIPS_INS_MOD_S = 396;; -let _MIPS_INS_MOD_U = 397;; -let _MIPS_INS_MOVE = 398;; -let _MIPS_INS_MOVF = 399;; -let _MIPS_INS_MOVN = 400;; -let _MIPS_INS_MOVT = 401;; -let _MIPS_INS_MOVZ = 402;; -let _MIPS_INS_MSUB = 403;; -let _MIPS_INS_MSUBF = 404;; -let _MIPS_INS_MSUBR_Q = 405;; -let _MIPS_INS_MSUBU = 406;; -let _MIPS_INS_MSUBV = 407;; -let _MIPS_INS_MSUB_Q = 408;; -let _MIPS_INS_MTC0 = 409;; -let _MIPS_INS_MTC1 = 410;; -let _MIPS_INS_MTC2 = 411;; -let _MIPS_INS_MTHC1 = 412;; -let _MIPS_INS_MTHI = 413;; -let _MIPS_INS_MTHLIP = 414;; -let _MIPS_INS_MTLO = 415;; -let _MIPS_INS_MTM0 = 416;; -let _MIPS_INS_MTM1 = 417;; -let _MIPS_INS_MTM2 = 418;; -let _MIPS_INS_MTP0 = 419;; -let _MIPS_INS_MTP1 = 420;; -let _MIPS_INS_MTP2 = 421;; -let _MIPS_INS_MUH = 422;; -let _MIPS_INS_MUHU = 423;; -let _MIPS_INS_MULEQ_S = 424;; -let _MIPS_INS_MULEU_S = 425;; -let _MIPS_INS_MULQ_RS = 426;; -let _MIPS_INS_MULQ_S = 427;; -let _MIPS_INS_MULR_Q = 428;; -let _MIPS_INS_MULSAQ_S = 429;; -let _MIPS_INS_MULSA = 430;; -let _MIPS_INS_MULT = 431;; -let _MIPS_INS_MULTU = 432;; -let _MIPS_INS_MULU = 433;; -let _MIPS_INS_MULV = 434;; -let _MIPS_INS_MUL_Q = 435;; -let _MIPS_INS_MUL_S = 436;; -let _MIPS_INS_NLOC = 437;; -let _MIPS_INS_NLZC = 438;; -let _MIPS_INS_NMADD = 439;; -let _MIPS_INS_NMSUB = 440;; -let _MIPS_INS_NOR = 441;; -let _MIPS_INS_NORI = 442;; -let _MIPS_INS_NOT = 443;; -let _MIPS_INS_OR = 444;; -let _MIPS_INS_ORI = 445;; -let _MIPS_INS_PACKRL = 446;; -let _MIPS_INS_PAUSE = 447;; -let _MIPS_INS_PCKEV = 448;; -let _MIPS_INS_PCKOD = 449;; -let _MIPS_INS_PCNT = 450;; -let _MIPS_INS_PICK = 451;; -let _MIPS_INS_POP = 452;; -let _MIPS_INS_PRECEQU = 453;; -let _MIPS_INS_PRECEQ = 454;; -let _MIPS_INS_PRECEU = 455;; -let _MIPS_INS_PRECRQU_S = 456;; -let _MIPS_INS_PRECRQ = 457;; -let _MIPS_INS_PRECRQ_RS = 458;; -let _MIPS_INS_PRECR = 459;; -let _MIPS_INS_PRECR_SRA = 460;; -let _MIPS_INS_PRECR_SRA_R = 461;; -let _MIPS_INS_PREF = 462;; -let _MIPS_INS_PREPEND = 463;; -let _MIPS_INS_RADDU = 464;; -let _MIPS_INS_RDDSP = 465;; -let _MIPS_INS_RDHWR = 466;; -let _MIPS_INS_REPLV = 467;; -let _MIPS_INS_REPL = 468;; -let _MIPS_INS_RINT = 469;; -let _MIPS_INS_ROTR = 470;; -let _MIPS_INS_ROTRV = 471;; -let _MIPS_INS_ROUND = 472;; -let _MIPS_INS_SAT_S = 473;; -let _MIPS_INS_SAT_U = 474;; -let _MIPS_INS_SB = 475;; -let _MIPS_INS_SC = 476;; -let _MIPS_INS_SCD = 477;; -let _MIPS_INS_SD = 478;; -let _MIPS_INS_SDBBP = 479;; -let _MIPS_INS_SDC1 = 480;; -let _MIPS_INS_SDC2 = 481;; -let _MIPS_INS_SDC3 = 482;; -let _MIPS_INS_SDL = 483;; -let _MIPS_INS_SDR = 484;; -let _MIPS_INS_SDXC1 = 485;; -let _MIPS_INS_SEB = 486;; -let _MIPS_INS_SEH = 487;; -let _MIPS_INS_SELEQZ = 488;; -let _MIPS_INS_SELNEZ = 489;; -let _MIPS_INS_SEL = 490;; -let _MIPS_INS_SEQ = 491;; -let _MIPS_INS_SEQI = 492;; -let _MIPS_INS_SH = 493;; -let _MIPS_INS_SHF = 494;; -let _MIPS_INS_SHILO = 495;; -let _MIPS_INS_SHILOV = 496;; -let _MIPS_INS_SHLLV = 497;; -let _MIPS_INS_SHLLV_S = 498;; -let _MIPS_INS_SHLL = 499;; -let _MIPS_INS_SHLL_S = 500;; -let _MIPS_INS_SHRAV = 501;; -let _MIPS_INS_SHRAV_R = 502;; -let _MIPS_INS_SHRA = 503;; -let _MIPS_INS_SHRA_R = 504;; -let _MIPS_INS_SHRLV = 505;; -let _MIPS_INS_SHRL = 506;; -let _MIPS_INS_SLDI = 507;; -let _MIPS_INS_SLD = 508;; -let _MIPS_INS_SLL = 509;; -let _MIPS_INS_SLLI = 510;; -let _MIPS_INS_SLLV = 511;; -let _MIPS_INS_SLT = 512;; -let _MIPS_INS_SLTI = 513;; -let _MIPS_INS_SLTIU = 514;; -let _MIPS_INS_SLTU = 515;; -let _MIPS_INS_SNE = 516;; -let _MIPS_INS_SNEI = 517;; -let _MIPS_INS_SPLATI = 518;; -let _MIPS_INS_SPLAT = 519;; -let _MIPS_INS_SRA = 520;; -let _MIPS_INS_SRAI = 521;; -let _MIPS_INS_SRARI = 522;; -let _MIPS_INS_SRAR = 523;; -let _MIPS_INS_SRAV = 524;; -let _MIPS_INS_SRL = 525;; -let _MIPS_INS_SRLI = 526;; -let _MIPS_INS_SRLRI = 527;; -let _MIPS_INS_SRLR = 528;; -let _MIPS_INS_SRLV = 529;; -let _MIPS_INS_SSNOP = 530;; -let _MIPS_INS_ST = 531;; -let _MIPS_INS_SUBQH = 532;; -let _MIPS_INS_SUBQH_R = 533;; -let _MIPS_INS_SUBQ = 534;; -let _MIPS_INS_SUBQ_S = 535;; -let _MIPS_INS_SUBSUS_U = 536;; -let _MIPS_INS_SUBSUU_S = 537;; -let _MIPS_INS_SUBS_S = 538;; -let _MIPS_INS_SUBS_U = 539;; -let _MIPS_INS_SUBUH = 540;; -let _MIPS_INS_SUBUH_R = 541;; -let _MIPS_INS_SUBU = 542;; -let _MIPS_INS_SUBU_S = 543;; -let _MIPS_INS_SUBVI = 544;; -let _MIPS_INS_SUBV = 545;; -let _MIPS_INS_SUXC1 = 546;; -let _MIPS_INS_SW = 547;; -let _MIPS_INS_SWC1 = 548;; -let _MIPS_INS_SWC2 = 549;; -let _MIPS_INS_SWC3 = 550;; -let _MIPS_INS_SWL = 551;; -let _MIPS_INS_SWR = 552;; -let _MIPS_INS_SWXC1 = 553;; -let _MIPS_INS_SYNC = 554;; -let _MIPS_INS_SYSCALL = 555;; -let _MIPS_INS_TEQ = 556;; -let _MIPS_INS_TEQI = 557;; -let _MIPS_INS_TGE = 558;; -let _MIPS_INS_TGEI = 559;; -let _MIPS_INS_TGEIU = 560;; -let _MIPS_INS_TGEU = 561;; -let _MIPS_INS_TLBP = 562;; -let _MIPS_INS_TLBR = 563;; -let _MIPS_INS_TLBWI = 564;; -let _MIPS_INS_TLBWR = 565;; -let _MIPS_INS_TLT = 566;; -let _MIPS_INS_TLTI = 567;; -let _MIPS_INS_TLTIU = 568;; -let _MIPS_INS_TLTU = 569;; -let _MIPS_INS_TNE = 570;; -let _MIPS_INS_TNEI = 571;; -let _MIPS_INS_TRUNC = 572;; -let _MIPS_INS_V3MULU = 573;; -let _MIPS_INS_VMM0 = 574;; -let _MIPS_INS_VMULU = 575;; -let _MIPS_INS_VSHF = 576;; -let _MIPS_INS_WAIT = 577;; -let _MIPS_INS_WRDSP = 578;; -let _MIPS_INS_WSBH = 579;; -let _MIPS_INS_XOR = 580;; -let _MIPS_INS_XORI = 581;; +let _MIPS_INS_ADDIUR1SP = 4;; +let _MIPS_INS_ADDIUR2 = 5;; +let _MIPS_INS_ADDIUS5 = 6;; +let _MIPS_INS_ADDIUSP = 7;; +let _MIPS_INS_ADDQH = 8;; +let _MIPS_INS_ADDQH_R = 9;; +let _MIPS_INS_ADDQ = 10;; +let _MIPS_INS_ADDQ_S = 11;; +let _MIPS_INS_ADDSC = 12;; +let _MIPS_INS_ADDS_A = 13;; +let _MIPS_INS_ADDS_S = 14;; +let _MIPS_INS_ADDS_U = 15;; +let _MIPS_INS_ADDU16 = 16;; +let _MIPS_INS_ADDUH = 17;; +let _MIPS_INS_ADDUH_R = 18;; +let _MIPS_INS_ADDU = 19;; +let _MIPS_INS_ADDU_S = 20;; +let _MIPS_INS_ADDVI = 21;; +let _MIPS_INS_ADDV = 22;; +let _MIPS_INS_ADDWC = 23;; +let _MIPS_INS_ADD_A = 24;; +let _MIPS_INS_ADDI = 25;; +let _MIPS_INS_ADDIU = 26;; +let _MIPS_INS_ALIGN = 27;; +let _MIPS_INS_ALUIPC = 28;; +let _MIPS_INS_AND = 29;; +let _MIPS_INS_AND16 = 30;; +let _MIPS_INS_ANDI16 = 31;; +let _MIPS_INS_ANDI = 32;; +let _MIPS_INS_APPEND = 33;; +let _MIPS_INS_ASUB_S = 34;; +let _MIPS_INS_ASUB_U = 35;; +let _MIPS_INS_AUI = 36;; +let _MIPS_INS_AUIPC = 37;; +let _MIPS_INS_AVER_S = 38;; +let _MIPS_INS_AVER_U = 39;; +let _MIPS_INS_AVE_S = 40;; +let _MIPS_INS_AVE_U = 41;; +let _MIPS_INS_B16 = 42;; +let _MIPS_INS_BADDU = 43;; +let _MIPS_INS_BAL = 44;; +let _MIPS_INS_BALC = 45;; +let _MIPS_INS_BALIGN = 46;; +let _MIPS_INS_BBIT0 = 47;; +let _MIPS_INS_BBIT032 = 48;; +let _MIPS_INS_BBIT1 = 49;; +let _MIPS_INS_BBIT132 = 50;; +let _MIPS_INS_BC = 51;; +let _MIPS_INS_BC0F = 52;; +let _MIPS_INS_BC0FL = 53;; +let _MIPS_INS_BC0T = 54;; +let _MIPS_INS_BC0TL = 55;; +let _MIPS_INS_BC1EQZ = 56;; +let _MIPS_INS_BC1F = 57;; +let _MIPS_INS_BC1FL = 58;; +let _MIPS_INS_BC1NEZ = 59;; +let _MIPS_INS_BC1T = 60;; +let _MIPS_INS_BC1TL = 61;; +let _MIPS_INS_BC2EQZ = 62;; +let _MIPS_INS_BC2F = 63;; +let _MIPS_INS_BC2FL = 64;; +let _MIPS_INS_BC2NEZ = 65;; +let _MIPS_INS_BC2T = 66;; +let _MIPS_INS_BC2TL = 67;; +let _MIPS_INS_BC3F = 68;; +let _MIPS_INS_BC3FL = 69;; +let _MIPS_INS_BC3T = 70;; +let _MIPS_INS_BC3TL = 71;; +let _MIPS_INS_BCLRI = 72;; +let _MIPS_INS_BCLR = 73;; +let _MIPS_INS_BEQ = 74;; +let _MIPS_INS_BEQC = 75;; +let _MIPS_INS_BEQL = 76;; +let _MIPS_INS_BEQZ16 = 77;; +let _MIPS_INS_BEQZALC = 78;; +let _MIPS_INS_BEQZC = 79;; +let _MIPS_INS_BGEC = 80;; +let _MIPS_INS_BGEUC = 81;; +let _MIPS_INS_BGEZ = 82;; +let _MIPS_INS_BGEZAL = 83;; +let _MIPS_INS_BGEZALC = 84;; +let _MIPS_INS_BGEZALL = 85;; +let _MIPS_INS_BGEZALS = 86;; +let _MIPS_INS_BGEZC = 87;; +let _MIPS_INS_BGEZL = 88;; +let _MIPS_INS_BGTZ = 89;; +let _MIPS_INS_BGTZALC = 90;; +let _MIPS_INS_BGTZC = 91;; +let _MIPS_INS_BGTZL = 92;; +let _MIPS_INS_BINSLI = 93;; +let _MIPS_INS_BINSL = 94;; +let _MIPS_INS_BINSRI = 95;; +let _MIPS_INS_BINSR = 96;; +let _MIPS_INS_BITREV = 97;; +let _MIPS_INS_BITSWAP = 98;; +let _MIPS_INS_BLEZ = 99;; +let _MIPS_INS_BLEZALC = 100;; +let _MIPS_INS_BLEZC = 101;; +let _MIPS_INS_BLEZL = 102;; +let _MIPS_INS_BLTC = 103;; +let _MIPS_INS_BLTUC = 104;; +let _MIPS_INS_BLTZ = 105;; +let _MIPS_INS_BLTZAL = 106;; +let _MIPS_INS_BLTZALC = 107;; +let _MIPS_INS_BLTZALL = 108;; +let _MIPS_INS_BLTZALS = 109;; +let _MIPS_INS_BLTZC = 110;; +let _MIPS_INS_BLTZL = 111;; +let _MIPS_INS_BMNZI = 112;; +let _MIPS_INS_BMNZ = 113;; +let _MIPS_INS_BMZI = 114;; +let _MIPS_INS_BMZ = 115;; +let _MIPS_INS_BNE = 116;; +let _MIPS_INS_BNEC = 117;; +let _MIPS_INS_BNEGI = 118;; +let _MIPS_INS_BNEG = 119;; +let _MIPS_INS_BNEL = 120;; +let _MIPS_INS_BNEZ16 = 121;; +let _MIPS_INS_BNEZALC = 122;; +let _MIPS_INS_BNEZC = 123;; +let _MIPS_INS_BNVC = 124;; +let _MIPS_INS_BNZ = 125;; +let _MIPS_INS_BOVC = 126;; +let _MIPS_INS_BPOSGE32 = 127;; +let _MIPS_INS_BREAK = 128;; +let _MIPS_INS_BREAK16 = 129;; +let _MIPS_INS_BSELI = 130;; +let _MIPS_INS_BSEL = 131;; +let _MIPS_INS_BSETI = 132;; +let _MIPS_INS_BSET = 133;; +let _MIPS_INS_BZ = 134;; +let _MIPS_INS_BEQZ = 135;; +let _MIPS_INS_B = 136;; +let _MIPS_INS_BNEZ = 137;; +let _MIPS_INS_BTEQZ = 138;; +let _MIPS_INS_BTNEZ = 139;; +let _MIPS_INS_CACHE = 140;; +let _MIPS_INS_CEIL = 141;; +let _MIPS_INS_CEQI = 142;; +let _MIPS_INS_CEQ = 143;; +let _MIPS_INS_CFC1 = 144;; +let _MIPS_INS_CFCMSA = 145;; +let _MIPS_INS_CINS = 146;; +let _MIPS_INS_CINS32 = 147;; +let _MIPS_INS_CLASS = 148;; +let _MIPS_INS_CLEI_S = 149;; +let _MIPS_INS_CLEI_U = 150;; +let _MIPS_INS_CLE_S = 151;; +let _MIPS_INS_CLE_U = 152;; +let _MIPS_INS_CLO = 153;; +let _MIPS_INS_CLTI_S = 154;; +let _MIPS_INS_CLTI_U = 155;; +let _MIPS_INS_CLT_S = 156;; +let _MIPS_INS_CLT_U = 157;; +let _MIPS_INS_CLZ = 158;; +let _MIPS_INS_CMPGDU = 159;; +let _MIPS_INS_CMPGU = 160;; +let _MIPS_INS_CMPU = 161;; +let _MIPS_INS_CMP = 162;; +let _MIPS_INS_COPY_S = 163;; +let _MIPS_INS_COPY_U = 164;; +let _MIPS_INS_CTC1 = 165;; +let _MIPS_INS_CTCMSA = 166;; +let _MIPS_INS_CVT = 167;; +let _MIPS_INS_C = 168;; +let _MIPS_INS_CMPI = 169;; +let _MIPS_INS_DADD = 170;; +let _MIPS_INS_DADDI = 171;; +let _MIPS_INS_DADDIU = 172;; +let _MIPS_INS_DADDU = 173;; +let _MIPS_INS_DAHI = 174;; +let _MIPS_INS_DALIGN = 175;; +let _MIPS_INS_DATI = 176;; +let _MIPS_INS_DAUI = 177;; +let _MIPS_INS_DBITSWAP = 178;; +let _MIPS_INS_DCLO = 179;; +let _MIPS_INS_DCLZ = 180;; +let _MIPS_INS_DDIV = 181;; +let _MIPS_INS_DDIVU = 182;; +let _MIPS_INS_DERET = 183;; +let _MIPS_INS_DEXT = 184;; +let _MIPS_INS_DEXTM = 185;; +let _MIPS_INS_DEXTU = 186;; +let _MIPS_INS_DI = 187;; +let _MIPS_INS_DINS = 188;; +let _MIPS_INS_DINSM = 189;; +let _MIPS_INS_DINSU = 190;; +let _MIPS_INS_DIV = 191;; +let _MIPS_INS_DIVU = 192;; +let _MIPS_INS_DIV_S = 193;; +let _MIPS_INS_DIV_U = 194;; +let _MIPS_INS_DLSA = 195;; +let _MIPS_INS_DMFC0 = 196;; +let _MIPS_INS_DMFC1 = 197;; +let _MIPS_INS_DMFC2 = 198;; +let _MIPS_INS_DMOD = 199;; +let _MIPS_INS_DMODU = 200;; +let _MIPS_INS_DMTC0 = 201;; +let _MIPS_INS_DMTC1 = 202;; +let _MIPS_INS_DMTC2 = 203;; +let _MIPS_INS_DMUH = 204;; +let _MIPS_INS_DMUHU = 205;; +let _MIPS_INS_DMUL = 206;; +let _MIPS_INS_DMULT = 207;; +let _MIPS_INS_DMULTU = 208;; +let _MIPS_INS_DMULU = 209;; +let _MIPS_INS_DOTP_S = 210;; +let _MIPS_INS_DOTP_U = 211;; +let _MIPS_INS_DPADD_S = 212;; +let _MIPS_INS_DPADD_U = 213;; +let _MIPS_INS_DPAQX_SA = 214;; +let _MIPS_INS_DPAQX_S = 215;; +let _MIPS_INS_DPAQ_SA = 216;; +let _MIPS_INS_DPAQ_S = 217;; +let _MIPS_INS_DPAU = 218;; +let _MIPS_INS_DPAX = 219;; +let _MIPS_INS_DPA = 220;; +let _MIPS_INS_DPOP = 221;; +let _MIPS_INS_DPSQX_SA = 222;; +let _MIPS_INS_DPSQX_S = 223;; +let _MIPS_INS_DPSQ_SA = 224;; +let _MIPS_INS_DPSQ_S = 225;; +let _MIPS_INS_DPSUB_S = 226;; +let _MIPS_INS_DPSUB_U = 227;; +let _MIPS_INS_DPSU = 228;; +let _MIPS_INS_DPSX = 229;; +let _MIPS_INS_DPS = 230;; +let _MIPS_INS_DROTR = 231;; +let _MIPS_INS_DROTR32 = 232;; +let _MIPS_INS_DROTRV = 233;; +let _MIPS_INS_DSBH = 234;; +let _MIPS_INS_DSHD = 235;; +let _MIPS_INS_DSLL = 236;; +let _MIPS_INS_DSLL32 = 237;; +let _MIPS_INS_DSLLV = 238;; +let _MIPS_INS_DSRA = 239;; +let _MIPS_INS_DSRA32 = 240;; +let _MIPS_INS_DSRAV = 241;; +let _MIPS_INS_DSRL = 242;; +let _MIPS_INS_DSRL32 = 243;; +let _MIPS_INS_DSRLV = 244;; +let _MIPS_INS_DSUB = 245;; +let _MIPS_INS_DSUBU = 246;; +let _MIPS_INS_EHB = 247;; +let _MIPS_INS_EI = 248;; +let _MIPS_INS_ERET = 249;; +let _MIPS_INS_EXT = 250;; +let _MIPS_INS_EXTP = 251;; +let _MIPS_INS_EXTPDP = 252;; +let _MIPS_INS_EXTPDPV = 253;; +let _MIPS_INS_EXTPV = 254;; +let _MIPS_INS_EXTRV_RS = 255;; +let _MIPS_INS_EXTRV_R = 256;; +let _MIPS_INS_EXTRV_S = 257;; +let _MIPS_INS_EXTRV = 258;; +let _MIPS_INS_EXTR_RS = 259;; +let _MIPS_INS_EXTR_R = 260;; +let _MIPS_INS_EXTR_S = 261;; +let _MIPS_INS_EXTR = 262;; +let _MIPS_INS_EXTS = 263;; +let _MIPS_INS_EXTS32 = 264;; +let _MIPS_INS_ABS = 265;; +let _MIPS_INS_FADD = 266;; +let _MIPS_INS_FCAF = 267;; +let _MIPS_INS_FCEQ = 268;; +let _MIPS_INS_FCLASS = 269;; +let _MIPS_INS_FCLE = 270;; +let _MIPS_INS_FCLT = 271;; +let _MIPS_INS_FCNE = 272;; +let _MIPS_INS_FCOR = 273;; +let _MIPS_INS_FCUEQ = 274;; +let _MIPS_INS_FCULE = 275;; +let _MIPS_INS_FCULT = 276;; +let _MIPS_INS_FCUNE = 277;; +let _MIPS_INS_FCUN = 278;; +let _MIPS_INS_FDIV = 279;; +let _MIPS_INS_FEXDO = 280;; +let _MIPS_INS_FEXP2 = 281;; +let _MIPS_INS_FEXUPL = 282;; +let _MIPS_INS_FEXUPR = 283;; +let _MIPS_INS_FFINT_S = 284;; +let _MIPS_INS_FFINT_U = 285;; +let _MIPS_INS_FFQL = 286;; +let _MIPS_INS_FFQR = 287;; +let _MIPS_INS_FILL = 288;; +let _MIPS_INS_FLOG2 = 289;; +let _MIPS_INS_FLOOR = 290;; +let _MIPS_INS_FMADD = 291;; +let _MIPS_INS_FMAX_A = 292;; +let _MIPS_INS_FMAX = 293;; +let _MIPS_INS_FMIN_A = 294;; +let _MIPS_INS_FMIN = 295;; +let _MIPS_INS_MOV = 296;; +let _MIPS_INS_FMSUB = 297;; +let _MIPS_INS_FMUL = 298;; +let _MIPS_INS_MUL = 299;; +let _MIPS_INS_NEG = 300;; +let _MIPS_INS_FRCP = 301;; +let _MIPS_INS_FRINT = 302;; +let _MIPS_INS_FRSQRT = 303;; +let _MIPS_INS_FSAF = 304;; +let _MIPS_INS_FSEQ = 305;; +let _MIPS_INS_FSLE = 306;; +let _MIPS_INS_FSLT = 307;; +let _MIPS_INS_FSNE = 308;; +let _MIPS_INS_FSOR = 309;; +let _MIPS_INS_FSQRT = 310;; +let _MIPS_INS_SQRT = 311;; +let _MIPS_INS_FSUB = 312;; +let _MIPS_INS_SUB = 313;; +let _MIPS_INS_FSUEQ = 314;; +let _MIPS_INS_FSULE = 315;; +let _MIPS_INS_FSULT = 316;; +let _MIPS_INS_FSUNE = 317;; +let _MIPS_INS_FSUN = 318;; +let _MIPS_INS_FTINT_S = 319;; +let _MIPS_INS_FTINT_U = 320;; +let _MIPS_INS_FTQ = 321;; +let _MIPS_INS_FTRUNC_S = 322;; +let _MIPS_INS_FTRUNC_U = 323;; +let _MIPS_INS_HADD_S = 324;; +let _MIPS_INS_HADD_U = 325;; +let _MIPS_INS_HSUB_S = 326;; +let _MIPS_INS_HSUB_U = 327;; +let _MIPS_INS_ILVEV = 328;; +let _MIPS_INS_ILVL = 329;; +let _MIPS_INS_ILVOD = 330;; +let _MIPS_INS_ILVR = 331;; +let _MIPS_INS_INS = 332;; +let _MIPS_INS_INSERT = 333;; +let _MIPS_INS_INSV = 334;; +let _MIPS_INS_INSVE = 335;; +let _MIPS_INS_J = 336;; +let _MIPS_INS_JAL = 337;; +let _MIPS_INS_JALR = 338;; +let _MIPS_INS_JALRS16 = 339;; +let _MIPS_INS_JALRS = 340;; +let _MIPS_INS_JALS = 341;; +let _MIPS_INS_JALX = 342;; +let _MIPS_INS_JIALC = 343;; +let _MIPS_INS_JIC = 344;; +let _MIPS_INS_JR = 345;; +let _MIPS_INS_JR16 = 346;; +let _MIPS_INS_JRADDIUSP = 347;; +let _MIPS_INS_JRC = 348;; +let _MIPS_INS_JALRC = 349;; +let _MIPS_INS_LB = 350;; +let _MIPS_INS_LBU16 = 351;; +let _MIPS_INS_LBUX = 352;; +let _MIPS_INS_LBU = 353;; +let _MIPS_INS_LD = 354;; +let _MIPS_INS_LDC1 = 355;; +let _MIPS_INS_LDC2 = 356;; +let _MIPS_INS_LDC3 = 357;; +let _MIPS_INS_LDI = 358;; +let _MIPS_INS_LDL = 359;; +let _MIPS_INS_LDPC = 360;; +let _MIPS_INS_LDR = 361;; +let _MIPS_INS_LDXC1 = 362;; +let _MIPS_INS_LH = 363;; +let _MIPS_INS_LHU16 = 364;; +let _MIPS_INS_LHX = 365;; +let _MIPS_INS_LHU = 366;; +let _MIPS_INS_LI16 = 367;; +let _MIPS_INS_LL = 368;; +let _MIPS_INS_LLD = 369;; +let _MIPS_INS_LSA = 370;; +let _MIPS_INS_LUXC1 = 371;; +let _MIPS_INS_LUI = 372;; +let _MIPS_INS_LW = 373;; +let _MIPS_INS_LW16 = 374;; +let _MIPS_INS_LWC1 = 375;; +let _MIPS_INS_LWC2 = 376;; +let _MIPS_INS_LWC3 = 377;; +let _MIPS_INS_LWL = 378;; +let _MIPS_INS_LWM16 = 379;; +let _MIPS_INS_LWM32 = 380;; +let _MIPS_INS_LWPC = 381;; +let _MIPS_INS_LWP = 382;; +let _MIPS_INS_LWR = 383;; +let _MIPS_INS_LWUPC = 384;; +let _MIPS_INS_LWU = 385;; +let _MIPS_INS_LWX = 386;; +let _MIPS_INS_LWXC1 = 387;; +let _MIPS_INS_LWXS = 388;; +let _MIPS_INS_LI = 389;; +let _MIPS_INS_MADD = 390;; +let _MIPS_INS_MADDF = 391;; +let _MIPS_INS_MADDR_Q = 392;; +let _MIPS_INS_MADDU = 393;; +let _MIPS_INS_MADDV = 394;; +let _MIPS_INS_MADD_Q = 395;; +let _MIPS_INS_MAQ_SA = 396;; +let _MIPS_INS_MAQ_S = 397;; +let _MIPS_INS_MAXA = 398;; +let _MIPS_INS_MAXI_S = 399;; +let _MIPS_INS_MAXI_U = 400;; +let _MIPS_INS_MAX_A = 401;; +let _MIPS_INS_MAX = 402;; +let _MIPS_INS_MAX_S = 403;; +let _MIPS_INS_MAX_U = 404;; +let _MIPS_INS_MFC0 = 405;; +let _MIPS_INS_MFC1 = 406;; +let _MIPS_INS_MFC2 = 407;; +let _MIPS_INS_MFHC1 = 408;; +let _MIPS_INS_MFHI = 409;; +let _MIPS_INS_MFLO = 410;; +let _MIPS_INS_MINA = 411;; +let _MIPS_INS_MINI_S = 412;; +let _MIPS_INS_MINI_U = 413;; +let _MIPS_INS_MIN_A = 414;; +let _MIPS_INS_MIN = 415;; +let _MIPS_INS_MIN_S = 416;; +let _MIPS_INS_MIN_U = 417;; +let _MIPS_INS_MOD = 418;; +let _MIPS_INS_MODSUB = 419;; +let _MIPS_INS_MODU = 420;; +let _MIPS_INS_MOD_S = 421;; +let _MIPS_INS_MOD_U = 422;; +let _MIPS_INS_MOVE = 423;; +let _MIPS_INS_MOVEP = 424;; +let _MIPS_INS_MOVF = 425;; +let _MIPS_INS_MOVN = 426;; +let _MIPS_INS_MOVT = 427;; +let _MIPS_INS_MOVZ = 428;; +let _MIPS_INS_MSUB = 429;; +let _MIPS_INS_MSUBF = 430;; +let _MIPS_INS_MSUBR_Q = 431;; +let _MIPS_INS_MSUBU = 432;; +let _MIPS_INS_MSUBV = 433;; +let _MIPS_INS_MSUB_Q = 434;; +let _MIPS_INS_MTC0 = 435;; +let _MIPS_INS_MTC1 = 436;; +let _MIPS_INS_MTC2 = 437;; +let _MIPS_INS_MTHC1 = 438;; +let _MIPS_INS_MTHI = 439;; +let _MIPS_INS_MTHLIP = 440;; +let _MIPS_INS_MTLO = 441;; +let _MIPS_INS_MTM0 = 442;; +let _MIPS_INS_MTM1 = 443;; +let _MIPS_INS_MTM2 = 444;; +let _MIPS_INS_MTP0 = 445;; +let _MIPS_INS_MTP1 = 446;; +let _MIPS_INS_MTP2 = 447;; +let _MIPS_INS_MUH = 448;; +let _MIPS_INS_MUHU = 449;; +let _MIPS_INS_MULEQ_S = 450;; +let _MIPS_INS_MULEU_S = 451;; +let _MIPS_INS_MULQ_RS = 452;; +let _MIPS_INS_MULQ_S = 453;; +let _MIPS_INS_MULR_Q = 454;; +let _MIPS_INS_MULSAQ_S = 455;; +let _MIPS_INS_MULSA = 456;; +let _MIPS_INS_MULT = 457;; +let _MIPS_INS_MULTU = 458;; +let _MIPS_INS_MULU = 459;; +let _MIPS_INS_MULV = 460;; +let _MIPS_INS_MUL_Q = 461;; +let _MIPS_INS_MUL_S = 462;; +let _MIPS_INS_NLOC = 463;; +let _MIPS_INS_NLZC = 464;; +let _MIPS_INS_NMADD = 465;; +let _MIPS_INS_NMSUB = 466;; +let _MIPS_INS_NOR = 467;; +let _MIPS_INS_NORI = 468;; +let _MIPS_INS_NOT16 = 469;; +let _MIPS_INS_NOT = 470;; +let _MIPS_INS_OR = 471;; +let _MIPS_INS_OR16 = 472;; +let _MIPS_INS_ORI = 473;; +let _MIPS_INS_PACKRL = 474;; +let _MIPS_INS_PAUSE = 475;; +let _MIPS_INS_PCKEV = 476;; +let _MIPS_INS_PCKOD = 477;; +let _MIPS_INS_PCNT = 478;; +let _MIPS_INS_PICK = 479;; +let _MIPS_INS_POP = 480;; +let _MIPS_INS_PRECEQU = 481;; +let _MIPS_INS_PRECEQ = 482;; +let _MIPS_INS_PRECEU = 483;; +let _MIPS_INS_PRECRQU_S = 484;; +let _MIPS_INS_PRECRQ = 485;; +let _MIPS_INS_PRECRQ_RS = 486;; +let _MIPS_INS_PRECR = 487;; +let _MIPS_INS_PRECR_SRA = 488;; +let _MIPS_INS_PRECR_SRA_R = 489;; +let _MIPS_INS_PREF = 490;; +let _MIPS_INS_PREPEND = 491;; +let _MIPS_INS_RADDU = 492;; +let _MIPS_INS_RDDSP = 493;; +let _MIPS_INS_RDHWR = 494;; +let _MIPS_INS_REPLV = 495;; +let _MIPS_INS_REPL = 496;; +let _MIPS_INS_RINT = 497;; +let _MIPS_INS_ROTR = 498;; +let _MIPS_INS_ROTRV = 499;; +let _MIPS_INS_ROUND = 500;; +let _MIPS_INS_SAT_S = 501;; +let _MIPS_INS_SAT_U = 502;; +let _MIPS_INS_SB = 503;; +let _MIPS_INS_SB16 = 504;; +let _MIPS_INS_SC = 505;; +let _MIPS_INS_SCD = 506;; +let _MIPS_INS_SD = 507;; +let _MIPS_INS_SDBBP = 508;; +let _MIPS_INS_SDBBP16 = 509;; +let _MIPS_INS_SDC1 = 510;; +let _MIPS_INS_SDC2 = 511;; +let _MIPS_INS_SDC3 = 512;; +let _MIPS_INS_SDL = 513;; +let _MIPS_INS_SDR = 514;; +let _MIPS_INS_SDXC1 = 515;; +let _MIPS_INS_SEB = 516;; +let _MIPS_INS_SEH = 517;; +let _MIPS_INS_SELEQZ = 518;; +let _MIPS_INS_SELNEZ = 519;; +let _MIPS_INS_SEL = 520;; +let _MIPS_INS_SEQ = 521;; +let _MIPS_INS_SEQI = 522;; +let _MIPS_INS_SH = 523;; +let _MIPS_INS_SH16 = 524;; +let _MIPS_INS_SHF = 525;; +let _MIPS_INS_SHILO = 526;; +let _MIPS_INS_SHILOV = 527;; +let _MIPS_INS_SHLLV = 528;; +let _MIPS_INS_SHLLV_S = 529;; +let _MIPS_INS_SHLL = 530;; +let _MIPS_INS_SHLL_S = 531;; +let _MIPS_INS_SHRAV = 532;; +let _MIPS_INS_SHRAV_R = 533;; +let _MIPS_INS_SHRA = 534;; +let _MIPS_INS_SHRA_R = 535;; +let _MIPS_INS_SHRLV = 536;; +let _MIPS_INS_SHRL = 537;; +let _MIPS_INS_SLDI = 538;; +let _MIPS_INS_SLD = 539;; +let _MIPS_INS_SLL = 540;; +let _MIPS_INS_SLL16 = 541;; +let _MIPS_INS_SLLI = 542;; +let _MIPS_INS_SLLV = 543;; +let _MIPS_INS_SLT = 544;; +let _MIPS_INS_SLTI = 545;; +let _MIPS_INS_SLTIU = 546;; +let _MIPS_INS_SLTU = 547;; +let _MIPS_INS_SNE = 548;; +let _MIPS_INS_SNEI = 549;; +let _MIPS_INS_SPLATI = 550;; +let _MIPS_INS_SPLAT = 551;; +let _MIPS_INS_SRA = 552;; +let _MIPS_INS_SRAI = 553;; +let _MIPS_INS_SRARI = 554;; +let _MIPS_INS_SRAR = 555;; +let _MIPS_INS_SRAV = 556;; +let _MIPS_INS_SRL = 557;; +let _MIPS_INS_SRL16 = 558;; +let _MIPS_INS_SRLI = 559;; +let _MIPS_INS_SRLRI = 560;; +let _MIPS_INS_SRLR = 561;; +let _MIPS_INS_SRLV = 562;; +let _MIPS_INS_SSNOP = 563;; +let _MIPS_INS_ST = 564;; +let _MIPS_INS_SUBQH = 565;; +let _MIPS_INS_SUBQH_R = 566;; +let _MIPS_INS_SUBQ = 567;; +let _MIPS_INS_SUBQ_S = 568;; +let _MIPS_INS_SUBSUS_U = 569;; +let _MIPS_INS_SUBSUU_S = 570;; +let _MIPS_INS_SUBS_S = 571;; +let _MIPS_INS_SUBS_U = 572;; +let _MIPS_INS_SUBU16 = 573;; +let _MIPS_INS_SUBUH = 574;; +let _MIPS_INS_SUBUH_R = 575;; +let _MIPS_INS_SUBU = 576;; +let _MIPS_INS_SUBU_S = 577;; +let _MIPS_INS_SUBVI = 578;; +let _MIPS_INS_SUBV = 579;; +let _MIPS_INS_SUXC1 = 580;; +let _MIPS_INS_SW = 581;; +let _MIPS_INS_SW16 = 582;; +let _MIPS_INS_SWC1 = 583;; +let _MIPS_INS_SWC2 = 584;; +let _MIPS_INS_SWC3 = 585;; +let _MIPS_INS_SWL = 586;; +let _MIPS_INS_SWM16 = 587;; +let _MIPS_INS_SWM32 = 588;; +let _MIPS_INS_SWP = 589;; +let _MIPS_INS_SWR = 590;; +let _MIPS_INS_SWXC1 = 591;; +let _MIPS_INS_SYNC = 592;; +let _MIPS_INS_SYNCI = 593;; +let _MIPS_INS_SYSCALL = 594;; +let _MIPS_INS_TEQ = 595;; +let _MIPS_INS_TEQI = 596;; +let _MIPS_INS_TGE = 597;; +let _MIPS_INS_TGEI = 598;; +let _MIPS_INS_TGEIU = 599;; +let _MIPS_INS_TGEU = 600;; +let _MIPS_INS_TLBP = 601;; +let _MIPS_INS_TLBR = 602;; +let _MIPS_INS_TLBWI = 603;; +let _MIPS_INS_TLBWR = 604;; +let _MIPS_INS_TLT = 605;; +let _MIPS_INS_TLTI = 606;; +let _MIPS_INS_TLTIU = 607;; +let _MIPS_INS_TLTU = 608;; +let _MIPS_INS_TNE = 609;; +let _MIPS_INS_TNEI = 610;; +let _MIPS_INS_TRUNC = 611;; +let _MIPS_INS_V3MULU = 612;; +let _MIPS_INS_VMM0 = 613;; +let _MIPS_INS_VMULU = 614;; +let _MIPS_INS_VSHF = 615;; +let _MIPS_INS_WAIT = 616;; +let _MIPS_INS_WRDSP = 617;; +let _MIPS_INS_WSBH = 618;; +let _MIPS_INS_XOR = 619;; +let _MIPS_INS_XOR16 = 620;; +let _MIPS_INS_XORI = 621;; (* some alias instructions *) -let _MIPS_INS_NOP = 582;; -let _MIPS_INS_NEGU = 583;; +let _MIPS_INS_NOP = 622;; +let _MIPS_INS_NEGU = 623;; (* special instructions *) -let _MIPS_INS_JALR_HB = 584;; -let _MIPS_INS_JR_HB = 585;; -let _MIPS_INS_ENDING = 586;; +let _MIPS_INS_JALR_HB = 624;; +let _MIPS_INS_JR_HB = 625;; +let _MIPS_INS_ENDING = 626;; (* Group of MIPS instructions *) diff --git a/bindings/python/capstone/mips_const.py b/bindings/python/capstone/mips_const.py index 45675b5c..f94a2799 100644 --- a/bindings/python/capstone/mips_const.py +++ b/bindings/python/capstone/mips_const.py @@ -12,152 +12,153 @@ MIPS_OP_MEM = 3 MIPS_REG_INVALID = 0 # General purpose registers -MIPS_REG_0 = 1 -MIPS_REG_1 = 2 -MIPS_REG_2 = 3 -MIPS_REG_3 = 4 -MIPS_REG_4 = 5 -MIPS_REG_5 = 6 -MIPS_REG_6 = 7 -MIPS_REG_7 = 8 -MIPS_REG_8 = 9 -MIPS_REG_9 = 10 -MIPS_REG_10 = 11 -MIPS_REG_11 = 12 -MIPS_REG_12 = 13 -MIPS_REG_13 = 14 -MIPS_REG_14 = 15 -MIPS_REG_15 = 16 -MIPS_REG_16 = 17 -MIPS_REG_17 = 18 -MIPS_REG_18 = 19 -MIPS_REG_19 = 20 -MIPS_REG_20 = 21 -MIPS_REG_21 = 22 -MIPS_REG_22 = 23 -MIPS_REG_23 = 24 -MIPS_REG_24 = 25 -MIPS_REG_25 = 26 -MIPS_REG_26 = 27 -MIPS_REG_27 = 28 -MIPS_REG_28 = 29 -MIPS_REG_29 = 30 -MIPS_REG_30 = 31 -MIPS_REG_31 = 32 +MIPS_REG_PC = 1 +MIPS_REG_0 = 2 +MIPS_REG_1 = 3 +MIPS_REG_2 = 4 +MIPS_REG_3 = 5 +MIPS_REG_4 = 6 +MIPS_REG_5 = 7 +MIPS_REG_6 = 8 +MIPS_REG_7 = 9 +MIPS_REG_8 = 10 +MIPS_REG_9 = 11 +MIPS_REG_10 = 12 +MIPS_REG_11 = 13 +MIPS_REG_12 = 14 +MIPS_REG_13 = 15 +MIPS_REG_14 = 16 +MIPS_REG_15 = 17 +MIPS_REG_16 = 18 +MIPS_REG_17 = 19 +MIPS_REG_18 = 20 +MIPS_REG_19 = 21 +MIPS_REG_20 = 22 +MIPS_REG_21 = 23 +MIPS_REG_22 = 24 +MIPS_REG_23 = 25 +MIPS_REG_24 = 26 +MIPS_REG_25 = 27 +MIPS_REG_26 = 28 +MIPS_REG_27 = 29 +MIPS_REG_28 = 30 +MIPS_REG_29 = 31 +MIPS_REG_30 = 32 +MIPS_REG_31 = 33 # DSP registers -MIPS_REG_DSPCCOND = 33 -MIPS_REG_DSPCARRY = 34 -MIPS_REG_DSPEFI = 35 -MIPS_REG_DSPOUTFLAG = 36 -MIPS_REG_DSPOUTFLAG16_19 = 37 -MIPS_REG_DSPOUTFLAG20 = 38 -MIPS_REG_DSPOUTFLAG21 = 39 -MIPS_REG_DSPOUTFLAG22 = 40 -MIPS_REG_DSPOUTFLAG23 = 41 -MIPS_REG_DSPPOS = 42 -MIPS_REG_DSPSCOUNT = 43 +MIPS_REG_DSPCCOND = 34 +MIPS_REG_DSPCARRY = 35 +MIPS_REG_DSPEFI = 36 +MIPS_REG_DSPOUTFLAG = 37 +MIPS_REG_DSPOUTFLAG16_19 = 38 +MIPS_REG_DSPOUTFLAG20 = 39 +MIPS_REG_DSPOUTFLAG21 = 40 +MIPS_REG_DSPOUTFLAG22 = 41 +MIPS_REG_DSPOUTFLAG23 = 42 +MIPS_REG_DSPPOS = 43 +MIPS_REG_DSPSCOUNT = 44 # ACC registers -MIPS_REG_AC0 = 44 -MIPS_REG_AC1 = 45 -MIPS_REG_AC2 = 46 -MIPS_REG_AC3 = 47 +MIPS_REG_AC0 = 45 +MIPS_REG_AC1 = 46 +MIPS_REG_AC2 = 47 +MIPS_REG_AC3 = 48 # COP registers -MIPS_REG_CC0 = 48 -MIPS_REG_CC1 = 49 -MIPS_REG_CC2 = 50 -MIPS_REG_CC3 = 51 -MIPS_REG_CC4 = 52 -MIPS_REG_CC5 = 53 -MIPS_REG_CC6 = 54 -MIPS_REG_CC7 = 55 +MIPS_REG_CC0 = 49 +MIPS_REG_CC1 = 50 +MIPS_REG_CC2 = 51 +MIPS_REG_CC3 = 52 +MIPS_REG_CC4 = 53 +MIPS_REG_CC5 = 54 +MIPS_REG_CC6 = 55 +MIPS_REG_CC7 = 56 # FPU registers -MIPS_REG_F0 = 56 -MIPS_REG_F1 = 57 -MIPS_REG_F2 = 58 -MIPS_REG_F3 = 59 -MIPS_REG_F4 = 60 -MIPS_REG_F5 = 61 -MIPS_REG_F6 = 62 -MIPS_REG_F7 = 63 -MIPS_REG_F8 = 64 -MIPS_REG_F9 = 65 -MIPS_REG_F10 = 66 -MIPS_REG_F11 = 67 -MIPS_REG_F12 = 68 -MIPS_REG_F13 = 69 -MIPS_REG_F14 = 70 -MIPS_REG_F15 = 71 -MIPS_REG_F16 = 72 -MIPS_REG_F17 = 73 -MIPS_REG_F18 = 74 -MIPS_REG_F19 = 75 -MIPS_REG_F20 = 76 -MIPS_REG_F21 = 77 -MIPS_REG_F22 = 78 -MIPS_REG_F23 = 79 -MIPS_REG_F24 = 80 -MIPS_REG_F25 = 81 -MIPS_REG_F26 = 82 -MIPS_REG_F27 = 83 -MIPS_REG_F28 = 84 -MIPS_REG_F29 = 85 -MIPS_REG_F30 = 86 -MIPS_REG_F31 = 87 -MIPS_REG_FCC0 = 88 -MIPS_REG_FCC1 = 89 -MIPS_REG_FCC2 = 90 -MIPS_REG_FCC3 = 91 -MIPS_REG_FCC4 = 92 -MIPS_REG_FCC5 = 93 -MIPS_REG_FCC6 = 94 -MIPS_REG_FCC7 = 95 +MIPS_REG_F0 = 57 +MIPS_REG_F1 = 58 +MIPS_REG_F2 = 59 +MIPS_REG_F3 = 60 +MIPS_REG_F4 = 61 +MIPS_REG_F5 = 62 +MIPS_REG_F6 = 63 +MIPS_REG_F7 = 64 +MIPS_REG_F8 = 65 +MIPS_REG_F9 = 66 +MIPS_REG_F10 = 67 +MIPS_REG_F11 = 68 +MIPS_REG_F12 = 69 +MIPS_REG_F13 = 70 +MIPS_REG_F14 = 71 +MIPS_REG_F15 = 72 +MIPS_REG_F16 = 73 +MIPS_REG_F17 = 74 +MIPS_REG_F18 = 75 +MIPS_REG_F19 = 76 +MIPS_REG_F20 = 77 +MIPS_REG_F21 = 78 +MIPS_REG_F22 = 79 +MIPS_REG_F23 = 80 +MIPS_REG_F24 = 81 +MIPS_REG_F25 = 82 +MIPS_REG_F26 = 83 +MIPS_REG_F27 = 84 +MIPS_REG_F28 = 85 +MIPS_REG_F29 = 86 +MIPS_REG_F30 = 87 +MIPS_REG_F31 = 88 +MIPS_REG_FCC0 = 89 +MIPS_REG_FCC1 = 90 +MIPS_REG_FCC2 = 91 +MIPS_REG_FCC3 = 92 +MIPS_REG_FCC4 = 93 +MIPS_REG_FCC5 = 94 +MIPS_REG_FCC6 = 95 +MIPS_REG_FCC7 = 96 # AFPR128 -MIPS_REG_W0 = 96 -MIPS_REG_W1 = 97 -MIPS_REG_W2 = 98 -MIPS_REG_W3 = 99 -MIPS_REG_W4 = 100 -MIPS_REG_W5 = 101 -MIPS_REG_W6 = 102 -MIPS_REG_W7 = 103 -MIPS_REG_W8 = 104 -MIPS_REG_W9 = 105 -MIPS_REG_W10 = 106 -MIPS_REG_W11 = 107 -MIPS_REG_W12 = 108 -MIPS_REG_W13 = 109 -MIPS_REG_W14 = 110 -MIPS_REG_W15 = 111 -MIPS_REG_W16 = 112 -MIPS_REG_W17 = 113 -MIPS_REG_W18 = 114 -MIPS_REG_W19 = 115 -MIPS_REG_W20 = 116 -MIPS_REG_W21 = 117 -MIPS_REG_W22 = 118 -MIPS_REG_W23 = 119 -MIPS_REG_W24 = 120 -MIPS_REG_W25 = 121 -MIPS_REG_W26 = 122 -MIPS_REG_W27 = 123 -MIPS_REG_W28 = 124 -MIPS_REG_W29 = 125 -MIPS_REG_W30 = 126 -MIPS_REG_W31 = 127 -MIPS_REG_HI = 128 -MIPS_REG_LO = 129 -MIPS_REG_P0 = 130 -MIPS_REG_P1 = 131 -MIPS_REG_P2 = 132 -MIPS_REG_MPL0 = 133 -MIPS_REG_MPL1 = 134 -MIPS_REG_MPL2 = 135 -MIPS_REG_ENDING = 136 +MIPS_REG_W0 = 97 +MIPS_REG_W1 = 98 +MIPS_REG_W2 = 99 +MIPS_REG_W3 = 100 +MIPS_REG_W4 = 101 +MIPS_REG_W5 = 102 +MIPS_REG_W6 = 103 +MIPS_REG_W7 = 104 +MIPS_REG_W8 = 105 +MIPS_REG_W9 = 106 +MIPS_REG_W10 = 107 +MIPS_REG_W11 = 108 +MIPS_REG_W12 = 109 +MIPS_REG_W13 = 110 +MIPS_REG_W14 = 111 +MIPS_REG_W15 = 112 +MIPS_REG_W16 = 113 +MIPS_REG_W17 = 114 +MIPS_REG_W18 = 115 +MIPS_REG_W19 = 116 +MIPS_REG_W20 = 117 +MIPS_REG_W21 = 118 +MIPS_REG_W22 = 119 +MIPS_REG_W23 = 120 +MIPS_REG_W24 = 121 +MIPS_REG_W25 = 122 +MIPS_REG_W26 = 123 +MIPS_REG_W27 = 124 +MIPS_REG_W28 = 125 +MIPS_REG_W29 = 126 +MIPS_REG_W30 = 127 +MIPS_REG_W31 = 128 +MIPS_REG_HI = 129 +MIPS_REG_LO = 130 +MIPS_REG_P0 = 131 +MIPS_REG_P1 = 132 +MIPS_REG_P2 = 133 +MIPS_REG_MPL0 = 134 +MIPS_REG_MPL1 = 135 +MIPS_REG_MPL2 = 136 +MIPS_REG_ENDING = 137 MIPS_REG_ZERO = MIPS_REG_0 MIPS_REG_AT = MIPS_REG_1 MIPS_REG_V0 = MIPS_REG_2 @@ -206,593 +207,633 @@ MIPS_INS_INVALID = 0 MIPS_INS_ABSQ_S = 1 MIPS_INS_ADD = 2 MIPS_INS_ADDIUPC = 3 -MIPS_INS_ADDQH = 4 -MIPS_INS_ADDQH_R = 5 -MIPS_INS_ADDQ = 6 -MIPS_INS_ADDQ_S = 7 -MIPS_INS_ADDSC = 8 -MIPS_INS_ADDS_A = 9 -MIPS_INS_ADDS_S = 10 -MIPS_INS_ADDS_U = 11 -MIPS_INS_ADDUH = 12 -MIPS_INS_ADDUH_R = 13 -MIPS_INS_ADDU = 14 -MIPS_INS_ADDU_S = 15 -MIPS_INS_ADDVI = 16 -MIPS_INS_ADDV = 17 -MIPS_INS_ADDWC = 18 -MIPS_INS_ADD_A = 19 -MIPS_INS_ADDI = 20 -MIPS_INS_ADDIU = 21 -MIPS_INS_ALIGN = 22 -MIPS_INS_ALUIPC = 23 -MIPS_INS_AND = 24 -MIPS_INS_ANDI = 25 -MIPS_INS_APPEND = 26 -MIPS_INS_ASUB_S = 27 -MIPS_INS_ASUB_U = 28 -MIPS_INS_AUI = 29 -MIPS_INS_AUIPC = 30 -MIPS_INS_AVER_S = 31 -MIPS_INS_AVER_U = 32 -MIPS_INS_AVE_S = 33 -MIPS_INS_AVE_U = 34 -MIPS_INS_BADDU = 35 -MIPS_INS_BAL = 36 -MIPS_INS_BALC = 37 -MIPS_INS_BALIGN = 38 -MIPS_INS_BC = 39 -MIPS_INS_BC0F = 40 -MIPS_INS_BC0FL = 41 -MIPS_INS_BC0T = 42 -MIPS_INS_BC0TL = 43 -MIPS_INS_BC1EQZ = 44 -MIPS_INS_BC1F = 45 -MIPS_INS_BC1FL = 46 -MIPS_INS_BC1NEZ = 47 -MIPS_INS_BC1T = 48 -MIPS_INS_BC1TL = 49 -MIPS_INS_BC2EQZ = 50 -MIPS_INS_BC2F = 51 -MIPS_INS_BC2FL = 52 -MIPS_INS_BC2NEZ = 53 -MIPS_INS_BC2T = 54 -MIPS_INS_BC2TL = 55 -MIPS_INS_BC3F = 56 -MIPS_INS_BC3FL = 57 -MIPS_INS_BC3T = 58 -MIPS_INS_BC3TL = 59 -MIPS_INS_BCLRI = 60 -MIPS_INS_BCLR = 61 -MIPS_INS_BEQ = 62 -MIPS_INS_BEQC = 63 -MIPS_INS_BEQL = 64 -MIPS_INS_BEQZALC = 65 -MIPS_INS_BEQZC = 66 -MIPS_INS_BGEC = 67 -MIPS_INS_BGEUC = 68 -MIPS_INS_BGEZ = 69 -MIPS_INS_BGEZAL = 70 -MIPS_INS_BGEZALC = 71 -MIPS_INS_BGEZALL = 72 -MIPS_INS_BGEZALS = 73 -MIPS_INS_BGEZC = 74 -MIPS_INS_BGEZL = 75 -MIPS_INS_BGTZ = 76 -MIPS_INS_BGTZALC = 77 -MIPS_INS_BGTZC = 78 -MIPS_INS_BGTZL = 79 -MIPS_INS_BINSLI = 80 -MIPS_INS_BINSL = 81 -MIPS_INS_BINSRI = 82 -MIPS_INS_BINSR = 83 -MIPS_INS_BITREV = 84 -MIPS_INS_BITSWAP = 85 -MIPS_INS_BLEZ = 86 -MIPS_INS_BLEZALC = 87 -MIPS_INS_BLEZC = 88 -MIPS_INS_BLEZL = 89 -MIPS_INS_BLTC = 90 -MIPS_INS_BLTUC = 91 -MIPS_INS_BLTZ = 92 -MIPS_INS_BLTZAL = 93 -MIPS_INS_BLTZALC = 94 -MIPS_INS_BLTZALL = 95 -MIPS_INS_BLTZALS = 96 -MIPS_INS_BLTZC = 97 -MIPS_INS_BLTZL = 98 -MIPS_INS_BMNZI = 99 -MIPS_INS_BMNZ = 100 -MIPS_INS_BMZI = 101 -MIPS_INS_BMZ = 102 -MIPS_INS_BNE = 103 -MIPS_INS_BNEC = 104 -MIPS_INS_BNEGI = 105 -MIPS_INS_BNEG = 106 -MIPS_INS_BNEL = 107 -MIPS_INS_BNEZALC = 108 -MIPS_INS_BNEZC = 109 -MIPS_INS_BNVC = 110 -MIPS_INS_BNZ = 111 -MIPS_INS_BOVC = 112 -MIPS_INS_BPOSGE32 = 113 -MIPS_INS_BREAK = 114 -MIPS_INS_BSELI = 115 -MIPS_INS_BSEL = 116 -MIPS_INS_BSETI = 117 -MIPS_INS_BSET = 118 -MIPS_INS_BZ = 119 -MIPS_INS_BEQZ = 120 -MIPS_INS_B = 121 -MIPS_INS_BNEZ = 122 -MIPS_INS_BTEQZ = 123 -MIPS_INS_BTNEZ = 124 -MIPS_INS_CACHE = 125 -MIPS_INS_CEIL = 126 -MIPS_INS_CEQI = 127 -MIPS_INS_CEQ = 128 -MIPS_INS_CFC1 = 129 -MIPS_INS_CFCMSA = 130 -MIPS_INS_CINS = 131 -MIPS_INS_CINS32 = 132 -MIPS_INS_CLASS = 133 -MIPS_INS_CLEI_S = 134 -MIPS_INS_CLEI_U = 135 -MIPS_INS_CLE_S = 136 -MIPS_INS_CLE_U = 137 -MIPS_INS_CLO = 138 -MIPS_INS_CLTI_S = 139 -MIPS_INS_CLTI_U = 140 -MIPS_INS_CLT_S = 141 -MIPS_INS_CLT_U = 142 -MIPS_INS_CLZ = 143 -MIPS_INS_CMPGDU = 144 -MIPS_INS_CMPGU = 145 -MIPS_INS_CMPU = 146 -MIPS_INS_CMP = 147 -MIPS_INS_COPY_S = 148 -MIPS_INS_COPY_U = 149 -MIPS_INS_CTC1 = 150 -MIPS_INS_CTCMSA = 151 -MIPS_INS_CVT = 152 -MIPS_INS_C = 153 -MIPS_INS_CMPI = 154 -MIPS_INS_DADD = 155 -MIPS_INS_DADDI = 156 -MIPS_INS_DADDIU = 157 -MIPS_INS_DADDU = 158 -MIPS_INS_DAHI = 159 -MIPS_INS_DALIGN = 160 -MIPS_INS_DATI = 161 -MIPS_INS_DAUI = 162 -MIPS_INS_DBITSWAP = 163 -MIPS_INS_DCLO = 164 -MIPS_INS_DCLZ = 165 -MIPS_INS_DDIV = 166 -MIPS_INS_DDIVU = 167 -MIPS_INS_DERET = 168 -MIPS_INS_DEXT = 169 -MIPS_INS_DEXTM = 170 -MIPS_INS_DEXTU = 171 -MIPS_INS_DI = 172 -MIPS_INS_DINS = 173 -MIPS_INS_DINSM = 174 -MIPS_INS_DINSU = 175 -MIPS_INS_DIV = 176 -MIPS_INS_DIVU = 177 -MIPS_INS_DIV_S = 178 -MIPS_INS_DIV_U = 179 -MIPS_INS_DLSA = 180 -MIPS_INS_DMFC0 = 181 -MIPS_INS_DMFC1 = 182 -MIPS_INS_DMFC2 = 183 -MIPS_INS_DMOD = 184 -MIPS_INS_DMODU = 185 -MIPS_INS_DMTC0 = 186 -MIPS_INS_DMTC1 = 187 -MIPS_INS_DMTC2 = 188 -MIPS_INS_DMUH = 189 -MIPS_INS_DMUHU = 190 -MIPS_INS_DMUL = 191 -MIPS_INS_DMULT = 192 -MIPS_INS_DMULTU = 193 -MIPS_INS_DMULU = 194 -MIPS_INS_DOTP_S = 195 -MIPS_INS_DOTP_U = 196 -MIPS_INS_DPADD_S = 197 -MIPS_INS_DPADD_U = 198 -MIPS_INS_DPAQX_SA = 199 -MIPS_INS_DPAQX_S = 200 -MIPS_INS_DPAQ_SA = 201 -MIPS_INS_DPAQ_S = 202 -MIPS_INS_DPAU = 203 -MIPS_INS_DPAX = 204 -MIPS_INS_DPA = 205 -MIPS_INS_DPOP = 206 -MIPS_INS_DPSQX_SA = 207 -MIPS_INS_DPSQX_S = 208 -MIPS_INS_DPSQ_SA = 209 -MIPS_INS_DPSQ_S = 210 -MIPS_INS_DPSUB_S = 211 -MIPS_INS_DPSUB_U = 212 -MIPS_INS_DPSU = 213 -MIPS_INS_DPSX = 214 -MIPS_INS_DPS = 215 -MIPS_INS_DROTR = 216 -MIPS_INS_DROTR32 = 217 -MIPS_INS_DROTRV = 218 -MIPS_INS_DSBH = 219 -MIPS_INS_DSHD = 220 -MIPS_INS_DSLL = 221 -MIPS_INS_DSLL32 = 222 -MIPS_INS_DSLLV = 223 -MIPS_INS_DSRA = 224 -MIPS_INS_DSRA32 = 225 -MIPS_INS_DSRAV = 226 -MIPS_INS_DSRL = 227 -MIPS_INS_DSRL32 = 228 -MIPS_INS_DSRLV = 229 -MIPS_INS_DSUB = 230 -MIPS_INS_DSUBU = 231 -MIPS_INS_EHB = 232 -MIPS_INS_EI = 233 -MIPS_INS_ERET = 234 -MIPS_INS_EXT = 235 -MIPS_INS_EXTP = 236 -MIPS_INS_EXTPDP = 237 -MIPS_INS_EXTPDPV = 238 -MIPS_INS_EXTPV = 239 -MIPS_INS_EXTRV_RS = 240 -MIPS_INS_EXTRV_R = 241 -MIPS_INS_EXTRV_S = 242 -MIPS_INS_EXTRV = 243 -MIPS_INS_EXTR_RS = 244 -MIPS_INS_EXTR_R = 245 -MIPS_INS_EXTR_S = 246 -MIPS_INS_EXTR = 247 -MIPS_INS_EXTS = 248 -MIPS_INS_EXTS32 = 249 -MIPS_INS_ABS = 250 -MIPS_INS_FADD = 251 -MIPS_INS_FCAF = 252 -MIPS_INS_FCEQ = 253 -MIPS_INS_FCLASS = 254 -MIPS_INS_FCLE = 255 -MIPS_INS_FCLT = 256 -MIPS_INS_FCNE = 257 -MIPS_INS_FCOR = 258 -MIPS_INS_FCUEQ = 259 -MIPS_INS_FCULE = 260 -MIPS_INS_FCULT = 261 -MIPS_INS_FCUNE = 262 -MIPS_INS_FCUN = 263 -MIPS_INS_FDIV = 264 -MIPS_INS_FEXDO = 265 -MIPS_INS_FEXP2 = 266 -MIPS_INS_FEXUPL = 267 -MIPS_INS_FEXUPR = 268 -MIPS_INS_FFINT_S = 269 -MIPS_INS_FFINT_U = 270 -MIPS_INS_FFQL = 271 -MIPS_INS_FFQR = 272 -MIPS_INS_FILL = 273 -MIPS_INS_FLOG2 = 274 -MIPS_INS_FLOOR = 275 -MIPS_INS_FMADD = 276 -MIPS_INS_FMAX_A = 277 -MIPS_INS_FMAX = 278 -MIPS_INS_FMIN_A = 279 -MIPS_INS_FMIN = 280 -MIPS_INS_MOV = 281 -MIPS_INS_FMSUB = 282 -MIPS_INS_FMUL = 283 -MIPS_INS_MUL = 284 -MIPS_INS_NEG = 285 -MIPS_INS_FRCP = 286 -MIPS_INS_FRINT = 287 -MIPS_INS_FRSQRT = 288 -MIPS_INS_FSAF = 289 -MIPS_INS_FSEQ = 290 -MIPS_INS_FSLE = 291 -MIPS_INS_FSLT = 292 -MIPS_INS_FSNE = 293 -MIPS_INS_FSOR = 294 -MIPS_INS_FSQRT = 295 -MIPS_INS_SQRT = 296 -MIPS_INS_FSUB = 297 -MIPS_INS_SUB = 298 -MIPS_INS_FSUEQ = 299 -MIPS_INS_FSULE = 300 -MIPS_INS_FSULT = 301 -MIPS_INS_FSUNE = 302 -MIPS_INS_FSUN = 303 -MIPS_INS_FTINT_S = 304 -MIPS_INS_FTINT_U = 305 -MIPS_INS_FTQ = 306 -MIPS_INS_FTRUNC_S = 307 -MIPS_INS_FTRUNC_U = 308 -MIPS_INS_HADD_S = 309 -MIPS_INS_HADD_U = 310 -MIPS_INS_HSUB_S = 311 -MIPS_INS_HSUB_U = 312 -MIPS_INS_ILVEV = 313 -MIPS_INS_ILVL = 314 -MIPS_INS_ILVOD = 315 -MIPS_INS_ILVR = 316 -MIPS_INS_INS = 317 -MIPS_INS_INSERT = 318 -MIPS_INS_INSV = 319 -MIPS_INS_INSVE = 320 -MIPS_INS_J = 321 -MIPS_INS_JAL = 322 -MIPS_INS_JALR = 323 -MIPS_INS_JALRS = 324 -MIPS_INS_JALS = 325 -MIPS_INS_JALX = 326 -MIPS_INS_JIALC = 327 -MIPS_INS_JIC = 328 -MIPS_INS_JR = 329 -MIPS_INS_JRADDIUSP = 330 -MIPS_INS_JRC = 331 -MIPS_INS_JALRC = 332 -MIPS_INS_LB = 333 -MIPS_INS_LBUX = 334 -MIPS_INS_LBU = 335 -MIPS_INS_LD = 336 -MIPS_INS_LDC1 = 337 -MIPS_INS_LDC2 = 338 -MIPS_INS_LDC3 = 339 -MIPS_INS_LDI = 340 -MIPS_INS_LDL = 341 -MIPS_INS_LDPC = 342 -MIPS_INS_LDR = 343 -MIPS_INS_LDXC1 = 344 -MIPS_INS_LH = 345 -MIPS_INS_LHX = 346 -MIPS_INS_LHU = 347 -MIPS_INS_LL = 348 -MIPS_INS_LLD = 349 -MIPS_INS_LSA = 350 -MIPS_INS_LUXC1 = 351 -MIPS_INS_LUI = 352 -MIPS_INS_LW = 353 -MIPS_INS_LWC1 = 354 -MIPS_INS_LWC2 = 355 -MIPS_INS_LWC3 = 356 -MIPS_INS_LWL = 357 -MIPS_INS_LWPC = 358 -MIPS_INS_LWR = 359 -MIPS_INS_LWUPC = 360 -MIPS_INS_LWU = 361 -MIPS_INS_LWX = 362 -MIPS_INS_LWXC1 = 363 -MIPS_INS_LI = 364 -MIPS_INS_MADD = 365 -MIPS_INS_MADDF = 366 -MIPS_INS_MADDR_Q = 367 -MIPS_INS_MADDU = 368 -MIPS_INS_MADDV = 369 -MIPS_INS_MADD_Q = 370 -MIPS_INS_MAQ_SA = 371 -MIPS_INS_MAQ_S = 372 -MIPS_INS_MAXA = 373 -MIPS_INS_MAXI_S = 374 -MIPS_INS_MAXI_U = 375 -MIPS_INS_MAX_A = 376 -MIPS_INS_MAX = 377 -MIPS_INS_MAX_S = 378 -MIPS_INS_MAX_U = 379 -MIPS_INS_MFC0 = 380 -MIPS_INS_MFC1 = 381 -MIPS_INS_MFC2 = 382 -MIPS_INS_MFHC1 = 383 -MIPS_INS_MFHI = 384 -MIPS_INS_MFLO = 385 -MIPS_INS_MINA = 386 -MIPS_INS_MINI_S = 387 -MIPS_INS_MINI_U = 388 -MIPS_INS_MIN_A = 389 -MIPS_INS_MIN = 390 -MIPS_INS_MIN_S = 391 -MIPS_INS_MIN_U = 392 -MIPS_INS_MOD = 393 -MIPS_INS_MODSUB = 394 -MIPS_INS_MODU = 395 -MIPS_INS_MOD_S = 396 -MIPS_INS_MOD_U = 397 -MIPS_INS_MOVE = 398 -MIPS_INS_MOVF = 399 -MIPS_INS_MOVN = 400 -MIPS_INS_MOVT = 401 -MIPS_INS_MOVZ = 402 -MIPS_INS_MSUB = 403 -MIPS_INS_MSUBF = 404 -MIPS_INS_MSUBR_Q = 405 -MIPS_INS_MSUBU = 406 -MIPS_INS_MSUBV = 407 -MIPS_INS_MSUB_Q = 408 -MIPS_INS_MTC0 = 409 -MIPS_INS_MTC1 = 410 -MIPS_INS_MTC2 = 411 -MIPS_INS_MTHC1 = 412 -MIPS_INS_MTHI = 413 -MIPS_INS_MTHLIP = 414 -MIPS_INS_MTLO = 415 -MIPS_INS_MTM0 = 416 -MIPS_INS_MTM1 = 417 -MIPS_INS_MTM2 = 418 -MIPS_INS_MTP0 = 419 -MIPS_INS_MTP1 = 420 -MIPS_INS_MTP2 = 421 -MIPS_INS_MUH = 422 -MIPS_INS_MUHU = 423 -MIPS_INS_MULEQ_S = 424 -MIPS_INS_MULEU_S = 425 -MIPS_INS_MULQ_RS = 426 -MIPS_INS_MULQ_S = 427 -MIPS_INS_MULR_Q = 428 -MIPS_INS_MULSAQ_S = 429 -MIPS_INS_MULSA = 430 -MIPS_INS_MULT = 431 -MIPS_INS_MULTU = 432 -MIPS_INS_MULU = 433 -MIPS_INS_MULV = 434 -MIPS_INS_MUL_Q = 435 -MIPS_INS_MUL_S = 436 -MIPS_INS_NLOC = 437 -MIPS_INS_NLZC = 438 -MIPS_INS_NMADD = 439 -MIPS_INS_NMSUB = 440 -MIPS_INS_NOR = 441 -MIPS_INS_NORI = 442 -MIPS_INS_NOT = 443 -MIPS_INS_OR = 444 -MIPS_INS_ORI = 445 -MIPS_INS_PACKRL = 446 -MIPS_INS_PAUSE = 447 -MIPS_INS_PCKEV = 448 -MIPS_INS_PCKOD = 449 -MIPS_INS_PCNT = 450 -MIPS_INS_PICK = 451 -MIPS_INS_POP = 452 -MIPS_INS_PRECEQU = 453 -MIPS_INS_PRECEQ = 454 -MIPS_INS_PRECEU = 455 -MIPS_INS_PRECRQU_S = 456 -MIPS_INS_PRECRQ = 457 -MIPS_INS_PRECRQ_RS = 458 -MIPS_INS_PRECR = 459 -MIPS_INS_PRECR_SRA = 460 -MIPS_INS_PRECR_SRA_R = 461 -MIPS_INS_PREF = 462 -MIPS_INS_PREPEND = 463 -MIPS_INS_RADDU = 464 -MIPS_INS_RDDSP = 465 -MIPS_INS_RDHWR = 466 -MIPS_INS_REPLV = 467 -MIPS_INS_REPL = 468 -MIPS_INS_RINT = 469 -MIPS_INS_ROTR = 470 -MIPS_INS_ROTRV = 471 -MIPS_INS_ROUND = 472 -MIPS_INS_SAT_S = 473 -MIPS_INS_SAT_U = 474 -MIPS_INS_SB = 475 -MIPS_INS_SC = 476 -MIPS_INS_SCD = 477 -MIPS_INS_SD = 478 -MIPS_INS_SDBBP = 479 -MIPS_INS_SDC1 = 480 -MIPS_INS_SDC2 = 481 -MIPS_INS_SDC3 = 482 -MIPS_INS_SDL = 483 -MIPS_INS_SDR = 484 -MIPS_INS_SDXC1 = 485 -MIPS_INS_SEB = 486 -MIPS_INS_SEH = 487 -MIPS_INS_SELEQZ = 488 -MIPS_INS_SELNEZ = 489 -MIPS_INS_SEL = 490 -MIPS_INS_SEQ = 491 -MIPS_INS_SEQI = 492 -MIPS_INS_SH = 493 -MIPS_INS_SHF = 494 -MIPS_INS_SHILO = 495 -MIPS_INS_SHILOV = 496 -MIPS_INS_SHLLV = 497 -MIPS_INS_SHLLV_S = 498 -MIPS_INS_SHLL = 499 -MIPS_INS_SHLL_S = 500 -MIPS_INS_SHRAV = 501 -MIPS_INS_SHRAV_R = 502 -MIPS_INS_SHRA = 503 -MIPS_INS_SHRA_R = 504 -MIPS_INS_SHRLV = 505 -MIPS_INS_SHRL = 506 -MIPS_INS_SLDI = 507 -MIPS_INS_SLD = 508 -MIPS_INS_SLL = 509 -MIPS_INS_SLLI = 510 -MIPS_INS_SLLV = 511 -MIPS_INS_SLT = 512 -MIPS_INS_SLTI = 513 -MIPS_INS_SLTIU = 514 -MIPS_INS_SLTU = 515 -MIPS_INS_SNE = 516 -MIPS_INS_SNEI = 517 -MIPS_INS_SPLATI = 518 -MIPS_INS_SPLAT = 519 -MIPS_INS_SRA = 520 -MIPS_INS_SRAI = 521 -MIPS_INS_SRARI = 522 -MIPS_INS_SRAR = 523 -MIPS_INS_SRAV = 524 -MIPS_INS_SRL = 525 -MIPS_INS_SRLI = 526 -MIPS_INS_SRLRI = 527 -MIPS_INS_SRLR = 528 -MIPS_INS_SRLV = 529 -MIPS_INS_SSNOP = 530 -MIPS_INS_ST = 531 -MIPS_INS_SUBQH = 532 -MIPS_INS_SUBQH_R = 533 -MIPS_INS_SUBQ = 534 -MIPS_INS_SUBQ_S = 535 -MIPS_INS_SUBSUS_U = 536 -MIPS_INS_SUBSUU_S = 537 -MIPS_INS_SUBS_S = 538 -MIPS_INS_SUBS_U = 539 -MIPS_INS_SUBUH = 540 -MIPS_INS_SUBUH_R = 541 -MIPS_INS_SUBU = 542 -MIPS_INS_SUBU_S = 543 -MIPS_INS_SUBVI = 544 -MIPS_INS_SUBV = 545 -MIPS_INS_SUXC1 = 546 -MIPS_INS_SW = 547 -MIPS_INS_SWC1 = 548 -MIPS_INS_SWC2 = 549 -MIPS_INS_SWC3 = 550 -MIPS_INS_SWL = 551 -MIPS_INS_SWR = 552 -MIPS_INS_SWXC1 = 553 -MIPS_INS_SYNC = 554 -MIPS_INS_SYSCALL = 555 -MIPS_INS_TEQ = 556 -MIPS_INS_TEQI = 557 -MIPS_INS_TGE = 558 -MIPS_INS_TGEI = 559 -MIPS_INS_TGEIU = 560 -MIPS_INS_TGEU = 561 -MIPS_INS_TLBP = 562 -MIPS_INS_TLBR = 563 -MIPS_INS_TLBWI = 564 -MIPS_INS_TLBWR = 565 -MIPS_INS_TLT = 566 -MIPS_INS_TLTI = 567 -MIPS_INS_TLTIU = 568 -MIPS_INS_TLTU = 569 -MIPS_INS_TNE = 570 -MIPS_INS_TNEI = 571 -MIPS_INS_TRUNC = 572 -MIPS_INS_V3MULU = 573 -MIPS_INS_VMM0 = 574 -MIPS_INS_VMULU = 575 -MIPS_INS_VSHF = 576 -MIPS_INS_WAIT = 577 -MIPS_INS_WRDSP = 578 -MIPS_INS_WSBH = 579 -MIPS_INS_XOR = 580 -MIPS_INS_XORI = 581 +MIPS_INS_ADDIUR1SP = 4 +MIPS_INS_ADDIUR2 = 5 +MIPS_INS_ADDIUS5 = 6 +MIPS_INS_ADDIUSP = 7 +MIPS_INS_ADDQH = 8 +MIPS_INS_ADDQH_R = 9 +MIPS_INS_ADDQ = 10 +MIPS_INS_ADDQ_S = 11 +MIPS_INS_ADDSC = 12 +MIPS_INS_ADDS_A = 13 +MIPS_INS_ADDS_S = 14 +MIPS_INS_ADDS_U = 15 +MIPS_INS_ADDU16 = 16 +MIPS_INS_ADDUH = 17 +MIPS_INS_ADDUH_R = 18 +MIPS_INS_ADDU = 19 +MIPS_INS_ADDU_S = 20 +MIPS_INS_ADDVI = 21 +MIPS_INS_ADDV = 22 +MIPS_INS_ADDWC = 23 +MIPS_INS_ADD_A = 24 +MIPS_INS_ADDI = 25 +MIPS_INS_ADDIU = 26 +MIPS_INS_ALIGN = 27 +MIPS_INS_ALUIPC = 28 +MIPS_INS_AND = 29 +MIPS_INS_AND16 = 30 +MIPS_INS_ANDI16 = 31 +MIPS_INS_ANDI = 32 +MIPS_INS_APPEND = 33 +MIPS_INS_ASUB_S = 34 +MIPS_INS_ASUB_U = 35 +MIPS_INS_AUI = 36 +MIPS_INS_AUIPC = 37 +MIPS_INS_AVER_S = 38 +MIPS_INS_AVER_U = 39 +MIPS_INS_AVE_S = 40 +MIPS_INS_AVE_U = 41 +MIPS_INS_B16 = 42 +MIPS_INS_BADDU = 43 +MIPS_INS_BAL = 44 +MIPS_INS_BALC = 45 +MIPS_INS_BALIGN = 46 +MIPS_INS_BBIT0 = 47 +MIPS_INS_BBIT032 = 48 +MIPS_INS_BBIT1 = 49 +MIPS_INS_BBIT132 = 50 +MIPS_INS_BC = 51 +MIPS_INS_BC0F = 52 +MIPS_INS_BC0FL = 53 +MIPS_INS_BC0T = 54 +MIPS_INS_BC0TL = 55 +MIPS_INS_BC1EQZ = 56 +MIPS_INS_BC1F = 57 +MIPS_INS_BC1FL = 58 +MIPS_INS_BC1NEZ = 59 +MIPS_INS_BC1T = 60 +MIPS_INS_BC1TL = 61 +MIPS_INS_BC2EQZ = 62 +MIPS_INS_BC2F = 63 +MIPS_INS_BC2FL = 64 +MIPS_INS_BC2NEZ = 65 +MIPS_INS_BC2T = 66 +MIPS_INS_BC2TL = 67 +MIPS_INS_BC3F = 68 +MIPS_INS_BC3FL = 69 +MIPS_INS_BC3T = 70 +MIPS_INS_BC3TL = 71 +MIPS_INS_BCLRI = 72 +MIPS_INS_BCLR = 73 +MIPS_INS_BEQ = 74 +MIPS_INS_BEQC = 75 +MIPS_INS_BEQL = 76 +MIPS_INS_BEQZ16 = 77 +MIPS_INS_BEQZALC = 78 +MIPS_INS_BEQZC = 79 +MIPS_INS_BGEC = 80 +MIPS_INS_BGEUC = 81 +MIPS_INS_BGEZ = 82 +MIPS_INS_BGEZAL = 83 +MIPS_INS_BGEZALC = 84 +MIPS_INS_BGEZALL = 85 +MIPS_INS_BGEZALS = 86 +MIPS_INS_BGEZC = 87 +MIPS_INS_BGEZL = 88 +MIPS_INS_BGTZ = 89 +MIPS_INS_BGTZALC = 90 +MIPS_INS_BGTZC = 91 +MIPS_INS_BGTZL = 92 +MIPS_INS_BINSLI = 93 +MIPS_INS_BINSL = 94 +MIPS_INS_BINSRI = 95 +MIPS_INS_BINSR = 96 +MIPS_INS_BITREV = 97 +MIPS_INS_BITSWAP = 98 +MIPS_INS_BLEZ = 99 +MIPS_INS_BLEZALC = 100 +MIPS_INS_BLEZC = 101 +MIPS_INS_BLEZL = 102 +MIPS_INS_BLTC = 103 +MIPS_INS_BLTUC = 104 +MIPS_INS_BLTZ = 105 +MIPS_INS_BLTZAL = 106 +MIPS_INS_BLTZALC = 107 +MIPS_INS_BLTZALL = 108 +MIPS_INS_BLTZALS = 109 +MIPS_INS_BLTZC = 110 +MIPS_INS_BLTZL = 111 +MIPS_INS_BMNZI = 112 +MIPS_INS_BMNZ = 113 +MIPS_INS_BMZI = 114 +MIPS_INS_BMZ = 115 +MIPS_INS_BNE = 116 +MIPS_INS_BNEC = 117 +MIPS_INS_BNEGI = 118 +MIPS_INS_BNEG = 119 +MIPS_INS_BNEL = 120 +MIPS_INS_BNEZ16 = 121 +MIPS_INS_BNEZALC = 122 +MIPS_INS_BNEZC = 123 +MIPS_INS_BNVC = 124 +MIPS_INS_BNZ = 125 +MIPS_INS_BOVC = 126 +MIPS_INS_BPOSGE32 = 127 +MIPS_INS_BREAK = 128 +MIPS_INS_BREAK16 = 129 +MIPS_INS_BSELI = 130 +MIPS_INS_BSEL = 131 +MIPS_INS_BSETI = 132 +MIPS_INS_BSET = 133 +MIPS_INS_BZ = 134 +MIPS_INS_BEQZ = 135 +MIPS_INS_B = 136 +MIPS_INS_BNEZ = 137 +MIPS_INS_BTEQZ = 138 +MIPS_INS_BTNEZ = 139 +MIPS_INS_CACHE = 140 +MIPS_INS_CEIL = 141 +MIPS_INS_CEQI = 142 +MIPS_INS_CEQ = 143 +MIPS_INS_CFC1 = 144 +MIPS_INS_CFCMSA = 145 +MIPS_INS_CINS = 146 +MIPS_INS_CINS32 = 147 +MIPS_INS_CLASS = 148 +MIPS_INS_CLEI_S = 149 +MIPS_INS_CLEI_U = 150 +MIPS_INS_CLE_S = 151 +MIPS_INS_CLE_U = 152 +MIPS_INS_CLO = 153 +MIPS_INS_CLTI_S = 154 +MIPS_INS_CLTI_U = 155 +MIPS_INS_CLT_S = 156 +MIPS_INS_CLT_U = 157 +MIPS_INS_CLZ = 158 +MIPS_INS_CMPGDU = 159 +MIPS_INS_CMPGU = 160 +MIPS_INS_CMPU = 161 +MIPS_INS_CMP = 162 +MIPS_INS_COPY_S = 163 +MIPS_INS_COPY_U = 164 +MIPS_INS_CTC1 = 165 +MIPS_INS_CTCMSA = 166 +MIPS_INS_CVT = 167 +MIPS_INS_C = 168 +MIPS_INS_CMPI = 169 +MIPS_INS_DADD = 170 +MIPS_INS_DADDI = 171 +MIPS_INS_DADDIU = 172 +MIPS_INS_DADDU = 173 +MIPS_INS_DAHI = 174 +MIPS_INS_DALIGN = 175 +MIPS_INS_DATI = 176 +MIPS_INS_DAUI = 177 +MIPS_INS_DBITSWAP = 178 +MIPS_INS_DCLO = 179 +MIPS_INS_DCLZ = 180 +MIPS_INS_DDIV = 181 +MIPS_INS_DDIVU = 182 +MIPS_INS_DERET = 183 +MIPS_INS_DEXT = 184 +MIPS_INS_DEXTM = 185 +MIPS_INS_DEXTU = 186 +MIPS_INS_DI = 187 +MIPS_INS_DINS = 188 +MIPS_INS_DINSM = 189 +MIPS_INS_DINSU = 190 +MIPS_INS_DIV = 191 +MIPS_INS_DIVU = 192 +MIPS_INS_DIV_S = 193 +MIPS_INS_DIV_U = 194 +MIPS_INS_DLSA = 195 +MIPS_INS_DMFC0 = 196 +MIPS_INS_DMFC1 = 197 +MIPS_INS_DMFC2 = 198 +MIPS_INS_DMOD = 199 +MIPS_INS_DMODU = 200 +MIPS_INS_DMTC0 = 201 +MIPS_INS_DMTC1 = 202 +MIPS_INS_DMTC2 = 203 +MIPS_INS_DMUH = 204 +MIPS_INS_DMUHU = 205 +MIPS_INS_DMUL = 206 +MIPS_INS_DMULT = 207 +MIPS_INS_DMULTU = 208 +MIPS_INS_DMULU = 209 +MIPS_INS_DOTP_S = 210 +MIPS_INS_DOTP_U = 211 +MIPS_INS_DPADD_S = 212 +MIPS_INS_DPADD_U = 213 +MIPS_INS_DPAQX_SA = 214 +MIPS_INS_DPAQX_S = 215 +MIPS_INS_DPAQ_SA = 216 +MIPS_INS_DPAQ_S = 217 +MIPS_INS_DPAU = 218 +MIPS_INS_DPAX = 219 +MIPS_INS_DPA = 220 +MIPS_INS_DPOP = 221 +MIPS_INS_DPSQX_SA = 222 +MIPS_INS_DPSQX_S = 223 +MIPS_INS_DPSQ_SA = 224 +MIPS_INS_DPSQ_S = 225 +MIPS_INS_DPSUB_S = 226 +MIPS_INS_DPSUB_U = 227 +MIPS_INS_DPSU = 228 +MIPS_INS_DPSX = 229 +MIPS_INS_DPS = 230 +MIPS_INS_DROTR = 231 +MIPS_INS_DROTR32 = 232 +MIPS_INS_DROTRV = 233 +MIPS_INS_DSBH = 234 +MIPS_INS_DSHD = 235 +MIPS_INS_DSLL = 236 +MIPS_INS_DSLL32 = 237 +MIPS_INS_DSLLV = 238 +MIPS_INS_DSRA = 239 +MIPS_INS_DSRA32 = 240 +MIPS_INS_DSRAV = 241 +MIPS_INS_DSRL = 242 +MIPS_INS_DSRL32 = 243 +MIPS_INS_DSRLV = 244 +MIPS_INS_DSUB = 245 +MIPS_INS_DSUBU = 246 +MIPS_INS_EHB = 247 +MIPS_INS_EI = 248 +MIPS_INS_ERET = 249 +MIPS_INS_EXT = 250 +MIPS_INS_EXTP = 251 +MIPS_INS_EXTPDP = 252 +MIPS_INS_EXTPDPV = 253 +MIPS_INS_EXTPV = 254 +MIPS_INS_EXTRV_RS = 255 +MIPS_INS_EXTRV_R = 256 +MIPS_INS_EXTRV_S = 257 +MIPS_INS_EXTRV = 258 +MIPS_INS_EXTR_RS = 259 +MIPS_INS_EXTR_R = 260 +MIPS_INS_EXTR_S = 261 +MIPS_INS_EXTR = 262 +MIPS_INS_EXTS = 263 +MIPS_INS_EXTS32 = 264 +MIPS_INS_ABS = 265 +MIPS_INS_FADD = 266 +MIPS_INS_FCAF = 267 +MIPS_INS_FCEQ = 268 +MIPS_INS_FCLASS = 269 +MIPS_INS_FCLE = 270 +MIPS_INS_FCLT = 271 +MIPS_INS_FCNE = 272 +MIPS_INS_FCOR = 273 +MIPS_INS_FCUEQ = 274 +MIPS_INS_FCULE = 275 +MIPS_INS_FCULT = 276 +MIPS_INS_FCUNE = 277 +MIPS_INS_FCUN = 278 +MIPS_INS_FDIV = 279 +MIPS_INS_FEXDO = 280 +MIPS_INS_FEXP2 = 281 +MIPS_INS_FEXUPL = 282 +MIPS_INS_FEXUPR = 283 +MIPS_INS_FFINT_S = 284 +MIPS_INS_FFINT_U = 285 +MIPS_INS_FFQL = 286 +MIPS_INS_FFQR = 287 +MIPS_INS_FILL = 288 +MIPS_INS_FLOG2 = 289 +MIPS_INS_FLOOR = 290 +MIPS_INS_FMADD = 291 +MIPS_INS_FMAX_A = 292 +MIPS_INS_FMAX = 293 +MIPS_INS_FMIN_A = 294 +MIPS_INS_FMIN = 295 +MIPS_INS_MOV = 296 +MIPS_INS_FMSUB = 297 +MIPS_INS_FMUL = 298 +MIPS_INS_MUL = 299 +MIPS_INS_NEG = 300 +MIPS_INS_FRCP = 301 +MIPS_INS_FRINT = 302 +MIPS_INS_FRSQRT = 303 +MIPS_INS_FSAF = 304 +MIPS_INS_FSEQ = 305 +MIPS_INS_FSLE = 306 +MIPS_INS_FSLT = 307 +MIPS_INS_FSNE = 308 +MIPS_INS_FSOR = 309 +MIPS_INS_FSQRT = 310 +MIPS_INS_SQRT = 311 +MIPS_INS_FSUB = 312 +MIPS_INS_SUB = 313 +MIPS_INS_FSUEQ = 314 +MIPS_INS_FSULE = 315 +MIPS_INS_FSULT = 316 +MIPS_INS_FSUNE = 317 +MIPS_INS_FSUN = 318 +MIPS_INS_FTINT_S = 319 +MIPS_INS_FTINT_U = 320 +MIPS_INS_FTQ = 321 +MIPS_INS_FTRUNC_S = 322 +MIPS_INS_FTRUNC_U = 323 +MIPS_INS_HADD_S = 324 +MIPS_INS_HADD_U = 325 +MIPS_INS_HSUB_S = 326 +MIPS_INS_HSUB_U = 327 +MIPS_INS_ILVEV = 328 +MIPS_INS_ILVL = 329 +MIPS_INS_ILVOD = 330 +MIPS_INS_ILVR = 331 +MIPS_INS_INS = 332 +MIPS_INS_INSERT = 333 +MIPS_INS_INSV = 334 +MIPS_INS_INSVE = 335 +MIPS_INS_J = 336 +MIPS_INS_JAL = 337 +MIPS_INS_JALR = 338 +MIPS_INS_JALRS16 = 339 +MIPS_INS_JALRS = 340 +MIPS_INS_JALS = 341 +MIPS_INS_JALX = 342 +MIPS_INS_JIALC = 343 +MIPS_INS_JIC = 344 +MIPS_INS_JR = 345 +MIPS_INS_JR16 = 346 +MIPS_INS_JRADDIUSP = 347 +MIPS_INS_JRC = 348 +MIPS_INS_JALRC = 349 +MIPS_INS_LB = 350 +MIPS_INS_LBU16 = 351 +MIPS_INS_LBUX = 352 +MIPS_INS_LBU = 353 +MIPS_INS_LD = 354 +MIPS_INS_LDC1 = 355 +MIPS_INS_LDC2 = 356 +MIPS_INS_LDC3 = 357 +MIPS_INS_LDI = 358 +MIPS_INS_LDL = 359 +MIPS_INS_LDPC = 360 +MIPS_INS_LDR = 361 +MIPS_INS_LDXC1 = 362 +MIPS_INS_LH = 363 +MIPS_INS_LHU16 = 364 +MIPS_INS_LHX = 365 +MIPS_INS_LHU = 366 +MIPS_INS_LI16 = 367 +MIPS_INS_LL = 368 +MIPS_INS_LLD = 369 +MIPS_INS_LSA = 370 +MIPS_INS_LUXC1 = 371 +MIPS_INS_LUI = 372 +MIPS_INS_LW = 373 +MIPS_INS_LW16 = 374 +MIPS_INS_LWC1 = 375 +MIPS_INS_LWC2 = 376 +MIPS_INS_LWC3 = 377 +MIPS_INS_LWL = 378 +MIPS_INS_LWM16 = 379 +MIPS_INS_LWM32 = 380 +MIPS_INS_LWPC = 381 +MIPS_INS_LWP = 382 +MIPS_INS_LWR = 383 +MIPS_INS_LWUPC = 384 +MIPS_INS_LWU = 385 +MIPS_INS_LWX = 386 +MIPS_INS_LWXC1 = 387 +MIPS_INS_LWXS = 388 +MIPS_INS_LI = 389 +MIPS_INS_MADD = 390 +MIPS_INS_MADDF = 391 +MIPS_INS_MADDR_Q = 392 +MIPS_INS_MADDU = 393 +MIPS_INS_MADDV = 394 +MIPS_INS_MADD_Q = 395 +MIPS_INS_MAQ_SA = 396 +MIPS_INS_MAQ_S = 397 +MIPS_INS_MAXA = 398 +MIPS_INS_MAXI_S = 399 +MIPS_INS_MAXI_U = 400 +MIPS_INS_MAX_A = 401 +MIPS_INS_MAX = 402 +MIPS_INS_MAX_S = 403 +MIPS_INS_MAX_U = 404 +MIPS_INS_MFC0 = 405 +MIPS_INS_MFC1 = 406 +MIPS_INS_MFC2 = 407 +MIPS_INS_MFHC1 = 408 +MIPS_INS_MFHI = 409 +MIPS_INS_MFLO = 410 +MIPS_INS_MINA = 411 +MIPS_INS_MINI_S = 412 +MIPS_INS_MINI_U = 413 +MIPS_INS_MIN_A = 414 +MIPS_INS_MIN = 415 +MIPS_INS_MIN_S = 416 +MIPS_INS_MIN_U = 417 +MIPS_INS_MOD = 418 +MIPS_INS_MODSUB = 419 +MIPS_INS_MODU = 420 +MIPS_INS_MOD_S = 421 +MIPS_INS_MOD_U = 422 +MIPS_INS_MOVE = 423 +MIPS_INS_MOVEP = 424 +MIPS_INS_MOVF = 425 +MIPS_INS_MOVN = 426 +MIPS_INS_MOVT = 427 +MIPS_INS_MOVZ = 428 +MIPS_INS_MSUB = 429 +MIPS_INS_MSUBF = 430 +MIPS_INS_MSUBR_Q = 431 +MIPS_INS_MSUBU = 432 +MIPS_INS_MSUBV = 433 +MIPS_INS_MSUB_Q = 434 +MIPS_INS_MTC0 = 435 +MIPS_INS_MTC1 = 436 +MIPS_INS_MTC2 = 437 +MIPS_INS_MTHC1 = 438 +MIPS_INS_MTHI = 439 +MIPS_INS_MTHLIP = 440 +MIPS_INS_MTLO = 441 +MIPS_INS_MTM0 = 442 +MIPS_INS_MTM1 = 443 +MIPS_INS_MTM2 = 444 +MIPS_INS_MTP0 = 445 +MIPS_INS_MTP1 = 446 +MIPS_INS_MTP2 = 447 +MIPS_INS_MUH = 448 +MIPS_INS_MUHU = 449 +MIPS_INS_MULEQ_S = 450 +MIPS_INS_MULEU_S = 451 +MIPS_INS_MULQ_RS = 452 +MIPS_INS_MULQ_S = 453 +MIPS_INS_MULR_Q = 454 +MIPS_INS_MULSAQ_S = 455 +MIPS_INS_MULSA = 456 +MIPS_INS_MULT = 457 +MIPS_INS_MULTU = 458 +MIPS_INS_MULU = 459 +MIPS_INS_MULV = 460 +MIPS_INS_MUL_Q = 461 +MIPS_INS_MUL_S = 462 +MIPS_INS_NLOC = 463 +MIPS_INS_NLZC = 464 +MIPS_INS_NMADD = 465 +MIPS_INS_NMSUB = 466 +MIPS_INS_NOR = 467 +MIPS_INS_NORI = 468 +MIPS_INS_NOT16 = 469 +MIPS_INS_NOT = 470 +MIPS_INS_OR = 471 +MIPS_INS_OR16 = 472 +MIPS_INS_ORI = 473 +MIPS_INS_PACKRL = 474 +MIPS_INS_PAUSE = 475 +MIPS_INS_PCKEV = 476 +MIPS_INS_PCKOD = 477 +MIPS_INS_PCNT = 478 +MIPS_INS_PICK = 479 +MIPS_INS_POP = 480 +MIPS_INS_PRECEQU = 481 +MIPS_INS_PRECEQ = 482 +MIPS_INS_PRECEU = 483 +MIPS_INS_PRECRQU_S = 484 +MIPS_INS_PRECRQ = 485 +MIPS_INS_PRECRQ_RS = 486 +MIPS_INS_PRECR = 487 +MIPS_INS_PRECR_SRA = 488 +MIPS_INS_PRECR_SRA_R = 489 +MIPS_INS_PREF = 490 +MIPS_INS_PREPEND = 491 +MIPS_INS_RADDU = 492 +MIPS_INS_RDDSP = 493 +MIPS_INS_RDHWR = 494 +MIPS_INS_REPLV = 495 +MIPS_INS_REPL = 496 +MIPS_INS_RINT = 497 +MIPS_INS_ROTR = 498 +MIPS_INS_ROTRV = 499 +MIPS_INS_ROUND = 500 +MIPS_INS_SAT_S = 501 +MIPS_INS_SAT_U = 502 +MIPS_INS_SB = 503 +MIPS_INS_SB16 = 504 +MIPS_INS_SC = 505 +MIPS_INS_SCD = 506 +MIPS_INS_SD = 507 +MIPS_INS_SDBBP = 508 +MIPS_INS_SDBBP16 = 509 +MIPS_INS_SDC1 = 510 +MIPS_INS_SDC2 = 511 +MIPS_INS_SDC3 = 512 +MIPS_INS_SDL = 513 +MIPS_INS_SDR = 514 +MIPS_INS_SDXC1 = 515 +MIPS_INS_SEB = 516 +MIPS_INS_SEH = 517 +MIPS_INS_SELEQZ = 518 +MIPS_INS_SELNEZ = 519 +MIPS_INS_SEL = 520 +MIPS_INS_SEQ = 521 +MIPS_INS_SEQI = 522 +MIPS_INS_SH = 523 +MIPS_INS_SH16 = 524 +MIPS_INS_SHF = 525 +MIPS_INS_SHILO = 526 +MIPS_INS_SHILOV = 527 +MIPS_INS_SHLLV = 528 +MIPS_INS_SHLLV_S = 529 +MIPS_INS_SHLL = 530 +MIPS_INS_SHLL_S = 531 +MIPS_INS_SHRAV = 532 +MIPS_INS_SHRAV_R = 533 +MIPS_INS_SHRA = 534 +MIPS_INS_SHRA_R = 535 +MIPS_INS_SHRLV = 536 +MIPS_INS_SHRL = 537 +MIPS_INS_SLDI = 538 +MIPS_INS_SLD = 539 +MIPS_INS_SLL = 540 +MIPS_INS_SLL16 = 541 +MIPS_INS_SLLI = 542 +MIPS_INS_SLLV = 543 +MIPS_INS_SLT = 544 +MIPS_INS_SLTI = 545 +MIPS_INS_SLTIU = 546 +MIPS_INS_SLTU = 547 +MIPS_INS_SNE = 548 +MIPS_INS_SNEI = 549 +MIPS_INS_SPLATI = 550 +MIPS_INS_SPLAT = 551 +MIPS_INS_SRA = 552 +MIPS_INS_SRAI = 553 +MIPS_INS_SRARI = 554 +MIPS_INS_SRAR = 555 +MIPS_INS_SRAV = 556 +MIPS_INS_SRL = 557 +MIPS_INS_SRL16 = 558 +MIPS_INS_SRLI = 559 +MIPS_INS_SRLRI = 560 +MIPS_INS_SRLR = 561 +MIPS_INS_SRLV = 562 +MIPS_INS_SSNOP = 563 +MIPS_INS_ST = 564 +MIPS_INS_SUBQH = 565 +MIPS_INS_SUBQH_R = 566 +MIPS_INS_SUBQ = 567 +MIPS_INS_SUBQ_S = 568 +MIPS_INS_SUBSUS_U = 569 +MIPS_INS_SUBSUU_S = 570 +MIPS_INS_SUBS_S = 571 +MIPS_INS_SUBS_U = 572 +MIPS_INS_SUBU16 = 573 +MIPS_INS_SUBUH = 574 +MIPS_INS_SUBUH_R = 575 +MIPS_INS_SUBU = 576 +MIPS_INS_SUBU_S = 577 +MIPS_INS_SUBVI = 578 +MIPS_INS_SUBV = 579 +MIPS_INS_SUXC1 = 580 +MIPS_INS_SW = 581 +MIPS_INS_SW16 = 582 +MIPS_INS_SWC1 = 583 +MIPS_INS_SWC2 = 584 +MIPS_INS_SWC3 = 585 +MIPS_INS_SWL = 586 +MIPS_INS_SWM16 = 587 +MIPS_INS_SWM32 = 588 +MIPS_INS_SWP = 589 +MIPS_INS_SWR = 590 +MIPS_INS_SWXC1 = 591 +MIPS_INS_SYNC = 592 +MIPS_INS_SYNCI = 593 +MIPS_INS_SYSCALL = 594 +MIPS_INS_TEQ = 595 +MIPS_INS_TEQI = 596 +MIPS_INS_TGE = 597 +MIPS_INS_TGEI = 598 +MIPS_INS_TGEIU = 599 +MIPS_INS_TGEU = 600 +MIPS_INS_TLBP = 601 +MIPS_INS_TLBR = 602 +MIPS_INS_TLBWI = 603 +MIPS_INS_TLBWR = 604 +MIPS_INS_TLT = 605 +MIPS_INS_TLTI = 606 +MIPS_INS_TLTIU = 607 +MIPS_INS_TLTU = 608 +MIPS_INS_TNE = 609 +MIPS_INS_TNEI = 610 +MIPS_INS_TRUNC = 611 +MIPS_INS_V3MULU = 612 +MIPS_INS_VMM0 = 613 +MIPS_INS_VMULU = 614 +MIPS_INS_VSHF = 615 +MIPS_INS_WAIT = 616 +MIPS_INS_WRDSP = 617 +MIPS_INS_WSBH = 618 +MIPS_INS_XOR = 619 +MIPS_INS_XOR16 = 620 +MIPS_INS_XORI = 621 # some alias instructions -MIPS_INS_NOP = 582 -MIPS_INS_NEGU = 583 +MIPS_INS_NOP = 622 +MIPS_INS_NEGU = 623 # special instructions -MIPS_INS_JALR_HB = 584 -MIPS_INS_JR_HB = 585 -MIPS_INS_ENDING = 586 +MIPS_INS_JALR_HB = 624 +MIPS_INS_JR_HB = 625 +MIPS_INS_ENDING = 626 # Group of MIPS instructions