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//===-- PPCPredicates.h - PPC Branch Predicate Information ------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file describes the PowerPC branch predicates.
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//
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//===----------------------------------------------------------------------===//
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/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 */
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#ifndef CS_POWERPC_PPCPREDICATES_H
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#define CS_POWERPC_PPCPREDICATES_H
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#include "../../include/ppc.h"
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// NOTE: duplicate of ppc_bc in ppc.h to maitain code compatibility with LLVM
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typedef enum ppc_predicate {
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PPC_PRED_LT = (0 << 5) | 12,
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PPC_PRED_LE = (1 << 5) | 4,
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PPC_PRED_EQ = (2 << 5) | 12,
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PPC_PRED_GE = (0 << 5) | 4,
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PPC_PRED_GT = (1 << 5) | 12,
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PPC_PRED_NE = (2 << 5) | 4,
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PPC_PRED_UN = (3 << 5) | 12,
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PPC_PRED_NU = (3 << 5) | 4,
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PPC_PRED_LT_MINUS = (0 << 5) | 14,
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PPC_PRED_LE_MINUS = (1 << 5) | 6,
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PPC_PRED_EQ_MINUS = (2 << 5) | 14,
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PPC_PRED_GE_MINUS = (0 << 5) | 6,
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PPC_PRED_GT_MINUS = (1 << 5) | 14,
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PPC_PRED_NE_MINUS = (2 << 5) | 6,
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PPC_PRED_UN_MINUS = (3 << 5) | 14,
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PPC_PRED_NU_MINUS = (3 << 5) | 6,
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PPC_PRED_LT_PLUS = (0 << 5) | 15,
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PPC_PRED_LE_PLUS = (1 << 5) | 7,
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PPC_PRED_EQ_PLUS = (2 << 5) | 15,
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PPC_PRED_GE_PLUS = (0 << 5) | 7,
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PPC_PRED_GT_PLUS = (1 << 5) | 15,
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PPC_PRED_NE_PLUS = (2 << 5) | 7,
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PPC_PRED_UN_PLUS = (3 << 5) | 15,
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PPC_PRED_NU_PLUS = (3 << 5) | 7,
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// When dealing with individual condition-register bits, we have simple set
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// and unset predicates.
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PPC_PRED_BIT_SET = 1024,
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PPC_PRED_BIT_UNSET = 1025
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} ppc_predicate;
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/// Invert the specified predicate. != -> ==, < -> >=.
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ppc_predicate InvertPredicate(ppc_predicate Opcode);
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/// Assume the condition register is set by MI(a,b), return the predicate if
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/// we modify the instructions such that condition register is set by MI(b,a).
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ppc_predicate getSwappedPredicate(ppc_predicate Opcode);
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#endif
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