Abseil Common Libraries (C++) (grcp 依赖)
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181 lines
6.8 KiB
181 lines
6.8 KiB
// |
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// Copyright 2017 The Abseil Authors. |
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// |
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// Licensed under the Apache License, Version 2.0 (the "License"); |
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// you may not use this file except in compliance with the License. |
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// You may obtain a copy of the License at |
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// |
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// https://www.apache.org/licenses/LICENSE-2.0 |
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// |
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// Unless required by applicable law or agreed to in writing, software |
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// distributed under the License is distributed on an "AS IS" BASIS, |
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
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// See the License for the specific language governing permissions and |
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// limitations under the License. |
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// |
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// ----------------------------------------------------------------------------- |
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// File: optimization.h |
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// ----------------------------------------------------------------------------- |
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// |
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// This header file defines portable macros for performance optimization. |
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#ifndef ABSL_BASE_OPTIMIZATION_H_ |
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#define ABSL_BASE_OPTIMIZATION_H_ |
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#include "absl/base/config.h" |
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// ABSL_BLOCK_TAIL_CALL_OPTIMIZATION |
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// |
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// Instructs the compiler to avoid optimizing tail-call recursion. Use of this |
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// macro is useful when you wish to preserve the existing function order within |
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// a stack trace for logging, debugging, or profiling purposes. |
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// |
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// Example: |
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// |
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// int f() { |
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// int result = g(); |
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// ABSL_BLOCK_TAIL_CALL_OPTIMIZATION(); |
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// return result; |
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// } |
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#if defined(__pnacl__) |
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#define ABSL_BLOCK_TAIL_CALL_OPTIMIZATION() if (volatile int x = 0) { (void)x; } |
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#elif defined(__clang__) |
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// Clang will not tail call given inline volatile assembly. |
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#define ABSL_BLOCK_TAIL_CALL_OPTIMIZATION() __asm__ __volatile__("") |
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#elif defined(__GNUC__) |
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// GCC will not tail call given inline volatile assembly. |
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#define ABSL_BLOCK_TAIL_CALL_OPTIMIZATION() __asm__ __volatile__("") |
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#elif defined(_MSC_VER) |
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#include <intrin.h> |
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// The __nop() intrinsic blocks the optimisation. |
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#define ABSL_BLOCK_TAIL_CALL_OPTIMIZATION() __nop() |
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#else |
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#define ABSL_BLOCK_TAIL_CALL_OPTIMIZATION() if (volatile int x = 0) { (void)x; } |
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#endif |
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// ABSL_CACHELINE_SIZE |
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// |
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// Explicitly defines the size of the L1 cache for purposes of alignment. |
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// Setting the cacheline size allows you to specify that certain objects be |
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// aligned on a cacheline boundary with `ABSL_CACHELINE_ALIGNED` declarations. |
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// (See below.) |
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// |
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// NOTE: this macro should be replaced with the following C++17 features, when |
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// those are generally available: |
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// |
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// * `std::hardware_constructive_interference_size` |
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// * `std::hardware_destructive_interference_size` |
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// |
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// See http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2016/p0154r1.html |
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// for more information. |
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#if defined(__GNUC__) |
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// Cache line alignment |
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#if defined(__i386__) || defined(__x86_64__) |
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#define ABSL_CACHELINE_SIZE 64 |
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#elif defined(__powerpc64__) |
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#define ABSL_CACHELINE_SIZE 128 |
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#elif defined(__aarch64__) |
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// We would need to read special register ctr_el0 to find out L1 dcache size. |
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// This value is a good estimate based on a real aarch64 machine. |
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#define ABSL_CACHELINE_SIZE 64 |
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#elif defined(__arm__) |
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// Cache line sizes for ARM: These values are not strictly correct since |
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// cache line sizes depend on implementations, not architectures. There |
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// are even implementations with cache line sizes configurable at boot |
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// time. |
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#if defined(__ARM_ARCH_5T__) |
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#define ABSL_CACHELINE_SIZE 32 |
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#elif defined(__ARM_ARCH_7A__) |
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#define ABSL_CACHELINE_SIZE 64 |
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#endif |
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#endif |
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#ifndef ABSL_CACHELINE_SIZE |
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// A reasonable default guess. Note that overestimates tend to waste more |
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// space, while underestimates tend to waste more time. |
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#define ABSL_CACHELINE_SIZE 64 |
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#endif |
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// ABSL_CACHELINE_ALIGNED |
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// |
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// Indicates that the declared object be cache aligned using |
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// `ABSL_CACHELINE_SIZE` (see above). Cacheline aligning objects allows you to |
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// load a set of related objects in the L1 cache for performance improvements. |
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// Cacheline aligning objects properly allows constructive memory sharing and |
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// prevents destructive (or "false") memory sharing. |
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// |
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// NOTE: this macro should be replaced with usage of `alignas()` using |
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// `std::hardware_constructive_interference_size` and/or |
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// `std::hardware_destructive_interference_size` when available within C++17. |
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// |
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// See http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2016/p0154r1.html |
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// for more information. |
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// |
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// On some compilers, `ABSL_CACHELINE_ALIGNED` expands to an `__attribute__` |
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// or `__declspec` attribute. For compilers where this is not known to work, |
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// the macro expands to nothing. |
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// |
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// No further guarantees are made here. The result of applying the macro |
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// to variables and types is always implementation-defined. |
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// |
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// WARNING: It is easy to use this attribute incorrectly, even to the point |
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// of causing bugs that are difficult to diagnose, crash, etc. It does not |
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// of itself guarantee that objects are aligned to a cache line. |
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// |
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// NOTE: Some compilers are picky about the locations of annotations such as |
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// this attribute, so prefer to put it at the beginning of your declaration. |
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// For example, |
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// |
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// ABSL_CACHELINE_ALIGNED static Foo* foo = ... |
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// |
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// class ABSL_CACHELINE_ALIGNED Bar { ... |
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// |
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// Recommendations: |
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// |
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// 1) Consult compiler documentation; this comment is not kept in sync as |
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// toolchains evolve. |
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// 2) Verify your use has the intended effect. This often requires inspecting |
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// the generated machine code. |
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// 3) Prefer applying this attribute to individual variables. Avoid |
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// applying it to types. This tends to localize the effect. |
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#define ABSL_CACHELINE_ALIGNED __attribute__((aligned(ABSL_CACHELINE_SIZE))) |
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#elif defined(_MSC_VER) |
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#define ABSL_CACHELINE_SIZE 64 |
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#define ABSL_CACHELINE_ALIGNED __declspec(align(ABSL_CACHELINE_SIZE)) |
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#else |
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#define ABSL_CACHELINE_SIZE 64 |
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#define ABSL_CACHELINE_ALIGNED |
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#endif |
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// ABSL_PREDICT_TRUE, ABSL_PREDICT_FALSE |
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// |
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// Enables the compiler to prioritize compilation using static analysis for |
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// likely paths within a boolean branch. |
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// |
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// Example: |
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// |
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// if (ABSL_PREDICT_TRUE(expression)) { |
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// return result; // Faster if more likely |
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// } else { |
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// return 0; |
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// } |
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// |
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// Compilers can use the information that a certain branch is not likely to be |
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// taken (for instance, a CHECK failure) to optimize for the common case in |
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// the absence of better information (ie. compiling gcc with `-fprofile-arcs`). |
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// |
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// Recommendation: Modern CPUs dynamically predict branch execution paths, |
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// typically with accuracy greater than 97%. As a result, annotating every |
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// branch in a codebase is likely counterproductive; however, annotating |
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// specific branches that are both hot and consistently mispredicted is likely |
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// to yield performance improvements. |
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#if ABSL_HAVE_BUILTIN(__builtin_expect) || \ |
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(defined(__GNUC__) && !defined(__clang__)) |
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#define ABSL_PREDICT_FALSE(x) (__builtin_expect(x, 0)) |
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#define ABSL_PREDICT_TRUE(x) (__builtin_expect(false || (x), true)) |
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#else |
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#define ABSL_PREDICT_FALSE(x) (x) |
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#define ABSL_PREDICT_TRUE(x) (x) |
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#endif |
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#endif // ABSL_BASE_OPTIMIZATION_H_
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