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// Copyright 2017 The Abseil Authors.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// https://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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// HERMETIC NOTE: The randen_hwaes target must not introduce duplicate
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// symbols from arbitrary system and other headers, since it may be built
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// with different flags from other targets, using different levels of
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// optimization, potentially introducing ODR violations.
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#include "absl/random/internal/randen_hwaes.h"
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#include <cstdint>
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#include <cstring>
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#include "absl/base/attributes.h"
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#include "absl/random/internal/platform.h"
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// ABSL_RANDEN_HWAES_IMPL indicates whether this file will contain
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// a hardware accelerated implementation of randen, or whether it
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// will contain stubs that exit the process.
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#if defined(ABSL_ARCH_X86_64) || defined(ABSL_ARCH_X86_32)
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// The platform.h directives are sufficient to indicate whether
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// we should build accelerated implementations for x86.
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#if (ABSL_HAVE_ACCELERATED_AES || ABSL_RANDOM_INTERNAL_AES_DISPATCH)
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#define ABSL_RANDEN_HWAES_IMPL 1
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#endif
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#elif defined(ABSL_ARCH_PPC)
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// The platform.h directives are sufficient to indicate whether
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// we should build accelerated implementations for PPC.
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//
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// NOTE: This has mostly been tested on 64-bit Power variants,
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// and not embedded cpus such as powerpc32-8540
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#if ABSL_HAVE_ACCELERATED_AES
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#define ABSL_RANDEN_HWAES_IMPL 1
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#endif
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#elif defined(ABSL_ARCH_ARM) || defined(ABSL_ARCH_AARCH64)
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// ARM is somewhat more complicated. We might support crypto natively...
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#if ABSL_HAVE_ACCELERATED_AES || \
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(defined(__ARM_NEON) && defined(__ARM_FEATURE_CRYPTO))
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#define ABSL_RANDEN_HWAES_IMPL 1
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#elif ABSL_RANDOM_INTERNAL_AES_DISPATCH && !defined(__APPLE__) && \
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(defined(__GNUC__) && __GNUC__ > 4 || __GNUC__ == 4 && __GNUC_MINOR__ > 9)
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// ...or, on GCC, we can use an ASM directive to
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// instruct the assember to allow crypto instructions.
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#define ABSL_RANDEN_HWAES_IMPL 1
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#define ABSL_RANDEN_HWAES_IMPL_CRYPTO_DIRECTIVE 1
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#endif
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#else
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// HWAES is unsupported by these architectures / platforms:
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// __myriad2__
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// __mips__
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//
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// Other architectures / platforms are unknown.
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//
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// See the Abseil documentation on supported macros at:
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// https://abseil.io/docs/cpp/platforms/macros
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#endif
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#if !defined(ABSL_RANDEN_HWAES_IMPL)
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// No accelerated implementation is supported.
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// The RandenHwAes functions are stubs that print an error and exit.
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#include <cstdio>
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#include <cstdlib>
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namespace absl {
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ABSL_NAMESPACE_BEGIN
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namespace random_internal {
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// No accelerated implementation.
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bool HasRandenHwAesImplementation() { return false; }
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// NOLINTNEXTLINE
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const void* RandenHwAes::GetKeys() {
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// Attempted to dispatch to an unsupported dispatch target.
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const int d = ABSL_RANDOM_INTERNAL_AES_DISPATCH;
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fprintf(stderr, "AES Hardware detection failed (%d).\n", d);
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exit(1);
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return nullptr;
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}
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// NOLINTNEXTLINE
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void RandenHwAes::Absorb(const void*, void*) {
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// Attempted to dispatch to an unsupported dispatch target.
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const int d = ABSL_RANDOM_INTERNAL_AES_DISPATCH;
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fprintf(stderr, "AES Hardware detection failed (%d).\n", d);
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exit(1);
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}
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// NOLINTNEXTLINE
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void RandenHwAes::Generate(const void*, void*) {
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// Attempted to dispatch to an unsupported dispatch target.
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const int d = ABSL_RANDOM_INTERNAL_AES_DISPATCH;
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fprintf(stderr, "AES Hardware detection failed (%d).\n", d);
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exit(1);
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}
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} // namespace random_internal
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ABSL_NAMESPACE_END
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} // namespace absl
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#else // defined(ABSL_RANDEN_HWAES_IMPL)
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//
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// Accelerated implementations are supported.
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// We need the per-architecture includes and defines.
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//
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#include "absl/random/internal/randen_traits.h"
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// TARGET_CRYPTO defines a crypto attribute for each architecture.
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//
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// NOTE: Evaluate whether we should eliminate ABSL_TARGET_CRYPTO.
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#if (defined(__clang__) || defined(__GNUC__))
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#if defined(ABSL_ARCH_X86_64) || defined(ABSL_ARCH_X86_32)
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#define ABSL_TARGET_CRYPTO __attribute__((target("aes")))
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#elif defined(ABSL_ARCH_PPC)
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#define ABSL_TARGET_CRYPTO __attribute__((target("crypto")))
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#else
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#define ABSL_TARGET_CRYPTO
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#endif
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#else
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#define ABSL_TARGET_CRYPTO
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#endif
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#if defined(ABSL_ARCH_PPC)
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// NOTE: Keep in mind that PPC can operate in little-endian or big-endian mode,
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// however the PPC altivec vector registers (and thus the AES instructions)
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// always operate in big-endian mode.
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#include <altivec.h>
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// <altivec.h> #defines vector __vector; in C++, this is bad form.
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#undef vector
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// Rely on the PowerPC AltiVec vector operations for accelerated AES
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// instructions. GCC support of the PPC vector types is described in:
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// https://gcc.gnu.org/onlinedocs/gcc-4.9.0/gcc/PowerPC-AltiVec_002fVSX-Built-in-Functions.html
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//
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// Already provides operator^=.
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using Vector128 = __vector unsigned long long; // NOLINT(runtime/int)
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namespace {
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inline ABSL_TARGET_CRYPTO Vector128 ReverseBytes(const Vector128& v) {
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// Reverses the bytes of the vector.
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const __vector unsigned char perm = {15, 14, 13, 12, 11, 10, 9, 8,
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7, 6, 5, 4, 3, 2, 1, 0};
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return vec_perm(v, v, perm);
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}
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// WARNING: these load/store in native byte order. It is OK to load and then
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// store an unchanged vector, but interpreting the bits as a number or input
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// to AES will have undefined results.
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inline ABSL_TARGET_CRYPTO Vector128 Vector128Load(const void* from) {
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return vec_vsx_ld(0, reinterpret_cast<const Vector128*>(from));
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}
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inline ABSL_TARGET_CRYPTO void Vector128Store(const Vector128& v, void* to) {
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vec_vsx_st(v, 0, reinterpret_cast<Vector128*>(to));
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}
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// One round of AES. "round_key" is a public constant for breaking the
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// symmetry of AES (ensures previously equal columns differ afterwards).
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inline ABSL_TARGET_CRYPTO Vector128 AesRound(const Vector128& state,
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const Vector128& round_key) {
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return Vector128(__builtin_crypto_vcipher(state, round_key));
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}
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// Enables native loads in the round loop by pre-swapping.
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inline ABSL_TARGET_CRYPTO void SwapEndian(uint64_t* state) {
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using absl::random_internal::RandenTraits;
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constexpr size_t kLanes = 2;
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constexpr size_t kFeistelBlocks = RandenTraits::kFeistelBlocks;
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for (uint32_t branch = 0; branch < kFeistelBlocks; ++branch) {
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const Vector128 v = ReverseBytes(Vector128Load(state + kLanes * branch));
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Vector128Store(v, state + kLanes * branch);
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}
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}
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} // namespace
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#elif defined(ABSL_ARCH_ARM) || defined(ABSL_ARCH_AARCH64)
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// This asm directive will cause the file to be compiled with crypto extensions
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// whether or not the cpu-architecture supports it.
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#if ABSL_RANDEN_HWAES_IMPL_CRYPTO_DIRECTIVE
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asm(".arch_extension crypto\n");
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// Override missing defines.
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#if !defined(__ARM_NEON)
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#define __ARM_NEON 1
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#endif
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#if !defined(__ARM_FEATURE_CRYPTO)
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#define __ARM_FEATURE_CRYPTO 1
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#endif
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#endif
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// Rely on the ARM NEON+Crypto advanced simd types, defined in <arm_neon.h>.
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// uint8x16_t is the user alias for underlying __simd128_uint8_t type.
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// http://infocenter.arm.com/help/topic/com.arm.doc.ihi0073a/IHI0073A_arm_neon_intrinsics_ref.pdf
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//
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// <arm_neon> defines the following
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//
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// typedef __attribute__((neon_vector_type(16))) uint8_t uint8x16_t;
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// typedef __attribute__((neon_vector_type(16))) int8_t int8x16_t;
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// typedef __attribute__((neon_polyvector_type(16))) int8_t poly8x16_t;
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//
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// vld1q_v
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// vst1q_v
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// vaeseq_v
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// vaesmcq_v
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#include <arm_neon.h>
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// Already provides operator^=.
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using Vector128 = uint8x16_t;
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namespace {
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inline ABSL_TARGET_CRYPTO Vector128 Vector128Load(const void* from) {
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return vld1q_u8(reinterpret_cast<const uint8_t*>(from));
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}
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inline ABSL_TARGET_CRYPTO void Vector128Store(const Vector128& v, void* to) {
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vst1q_u8(reinterpret_cast<uint8_t*>(to), v);
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}
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// One round of AES. "round_key" is a public constant for breaking the
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// symmetry of AES (ensures previously equal columns differ afterwards).
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inline ABSL_TARGET_CRYPTO Vector128 AesRound(const Vector128& state,
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const Vector128& round_key) {
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// It is important to always use the full round function - omitting the
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// final MixColumns reduces security [https://eprint.iacr.org/2010/041.pdf]
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// and does not help because we never decrypt.
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//
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// Note that ARM divides AES instructions differently than x86 / PPC,
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// And we need to skip the first AddRoundKey step and add an extra
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// AddRoundKey step to the end. Lucky for us this is just XOR.
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return vaesmcq_u8(vaeseq_u8(state, uint8x16_t{})) ^ round_key;
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}
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inline ABSL_TARGET_CRYPTO void SwapEndian(uint64_t*) {}
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} // namespace
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#elif defined(ABSL_ARCH_X86_64) || defined(ABSL_ARCH_X86_32)
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// On x86 we rely on the aesni instructions
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#include <wmmintrin.h>
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namespace {
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// Vector128 class is only wrapper for __m128i, benchmark indicates that it's
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// faster than using __m128i directly.
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class Vector128 {
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public:
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// Convert from/to intrinsics.
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inline explicit Vector128(const __m128i& Vector128) : data_(Vector128) {}
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inline __m128i data() const { return data_; }
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inline Vector128& operator^=(const Vector128& other) {
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data_ = _mm_xor_si128(data_, other.data());
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return *this;
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}
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private:
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__m128i data_;
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};
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inline ABSL_TARGET_CRYPTO Vector128 Vector128Load(const void* from) {
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return Vector128(_mm_load_si128(reinterpret_cast<const __m128i*>(from)));
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}
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inline ABSL_TARGET_CRYPTO void Vector128Store(const Vector128& v, void* to) {
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_mm_store_si128(reinterpret_cast<__m128i*>(to), v.data());
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}
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// One round of AES. "round_key" is a public constant for breaking the
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// symmetry of AES (ensures previously equal columns differ afterwards).
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inline ABSL_TARGET_CRYPTO Vector128 AesRound(const Vector128& state,
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const Vector128& round_key) {
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// It is important to always use the full round function - omitting the
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// final MixColumns reduces security [https://eprint.iacr.org/2010/041.pdf]
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// and does not help because we never decrypt.
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return Vector128(_mm_aesenc_si128(state.data(), round_key.data()));
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}
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inline ABSL_TARGET_CRYPTO void SwapEndian(uint64_t*) {}
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} // namespace
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#endif
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namespace {
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// u64x2 is a 128-bit, (2 x uint64_t lanes) struct used to store
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// the randen_keys.
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struct alignas(16) u64x2 {
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constexpr u64x2(uint64_t hi, uint64_t lo)
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#if defined(ABSL_ARCH_PPC)
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// This has been tested with PPC running in little-endian mode;
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// We byte-swap the u64x2 structure from little-endian to big-endian
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// because altivec always runs in big-endian mode.
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: v{__builtin_bswap64(hi), __builtin_bswap64(lo)} {
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#else
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: v{lo, hi} {
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#endif
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}
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constexpr bool operator==(const u64x2& other) const {
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return v[0] == other.v[0] && v[1] == other.v[1];
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}
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constexpr bool operator!=(const u64x2& other) const {
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return !(*this == other);
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}
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uint64_t v[2];
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}; // namespace
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#ifdef __clang__
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#pragma clang diagnostic push
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#pragma clang diagnostic ignored "-Wunknown-pragmas"
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#endif
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// At this point, all of the platform-specific features have been defined /
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// implemented.
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//
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// REQUIRES: using u64x2 = ...
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// REQUIRES: using Vector128 = ...
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// REQUIRES: Vector128 Vector128Load(void*) {...}
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// REQUIRES: void Vector128Store(Vector128, void*) {...}
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// REQUIRES: Vector128 AesRound(Vector128, Vector128) {...}
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// REQUIRES: void SwapEndian(uint64_t*) {...}
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//
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// PROVIDES: absl::random_internal::RandenHwAes::Absorb
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// PROVIDES: absl::random_internal::RandenHwAes::Generate
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// RANDen = RANDom generator or beetroots in Swiss German.
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// 'Strong' (well-distributed, unpredictable, backtracking-resistant) random
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// generator, faster in some benchmarks than std::mt19937_64 and pcg64_c32.
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//
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// High-level summary:
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// 1) Reverie (see "A Robust and Sponge-Like PRNG with Improved Efficiency") is
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// a sponge-like random generator that requires a cryptographic permutation.
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// It improves upon "Provably Robust Sponge-Based PRNGs and KDFs" by
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// achieving backtracking resistance with only one Permute() per buffer.
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//
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// 2) "Simpira v2: A Family of Efficient Permutations Using the AES Round
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// Function" constructs up to 1024-bit permutations using an improved
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// Generalized Feistel network with 2-round AES-128 functions. This Feistel
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// block shuffle achieves diffusion faster and is less vulnerable to
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// sliced-biclique attacks than the Type-2 cyclic shuffle.
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//
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// 3) "Improving the Generalized Feistel" and "New criterion for diffusion
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// property" extends the same kind of improved Feistel block shuffle to 16
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// branches, which enables a 2048-bit permutation.
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//
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// We combine these three ideas and also change Simpira's subround keys from
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// structured/low-entropy counters to digits of Pi.
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// Randen constants.
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using absl::random_internal::RandenTraits;
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constexpr size_t kStateBytes = RandenTraits::kStateBytes;
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constexpr size_t kCapacityBytes = RandenTraits::kCapacityBytes;
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constexpr size_t kFeistelBlocks = RandenTraits::kFeistelBlocks;
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constexpr size_t kFeistelRounds = RandenTraits::kFeistelRounds;
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constexpr size_t kFeistelFunctions = RandenTraits::kFeistelFunctions;
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// Independent keys (272 = 2.1 KiB) for the first AES subround of each function.
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constexpr size_t kKeys = kFeistelRounds * kFeistelFunctions;
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// INCLUDE keys.
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#include "absl/random/internal/randen-keys.inc"
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static_assert(kKeys == kRoundKeys, "kKeys and kRoundKeys must be equal");
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static_assert(round_keys[kKeys - 1] != u64x2(0, 0),
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"Too few round_keys initializers");
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// Number of uint64_t lanes per 128-bit vector;
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constexpr size_t kLanes = 2;
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// Block shuffles applies a shuffle to the entire state between AES rounds.
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// Improved odd-even shuffle from "New criterion for diffusion property".
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inline ABSL_TARGET_CRYPTO void BlockShuffle(uint64_t* state) {
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static_assert(kFeistelBlocks == 16, "Expecting 16 FeistelBlocks.");
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constexpr size_t shuffle[kFeistelBlocks] = {7, 2, 13, 4, 11, 8, 3, 6,
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15, 0, 9, 10, 1, 14, 5, 12};
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// The fully unrolled loop without the memcpy improves the speed by about
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// 30% over the equivalent loop.
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const Vector128 v0 = Vector128Load(state + kLanes * shuffle[0]);
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const Vector128 v1 = Vector128Load(state + kLanes * shuffle[1]);
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const Vector128 v2 = Vector128Load(state + kLanes * shuffle[2]);
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const Vector128 v3 = Vector128Load(state + kLanes * shuffle[3]);
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const Vector128 v4 = Vector128Load(state + kLanes * shuffle[4]);
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const Vector128 v5 = Vector128Load(state + kLanes * shuffle[5]);
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const Vector128 v6 = Vector128Load(state + kLanes * shuffle[6]);
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const Vector128 v7 = Vector128Load(state + kLanes * shuffle[7]);
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const Vector128 w0 = Vector128Load(state + kLanes * shuffle[8]);
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const Vector128 w1 = Vector128Load(state + kLanes * shuffle[9]);
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const Vector128 w2 = Vector128Load(state + kLanes * shuffle[10]);
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const Vector128 w3 = Vector128Load(state + kLanes * shuffle[11]);
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const Vector128 w4 = Vector128Load(state + kLanes * shuffle[12]);
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const Vector128 w5 = Vector128Load(state + kLanes * shuffle[13]);
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const Vector128 w6 = Vector128Load(state + kLanes * shuffle[14]);
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const Vector128 w7 = Vector128Load(state + kLanes * shuffle[15]);
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Vector128Store(v0, state + kLanes * 0);
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Vector128Store(v1, state + kLanes * 1);
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Vector128Store(v2, state + kLanes * 2);
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Vector128Store(v3, state + kLanes * 3);
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Vector128Store(v4, state + kLanes * 4);
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Vector128Store(v5, state + kLanes * 5);
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Vector128Store(v6, state + kLanes * 6);
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Vector128Store(v7, state + kLanes * 7);
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Vector128Store(w0, state + kLanes * 8);
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Vector128Store(w1, state + kLanes * 9);
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Vector128Store(w2, state + kLanes * 10);
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Vector128Store(w3, state + kLanes * 11);
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Vector128Store(w4, state + kLanes * 12);
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Vector128Store(w5, state + kLanes * 13);
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Vector128Store(w6, state + kLanes * 14);
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Vector128Store(w7, state + kLanes * 15);
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}
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// Feistel round function using two AES subrounds. Very similar to F()
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// from Simpira v2, but with independent subround keys. Uses 17 AES rounds
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// per 16 bytes (vs. 10 for AES-CTR). Computing eight round functions in
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// parallel hides the 7-cycle AESNI latency on HSW. Note that the Feistel
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// XORs are 'free' (included in the second AES instruction).
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inline ABSL_TARGET_CRYPTO const u64x2* FeistelRound(
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uint64_t* state, const u64x2* ABSL_RANDOM_INTERNAL_RESTRICT keys) {
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static_assert(kFeistelBlocks == 16, "Expecting 16 FeistelBlocks.");
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// MSVC does a horrible job at unrolling loops.
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// So we unroll the loop by hand to improve the performance.
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const Vector128 s0 = Vector128Load(state + kLanes * 0);
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const Vector128 s1 = Vector128Load(state + kLanes * 1);
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const Vector128 s2 = Vector128Load(state + kLanes * 2);
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const Vector128 s3 = Vector128Load(state + kLanes * 3);
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const Vector128 s4 = Vector128Load(state + kLanes * 4);
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const Vector128 s5 = Vector128Load(state + kLanes * 5);
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const Vector128 s6 = Vector128Load(state + kLanes * 6);
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const Vector128 s7 = Vector128Load(state + kLanes * 7);
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const Vector128 s8 = Vector128Load(state + kLanes * 8);
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const Vector128 s9 = Vector128Load(state + kLanes * 9);
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const Vector128 s10 = Vector128Load(state + kLanes * 10);
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const Vector128 s11 = Vector128Load(state + kLanes * 11);
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const Vector128 s12 = Vector128Load(state + kLanes * 12);
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const Vector128 s13 = Vector128Load(state + kLanes * 13);
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const Vector128 s14 = Vector128Load(state + kLanes * 14);
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const Vector128 s15 = Vector128Load(state + kLanes * 15);
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// Encode even blocks with keys.
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const Vector128 e0 = AesRound(s0, Vector128Load(keys + 0));
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const Vector128 e2 = AesRound(s2, Vector128Load(keys + 1));
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const Vector128 e4 = AesRound(s4, Vector128Load(keys + 2));
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const Vector128 e6 = AesRound(s6, Vector128Load(keys + 3));
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const Vector128 e8 = AesRound(s8, Vector128Load(keys + 4));
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const Vector128 e10 = AesRound(s10, Vector128Load(keys + 5));
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const Vector128 e12 = AesRound(s12, Vector128Load(keys + 6));
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const Vector128 e14 = AesRound(s14, Vector128Load(keys + 7));
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// Encode odd blocks with even output from above.
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const Vector128 o1 = AesRound(e0, s1);
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const Vector128 o3 = AesRound(e2, s3);
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const Vector128 o5 = AesRound(e4, s5);
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const Vector128 o7 = AesRound(e6, s7);
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const Vector128 o9 = AesRound(e8, s9);
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const Vector128 o11 = AesRound(e10, s11);
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const Vector128 o13 = AesRound(e12, s13);
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const Vector128 o15 = AesRound(e14, s15);
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// Store odd blocks. (These will be shuffled later).
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Vector128Store(o1, state + kLanes * 1);
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Vector128Store(o3, state + kLanes * 3);
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Vector128Store(o5, state + kLanes * 5);
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Vector128Store(o7, state + kLanes * 7);
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Vector128Store(o9, state + kLanes * 9);
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Vector128Store(o11, state + kLanes * 11);
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Vector128Store(o13, state + kLanes * 13);
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Vector128Store(o15, state + kLanes * 15);
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return keys + 8;
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}
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// Cryptographic permutation based via type-2 Generalized Feistel Network.
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// Indistinguishable from ideal by chosen-ciphertext adversaries using less than
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// 2^64 queries if the round function is a PRF. This is similar to the b=8 case
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// of Simpira v2, but more efficient than its generic construction for b=16.
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inline ABSL_TARGET_CRYPTO void Permute(
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const void* ABSL_RANDOM_INTERNAL_RESTRICT keys, uint64_t* state) {
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const u64x2* ABSL_RANDOM_INTERNAL_RESTRICT keys128 =
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static_cast<const u64x2*>(keys);
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// (Successfully unrolled; the first iteration jumps into the second half)
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#ifdef __clang__
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#pragma clang loop unroll_count(2)
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#endif
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for (size_t round = 0; round < kFeistelRounds; ++round) {
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keys128 = FeistelRound(state, keys128);
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BlockShuffle(state);
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}
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}
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} // namespace
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namespace absl {
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ABSL_NAMESPACE_BEGIN
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namespace random_internal {
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bool HasRandenHwAesImplementation() { return true; }
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const void* ABSL_TARGET_CRYPTO RandenHwAes::GetKeys() {
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// Round keys for one AES per Feistel round and branch.
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// The canonical implementation uses first digits of Pi.
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return round_keys;
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}
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// NOLINTNEXTLINE
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void ABSL_TARGET_CRYPTO RandenHwAes::Absorb(const void* seed_void,
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void* state_void) {
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auto* state = static_cast<uint64_t*>(state_void);
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const auto* seed = static_cast<const uint64_t*>(seed_void);
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constexpr size_t kCapacityBlocks = kCapacityBytes / sizeof(Vector128);
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constexpr size_t kStateBlocks = kStateBytes / sizeof(Vector128);
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static_assert(kCapacityBlocks * sizeof(Vector128) == kCapacityBytes,
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"Not i*V");
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static_assert(kCapacityBlocks == 1, "Unexpected Randen kCapacityBlocks");
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static_assert(kStateBlocks == 16, "Unexpected Randen kStateBlocks");
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Vector128 b1 = Vector128Load(state + kLanes * 1);
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b1 ^= Vector128Load(seed + kLanes * 0);
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Vector128Store(b1, state + kLanes * 1);
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Vector128 b2 = Vector128Load(state + kLanes * 2);
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b2 ^= Vector128Load(seed + kLanes * 1);
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Vector128Store(b2, state + kLanes * 2);
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Vector128 b3 = Vector128Load(state + kLanes * 3);
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b3 ^= Vector128Load(seed + kLanes * 2);
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Vector128Store(b3, state + kLanes * 3);
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Vector128 b4 = Vector128Load(state + kLanes * 4);
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b4 ^= Vector128Load(seed + kLanes * 3);
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Vector128Store(b4, state + kLanes * 4);
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Vector128 b5 = Vector128Load(state + kLanes * 5);
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b5 ^= Vector128Load(seed + kLanes * 4);
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Vector128Store(b5, state + kLanes * 5);
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Vector128 b6 = Vector128Load(state + kLanes * 6);
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b6 ^= Vector128Load(seed + kLanes * 5);
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Vector128Store(b6, state + kLanes * 6);
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Vector128 b7 = Vector128Load(state + kLanes * 7);
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b7 ^= Vector128Load(seed + kLanes * 6);
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Vector128Store(b7, state + kLanes * 7);
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Vector128 b8 = Vector128Load(state + kLanes * 8);
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b8 ^= Vector128Load(seed + kLanes * 7);
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Vector128Store(b8, state + kLanes * 8);
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Vector128 b9 = Vector128Load(state + kLanes * 9);
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b9 ^= Vector128Load(seed + kLanes * 8);
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Vector128Store(b9, state + kLanes * 9);
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Vector128 b10 = Vector128Load(state + kLanes * 10);
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b10 ^= Vector128Load(seed + kLanes * 9);
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Vector128Store(b10, state + kLanes * 10);
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Vector128 b11 = Vector128Load(state + kLanes * 11);
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b11 ^= Vector128Load(seed + kLanes * 10);
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Vector128Store(b11, state + kLanes * 11);
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Vector128 b12 = Vector128Load(state + kLanes * 12);
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b12 ^= Vector128Load(seed + kLanes * 11);
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Vector128Store(b12, state + kLanes * 12);
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Vector128 b13 = Vector128Load(state + kLanes * 13);
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b13 ^= Vector128Load(seed + kLanes * 12);
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Vector128Store(b13, state + kLanes * 13);
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Vector128 b14 = Vector128Load(state + kLanes * 14);
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b14 ^= Vector128Load(seed + kLanes * 13);
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Vector128Store(b14, state + kLanes * 14);
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Vector128 b15 = Vector128Load(state + kLanes * 15);
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b15 ^= Vector128Load(seed + kLanes * 14);
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Vector128Store(b15, state + kLanes * 15);
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}
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// NOLINTNEXTLINE
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void ABSL_TARGET_CRYPTO RandenHwAes::Generate(const void* keys,
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void* state_void) {
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static_assert(kCapacityBytes == sizeof(Vector128), "Capacity mismatch");
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auto* state = static_cast<uint64_t*>(state_void);
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const Vector128 prev_inner = Vector128Load(state);
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SwapEndian(state);
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Permute(keys, state);
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SwapEndian(state);
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// Ensure backtracking resistance.
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Vector128 inner = Vector128Load(state);
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inner ^= prev_inner;
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Vector128Store(inner, state);
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}
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#ifdef __clang__
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#pragma clang diagnostic pop
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#endif
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} // namespace random_internal
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ABSL_NAMESPACE_END
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} // namespace absl
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#endif // (ABSL_RANDEN_HWAES_IMPL)
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