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242 lines
16 KiB
242 lines
16 KiB
/* |
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* Copyright (c) 2016 Clément Bœsch <clement stupeflix.com> |
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* Copyright (c) 2019-2021 Sebastian Pop <spop@amazon.com> |
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* Copyright (c) 2022 Jonathan Swinney <jswinney@amazon.com> |
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* |
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* This file is part of FFmpeg. |
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* |
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* FFmpeg is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU Lesser General Public |
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* License as published by the Free Software Foundation; either |
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* version 2.1 of the License, or (at your option) any later version. |
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* |
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* FFmpeg is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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* Lesser General Public License for more details. |
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* |
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* You should have received a copy of the GNU Lesser General Public |
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* License along with FFmpeg; if not, write to the Free Software |
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA |
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*/ |
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#include "libavutil/aarch64/asm.S" |
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/* |
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;----------------------------------------------------------------------------- |
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; horizontal line scaling |
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; |
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; void hscale<source_width>to<intermediate_nbits>_<filterSize>_<opt> |
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; (SwsContext *c, int{16,32}_t *dst, |
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; int dstW, const uint{8,16}_t *src, |
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; const int16_t *filter, |
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; const int32_t *filterPos, int filterSize); |
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; |
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; Scale one horizontal line. Input is either 8-bit width or 16-bit width |
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; ($source_width can be either 8, 9, 10 or 16, difference is whether we have to |
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; downscale before multiplying). Filter is 14 bits. Output is either 15 bits |
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; (in int16_t) or 19 bits (in int32_t), as given in $intermediate_nbits. Each |
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; output pixel is generated from $filterSize input pixels, the position of |
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; the first pixel is given in filterPos[nOutputPixel]. |
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;----------------------------------------------------------------------------- */ |
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function ff_hscale8to15_X8_neon, export=1 |
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sbfiz x7, x6, #1, #32 // filterSize*2 (*2 because int16) |
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1: ldr w8, [x5], #4 // filterPos[idx] |
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ldr w0, [x5], #4 // filterPos[idx + 1] |
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ldr w11, [x5], #4 // filterPos[idx + 2] |
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ldr w9, [x5], #4 // filterPos[idx + 3] |
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mov x16, x4 // filter0 = filter |
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add x12, x16, x7 // filter1 = filter0 + filterSize*2 |
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add x13, x12, x7 // filter2 = filter1 + filterSize*2 |
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add x4, x13, x7 // filter3 = filter2 + filterSize*2 |
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movi v0.2D, #0 // val sum part 1 (for dst[0]) |
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movi v1.2D, #0 // val sum part 2 (for dst[1]) |
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movi v2.2D, #0 // val sum part 3 (for dst[2]) |
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movi v3.2D, #0 // val sum part 4 (for dst[3]) |
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add x17, x3, w8, UXTW // srcp + filterPos[0] |
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add x8, x3, w0, UXTW // srcp + filterPos[1] |
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add x0, x3, w11, UXTW // srcp + filterPos[2] |
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add x11, x3, w9, UXTW // srcp + filterPos[3] |
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mov w15, w6 // filterSize counter |
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2: ld1 {v4.8B}, [x17], #8 // srcp[filterPos[0] + {0..7}] |
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ld1 {v5.8H}, [x16], #16 // load 8x16-bit filter values, part 1 |
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ld1 {v6.8B}, [x8], #8 // srcp[filterPos[1] + {0..7}] |
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ld1 {v7.8H}, [x12], #16 // load 8x16-bit at filter+filterSize |
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uxtl v4.8H, v4.8B // unpack part 1 to 16-bit |
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smlal v0.4S, v4.4H, v5.4H // v0 accumulates srcp[filterPos[0] + {0..3}] * filter[{0..3}] |
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smlal2 v0.4S, v4.8H, v5.8H // v0 accumulates srcp[filterPos[0] + {4..7}] * filter[{4..7}] |
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ld1 {v16.8B}, [x0], #8 // srcp[filterPos[2] + {0..7}] |
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ld1 {v17.8H}, [x13], #16 // load 8x16-bit at filter+2*filterSize |
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uxtl v6.8H, v6.8B // unpack part 2 to 16-bit |
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smlal v1.4S, v6.4H, v7.4H // v1 accumulates srcp[filterPos[1] + {0..3}] * filter[{0..3}] |
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uxtl v16.8H, v16.8B // unpack part 3 to 16-bit |
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smlal v2.4S, v16.4H, v17.4H // v2 accumulates srcp[filterPos[2] + {0..3}] * filter[{0..3}] |
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smlal2 v2.4S, v16.8H, v17.8H // v2 accumulates srcp[filterPos[2] + {4..7}] * filter[{4..7}] |
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ld1 {v18.8B}, [x11], #8 // srcp[filterPos[3] + {0..7}] |
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smlal2 v1.4S, v6.8H, v7.8H // v1 accumulates srcp[filterPos[1] + {4..7}] * filter[{4..7}] |
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ld1 {v19.8H}, [x4], #16 // load 8x16-bit at filter+3*filterSize |
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subs w15, w15, #8 // j -= 8: processed 8/filterSize |
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uxtl v18.8H, v18.8B // unpack part 4 to 16-bit |
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smlal v3.4S, v18.4H, v19.4H // v3 accumulates srcp[filterPos[3] + {0..3}] * filter[{0..3}] |
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smlal2 v3.4S, v18.8H, v19.8H // v3 accumulates srcp[filterPos[3] + {4..7}] * filter[{4..7}] |
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b.gt 2b // inner loop if filterSize not consumed completely |
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addp v0.4S, v0.4S, v1.4S // part01 horizontal pair adding |
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addp v2.4S, v2.4S, v3.4S // part23 horizontal pair adding |
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addp v0.4S, v0.4S, v2.4S // part0123 horizontal pair adding |
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subs w2, w2, #4 // dstW -= 4 |
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sqshrn v0.4H, v0.4S, #7 // shift and clip the 2x16-bit final values |
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st1 {v0.4H}, [x1], #8 // write to destination part0123 |
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b.gt 1b // loop until end of line |
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ret |
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endfunc |
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function ff_hscale8to15_4_neon, export=1 |
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// x0 SwsContext *c (not used) |
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// x1 int16_t *dst |
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// x2 int dstW |
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// x3 const uint8_t *src |
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// x4 const int16_t *filter |
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// x5 const int32_t *filterPos |
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// x6 int filterSize |
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// x8-x15 registers for gathering src data |
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// v0 madd accumulator 4S |
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// v1-v4 filter values (16 bit) 8H |
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// v5 madd accumulator 4S |
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// v16-v19 src values (8 bit) 8B |
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// This implementation has 4 sections: |
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// 1. Prefetch src data |
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// 2. Interleaved prefetching src data and madd |
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// 3. Complete madd |
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// 4. Complete remaining iterations when dstW % 8 != 0 |
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sub sp, sp, #32 // allocate 32 bytes on the stack |
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cmp w2, #16 // if dstW <16, skip to the last block used for wrapping up |
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b.lt 2f |
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// load 8 values from filterPos to be used as offsets into src |
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ldp w8, w9, [x5] // filterPos[idx + 0], [idx + 1] |
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ldp w10, w11, [x5, #8] // filterPos[idx + 2], [idx + 3] |
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ldp w12, w13, [x5, #16] // filterPos[idx + 4], [idx + 5] |
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ldp w14, w15, [x5, #24] // filterPos[idx + 6], [idx + 7] |
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add x5, x5, #32 // advance filterPos |
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// gather random access data from src into contiguous memory |
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ldr w8, [x3, w8, UXTW] // src[filterPos[idx + 0]][0..3] |
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ldr w9, [x3, w9, UXTW] // src[filterPos[idx + 1]][0..3] |
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ldr w10, [x3, w10, UXTW] // src[filterPos[idx + 2]][0..3] |
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ldr w11, [x3, w11, UXTW] // src[filterPos[idx + 3]][0..3] |
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ldr w12, [x3, w12, UXTW] // src[filterPos[idx + 4]][0..3] |
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ldr w13, [x3, w13, UXTW] // src[filterPos[idx + 5]][0..3] |
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ldr w14, [x3, w14, UXTW] // src[filterPos[idx + 6]][0..3] |
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ldr w15, [x3, w15, UXTW] // src[filterPos[idx + 7]][0..3] |
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stp w8, w9, [sp] // *scratch_mem = { src[filterPos[idx + 0]][0..3], src[filterPos[idx + 1]][0..3] } |
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stp w10, w11, [sp, #8] // *scratch_mem = { src[filterPos[idx + 2]][0..3], src[filterPos[idx + 3]][0..3] } |
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stp w12, w13, [sp, #16] // *scratch_mem = { src[filterPos[idx + 4]][0..3], src[filterPos[idx + 5]][0..3] } |
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stp w14, w15, [sp, #24] // *scratch_mem = { src[filterPos[idx + 6]][0..3], src[filterPos[idx + 7]][0..3] } |
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1: |
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ld4 {v16.8B, v17.8B, v18.8B, v19.8B}, [sp] // transpose 8 bytes each from src into 4 registers |
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// load 8 values from filterPos to be used as offsets into src |
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ldp w8, w9, [x5] // filterPos[idx + 0][0..3], [idx + 1][0..3], next iteration |
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ldp w10, w11, [x5, #8] // filterPos[idx + 2][0..3], [idx + 3][0..3], next iteration |
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ldp w12, w13, [x5, #16] // filterPos[idx + 4][0..3], [idx + 5][0..3], next iteration |
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ldp w14, w15, [x5, #24] // filterPos[idx + 6][0..3], [idx + 7][0..3], next iteration |
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movi v0.2D, #0 // Clear madd accumulator for idx 0..3 |
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movi v5.2D, #0 // Clear madd accumulator for idx 4..7 |
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ld4 {v1.8H, v2.8H, v3.8H, v4.8H}, [x4], #64 // load filter idx + 0..7 |
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add x5, x5, #32 // advance filterPos |
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// interleaved SIMD and prefetching intended to keep ld/st and vector pipelines busy |
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uxtl v16.8H, v16.8B // unsigned extend long, covert src data to 16-bit |
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uxtl v17.8H, v17.8B // unsigned extend long, covert src data to 16-bit |
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ldr w8, [x3, w8, UXTW] // src[filterPos[idx + 0]], next iteration |
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ldr w9, [x3, w9, UXTW] // src[filterPos[idx + 1]], next iteration |
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uxtl v18.8H, v18.8B // unsigned extend long, covert src data to 16-bit |
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uxtl v19.8H, v19.8B // unsigned extend long, covert src data to 16-bit |
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ldr w10, [x3, w10, UXTW] // src[filterPos[idx + 2]], next iteration |
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ldr w11, [x3, w11, UXTW] // src[filterPos[idx + 3]], next iteration |
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smlal v0.4S, v1.4H, v16.4H // multiply accumulate inner loop j = 0, idx = 0..3 |
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smlal v0.4S, v2.4H, v17.4H // multiply accumulate inner loop j = 1, idx = 0..3 |
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ldr w12, [x3, w12, UXTW] // src[filterPos[idx + 4]], next iteration |
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ldr w13, [x3, w13, UXTW] // src[filterPos[idx + 5]], next iteration |
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smlal v0.4S, v3.4H, v18.4H // multiply accumulate inner loop j = 2, idx = 0..3 |
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smlal v0.4S, v4.4H, v19.4H // multiply accumulate inner loop j = 3, idx = 0..3 |
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ldr w14, [x3, w14, UXTW] // src[filterPos[idx + 6]], next iteration |
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ldr w15, [x3, w15, UXTW] // src[filterPos[idx + 7]], next iteration |
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smlal2 v5.4S, v1.8H, v16.8H // multiply accumulate inner loop j = 0, idx = 4..7 |
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smlal2 v5.4S, v2.8H, v17.8H // multiply accumulate inner loop j = 1, idx = 4..7 |
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stp w8, w9, [sp] // *scratch_mem = { src[filterPos[idx + 0]][0..3], src[filterPos[idx + 1]][0..3] } |
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stp w10, w11, [sp, #8] // *scratch_mem = { src[filterPos[idx + 2]][0..3], src[filterPos[idx + 3]][0..3] } |
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smlal2 v5.4S, v3.8H, v18.8H // multiply accumulate inner loop j = 2, idx = 4..7 |
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smlal2 v5.4S, v4.8H, v19.8H // multiply accumulate inner loop j = 3, idx = 4..7 |
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stp w12, w13, [sp, #16] // *scratch_mem = { src[filterPos[idx + 4]][0..3], src[filterPos[idx + 5]][0..3] } |
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stp w14, w15, [sp, #24] // *scratch_mem = { src[filterPos[idx + 6]][0..3], src[filterPos[idx + 7]][0..3] } |
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sub w2, w2, #8 // dstW -= 8 |
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sqshrn v0.4H, v0.4S, #7 // shift and clip the 2x16-bit final values |
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sqshrn v1.4H, v5.4S, #7 // shift and clip the 2x16-bit final values |
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st1 {v0.4H, v1.4H}, [x1], #16 // write to dst[idx + 0..7] |
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cmp w2, #16 // continue on main loop if there are at least 16 iterations left |
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b.ge 1b |
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// last full iteration |
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ld4 {v16.8B, v17.8B, v18.8B, v19.8B}, [sp] |
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ld4 {v1.8H, v2.8H, v3.8H, v4.8H}, [x4], #64 // load filter idx + 0..7 |
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movi v0.2D, #0 // Clear madd accumulator for idx 0..3 |
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movi v5.2D, #0 // Clear madd accumulator for idx 4..7 |
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uxtl v16.8H, v16.8B // unsigned extend long, covert src data to 16-bit |
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uxtl v17.8H, v17.8B // unsigned extend long, covert src data to 16-bit |
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uxtl v18.8H, v18.8B // unsigned extend long, covert src data to 16-bit |
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uxtl v19.8H, v19.8B // unsigned extend long, covert src data to 16-bit |
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smlal v0.4S, v1.4H, v16.4H // multiply accumulate inner loop j = 0, idx = 0..3 |
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smlal v0.4S, v2.4H, v17.4H // multiply accumulate inner loop j = 1, idx = 0..3 |
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smlal v0.4S, v3.4H, v18.4H // multiply accumulate inner loop j = 2, idx = 0..3 |
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smlal v0.4S, v4.4H, v19.4H // multiply accumulate inner loop j = 3, idx = 0..3 |
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smlal2 v5.4S, v1.8H, v16.8H // multiply accumulate inner loop j = 0, idx = 4..7 |
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smlal2 v5.4S, v2.8H, v17.8H // multiply accumulate inner loop j = 1, idx = 4..7 |
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smlal2 v5.4S, v3.8H, v18.8H // multiply accumulate inner loop j = 2, idx = 4..7 |
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smlal2 v5.4S, v4.8H, v19.8H // multiply accumulate inner loop j = 3, idx = 4..7 |
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subs w2, w2, #8 // dstW -= 8 |
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sqshrn v0.4H, v0.4S, #7 // shift and clip the 2x16-bit final values |
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sqshrn v1.4H, v5.4S, #7 // shift and clip the 2x16-bit final values |
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st1 {v0.4H, v1.4H}, [x1], #16 // write to dst[idx + 0..7] |
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cbnz w2, 2f // if >0 iterations remain, jump to the wrap up section |
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add sp, sp, #32 // clean up stack |
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ret |
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// finish up when dstW % 8 != 0 or dstW < 16 |
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2: |
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// load src |
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ldr w8, [x5], #4 // filterPos[i] |
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add x9, x3, w8, UXTW // calculate the address for src load |
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ld1 {v5.S}[0], [x9] // src[filterPos[i] + 0..3] |
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// load filter |
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ld1 {v6.4H}, [x4], #8 // filter[filterSize * i + 0..3] |
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uxtl v5.8H, v5.8B // unsigned exten long, convert src data to 16-bit |
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smull v0.4S, v5.4H, v6.4H // 4 iterations of src[...] * filter[...] |
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addv s0, v0.4S // add up products of src and filter values |
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sqshrn h0, s0, #7 // shift and clip the 2x16-bit final value |
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st1 {v0.H}[0], [x1], #2 // dst[i] = ... |
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sub w2, w2, #1 // dstW-- |
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cbnz w2, 2b |
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add sp, sp, #32 // clean up stack |
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ret |
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endfunc
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