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457 lines
15 KiB
457 lines
15 KiB
/* |
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* Copyright (c) 2008 Siarhei Siamashka <ssvb@users.sourceforge.net> |
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* |
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* This file is part of Libav. |
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* |
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* Libav is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU Lesser General Public |
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* License as published by the Free Software Foundation; either |
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* version 2.1 of the License, or (at your option) any later version. |
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* |
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* Libav is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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* Lesser General Public License for more details. |
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* |
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* You should have received a copy of the GNU Lesser General Public |
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* License along with Libav; if not, write to the Free Software |
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA |
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*/ |
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#include "config.h" |
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#include "asm.S" |
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/** |
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* Assume that len is a positive number and is multiple of 8 |
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*/ |
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@ void ff_vector_fmul_vfp(float *dst, const float *src0, const float *src1, int len) |
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function ff_vector_fmul_vfp, export=1 |
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vpush {d8-d15} |
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fmrx r12, fpscr |
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orr r12, r12, #(3 << 16) /* set vector size to 4 */ |
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fmxr fpscr, r12 |
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vldmia r1!, {s0-s3} |
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vldmia r2!, {s8-s11} |
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vldmia r1!, {s4-s7} |
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vldmia r2!, {s12-s15} |
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vmul.f32 s8, s0, s8 |
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1: |
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subs r3, r3, #16 |
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vmul.f32 s12, s4, s12 |
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itttt ge |
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vldmiage r1!, {s16-s19} |
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vldmiage r2!, {s24-s27} |
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vldmiage r1!, {s20-s23} |
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vldmiage r2!, {s28-s31} |
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it ge |
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vmulge.f32 s24, s16, s24 |
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vstmia r0!, {s8-s11} |
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vstmia r0!, {s12-s15} |
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it ge |
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vmulge.f32 s28, s20, s28 |
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itttt gt |
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vldmiagt r1!, {s0-s3} |
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vldmiagt r2!, {s8-s11} |
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vldmiagt r1!, {s4-s7} |
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vldmiagt r2!, {s12-s15} |
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ittt ge |
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vmulge.f32 s8, s0, s8 |
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vstmiage r0!, {s24-s27} |
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vstmiage r0!, {s28-s31} |
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bgt 1b |
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bic r12, r12, #(7 << 16) /* set vector size back to 1 */ |
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fmxr fpscr, r12 |
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vpop {d8-d15} |
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bx lr |
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endfunc |
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/** |
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* ARM VFP implementation of 'vector_fmul_window_c' function |
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* Assume that len is a positive non-zero number |
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*/ |
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@ void ff_vector_fmul_window_vfp(float *dst, const float *src0, |
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@ const float *src1, const float *win, int len) |
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function ff_vector_fmul_window_vfp, export=1 |
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DST0 .req a1 |
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SRC0 .req a2 |
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SRC1 .req a3 |
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WIN0 .req a4 |
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LEN .req v1 |
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DST1 .req v2 |
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WIN1 .req v3 |
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OLDFPSCR .req ip |
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push {v1-v3,lr} |
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ldr LEN, [sp, #4*4+0] |
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vpush {s16-s31} |
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fmrx OLDFPSCR, FPSCR |
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add DST1, DST0, LEN, lsl #3 |
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add SRC1, SRC1, LEN, lsl #2 |
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add WIN1, WIN0, LEN, lsl #3 |
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tst LEN, #7 |
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beq 4f @ common case: len is a multiple of 8 |
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ldr lr, =0x03000000 @ RunFast mode, scalar mode |
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fmxr FPSCR, lr |
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tst LEN, #1 |
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beq 1f |
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vldmdb WIN1!, {s0} |
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vldmia SRC0!, {s8} |
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vldmia WIN0!, {s16} |
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vmul.f s24, s0, s8 |
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vldmdb SRC1!, {s20} |
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vmul.f s8, s16, s8 |
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vmls.f s24, s16, s20 |
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vmla.f s8, s0, s20 |
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vstmia DST0!, {s24} |
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vstmdb DST1!, {s8} |
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1: |
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tst LEN, #2 |
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beq 2f |
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vldmdb WIN1!, {s0} |
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vldmdb WIN1!, {s1} |
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vldmia SRC0!, {s8-s9} |
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vldmia WIN0!, {s16-s17} |
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vmul.f s24, s0, s8 |
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vmul.f s25, s1, s9 |
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vldmdb SRC1!, {s20} |
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vldmdb SRC1!, {s21} |
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vmul.f s8, s16, s8 |
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vmul.f s9, s17, s9 |
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vmls.f s24, s16, s20 |
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vmls.f s25, s17, s21 |
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vmla.f s8, s0, s20 |
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vmla.f s9, s1, s21 |
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vstmia DST0!, {s24-s25} |
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vstmdb DST1!, {s8} |
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vstmdb DST1!, {s9} |
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2: |
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tst LEN, #4 |
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beq 3f |
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vldmdb WIN1!, {s0} |
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vldmdb WIN1!, {s1} |
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vldmdb WIN1!, {s2} |
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vldmdb WIN1!, {s3} |
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vldmia SRC0!, {s8-s11} |
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vldmia WIN0!, {s16-s19} |
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vmul.f s24, s0, s8 |
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vmul.f s25, s1, s9 |
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vmul.f s26, s2, s10 |
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vmul.f s27, s3, s11 |
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vldmdb SRC1!, {s20} |
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vldmdb SRC1!, {s21} |
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vldmdb SRC1!, {s22} |
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vldmdb SRC1!, {s23} |
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vmul.f s8, s16, s8 |
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vmul.f s9, s17, s9 |
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vmul.f s10, s18, s10 |
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vmul.f s11, s19, s11 |
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vmls.f s24, s16, s20 |
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vmls.f s25, s17, s21 |
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vmls.f s26, s18, s22 |
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vmls.f s27, s19, s23 |
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vmla.f s8, s0, s20 |
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vmla.f s9, s1, s21 |
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vmla.f s10, s2, s22 |
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vmla.f s11, s3, s23 |
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vstmia DST0!, {s24-s27} |
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vstmdb DST1!, {s8} |
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vstmdb DST1!, {s9} |
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vstmdb DST1!, {s10} |
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vstmdb DST1!, {s11} |
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3: |
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bics LEN, LEN, #7 |
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beq 7f |
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4: |
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ldr lr, =0x03030000 @ RunFast mode, short vectors of length 4, stride 1 |
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fmxr FPSCR, lr |
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vldmdb WIN1!, {s0} |
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vldmdb WIN1!, {s1} |
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vldmdb WIN1!, {s2} |
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vldmdb WIN1!, {s3} |
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vldmia SRC0!, {s8-s11} |
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vldmia WIN0!, {s16-s19} |
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vmul.f s24, s0, s8 @ vector * vector |
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vldmdb SRC1!, {s20} |
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vldmdb SRC1!, {s21} |
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vldmdb SRC1!, {s22} |
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vldmdb SRC1!, {s23} |
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vmul.f s8, s16, s8 @ vector * vector |
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vmls.f s24, s16, s20 @ vector * vector |
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vldmdb WIN1!, {s4} |
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vldmdb WIN1!, {s5} |
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vldmdb WIN1!, {s6} |
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vldmdb WIN1!, {s7} |
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vldmia SRC0!, {s12-s13} |
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vmla.f s8, s0, s20 @ vector * vector |
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vldmia SRC0!, {s14-s15} |
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subs LEN, LEN, #8 |
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beq 6f |
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5: vldmia WIN0!, {s20-s23} |
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vmul.f s28, s4, s12 @ vector * vector |
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vstmia DST0!, {s24-s25} |
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vldmdb SRC1!, {s16} |
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vldmdb SRC1!, {s17} |
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vldmdb SRC1!, {s18} |
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vldmdb SRC1!, {s19} |
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vmul.f s12, s20, s12 @ vector * vector |
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vstmia DST0!, {s26-s27} |
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vstmdb DST1!, {s8} |
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vstmdb DST1!, {s9} |
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vstmdb DST1!, {s10} |
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vstmdb DST1!, {s11} |
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vmls.f s28, s20, s16 @ vector * vector |
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vldmdb WIN1!, {s0} |
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vldmdb WIN1!, {s1} |
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vldmdb WIN1!, {s2} |
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vldmdb WIN1!, {s3} |
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vldmia SRC0!, {s8-s9} |
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vmla.f s12, s4, s16 @ vector * vector |
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vldmia SRC0!, {s10-s11} |
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subs LEN, LEN, #8 |
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vldmia WIN0!, {s16-s19} |
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vmul.f s24, s0, s8 @ vector * vector |
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vstmia DST0!, {s28-s29} |
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vldmdb SRC1!, {s20} |
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vldmdb SRC1!, {s21} |
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vldmdb SRC1!, {s22} |
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vldmdb SRC1!, {s23} |
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vmul.f s8, s16, s8 @ vector * vector |
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vstmia DST0!, {s30-s31} |
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vstmdb DST1!, {s12} |
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vstmdb DST1!, {s13} |
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vstmdb DST1!, {s14} |
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vstmdb DST1!, {s15} |
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vmls.f s24, s16, s20 @ vector * vector |
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vldmdb WIN1!, {s4} |
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vldmdb WIN1!, {s5} |
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vldmdb WIN1!, {s6} |
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vldmdb WIN1!, {s7} |
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vldmia SRC0!, {s12-s13} |
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vmla.f s8, s0, s20 @ vector * vector |
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vldmia SRC0!, {s14-s15} |
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bne 5b |
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6: vldmia WIN0!, {s20-s23} |
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vmul.f s28, s4, s12 @ vector * vector |
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vstmia DST0!, {s24-s25} |
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vldmdb SRC1!, {s16} |
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vldmdb SRC1!, {s17} |
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vldmdb SRC1!, {s18} |
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vldmdb SRC1!, {s19} |
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vmul.f s12, s20, s12 @ vector * vector |
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vstmia DST0!, {s26-s27} |
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vstmdb DST1!, {s8} |
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vstmdb DST1!, {s9} |
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vstmdb DST1!, {s10} |
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vstmdb DST1!, {s11} |
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vmls.f s28, s20, s16 @ vector * vector |
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vmla.f s12, s4, s16 @ vector * vector |
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vstmia DST0!, {s28-s31} |
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vstmdb DST1!, {s12} |
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vstmdb DST1!, {s13} |
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vstmdb DST1!, {s14} |
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vstmdb DST1!, {s15} |
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7: |
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fmxr FPSCR, OLDFPSCR |
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vpop {s16-s31} |
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pop {v1-v3,pc} |
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.unreq DST0 |
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.unreq SRC0 |
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.unreq SRC1 |
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.unreq WIN0 |
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.unreq LEN |
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.unreq OLDFPSCR |
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.unreq DST1 |
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.unreq WIN1 |
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endfunc |
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/** |
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* ARM VFP optimized implementation of 'vector_fmul_reverse_c' function. |
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* Assume that len is a positive number and is multiple of 8 |
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*/ |
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@ void ff_vector_fmul_reverse_vfp(float *dst, const float *src0, |
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@ const float *src1, int len) |
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function ff_vector_fmul_reverse_vfp, export=1 |
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vpush {d8-d15} |
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add r2, r2, r3, lsl #2 |
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vldmdb r2!, {s0-s3} |
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vldmia r1!, {s8-s11} |
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vldmdb r2!, {s4-s7} |
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vldmia r1!, {s12-s15} |
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vmul.f32 s8, s3, s8 |
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vmul.f32 s9, s2, s9 |
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vmul.f32 s10, s1, s10 |
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vmul.f32 s11, s0, s11 |
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1: |
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subs r3, r3, #16 |
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it ge |
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vldmdbge r2!, {s16-s19} |
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vmul.f32 s12, s7, s12 |
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it ge |
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vldmiage r1!, {s24-s27} |
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vmul.f32 s13, s6, s13 |
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it ge |
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vldmdbge r2!, {s20-s23} |
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vmul.f32 s14, s5, s14 |
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it ge |
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vldmiage r1!, {s28-s31} |
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vmul.f32 s15, s4, s15 |
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it ge |
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vmulge.f32 s24, s19, s24 |
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it gt |
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vldmdbgt r2!, {s0-s3} |
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it ge |
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vmulge.f32 s25, s18, s25 |
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vstmia r0!, {s8-s13} |
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it ge |
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vmulge.f32 s26, s17, s26 |
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it gt |
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vldmiagt r1!, {s8-s11} |
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itt ge |
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vmulge.f32 s27, s16, s27 |
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vmulge.f32 s28, s23, s28 |
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it gt |
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vldmdbgt r2!, {s4-s7} |
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it ge |
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vmulge.f32 s29, s22, s29 |
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vstmia r0!, {s14-s15} |
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ittt ge |
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vmulge.f32 s30, s21, s30 |
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vmulge.f32 s31, s20, s31 |
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vmulge.f32 s8, s3, s8 |
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it gt |
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vldmiagt r1!, {s12-s15} |
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itttt ge |
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vmulge.f32 s9, s2, s9 |
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vmulge.f32 s10, s1, s10 |
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vstmiage r0!, {s24-s27} |
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vmulge.f32 s11, s0, s11 |
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it ge |
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vstmiage r0!, {s28-s31} |
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bgt 1b |
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vpop {d8-d15} |
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bx lr |
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endfunc |
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/** |
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* ARM VFP implementation of 'butterflies_float_c' function |
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* Assume that len is a positive non-zero number |
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*/ |
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@ void ff_butterflies_float_vfp(float *restrict v1, float *restrict v2, int len) |
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function ff_butterflies_float_vfp, export=1 |
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BASE1 .req a1 |
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BASE2 .req a2 |
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LEN .req a3 |
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OLDFPSCR .req a4 |
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vpush {s16-s31} |
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fmrx OLDFPSCR, FPSCR |
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tst LEN, #7 |
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beq 4f @ common case: len is a multiple of 8 |
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ldr ip, =0x03000000 @ RunFast mode, scalar mode |
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fmxr FPSCR, ip |
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tst LEN, #1 |
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beq 1f |
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vldmia BASE1!, {s0} |
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vldmia BASE2!, {s8} |
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vadd.f s16, s0, s8 |
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vsub.f s24, s0, s8 |
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vstr s16, [BASE1, #0-4*1] |
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vstr s24, [BASE2, #0-4*1] |
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1: |
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tst LEN, #2 |
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beq 2f |
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vldmia BASE1!, {s0-s1} |
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vldmia BASE2!, {s8-s9} |
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vadd.f s16, s0, s8 |
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vadd.f s17, s1, s9 |
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vsub.f s24, s0, s8 |
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vsub.f s25, s1, s9 |
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vstr d8, [BASE1, #0-8*1] @ s16,s17 |
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vstr d12, [BASE2, #0-8*1] @ s24,s25 |
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2: |
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tst LEN, #4 |
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beq 3f |
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vldmia BASE1!, {s0-s1} |
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vldmia BASE2!, {s8-s9} |
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vldmia BASE1!, {s2-s3} |
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vldmia BASE2!, {s10-s11} |
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vadd.f s16, s0, s8 |
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vadd.f s17, s1, s9 |
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vsub.f s24, s0, s8 |
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vsub.f s25, s1, s9 |
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vadd.f s18, s2, s10 |
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vadd.f s19, s3, s11 |
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vsub.f s26, s2, s10 |
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vsub.f s27, s3, s11 |
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vstr d8, [BASE1, #0-16*1] @ s16,s17 |
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vstr d12, [BASE2, #0-16*1] @ s24,s25 |
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vstr d9, [BASE1, #8-16*1] @ s18,s19 |
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vstr d13, [BASE2, #8-16*1] @ s26,s27 |
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3: |
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bics LEN, LEN, #7 |
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beq 7f |
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4: |
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ldr ip, =0x03030000 @ RunFast mode, short vectors of length 4, stride 1 |
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fmxr FPSCR, ip |
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vldmia BASE1!, {s0-s1} |
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vldmia BASE2!, {s8-s9} |
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vldmia BASE1!, {s2-s3} |
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vldmia BASE2!, {s10-s11} |
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vadd.f s16, s0, s8 |
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vldmia BASE1!, {s4-s5} |
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vldmia BASE2!, {s12-s13} |
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vldmia BASE1!, {s6-s7} |
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vldmia BASE2!, {s14-s15} |
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vsub.f s24, s0, s8 |
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vadd.f s20, s4, s12 |
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subs LEN, LEN, #8 |
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beq 6f |
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5: vldmia BASE1!, {s0-s3} |
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vldmia BASE2!, {s8-s11} |
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vsub.f s28, s4, s12 |
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vstr d8, [BASE1, #0-16*3] @ s16,s17 |
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vstr d9, [BASE1, #8-16*3] @ s18,s19 |
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vstr d12, [BASE2, #0-16*3] @ s24,s25 |
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vstr d13, [BASE2, #8-16*3] @ s26,s27 |
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vadd.f s16, s0, s8 |
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vldmia BASE1!, {s4-s7} |
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vldmia BASE2!, {s12-s15} |
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vsub.f s24, s0, s8 |
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vstr d10, [BASE1, #0-16*3] @ s20,s21 |
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vstr d11, [BASE1, #8-16*3] @ s22,s23 |
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vstr d14, [BASE2, #0-16*3] @ s28,s29 |
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vstr d15, [BASE2, #8-16*3] @ s30,s31 |
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vadd.f s20, s4, s12 |
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subs LEN, LEN, #8 |
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bne 5b |
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6: vsub.f s28, s4, s12 |
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vstr d8, [BASE1, #0-16*2] @ s16,s17 |
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vstr d9, [BASE1, #8-16*2] @ s18,s19 |
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vstr d12, [BASE2, #0-16*2] @ s24,s25 |
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vstr d13, [BASE2, #8-16*2] @ s26,s27 |
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vstr d10, [BASE1, #0-16*1] @ s20,s21 |
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vstr d11, [BASE1, #8-16*1] @ s22,s23 |
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vstr d14, [BASE2, #0-16*1] @ s28,s29 |
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vstr d15, [BASE2, #8-16*1] @ s30,s31 |
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7: |
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fmxr FPSCR, OLDFPSCR |
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vpop {s16-s31} |
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bx lr |
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.unreq BASE1 |
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.unreq BASE2 |
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.unreq LEN |
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.unreq OLDFPSCR |
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endfunc
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