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release/0.10
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release/0.6
release/0.7
release/0.8
release/0.9
release/1.0
release/1.1
release/1.2
release/2.0
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release/2.3
release/2.4
release/2.5
release/2.6
release/2.7
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release/3.0
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release/4.3
release/4.4
release/5.0
release/5.1
release/6.0
release/6.1
release/7.0
release/7.1
N
ffmpeg-0.6.3
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${ noResults }
8 Commits (c6c54943d161812b3c4034116cb14f3f5c05dc43)
| Author | SHA1 | Message | Date |
|---|---|---|---|
Zhao Zhili
|
2dc55f5993 |
configure: Add wasm as a fake arch
And add wasm simd128 flag, so we can add simd128 optimizations. It can be enabled by put -msimd128 to extra cflags. There is no runtime detection on simd128 support yet. I think that needs to be done with JavaScript. Signed-off-by: Zhao Zhili <zhilizhao@tencent.com> |
2 months ago |
Martin Storsjö
|
e6e56fd7a7 |
configure: Add detection of assembler support for SVE/SVE2
Signed-off-by: Martin Storsjö <martin@martin.st> |
5 months ago |
Rémi Denis-Courmont
|
01c5f4ad9f |
riscv: add Zvbb vector bit manipulation extension
|
9 months ago |
|
Rémi Denis-Courmont
|
b3825bbe45 |
riscv: test for assembler support
This should fix the build on LLVM 16 and earlier, at the cost of turning all non-RVV optimisations off. |
1 year ago |
|
Rémi Denis-Courmont
|
1b6aee52a5 |
configure: probe RISC-V Vector extension
|
2 years ago |
Shiyou Yin
|
9a840ffa17 |
avutil: [loongarch] Add support for loongarch SIMD.
LSX and LASX is loongarch SIMD extention. They are enabled by default if compiler support it, and can be disabled with '--disable-lsx' '--disable-lasx'. Change-Id: Ie2608ea61dbd9b7fffadbf0ec2348bad6c124476 Reviewed-by: Shiyou Yin <yinshiyou-hf@loongson.cn> Reviewed-by: guxiwei <guxiwei-hf@loongson.cn> Signed-off-by: Michael Niedermayer <michael@niedermayer.cc> |
3 years ago |
Diego Biurrun
|
fd502f4f5f |
build: Generalize yasm/nasm-related variable names
None of them are specific to the YASM assembler.
(Cherry-picked from libav commit
|
8 years ago |