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Commit Graph

6 Commits (b62d4c16c901a7e3fe0296345970bce815ac410e)

Author	SHA1	Message	Date
Mans Rullgard	2b140a3d09	x86: use 32-bit source registers with movd instruction ... yasm tolerates mismatch between movd/movq and source register size, adjusting the instruction according to the register. nasm is more strict. Signed-off-by: Mans Rullgard <mans@mansr.com>	13 years ago
Ronald S. Bultje	76888c64b0	rv34: port x86 SIMD to cpuflags.	13 years ago
Christophe Gisquet	fe5ed69dc7	rv34dsp x86: implement MMX2 inverse transform ... 141 cycles down to 51. Signed-off-by: Ronald S. Bultje <rsbultje@gmail.com>	13 years ago
Christophe GISQUET	9ba9c34024	rv34: 1-pass inter MB reconstruction ... Implement 1-pass inverse transform and reconstruction for inter blocks.	13 years ago
Christophe GISQUET	d78062386e	rv34: Intra 16x16 handling ... Extract processing of intra 16x16 blocks from intra macroblock processing. Also implement a function performing inverse transform and block reconstruction for DC-only blocks in 1 pass instead of 2.	13 years ago
Christophe GISQUET	3faa303a47	rv34: DC-only inverse transform ... When decoding coefficients, detect whether the block is DC-only, and take advantage of this knowledge to perform DC-only inverse transform. This is achieved by: - first, changing the 108x4 element modulo_three_table into a 108 element table (kind of base4), and accessing each value using mask and shifts. - then, checking low bits for 0 (as they represent the presence of higher frequency coefficients) Also provide x86 SIMD code for the DC-only inverse transform. Signed-off-by: Kostya Shishkov <kostya.shishkov@gmail.com>	13 years ago